Mercurial > pt1.oyama

changeset 64:98a92ce5382e

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
added fake support code for PT2. the PT2 part is not expected to work. be careful!
author Yoshiki Yazawa <yaz@honeyplanet.jp>
date Thu, 22 Oct 2009 02:18:12 +0900
parents ca419e61f7f2
children c701bbc532b4
files driver/pt1_pci.c driver/pt1_pci.h driver/pt1_tuner.c driver/pt1_tuner.h
diffstat 4 files changed, 75 insertions(+), 26 deletions(-) [+]
line wrap: on
line diff
--- a/driver/pt1_pci.c	Sat Oct 10 01:11:34 2009 +0900
+++ b/driver/pt1_pci.c	Thu Oct 22 02:18:12 2009 +0900
@@ -59,8 +59,13 @@
 MODULE_PARM_DESC(debug, "debug level (1-2)");
 MODULE_PARM_DESC(debug, "LNB level (0:OFF 1:+11V 2:+15V)");
 
+#define VENDOR_EARTHSOFT 0x10ee
+#define PCI_PT1_ID 0x211a
+#define PCI_PT2_ID 0x222a
+
 static struct pci_device_id pt1_pci_tbl[] = {
-	{ 0x10ee, 0x211a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
+	{ VENDOR_EARTHSOFT, PCI_PT1_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
+	{ VENDOR_EARTHSOFT, PCI_PT2_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
 	{ 0, }
 };
 MODULE_DEVICE_TABLE(pci, pt1_pci_tbl);
@@ -97,7 +102,8 @@
 	wait_queue_head_t	dma_wait_q ;// for poll on reading
 	DMA_CONTROL		*dmactl[DMA_RING_SIZE];
 	PT1_CHANNEL		*channel[MAX_CHANNEL];
-}PT1_DEVICE;
+	int			cardtype;
+} PT1_DEVICE;
 
 typedef	struct	_MICRO_PACKET{
 	char	data[3];
@@ -514,12 +520,12 @@
 			return 0 ;
 		case LNB_ENABLE:
 			if(lnb){
-				settuner_reset(channel->ptr->regs, lnb, TUNER_POWER_ON_RESET_DISABLE);
+				settuner_reset(channel->ptr->regs, channel->ptr->cardtype, lnb, TUNER_POWER_ON_RESET_DISABLE);
 			}
 			return 0 ;
 		case LNB_DISABLE:
 			if(lnb){
-				settuner_reset(channel->ptr->regs, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE);
+				settuner_reset(channel->ptr->regs, channel->ptr->cardtype, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE);
 			}
 			return 0 ;
 	}
@@ -628,7 +634,7 @@
 	rc = pci_enable_device(pdev);
 	if (rc)
 		return rc;
-	rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
+	rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
 	if (rc) {
 		printk(KERN_ERR "PT1:DMA MASK ERROR");
 		return rc;
@@ -663,6 +669,18 @@
 			return -ENOMEM ;
 		}
 	}
+
+	switch(ent->device) {
+	case PCI_PT1_ID:
+		dev_conf->cardtype = PT1;
+		break;
+	case PCI_PT2_ID:
+		dev_conf->cardtype = PT2;
+		break;
+	default:
+		break;
+	}
+
 	// PCIアドレスをマップする
 	dev_conf->mmio_start = pci_resource_start(pdev, 0);
 	dev_conf->mmio_len = pci_resource_len(pdev, 0);
@@ -683,10 +701,10 @@
 		goto out_err_fpga;
 	}
 	// チューナリセット
-	settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_ON_RESET_ENABLE);
+	settuner_reset(dev_conf->regs, dev_conf->cardtype, LNB_OFF, TUNER_POWER_ON_RESET_ENABLE);
 	schedule_timeout_interruptible(msecs_to_jiffies(50));
 
-	settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE);
+	settuner_reset(dev_conf->regs, dev_conf->cardtype, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE);
 	schedule_timeout_interruptible(msecs_to_jiffies(10));
 	mutex_init(&dev_conf->lock);
 
@@ -815,7 +833,7 @@
 	}
 out_err_fpga:
 	writel(0xb0b0000, dev_conf->regs);
-	writel(0, dev_conf->regs + 4);
+	writel(0, dev_conf->regs + CFG_REGS_ADDR);
 	iounmap(dev_conf->regs);
 	release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len);
 	for (i = 0; i < DMA_RING_SIZE; i++) {
@@ -864,8 +882,8 @@
 
 		unregister_chrdev_region(dev_conf->dev, MAX_CHANNEL);
 		writel(0xb0b0000, dev_conf->regs);
-		writel(0, dev_conf->regs + 4);
-		settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_OFF);
+		writel(0, dev_conf->regs + CFG_REGS_ADDR);
+		settuner_reset(dev_conf->regs, dev_conf->cardtype, LNB_OFF, TUNER_POWER_OFF);
 		release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len);
 		iounmap(dev_conf->regs);
 		for (i = 0; i < DMA_RING_SIZE; i++) {
--- a/driver/pt1_pci.h	Sat Oct 10 01:11:34 2009 +0900
+++ b/driver/pt1_pci.h	Thu Oct 22 02:18:12 2009 +0900
@@ -10,6 +10,7 @@
 /***************************************************************************/
 #define		FIFO_GO_ADDR		0x00			// FIFO 実行アドレス
 #define		FIFO_RESULT_ADDR	0x00			// FIFO 結果情報
+#define		CFG_REGS_ADDR		0x04
 #define		I2C_RESULT_ADDR		0x08			// I2C処理結果
 #define		FIFO_ADDR			0x10			// FIFOに書くアドレス
 #define		DMA_ADDR			0x14			// DMA設定に書くアドレス
--- a/driver/pt1_tuner.c	Sat Oct 10 01:11:34 2009 +0900
+++ b/driver/pt1_tuner.c	Thu Oct 22 02:18:12 2009 +0900
@@ -35,7 +35,7 @@
 }isdb_t_freq_add_table;
 
 isdb_t_freq_add_table	isdb_t_freq_add[10] = {
-	{  7,  0x8081},				// 0〜7迄
+	{  7, 0x8081},				// 0〜7迄
 	{ 12, 0x80A1},				// 8〜12迄
 	{ 21, 0x8062},				// 13〜21迄
 	{ 39, 0x80A2},				// 22〜39迄
@@ -47,20 +47,39 @@
 	{112, 0x80E4}				// 101〜112迄
 };
 
-void	settuner_reset(void __iomem *regs, __u32 lnb, __u32 tuner)
+void	settuner_reset(void __iomem *regs, int cardtype, __u32 lnb, __u32 tuner)
 {
 	__u32	val = 0;
 	switch(lnb){
-		case LNB_11V: val = (1 << BIT_LNB_DOWN); break ;
-		case LNB_15V: val = (1 << BIT_LNB_UP) | (1 << BIT_LNB_DOWN) ; break ;
+		case LNB_11V:
+            val = (1 << BIT_LNB_DOWN);
+            break ;
+		case LNB_15V:
+            val = (1 << BIT_LNB_UP) | (1 << BIT_LNB_DOWN);
+            break ;
 	}
 
-	switch(tuner){
-		case TUNER_POWER_ON_RESET_ENABLE: val |= (1 << BIT_TUNER) ; break ;
-		case TUNER_POWER_ON_RESET_DISABLE: val |= (1 << BIT_TUNER) | (1 << BIT_RESET) ; break ;
+	if(cardtype == PT1) {
+		switch(tuner){
+		case TUNER_POWER_ON_RESET_ENABLE:
+			val |= (1 << BIT_TUNER);
+			break;
+		case TUNER_POWER_ON_RESET_DISABLE:
+			val |= (1 << BIT_TUNER) | (1 << BIT_RESET);
+			break ;
+		}
 	}
-
-	writel(val, (regs + 4));
+	else if(cardtype == PT2) {
+		switch(tuner){
+		case TUNER_POWER_ON_RESET_ENABLE:
+			val |= (1 << BIT_TUNER) | (1 << BIT_FRONTEND);
+			break;
+		case TUNER_POWER_ON_RESET_DISABLE:
+			val |= (1 << BIT_TUNER) | (1 << BIT_FRONTEND) | (1 << BIT_RESET);
+			break ;
+		}
+	}
+	writel(val, (regs + CFG_REGS_ADDR));
 }
 static	int		init_isdb_s(void __iomem *regs, struct mutex *lock, __u32 addr)
 {
@@ -139,8 +158,12 @@
 
 	if(type == TYPE_WAKEUP){
 		switch(tuner_type){
-			case CHANNEL_TYPE_ISDB_S:memcpy(&wk, &isdb_s_wake, sizeof(WBLOCK));break ;
-			case CHANNEL_TYPE_ISDB_T:memcpy(&wk, &isdb_t_wake, sizeof(WBLOCK));break ;
+			case CHANNEL_TYPE_ISDB_S:
+				memcpy(&wk, &isdb_s_wake, sizeof(WBLOCK));
+				break ;
+			case CHANNEL_TYPE_ISDB_T:
+				memcpy(&wk, &isdb_t_wake, sizeof(WBLOCK));
+				break ;
 		}
 		wk.addr = address ;
 		i2c_write(regs, lock, &wk);
--- a/driver/pt1_tuner.h	Sat Oct 10 01:11:34 2009 +0900
+++ b/driver/pt1_tuner.h	Thu Oct 22 02:18:12 2009 +0900
@@ -3,18 +3,19 @@
 /***************************************************************************/
 /* チューナ状態定義                                                        */
 /***************************************************************************/
-// SLEEPモード設定	
+// SLEEPモード設定
 enum	{
 	TYPE_SLEEP,
 	TYPE_WAKEUP
 };
 
-// チューナパワーモード設定	
+// チューナパワーモード設定
 enum {
 	BIT_TUNER,
 	BIT_LNB_UP,
 	BIT_LNB_DOWN,
-	BIT_RESET
+	BIT_RESET,
+	BIT_FRONTEND
 };
 
 // LNBパワー設定
@@ -22,13 +23,19 @@
 	LNB_OFF,						// LNB OFF
 	LNB_11V,						// +11 V
 	LNB_15V							// +15 V
+};
 
-};
 enum{								// 電源／ハードウェアリセット
 	TUNER_POWER_OFF,				// オフ／イネーブル
 	TUNER_POWER_ON_RESET_ENABLE,	// オン／イネーブル
 	TUNER_POWER_ON_RESET_DISABLE	// オン／ディセーブル
 };
+
+enum {
+    PT1 = 0,
+    PT2,
+};
+
 /***************************************************************************/
 /* チューナ状態定義                                                        */
 /***************************************************************************/
@@ -98,7 +105,7 @@
 /***************************************************************************/
 /* チューナ状態定義                                                        */
 /***************************************************************************/
-extern	void	settuner_reset(void __iomem *, __u32, __u32);
+extern	void	settuner_reset(void __iomem *, int, __u32, __u32);
 extern	int		tuner_init(void __iomem *, struct mutex *, int);
 extern	void	set_sleepmode(void __iomem *, struct mutex *, int, int, int);