Mercurial > pt1
annotate driver/pt1_pci.c @ 45:05424917a022
add a rule to install an udev rule file
author | Yoshiki Yazawa <yaz@honeyplanet.jp> |
---|---|
date | Sun, 19 Jul 2009 03:07:46 +0900 |
parents | 07d71b1484a8 |
children | 23b6f99f65b2 |
rev | line source |
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0 | 1 /* pt1-pci.c: A PT1 on PCI bus driver for Linux. */ |
2 #define DRV_NAME "pt1-pci" | |
3 #define DRV_VERSION "1.00" | |
4 #define DRV_RELDATE "11/28/2008" | |
5 | |
6 | |
7 #include <linux/module.h> | |
8 #include <linux/kernel.h> | |
9 #include <linux/errno.h> | |
10 #include <linux/pci.h> | |
11 #include <linux/init.h> | |
12 #include <linux/interrupt.h> | |
13 | |
14 #include <asm/system.h> | |
15 #include <asm/io.h> | |
16 #include <asm/irq.h> | |
17 #include <asm/uaccess.h> | |
18 #include <linux/version.h> | |
19 #include <linux/mutex.h> | |
36 | 20 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23) |
0 | 21 #include <linux/freezer.h> |
22 #else | |
23 #define set_freezable() | |
36 | 24 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) |
0 | 25 typedef struct pm_message { |
26 int event; | |
27 } pm_message_t; | |
28 #endif | |
29 #endif | |
30 #include <linux/kthread.h> | |
31 #include <linux/dma-mapping.h> | |
32 | |
33 #include <linux/fs.h> | |
34 #include <linux/cdev.h> | |
35 | |
36 #include <linux/ioctl.h> | |
37 | |
38 #include "pt1_com.h" | |
39 #include "pt1_pci.h" | |
40 #include "pt1_tuner.h" | |
41 #include "pt1_i2c.h" | |
42 #include "pt1_tuner_data.h" | |
43 #include "pt1_ioctl.h" | |
44 | |
45 /* These identify the driver base version and may not be removed. */ | |
46 static char version[] __devinitdata = | |
47 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " \n"; | |
48 | |
49 MODULE_AUTHOR("Tomoaki Ishikawa tomy@users.sourceforge.jp"); | |
50 #define DRIVER_DESC "PCI earthsoft PT1 driver" | |
51 MODULE_DESCRIPTION(DRIVER_DESC); | |
52 MODULE_LICENSE("GPL"); | |
53 | |
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54 static int debug = 7; /* 1 normal messages, 0 quiet .. 7 verbose. */ |
0 | 55 static int lnb = 0; /* LNB OFF:0 +11V:1 +15V:2 */ |
56 | |
57 module_param(debug, int, 0); | |
58 module_param(lnb, int, 0); | |
59 MODULE_PARM_DESC(debug, "debug level (1-2)"); | |
60 MODULE_PARM_DESC(debug, "LNB level (0:OFF 1:+11V 2:+15V)"); | |
61 | |
62 static struct pci_device_id pt1_pci_tbl[] = { | |
63 { 0x10ee, 0x211a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, | |
64 { 0, } | |
65 }; | |
66 MODULE_DEVICE_TABLE(pci, pt1_pci_tbl); | |
67 #define DEV_NAME "pt1video" | |
68 | |
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69 #define PACKET_SIZE 188 // 1パケット長 |
0 | 70 #define MAX_READ_BLOCK 4 // 1度に読み出す最大DMAバッファ数 |
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71 #define MAX_PCI_DEVICE 128 // 最大64枚 |
0 | 72 #define DMA_SIZE 4096 // DMAバッファサイズ |
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73 #define DMA_RING_SIZE 128 // RINGサイズ |
0 | 74 #define DMA_RING_MAX 511 // 1RINGにいくつ詰めるか(1023はNGで511まで) |
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75 #define CHANEL_DMA_SIZE (2*1024*1024) // 地デジ用(16Mbps) |
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76 #define BS_CHANEL_DMA_SIZE (4*1024*1024) // BS用(32Mbps) |
0 | 77 |
78 typedef struct _DMA_CONTROL{ | |
79 dma_addr_t ring_dma[DMA_RING_MAX] ; // DMA情報 | |
80 __u32 *data[DMA_RING_MAX]; | |
81 }DMA_CONTROL; | |
82 | |
83 typedef struct _PT1_CHANNEL PT1_CHANNEL; | |
84 | |
85 typedef struct _pt1_device{ | |
86 unsigned long mmio_start ; | |
87 __u32 mmio_len ; | |
88 void __iomem *regs; | |
89 struct mutex lock ; | |
90 dma_addr_t ring_dma[DMA_RING_SIZE] ; // DMA情報 | |
91 void *dmaptr[DMA_RING_SIZE] ; | |
92 struct task_struct *kthread; | |
93 dev_t dev ; | |
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94 int card_number; |
0 | 95 __u32 base_minor ; |
96 struct cdev cdev[MAX_CHANNEL]; | |
97 wait_queue_head_t dma_wait_q ;// for poll on reading | |
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98 DMA_CONTROL *dmactl[DMA_RING_SIZE]; |
0 | 99 PT1_CHANNEL *channel[MAX_CHANNEL]; |
100 }PT1_DEVICE; | |
101 | |
102 typedef struct _MICRO_PACKET{ | |
103 char data[3]; | |
104 char head ; | |
105 }MICRO_PACKET; | |
106 | |
107 struct _PT1_CHANNEL{ | |
108 __u32 valid ; // 使用中フラグ | |
109 __u32 address ; // I2Cアドレス | |
110 __u32 channel ; // チャネル番号 | |
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111 int type ; // チャネルタイプ |
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112 __u32 packet_size ; // パケットサイズ |
0 | 113 __u32 drop ; // パケットドロップ数 |
114 struct mutex lock ; // CH別mutex_lock用 | |
115 __u32 size ; // DMAされたサイズ | |
116 __u32 maxsize ; // DMA用バッファサイズ | |
117 __u32 bufsize ; // チャネルに割り振られたサイズ | |
118 __u32 overflow ; // オーバーフローエラー発生 | |
119 __u32 counetererr ; // 転送カウンタ1エラー | |
120 __u32 transerr ; // 転送エラー | |
121 __u32 minor ; // マイナー番号 | |
122 __u8 *buf; // CH別受信メモリ | |
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123 __u32 pointer; |
0 | 124 __u8 req_dma ; // 溢れたチャネル |
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125 __u8 packet_buf[PACKET_SIZE] ; // 溢れたチャネル |
0 | 126 PT1_DEVICE *ptr ; // カード別情報 |
127 wait_queue_head_t wait_q ; // for poll on reading | |
128 }; | |
129 | |
130 // I2Cアドレス(video0, 1 = ISDB-S) (video2, 3 = ISDB-T) | |
131 int i2c_address[MAX_CHANNEL] = {T0_ISDB_S, T1_ISDB_S, T0_ISDB_T, T1_ISDB_T}; | |
132 int real_chanel[MAX_CHANNEL] = {0, 2, 1, 3}; | |
133 int channeltype[MAX_CHANNEL] = {CHANNEL_TYPE_ISDB_S, CHANNEL_TYPE_ISDB_S, | |
134 CHANNEL_TYPE_ISDB_T, CHANNEL_TYPE_ISDB_T}; | |
135 | |
136 static PT1_DEVICE *device[MAX_PCI_DEVICE]; | |
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137 static struct class *pt1video_class; |
0 | 138 |
139 #define PT1MAJOR 251 | |
140 #define DRIVERNAME "pt1video" | |
141 | |
142 static void reset_dma(PT1_DEVICE *dev_conf) | |
143 { | |
144 | |
145 int lp ; | |
146 __u32 addr ; | |
147 int ring_pos = 0; | |
148 int data_pos = 0 ; | |
149 __u32 *dataptr ; | |
150 | |
151 // データ初期化 | |
152 for(ring_pos = 0 ; ring_pos < DMA_RING_SIZE ; ring_pos++){ | |
153 for(data_pos = 0 ; data_pos < DMA_RING_MAX ; data_pos++){ | |
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154 dataptr = (dev_conf->dmactl[ring_pos])->data[data_pos]; |
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155 dataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0; |
0 | 156 } |
157 } | |
158 // 転送カウンタをリセット | |
159 writel(0x00000010, dev_conf->regs); | |
160 // 転送カウンタをインクリメント | |
161 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
162 writel(0x00000020, dev_conf->regs); | |
163 } | |
164 | |
165 addr = (int)dev_conf->ring_dma[0] ; | |
166 addr >>= 12 ; | |
167 // DMAバッファ設定 | |
168 writel(addr, dev_conf->regs + DMA_ADDR); | |
169 // DMA開始 | |
170 writel(0x0c000040, dev_conf->regs); | |
171 | |
172 } | |
173 static int pt1_thread(void *data) | |
174 { | |
175 PT1_DEVICE *dev_conf = data ; | |
176 PT1_CHANNEL *channel ; | |
177 int ring_pos = 0; | |
178 int data_pos = 0 ; | |
179 int lp ; | |
180 int chno ; | |
181 int lp2 ; | |
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182 int dma_channel ; |
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183 int packet_pos ; |
0 | 184 __u32 *dataptr ; |
185 __u32 *curdataptr ; | |
186 __u32 val ; | |
187 union mpacket{ | |
188 __u32 val ; | |
189 MICRO_PACKET packet ; | |
190 }micro; | |
191 | |
192 set_freezable(); | |
193 reset_dma(dev_conf); | |
194 printk(KERN_INFO "pt1_thread run\n"); | |
195 | |
196 for(;;){ | |
197 if(kthread_should_stop()){ | |
198 break ; | |
199 } | |
200 | |
201 for(;;){ | |
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202 dataptr = (dev_conf->dmactl[ring_pos])->data[data_pos]; |
0 | 203 // データあり? |
204 if(dataptr[(DMA_SIZE / sizeof(__u32)) - 2] == 0){ | |
205 break ; | |
206 } | |
207 micro.val = *dataptr ; | |
208 curdataptr = dataptr ; | |
209 data_pos += 1 ; | |
210 for(lp = 0 ; lp < (DMA_SIZE / sizeof(__u32)) ; lp++, dataptr++){ | |
211 micro.val = *dataptr ; | |
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212 dma_channel = ((micro.packet.head >> 5) & 0x07); |
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213 //チャネル情報不正 |
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214 if(dma_channel > MAX_CHANNEL){ |
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215 printk(KERN_ERR "DMA Channel Number Error(%d)\n", dma_channel); |
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216 continue ; |
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217 } |
0 | 218 chno = real_chanel[(((micro.packet.head >> 5) & 0x07) - 1)]; |
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219 packet_pos = ((micro.packet.head >> 2) & 0x07); |
0 | 220 channel = dev_conf->channel[chno] ; |
221 // エラーチェック | |
222 if((micro.packet.head & MICROPACKET_ERROR)){ | |
223 val = readl(dev_conf->regs); | |
224 if((val & BIT_RAM_OVERFLOW)){ | |
225 channel->overflow += 1 ; | |
226 } | |
227 if((val & BIT_INITIATOR_ERROR)){ | |
228 channel->counetererr += 1 ; | |
229 } | |
230 if((val & BIT_INITIATOR_WARNING)){ | |
231 channel->transerr += 1 ; | |
232 } | |
233 // 初期化して先頭から | |
234 reset_dma(dev_conf); | |
235 ring_pos = data_pos = 0 ; | |
236 break ; | |
237 } | |
238 // 未使用チャネルは捨てる | |
239 if(channel->valid == FALSE){ | |
240 continue ; | |
241 } | |
242 mutex_lock(&channel->lock); | |
243 // あふれたら読み出すまで待つ | |
244 while(1){ | |
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245 if(channel->size >= (channel->maxsize - PACKET_SIZE - 4)){ |
0 | 246 // 該当チャンネルのDMA読みだし待ちにする |
247 wake_up(&channel->wait_q); | |
248 channel->req_dma = TRUE ; | |
249 mutex_unlock(&channel->lock); | |
250 // タスクに時間を渡す為中断 | |
251 wait_event_timeout(dev_conf->dma_wait_q, (channel->req_dma == FALSE), | |
252 msecs_to_jiffies(500)); | |
253 mutex_lock(&channel->lock); | |
254 channel->drop += 1 ; | |
255 }else{ | |
256 break ; | |
257 } | |
258 } | |
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259 // 先頭で、一時バッファに残っている場合 |
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260 if((micro.packet.head & 0x02) && (channel->packet_size != 0)){ |
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261 channel->packet_size = 0 ; |
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262 } |
0 | 263 // データコピー |
264 for(lp2 = 2 ; lp2 >= 0 ; lp2--){ | |
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265 channel->packet_buf[channel->packet_size] = micro.packet.data[lp2] ; |
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266 channel->packet_size += 1 ; |
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267 } |
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268 |
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269 // パケットが出来たらコピーする |
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270 if(channel->packet_size >= PACKET_SIZE){ |
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271 if (channel->pointer + channel->size >= channel->maxsize) { |
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272 // リングバッファの境界を越えていてリングバッファの先頭に戻っている場合 |
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273 // channel->pointer + channel->size - channel->maxsize でリングバッファ先頭からのアドレスになる |
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274 memcpy(&channel->buf[channel->pointer + channel->size - channel->maxsize], channel->packet_buf, PACKET_SIZE); |
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275 } else if (channel->pointer + channel->size + PACKET_SIZE > channel->maxsize) { |
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276 // リングバッファの境界をまたぐように書き込まれる場合 |
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277 // リングバッファの境界まで書き込み |
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278 __u32 tmp_size = channel->maxsize - (channel->pointer + channel->size); |
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279 memcpy(&channel->buf[channel->pointer + channel->size], channel->packet_buf, tmp_size); |
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280 // 先頭に戻って書き込み |
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281 memcpy(channel->buf, &channel->packet_buf[tmp_size], PACKET_SIZE - tmp_size); |
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282 } else { |
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283 // リングバッファ内で収まる場合 |
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284 // 通常の書き込み |
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285 memcpy(&channel->buf[channel->pointer + channel->size], channel->packet_buf, PACKET_SIZE); |
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286 } |
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287 channel->size += PACKET_SIZE ; |
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288 channel->packet_size = 0 ; |
0 | 289 } |
290 mutex_unlock(&channel->lock); | |
291 } | |
292 curdataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0; | |
293 | |
294 if(data_pos >= DMA_RING_MAX){ | |
295 data_pos = 0; | |
296 ring_pos += 1 ; | |
297 // DMAリングが変わった場合はインクリメント | |
298 writel(0x00000020, dev_conf->regs); | |
299 if(ring_pos >= DMA_RING_SIZE){ | |
300 ring_pos = 0 ; | |
301 } | |
302 } | |
303 | |
304 // 頻度を落す(4Kで起動させる) | |
305 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
306 channel = dev_conf->channel[real_chanel[lp]] ; | |
307 if((channel->size >= DMA_SIZE) && (channel->valid == TRUE)){ | |
308 wake_up(&channel->wait_q); | |
309 } | |
310 } | |
311 } | |
312 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
313 } | |
314 return 0 ; | |
315 } | |
316 static int pt1_open(struct inode *inode, struct file *file) | |
317 { | |
318 | |
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319 int major = imajor(inode); |
0 | 320 int minor = iminor(inode); |
321 int lp ; | |
322 int lp2 ; | |
323 PT1_CHANNEL *channel ; | |
324 | |
325 for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){ | |
326 if(device[lp] == NULL){ | |
327 return -EIO ; | |
328 } | |
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329 |
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330 if(MAJOR(device[lp]->dev) == major && |
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331 device[lp]->base_minor <= minor && |
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332 device[lp]->base_minor + MAX_CHANNEL > minor) { |
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333 |
0 | 334 mutex_lock(&device[lp]->lock); |
335 for(lp2 = 0 ; lp2 < MAX_CHANNEL ; lp2++){ | |
336 channel = device[lp]->channel[lp2] ; | |
337 if(channel->minor == minor){ | |
338 if(channel->valid == TRUE){ | |
339 mutex_unlock(&device[lp]->lock); | |
340 return -EIO ; | |
341 } | |
342 channel->drop = 0 ; | |
343 channel->valid = TRUE ; | |
344 channel->overflow = 0 ; | |
345 channel->counetererr = 0 ; | |
346 channel->transerr = 0 ; | |
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347 channel->packet_size = 0 ; |
0 | 348 file->private_data = channel; |
349 mutex_lock(&channel->lock); | |
350 // データ初期化 | |
351 channel->size = 0 ; | |
352 mutex_unlock(&channel->lock); | |
353 mutex_unlock(&device[lp]->lock); | |
354 return 0 ; | |
355 } | |
356 } | |
357 } | |
358 } | |
359 return -EIO; | |
360 } | |
361 static int pt1_release(struct inode *inode, struct file *file) | |
362 { | |
363 PT1_CHANNEL *channel = file->private_data; | |
364 | |
365 mutex_lock(&channel->ptr->lock); | |
366 SetStream(channel->ptr->regs, channel->channel, FALSE); | |
367 channel->valid = FALSE ; | |
31
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368 printk(KERN_INFO "(%d:%d)Drop=%08d:%08d:%08d:%08d\n", imajor(inode), iminor(inode), channel->drop, |
0 | 369 channel->overflow, channel->counetererr, channel->transerr); |
370 channel->overflow = 0 ; | |
371 channel->counetererr = 0 ; | |
372 channel->transerr = 0 ; | |
373 channel->drop = 0 ; | |
374 // 停止している場合は起こす | |
375 if(channel->req_dma == TRUE){ | |
376 channel->req_dma = FALSE ; | |
377 wake_up(&channel->ptr->dma_wait_q); | |
378 } | |
379 mutex_unlock(&channel->ptr->lock); | |
380 return 0; | |
381 } | |
382 | |
383 static ssize_t pt1_read(struct file *file, char __user *buf, size_t cnt, loff_t * ppos) | |
384 { | |
385 PT1_CHANNEL *channel = file->private_data; | |
386 __u32 size ; | |
36 | 387 unsigned long dummy; |
0 | 388 |
389 // 4K単位で起こされるのを待つ(CPU負荷対策) | |
390 if(channel->size < DMA_SIZE){ | |
391 wait_event_timeout(channel->wait_q, (channel->size >= DMA_SIZE), | |
392 msecs_to_jiffies(500)); | |
393 } | |
394 mutex_lock(&channel->lock); | |
395 if(!channel->size){ | |
396 size = 0 ; | |
397 }else{ | |
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398 __u32 tmp_size = 0; |
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399 if (cnt < channel->size) { |
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400 // バッファにあるデータより小さい読み込みの場合 |
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401 size = cnt; |
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402 } else { |
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403 // バッファにあるデータ以上の読み込みの場合 |
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404 size = channel->size; |
0 | 405 } |
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406 if (channel->maxsize <= size + channel->pointer) { |
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407 // リングバッファの境界を越える場合 |
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408 tmp_size = channel->maxsize - channel->pointer; |
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409 // 境界までコピー |
44 | 410 dummy = copy_to_user(buf, &channel->buf[channel->pointer], tmp_size); |
41
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411 // 残りをコピー |
44 | 412 dummy = copy_to_user(&buf[tmp_size], channel->buf, size - tmp_size); |
41
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413 channel->pointer = size - tmp_size; |
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414 } else { |
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415 // 普通にコピー |
44 | 416 dummy = copy_to_user(buf, &channel->buf[channel->pointer], size); |
41
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417 channel->pointer += size; |
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418 } |
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419 channel->size -= size; |
0 | 420 } |
421 // 読み終わったかつ使用しているのがが4K以下 | |
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422 if(channel->req_dma == TRUE){ |
0 | 423 channel->req_dma = FALSE ; |
424 wake_up(&channel->ptr->dma_wait_q); | |
425 } | |
426 mutex_unlock(&channel->lock); | |
427 return size ; | |
428 } | |
429 static int SetFreq(PT1_CHANNEL *channel, FREQUENCY *freq) | |
430 { | |
431 | |
432 switch(channel->type){ | |
433 case CHANNEL_TYPE_ISDB_S: | |
434 { | |
435 ISDB_S_TMCC tmcc ; | |
436 if(bs_tune(channel->ptr->regs, | |
437 &channel->ptr->lock, | |
438 channel->address, | |
439 freq->frequencyno, | |
440 &tmcc) < 0){ | |
441 return -EIO ; | |
442 } | |
443 | |
444 #if 0 | |
445 printk(KERN_INFO "clockmargin = (%x)\n", (tmcc.clockmargin & 0xFF)); | |
446 printk(KERN_INFO "carriermargin = (%x)\n", (tmcc.carriermargin & 0xFF)); | |
447 | |
448 for(lp = 0 ; lp < MAX_BS_TS_ID ; lp++){ | |
449 if(tmcc.ts_id[lp].ts_id == 0xFFFF){ | |
450 continue ; | |
451 } | |
452 printk(KERN_INFO "Slot(%d:%x)\n", lp, tmcc.ts_id[lp].ts_id); | |
453 printk(KERN_INFO "mode (low/high) = (%x:%x)\n", | |
454 tmcc.ts_id[lp].low_mode, tmcc.ts_id[lp].high_mode); | |
455 printk(KERN_INFO "slot (low/high) = (%x:%x)\n", | |
456 tmcc.ts_id[lp].low_slot, | |
457 tmcc.ts_id[lp].high_slot); | |
458 } | |
459 #endif | |
460 ts_lock(channel->ptr->regs, | |
461 &channel->ptr->lock, | |
462 channel->address, | |
463 tmcc.ts_id[freq->slot].ts_id); | |
464 } | |
465 break ; | |
466 case CHANNEL_TYPE_ISDB_T: | |
467 { | |
468 if(isdb_t_frequency(channel->ptr->regs, | |
469 &channel->ptr->lock, | |
470 channel->address, | |
471 freq->frequencyno, freq->slot) < 0){ | |
472 return -EINVAL ; | |
473 } | |
474 } | |
475 } | |
476 return 0 ; | |
477 } | |
36 | 478 static int pt1_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg0) |
0 | 479 { |
480 PT1_CHANNEL *channel = file->private_data; | |
36 | 481 int signal ; |
482 unsigned long dummy; | |
483 void *arg = (void *)arg0; | |
0 | 484 |
485 switch(cmd){ | |
486 case SET_CHANNEL: | |
487 { | |
488 FREQUENCY freq ; | |
36 | 489 dummy = copy_from_user(&freq, arg, sizeof(FREQUENCY)); |
0 | 490 return SetFreq(channel, &freq); |
491 } | |
492 case START_REC: | |
493 SetStream(channel->ptr->regs, channel->channel, TRUE); | |
494 return 0 ; | |
495 case STOP_REC: | |
496 SetStream(channel->ptr->regs, channel->channel, FALSE); | |
497 return 0 ; | |
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498 case GET_SIGNAL_STRENGTH: |
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499 switch(channel->type){ |
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500 case CHANNEL_TYPE_ISDB_S: |
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501 { |
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502 signal = isdb_s_read_signal_strength(channel->ptr->regs, |
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503 &channel->ptr->lock, |
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504 channel->address); |
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505 } |
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506 break ; |
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507 case CHANNEL_TYPE_ISDB_T: |
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508 // calc C/N |
36 | 509 signal = isdb_t_read_signal_strength(channel->ptr->regs, |
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510 &channel->ptr->lock, channel->address); |
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511 break ; |
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512 } |
36 | 513 dummy = copy_to_user(arg, &signal, sizeof(int)); |
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514 return 0 ; |
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515 case LNB_ENABLE: |
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516 if(lnb){ |
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517 settuner_reset(channel->ptr->regs, lnb, TUNER_POWER_ON_RESET_DISABLE); |
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518 } |
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519 return 0 ; |
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520 case LNB_DISABLE: |
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521 if(lnb){ |
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522 settuner_reset(channel->ptr->regs, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE); |
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523 } |
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524 return 0 ; |
0 | 525 } |
526 return -EINVAL; | |
527 } | |
528 | |
529 /* | |
530 */ | |
531 static const struct file_operations pt1_fops = { | |
532 .owner = THIS_MODULE, | |
533 .open = pt1_open, | |
534 .release = pt1_release, | |
535 .read = pt1_read, | |
536 .ioctl = pt1_ioctl, | |
537 .llseek = no_llseek, | |
538 }; | |
539 | |
540 int pt1_makering(struct pci_dev *pdev, PT1_DEVICE *dev_conf) | |
541 { | |
542 int lp ; | |
543 int lp2 ; | |
544 DMA_CONTROL *dmactl; | |
545 __u32 *dmaptr ; | |
546 __u32 addr ; | |
547 __u32 *ptr ; | |
548 | |
549 //DMAリング作成 | |
550 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
551 ptr = dev_conf->dmaptr[lp]; | |
552 if(lp == (DMA_RING_SIZE - 1)){ | |
553 addr = (__u32)dev_conf->ring_dma[0]; | |
554 }else{ | |
555 addr = (__u32)dev_conf->ring_dma[(lp + 1)]; | |
556 } | |
557 addr >>= 12 ; | |
558 memcpy(ptr, &addr, sizeof(__u32)); | |
559 ptr += 1 ; | |
560 | |
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561 dmactl = dev_conf->dmactl[lp]; |
0 | 562 for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){ |
563 dmaptr = pci_alloc_consistent(pdev, DMA_SIZE, &dmactl->ring_dma[lp2]); | |
564 if(dmaptr == NULL){ | |
565 printk(KERN_INFO "PT1:DMA ALLOC ERROR\n"); | |
566 return -1 ; | |
567 } | |
568 dmactl->data[lp2] = dmaptr ; | |
569 // DMAデータエリア初期化 | |
570 dmaptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0 ; | |
571 addr = (__u32)dmactl->ring_dma[lp2]; | |
572 addr >>= 12 ; | |
573 memcpy(ptr, &addr, sizeof(__u32)); | |
574 ptr += 1 ; | |
575 } | |
576 } | |
577 return 0 ; | |
578 } | |
579 int pt1_dma_init(struct pci_dev *pdev, PT1_DEVICE *dev_conf) | |
580 { | |
581 int lp ; | |
582 void *ptr ; | |
583 | |
584 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
585 ptr = pci_alloc_consistent(pdev, DMA_SIZE, &dev_conf->ring_dma[lp]); | |
586 if(ptr == NULL){ | |
587 printk(KERN_INFO "PT1:DMA ALLOC ERROR\n"); | |
588 return -1 ; | |
589 } | |
590 dev_conf->dmaptr[lp] = ptr ; | |
591 } | |
592 | |
593 return pt1_makering(pdev, dev_conf); | |
594 } | |
595 int pt1_dma_free(struct pci_dev *pdev, PT1_DEVICE *dev_conf) | |
596 { | |
597 | |
598 int lp ; | |
599 int lp2 ; | |
600 | |
601 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
602 if(dev_conf->dmaptr[lp] != NULL){ | |
603 pci_free_consistent(pdev, DMA_SIZE, | |
604 dev_conf->dmaptr[lp], dev_conf->ring_dma[lp]); | |
605 for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){ | |
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606 if((dev_conf->dmactl[lp])->data[lp2] != NULL){ |
0 | 607 pci_free_consistent(pdev, DMA_SIZE, |
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608 (dev_conf->dmactl[lp])->data[lp2], |
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609 (dev_conf->dmactl[lp])->ring_dma[lp2]); |
0 | 610 } |
611 } | |
612 } | |
613 } | |
614 return 0 ; | |
615 } | |
616 static int __devinit pt1_pci_init_one (struct pci_dev *pdev, | |
617 const struct pci_device_id *ent) | |
618 { | |
619 int rc ; | |
620 int lp ; | |
621 int minor ; | |
622 u16 cmd ; | |
623 PT1_DEVICE *dev_conf ; | |
624 PT1_CHANNEL *channel ; | |
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625 int i; |
36 | 626 struct resource *dummy; |
0 | 627 |
628 rc = pci_enable_device(pdev); | |
629 if (rc) | |
630 return rc; | |
631 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
632 if (rc) { | |
633 printk(KERN_ERR "PT1:DMA MASK ERROR"); | |
634 return rc; | |
635 } | |
636 | |
637 pci_read_config_word(pdev, PCI_COMMAND, &cmd); | |
638 if (!(cmd & PCI_COMMAND_MASTER)) { | |
639 printk(KERN_INFO "Attempting to enable Bus Mastering\n"); | |
640 pci_set_master(pdev); | |
641 pci_read_config_word(pdev, PCI_COMMAND, &cmd); | |
642 if (!(cmd & PCI_COMMAND_MASTER)) { | |
643 printk(KERN_ERR "Bus Mastering is not enabled\n"); | |
644 return -EIO; | |
645 } | |
646 } | |
647 printk(KERN_INFO "Bus Mastering Enabled.\n"); | |
648 | |
649 dev_conf = kzalloc(sizeof(PT1_DEVICE), GFP_KERNEL); | |
650 if(!dev_conf){ | |
651 printk(KERN_ERR "PT1:out of memory !"); | |
652 return -ENOMEM ; | |
653 } | |
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654 for (i = 0; i < DMA_RING_SIZE; i++) { |
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655 dev_conf->dmactl[i] = kzalloc(sizeof(DMA_CONTROL), GFP_KERNEL); |
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656 if(!dev_conf->dmactl[i]){ |
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657 int j; |
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658 for (j = 0; j < i; j++) { |
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659 kfree(dev_conf->dmactl[j]); |
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660 } |
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661 kfree(dev_conf); |
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662 printk(KERN_ERR "PT1:out of memory !"); |
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663 return -ENOMEM ; |
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664 } |
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665 } |
0 | 666 // PCIアドレスをマップする |
667 dev_conf->mmio_start = pci_resource_start(pdev, 0); | |
668 dev_conf->mmio_len = pci_resource_len(pdev, 0); | |
36 | 669 dummy = request_mem_region(dev_conf->mmio_start, dev_conf->mmio_len, DEV_NAME); |
670 if (!dummy) { | |
0 | 671 printk(KERN_ERR "PT1: cannot request iomem (0x%llx).\n", (unsigned long long) dev_conf->mmio_start); |
672 goto out_err_regbase; | |
673 } | |
674 | |
675 dev_conf->regs = ioremap(dev_conf->mmio_start, dev_conf->mmio_len); | |
676 if (!dev_conf->regs){ | |
677 printk(KERN_ERR "pt1: Can't remap register area.\n"); | |
678 goto out_err_regbase; | |
679 } | |
680 // 初期化処理 | |
681 if(xc3s_init(dev_conf->regs)){ | |
682 printk(KERN_ERR "Error xc3s_init\n"); | |
683 goto out_err_fpga; | |
684 } | |
685 // チューナリセット | |
686 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_ON_RESET_ENABLE); | |
687 schedule_timeout_interruptible(msecs_to_jiffies(50)); | |
688 | |
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689 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE); |
0 | 690 schedule_timeout_interruptible(msecs_to_jiffies(10)); |
691 mutex_init(&dev_conf->lock); | |
692 | |
693 // Tuner 初期化処理 | |
694 for(lp = 0 ; lp < MAX_TUNER ; lp++){ | |
695 rc = tuner_init(dev_conf->regs, &dev_conf->lock, lp); | |
696 if(rc < 0){ | |
697 printk(KERN_ERR "Error tuner_init\n"); | |
698 goto out_err_fpga; | |
699 } | |
700 } | |
701 // 初期化完了 | |
702 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
36 | 703 set_sleepmode(dev_conf->regs, &dev_conf->lock, |
0 | 704 i2c_address[lp], channeltype[lp], TYPE_SLEEP); |
36 | 705 |
0 | 706 schedule_timeout_interruptible(msecs_to_jiffies(50)); |
707 } | |
708 rc = alloc_chrdev_region(&dev_conf->dev, 0, MAX_CHANNEL, DEV_NAME); | |
709 if(rc < 0){ | |
710 goto out_err_fpga; | |
711 } | |
712 | |
713 // 初期化 | |
714 init_waitqueue_head(&dev_conf->dma_wait_q); | |
715 | |
716 minor = MINOR(dev_conf->dev) ; | |
717 dev_conf->base_minor = minor ; | |
718 for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){ | |
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719 printk(KERN_INFO "PT1: device[%d]=%p\n", lp, device[lp]); |
0 | 720 if(device[lp] == NULL){ |
721 device[lp] = dev_conf ; | |
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722 dev_conf->card_number = lp; |
0 | 723 break ; |
724 } | |
725 } | |
726 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
727 cdev_init(&dev_conf->cdev[lp], &pt1_fops); | |
30
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728 dev_conf->cdev[lp].owner = THIS_MODULE; |
31
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diff
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729 cdev_add(&dev_conf->cdev[lp], |
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730 MKDEV(MAJOR(dev_conf->dev), (MINOR(dev_conf->dev) + lp)), 1); |
0 | 731 channel = kzalloc(sizeof(PT1_CHANNEL), GFP_KERNEL); |
732 if(!channel){ | |
733 printk(KERN_ERR "PT1:out of memory !"); | |
734 return -ENOMEM ; | |
735 } | |
736 | |
737 // 共通情報 | |
738 mutex_init(&channel->lock); | |
739 // 待ち状態を解除 | |
740 channel->req_dma = FALSE ; | |
741 // マイナー番号設定 | |
742 channel->minor = MINOR(dev_conf->dev) + lp ; | |
743 // 対象のI2Cデバイス | |
744 channel->address = i2c_address[lp] ; | |
745 channel->type = channeltype[lp] ; | |
746 // 実際のチューナ番号 | |
747 channel->channel = real_chanel[lp] ; | |
748 channel->ptr = dev_conf ; | |
749 channel->size = 0 ; | |
750 dev_conf->channel[lp] = channel ; | |
751 | |
752 init_waitqueue_head(&channel->wait_q); | |
753 | |
754 switch(channel->type){ | |
755 case CHANNEL_TYPE_ISDB_T: | |
756 channel->maxsize = CHANEL_DMA_SIZE ; | |
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757 channel->buf = vmalloc(CHANEL_DMA_SIZE); |
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758 channel->pointer = 0; |
0 | 759 break ; |
760 case CHANNEL_TYPE_ISDB_S: | |
761 channel->maxsize = BS_CHANEL_DMA_SIZE ; | |
41
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762 channel->buf = vmalloc(BS_CHANEL_DMA_SIZE); |
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763 channel->pointer = 0; |
0 | 764 break ; |
765 } | |
766 if(channel->buf == NULL){ | |
767 goto out_err_v4l; | |
768 } | |
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769 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) |
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770 printk(KERN_INFO "PT1: card_number = %d\n", |
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771 dev_conf->card_number); |
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772 device_create(pt1video_class, |
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773 NULL, |
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774 MKDEV(MAJOR(dev_conf->dev), |
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775 (MINOR(dev_conf->dev) + lp)), |
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776 NULL, |
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777 "pt1video%u", |
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778 MINOR(dev_conf->dev) + lp + |
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779 dev_conf->card_number * MAX_CHANNEL); |
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780 #else |
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781 device_create(pt1video_class, |
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782 NULL, |
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783 MKDEV(MAJOR(dev_conf->dev), |
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784 (MINOR(dev_conf->dev) + lp)), |
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785 "pt1video%u", |
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786 MINOR(dev_conf->dev) + lp + |
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787 dev_conf->card_number * MAX_CHANNEL); |
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788 #endif |
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789 |
0 | 790 #if 0 |
791 dev_conf->vdev[lp] = video_device_alloc(); | |
792 memcpy(dev_conf->vdev[lp], &pt1_template, sizeof(pt1_template)); | |
793 video_set_drvdata(dev_conf->vdev[lp], channel); | |
794 video_register_device(dev_conf->vdev[lp], VFL_TYPE_GRABBER, -1); | |
795 #endif | |
796 } | |
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797 |
0 | 798 if(pt1_dma_init(pdev, dev_conf) < 0){ |
799 goto out_err_dma; | |
800 } | |
801 dev_conf->kthread = kthread_run(pt1_thread, dev_conf, "pt1"); | |
802 pci_set_drvdata(pdev, dev_conf); | |
803 return 0; | |
804 | |
805 out_err_dma: | |
806 pt1_dma_free(pdev, dev_conf); | |
807 out_err_v4l: | |
808 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
809 if(dev_conf->channel[lp] != NULL){ | |
810 if(dev_conf->channel[lp]->buf != NULL){ | |
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diff
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811 vfree(dev_conf->channel[lp]->buf); |
0 | 812 } |
813 kfree(dev_conf->channel[lp]); | |
814 } | |
815 } | |
816 out_err_fpga: | |
817 writel(0xb0b0000, dev_conf->regs); | |
818 writel(0, dev_conf->regs + 4); | |
819 iounmap(dev_conf->regs); | |
820 release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len); | |
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821 for (i = 0; i < DMA_RING_SIZE; i++) { |
8f30a05cded2
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822 kfree(dev_conf->dmactl[i]); |
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823 } |
0 | 824 kfree(dev_conf); |
825 out_err_regbase: | |
826 return -EIO; | |
827 | |
828 } | |
829 | |
830 static void __devexit pt1_pci_remove_one(struct pci_dev *pdev) | |
831 { | |
832 | |
833 int lp ; | |
834 __u32 val ; | |
835 PT1_DEVICE *dev_conf = (PT1_DEVICE *)pci_get_drvdata(pdev); | |
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836 int i; |
0 | 837 |
838 if(dev_conf){ | |
839 if(dev_conf->kthread) { | |
840 kthread_stop(dev_conf->kthread); | |
841 dev_conf->kthread = NULL; | |
842 } | |
843 | |
844 // DMA終了 | |
845 writel(0x08080000, dev_conf->regs); | |
846 for(lp = 0 ; lp < 10 ; lp++){ | |
847 val = readl(dev_conf->regs); | |
848 if(!(val & (1 << 6))){ | |
849 break ; | |
850 } | |
851 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
852 } | |
853 pt1_dma_free(pdev, dev_conf); | |
854 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
855 if(dev_conf->channel[lp] != NULL){ | |
856 cdev_del(&dev_conf->cdev[lp]); | |
41
51a006a8d843
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diff
changeset
|
857 vfree(dev_conf->channel[lp]->buf); |
0 | 858 kfree(dev_conf->channel[lp]); |
859 } | |
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diff
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860 device_destroy(pt1video_class, |
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diff
changeset
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861 MKDEV(MAJOR(dev_conf->dev), |
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diff
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862 (MINOR(dev_conf->dev) + lp))); |
0 | 863 } |
31
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diff
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864 |
0 | 865 unregister_chrdev_region(dev_conf->dev, MAX_CHANNEL); |
866 writel(0xb0b0000, dev_conf->regs); | |
867 writel(0, dev_conf->regs + 4); | |
868 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_OFF); | |
869 release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len); | |
870 iounmap(dev_conf->regs); | |
40
8f30a05cded2
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diff
changeset
|
871 for (i = 0; i < DMA_RING_SIZE; i++) { |
8f30a05cded2
imported patch dmactlalloc
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diff
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|
872 kfree(dev_conf->dmactl[i]); |
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diff
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873 } |
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diff
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|
874 device[dev_conf->card_number] = NULL; |
0 | 875 kfree(dev_conf); |
876 } | |
877 pci_set_drvdata(pdev, NULL); | |
878 } | |
879 #ifdef CONFIG_PM | |
880 | |
881 static int pt1_pci_suspend (struct pci_dev *pdev, pm_message_t state) | |
882 { | |
883 return 0; | |
884 } | |
885 | |
886 static int pt1_pci_resume (struct pci_dev *pdev) | |
887 { | |
888 return 0; | |
889 } | |
890 | |
891 #endif /* CONFIG_PM */ | |
892 | |
893 | |
894 static struct pci_driver pt1_driver = { | |
895 .name = DRV_NAME, | |
896 .probe = pt1_pci_init_one, | |
897 .remove = __devexit_p(pt1_pci_remove_one), | |
898 .id_table = pt1_pci_tbl, | |
899 #ifdef CONFIG_PM | |
900 .suspend = pt1_pci_suspend, | |
901 .resume = pt1_pci_resume, | |
902 #endif /* CONFIG_PM */ | |
903 | |
904 }; | |
905 | |
906 | |
907 static int __init pt1_pci_init(void) | |
908 { | |
36 | 909 printk(version); |
9
07b2fc07ff48
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diff
changeset
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910 pt1video_class = class_create(THIS_MODULE, DRIVERNAME); |
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diff
changeset
|
911 if (IS_ERR(pt1video_class)) |
07b2fc07ff48
updated to current driver to support signal strength.
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diff
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912 return PTR_ERR(pt1video_class); |
0 | 913 return pci_register_driver(&pt1_driver); |
914 } | |
915 | |
916 | |
917 static void __exit pt1_pci_cleanup(void) | |
918 { | |
9
07b2fc07ff48
updated to current driver to support signal strength.
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diff
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|
919 class_destroy(pt1video_class); |
31
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diff
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920 pci_unregister_driver(&pt1_driver); |
0 | 921 } |
922 | |
923 module_init(pt1_pci_init); | |
924 module_exit(pt1_pci_cleanup); |