Mercurial > pt1
annotate driver/pt1_i2c.c @ 131:2dc994610477
kernel 3.4.x no longer has asm/system.h
author | Yoshiki Yazawa <yaz@honeyplanet.jp> |
---|---|
date | Wed, 27 Jun 2012 06:42:55 +0900 |
parents | b8032e8099de |
children | 1e7718cc2556 |
rev | line source |
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0 | 1 /***************************************************************************/ |
2 /* I2C情報作成 */ | |
3 /***************************************************************************/ | |
4 #include <linux/module.h> | |
5 #include <linux/kernel.h> | |
6 #include <linux/errno.h> | |
7 #include <linux/pci.h> | |
8 #include <linux/init.h> | |
9 #include <linux/interrupt.h> | |
10 #include <linux/mutex.h> | |
83
b8032e8099de
include linux/sched.h explicitly. that file might be missing on some distributions.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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diff
changeset
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11 #include <linux/sched.h> |
131
2dc994610477
kernel 3.4.x no longer has asm/system.h
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
83
diff
changeset
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12 #include <linux/version.h> |
0 | 13 |
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kernel 3.4.x no longer has asm/system.h
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parents:
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changeset
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14 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0) |
0 | 15 #include <asm/system.h> |
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kernel 3.4.x no longer has asm/system.h
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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diff
changeset
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16 #endif |
0 | 17 #include <asm/io.h> |
18 #include <asm/irq.h> | |
19 #include <asm/uaccess.h> | |
20 | |
21 #include "pt1_com.h" | |
22 #include "pt1_i2c.h" | |
23 #include "pt1_pci.h" | |
79 | 24 #include "pt1_tuner.h" |
0 | 25 |
26 #define PROGRAM_ADDRESS 1024 | |
27 static int state = STATE_STOP ; | |
28 static int i2c_lock(void __iomem *, __u32, __u32, __u32); | |
29 static int i2c_lock_one(void __iomem *, __u32, __u32); | |
30 static int i2c_unlock(void __iomem *, int); | |
31 static void writebits(void __iomem *, __u32 *, __u32, __u32); | |
32 static void begin_i2c(void __iomem *, __u32 *, __u32 *); | |
33 static void start_i2c(void __iomem *, __u32 *, __u32 *, __u32); | |
34 static void stop_i2c(void __iomem *, __u32 *, __u32 *, __u32, __u32); | |
35 | |
36 | |
37 // PCIに書き込むI2Cデータ生成 | |
38 void makei2c(void __iomem *regs, __u32 base_addr, __u32 i2caddr, __u32 writemode, __u32 data_en, __u32 clock, __u32 busy) | |
39 { | |
40 | |
41 __u32 val ; | |
42 val = ((base_addr << I2C_DATA) | (writemode << I2C_WRIET_MODE) | | |
77 | 43 ( data_en << I2C_DATA_EN) | |
0 | 44 (clock << I2C_CLOCK) | (busy << I2C_BUSY) | i2caddr) ; |
45 writel(val, regs + FIFO_ADDR); | |
46 } | |
47 | |
79 | 48 int xc3s_init(void __iomem *regs, int cardtype) |
0 | 49 { |
50 | |
51 __u32 val ; | |
52 int lp ; | |
53 int rc ; | |
79 | 54 int phase = XC3S_PCI_CLOCK; |
0 | 55 |
56 /* | |
57 val = (1 << 19) | (1 << 27) | (1 << 16) | (1 << 24) | (1 << 17) | (1 << 25); | |
58 writel(WRITE_PULSE, regs); | |
59 BIT 19, 19+8 ON | |
60 BIT 16, 16+8 ON | |
61 BIT 17, 17+8 ON | |
62 */ | |
63 // XC3S初期化 | |
64 for(lp = 0 ; lp < PROGRAM_ADDRESS ; lp++){ | |
65 makei2c(regs, lp, 0, READ_EN, DATA_DIS, CLOCK_DIS, BUSY_DIS); | |
77 | 66 } |
0 | 67 // XC3S 初期化待ち (512 PCI Clocks) |
68 for(lp = 0 ; lp < XC3S_PCI_CLOCK ; lp++){ | |
69 makei2c(regs, 0, 0, READ_EN, DATA_DIS, CLOCK_DIS, BUSY_DIS); | |
70 } | |
71 // プロテクト解除 | |
72 // これは何を意図しているんだろう? | |
73 // 元コードが良く判らない | |
74 for(lp = 0 ; lp < 57 ; lp++){ | |
75 val = readl(regs); | |
76 if(val & I2C_READ_SYNC){ | |
77 break ; | |
78 } | |
79 writel(WRITE_PULSE, regs); | |
80 } | |
81 | |
82 for(lp = 0 ; lp < 57 ; lp++){ | |
83 val = readl(regs); | |
84 if(val & READ_DATA){ | |
85 break ; | |
86 } | |
87 writel(WRITE_PULSE, regs); | |
88 } | |
89 | |
90 // UNLOCK | |
91 rc = i2c_unlock(regs, READ_UNLOCK); | |
92 if(rc < 0){ | |
93 return rc ; | |
94 } | |
95 | |
96 // Enable PCI | |
97 rc =i2c_lock(regs, (WRITE_PCI_RESET | WRITE_PCI_RESET_), WRITE_PCI_RESET_, PCI_LOCKED); | |
98 if(rc < 0){ | |
99 return -EIO ; | |
100 } | |
101 | |
102 // Enable RAM | |
103 rc =i2c_lock(regs, (WRITE_RAM_RESET | WRITE_RAM_RESET_), WRITE_RAM_RESET_, RAM_LOCKED); | |
104 if(rc){ | |
105 return -EIO ; | |
106 } | |
79 | 107 switch(cardtype) { |
108 case PT1: | |
109 phase = XC3S_PCI_CLOCK; | |
110 break; | |
111 case PT2: | |
112 phase = XC3S_PCI_CLOCK_PT2; | |
113 break; | |
114 } | |
115 for(lp = 0; lp < phase; lp++){ | |
0 | 116 rc = i2c_lock_one(regs, WRITE_RAM_ENABLE, RAM_SHIFT); |
117 if(rc < 0){ | |
118 printk(KERN_ERR "PT1:LOCK FALUT\n"); | |
119 return rc ; | |
120 } | |
121 } | |
122 | |
123 // ストリームごとの転送制御(OFF) | |
124 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
125 SetStream(regs, lp, 0); | |
126 SetStream(regs, lp, 0); | |
127 } | |
128 return 0 ; | |
129 } | |
130 // | |
131 // | |
132 //BIT 0. 1 : Tuner番号 (Enable/Disable) | |
133 //BIT 8. 9 : Tuner番号 | |
134 // | |
135 // | |
136 void SetStream(void __iomem *regs, __u32 channel, __u32 enable) | |
137 { | |
138 __u32 val ; | |
139 | |
140 val = (1 << (8 + channel)); | |
141 if(enable){ | |
142 val |= (1 << channel); | |
143 } | |
144 writel(val, regs + TS_TEST_ENABLE_ADDR); | |
145 } | |
146 | |
147 static int i2c_lock(void __iomem *regs, __u32 firstval, __u32 secondval, __u32 lockval) | |
148 { | |
149 | |
150 __u32 val ; | |
151 int lp ; | |
152 | |
153 writel(firstval, regs); | |
154 writel(secondval, regs); | |
155 | |
156 // RAMがロックされた? | |
157 for(lp = 0 ; lp < XC3S_PCI_CLOCK ; lp++){ | |
158 val = readl(regs); | |
159 if((val & lockval)){ | |
160 return 0 ; | |
161 } | |
162 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
163 } | |
164 return -EIO ; | |
165 } | |
166 | |
167 static int i2c_lock_one(void __iomem *regs, __u32 firstval, __u32 lockval) | |
168 { | |
169 | |
170 __u32 val ; | |
171 __u32 val2 ; | |
172 int lp ; | |
173 | |
174 val = (readl(regs) & lockval); | |
175 writel(firstval, regs); | |
176 | |
177 // RAMがロックされた? | |
178 for(lp = 0 ; lp < 10 ; lp++){ | |
179 for(lp = 0 ; lp < 1024 ; lp++){ | |
180 val2 = readl(regs); | |
181 // 最初に取得したデータと逆になればOK | |
182 if(((val2 & lockval) != val)){ | |
183 return 0 ; | |
184 } | |
185 } | |
186 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
187 } | |
188 printk(KERN_INFO "PT1:Lock Fault(%x:%x)\n", val, val2); | |
189 return -EIO ; | |
190 } | |
191 static int i2c_unlock(void __iomem *regs, int lockval) | |
192 { | |
193 int lp ; | |
194 __u32 val ; | |
195 | |
196 writel(WRITE_PULSE, regs); | |
197 | |
198 for(lp = 0 ; lp < 3 ; lp++){ | |
199 val = readl(regs); | |
200 if((val &lockval)){ | |
201 return 0 ; | |
202 } | |
203 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
204 } | |
205 return -EIO ; | |
206 } | |
207 void blockwrite(void __iomem *regs, WBLOCK *wblock) | |
208 { | |
209 int lp ; | |
210 int bitpos ; | |
211 __u32 bits ; | |
212 __u32 old_bits = 1 ; | |
213 __u32 address = 0; | |
214 __u32 clock = 0; | |
215 | |
216 begin_i2c(regs, &address, &clock); | |
217 if(state == STATE_STOP){ | |
218 start_i2c(regs, &address, &clock, old_bits); | |
219 old_bits = 0 ; | |
220 stop_i2c(regs, &address, &clock, old_bits, FALSE); | |
221 state = STATE_START ; | |
222 } | |
223 old_bits = 1 ; | |
224 start_i2c(regs, &address, &clock, old_bits); | |
225 old_bits = 0 ; | |
226 | |
227 // まずアドレスを書く | |
228 for(bitpos = 0 ; bitpos < 7 ; bitpos++){ | |
229 bits = ((wblock->addr >> (6 - bitpos)) & 1); | |
230 writebits(regs, &address, old_bits, bits); | |
231 old_bits = bits ; | |
232 } | |
233 // タイプ:WRT | |
234 writebits(regs, &address, old_bits, 0); | |
235 // ACK/NACK用(必ず1) | |
236 writebits(regs, &address, 0, 1); | |
237 | |
238 old_bits = 1 ; | |
239 // 実際のデータを書く | |
240 for (lp = 0 ; lp < wblock->count ; lp++){ | |
241 for(bitpos = 0 ; bitpos < 8 ; bitpos++){ | |
242 bits = ((wblock->value[lp] >> (7 - bitpos)) & 1); | |
243 writebits(regs, &address, old_bits, bits); | |
244 old_bits = bits ; | |
245 } | |
246 // ACK/NACK用(必ず1) | |
247 writebits(regs, &address, old_bits, 1); | |
248 old_bits = 1 ; | |
249 } | |
250 | |
251 // Clock negedge | |
252 makei2c(regs, address, address + 1, 0, (old_bits ^ 1), 1, 1); | |
253 clock = TRUE ; | |
254 address += 1 ; | |
255 stop_i2c(regs, &address, &clock, old_bits, TRUE); | |
256 | |
257 } | |
258 | |
259 void blockread(void __iomem *regs, WBLOCK *wblock, int count) | |
260 { | |
261 int lp ; | |
262 int bitpos ; | |
263 __u32 bits ; | |
264 __u32 old_bits = 1 ; | |
265 __u32 address = 0; | |
266 __u32 clock = 0; | |
267 | |
268 begin_i2c(regs, &address, &clock); | |
269 if(state == STATE_STOP){ | |
270 start_i2c(regs, &address, &clock, old_bits); | |
271 old_bits = 0 ; | |
272 stop_i2c(regs, &address, &clock, old_bits, FALSE); | |
273 state = STATE_START ; | |
274 } | |
275 old_bits = 1 ; | |
276 start_i2c(regs, &address, &clock, old_bits); | |
277 old_bits = 0 ; | |
278 | |
279 // まずアドレスを書く | |
280 for(bitpos = 0 ; bitpos < 7 ; bitpos++){ | |
281 bits = ((wblock->addr >> (6 - bitpos)) & 1); | |
282 writebits(regs, &address, old_bits, bits); | |
283 old_bits = bits ; | |
284 } | |
285 // タイプ:WRT | |
286 writebits(regs, &address, old_bits, 0); | |
287 // ACK/NACK用(必ず1) | |
288 writebits(regs, &address, 0, 1); | |
289 | |
290 old_bits = 1 ; | |
291 // 実際のデータを書く | |
292 for (lp = 0 ; lp < wblock->count ; lp++){ | |
293 for(bitpos = 0 ; bitpos < 8 ; bitpos++){ | |
294 bits = ((wblock->value[lp] >> (7 - bitpos)) & 1); | |
295 writebits(regs, &address, old_bits, bits); | |
296 old_bits = bits ; | |
297 } | |
298 // ACK/NACK用(必ず1) | |
299 writebits(regs, &address, old_bits, 1); | |
300 old_bits = 1 ; | |
301 } | |
302 | |
303 // Clock negedge | |
304 makei2c(regs, address, address + 1, 0, (old_bits ^ 1), 1, 1); | |
305 clock = TRUE ; | |
306 address += 1 ; | |
307 | |
77 | 308 // ここから Read |
0 | 309 start_i2c(regs, &address, &clock, old_bits); |
310 old_bits = 0 ; | |
311 // まずアドレスを書く | |
312 for(bitpos = 0 ; bitpos < 7 ; bitpos++){ | |
313 bits = ((wblock->addr >> (6 - bitpos)) & 1); | |
314 writebits(regs, &address, old_bits, bits); | |
315 old_bits = bits ; | |
316 } | |
317 // タイプ:RD | |
318 writebits(regs, &address, old_bits, 1); | |
319 // ACK/NACK用(必ず1) | |
320 writebits(regs, &address, 1, 1); | |
321 | |
322 old_bits = 1 ; | |
323 // 実際のデータを書く | |
324 for (lp = 0 ; lp < count ; lp++){ | |
325 for(bitpos = 0 ; bitpos < 8 ; bitpos++){ | |
326 writebits(regs, &address, old_bits, 1); | |
327 // Read Mode Set | |
328 makei2c(regs, address, address + 1, 1, 0, 0, 1); | |
329 address += 1 ; | |
330 old_bits = 1 ; | |
331 } | |
332 if(lp >= (count - 1)){ | |
333 // ACK/NACK用(必ず1) | |
334 writebits(regs, &address, old_bits, 1); | |
335 old_bits = 0 ; | |
336 }else{ | |
337 // ACK/NACK用(必ず1) | |
338 writebits(regs, &address, old_bits, 0); | |
339 old_bits = 1 ; | |
340 } | |
341 } | |
342 | |
343 // Clock negedge | |
344 makei2c(regs, address, address + 1, 0, 0, 1, 1); | |
345 clock = TRUE ; | |
346 address += 1 ; | |
347 old_bits = 1 ; | |
348 stop_i2c(regs, &address, &clock, old_bits, TRUE); | |
349 | |
350 } | |
351 static void writebits(void __iomem *regs, __u32 *address, __u32 old_bits, __u32 bits) | |
352 { | |
353 // CLOCK UP | |
354 makei2c(regs, *address, *address + 1, 0, (old_bits ^ 1), 1, 1); | |
355 *address += 1 ; | |
356 | |
357 // CLOCK UP | |
358 makei2c(regs, *address, *address + 1, 0, (bits ^ 1), 1, 1); | |
359 *address += 1 ; | |
360 | |
361 // CLOCK DOWN | |
362 makei2c(regs, *address, *address + 1, 0, (bits ^ 1), 0, 1); | |
363 *address += 1 ; | |
364 | |
365 } | |
366 static void begin_i2c(void __iomem *regs, __u32 *address, __u32 *clock) | |
367 { | |
368 // bus FREE | |
369 makei2c(regs, *address, *address, 0, 0, 0, 0); | |
370 *address += 1 ; | |
371 | |
372 // bus busy | |
373 makei2c(regs, *address, *address + 1, 0, 0, 0, 1); | |
374 *address += 1 ; | |
375 *clock = FALSE ; | |
376 } | |
377 | |
378 static void start_i2c(void __iomem *regs, __u32 *address, __u32 *clock, __u32 data) | |
379 { | |
380 // データが残っていなければデータを下げる | |
381 if(!data){ | |
382 // CLOCKがあればCLOCKを下げる | |
383 if(*clock != TRUE){ | |
384 *clock = TRUE ; | |
385 makei2c(regs, *address, *address + 1, 0, 1, 1, 1); | |
386 *address += 1 ; | |
387 } | |
388 makei2c(regs, *address, *address + 1, 0, 0, 1, 1); | |
389 *address += 1 ; | |
390 } | |
391 | |
392 if(*clock != FALSE){ | |
393 *clock = FALSE ; | |
394 makei2c(regs, *address, *address + 1, 0, 0, 0, 1); | |
395 *address += 1; | |
396 } | |
397 makei2c(regs, *address, *address + 1, 0, 1, 0, 1); | |
398 *address += 1; | |
399 *clock = FALSE ; | |
400 } | |
401 | |
402 static void stop_i2c(void __iomem *regs, __u32 *address, __u32 *clock, __u32 data, __u32 end) | |
403 { | |
404 // データが残っていて | |
405 if(data){ | |
406 // クロックがあれば | |
407 if(*clock != TRUE){ | |
408 *clock = TRUE ; | |
409 makei2c(regs, *address, *address + 1, 0, 0, 1, 1); | |
410 *address += 1; | |
411 } | |
412 makei2c(regs, *address, *address + 1, 0, 1, 1, 1); | |
413 *address += 1 ; | |
414 } | |
415 // クロックが落ちていれば | |
416 if(*clock){ | |
417 *clock = FALSE ; | |
418 makei2c(regs, *address, *address + 1, 0, 1, 0, 1); | |
419 *address += 1 ; | |
420 } | |
421 | |
422 if(end){ | |
423 makei2c(regs, *address, 0, 0, 0, 0, 1); | |
424 }else{ | |
425 makei2c(regs, *address, *address + 1, 0, 0, 0, 1); | |
426 *address += 1 ; | |
427 } | |
428 } | |
429 | |
430 void i2c_write(void __iomem *regs, struct mutex *lock, WBLOCK *wblock) | |
431 { | |
432 | |
433 int lp; | |
434 __u32 val ; | |
435 | |
436 // ロックする | |
437 mutex_lock(lock); | |
438 #if 0 | |
439 printk(KERN_INFO "Addr=%x(%d)\n", wblock->addr, wblock->count); | |
440 for(lp = 0 ; lp < wblock->count ; lp++){ | |
441 printk(KERN_INFO "%x\n", wblock->value[lp]); | |
442 } | |
443 printk(KERN_INFO "\n"); | |
444 #endif | |
445 | |
446 blockwrite(regs, wblock); | |
447 writel(FIFO_GO, regs + FIFO_GO_ADDR); | |
448 //とりあえずロックしないように。 | |
449 for(lp = 0 ; lp < 100 ; lp++){ | |
450 val = readl(regs + FIFO_RESULT_ADDR); | |
451 if(!(val & FIFO_DONE)){ | |
452 break ; | |
453 } | |
454 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
455 } | |
456 mutex_unlock(lock); | |
457 } | |
458 | |
459 __u32 i2c_read(void __iomem *regs, struct mutex *lock, WBLOCK *wblock, int size) | |
460 { | |
461 | |
462 int lp; | |
463 __u32 val ; | |
464 | |
465 // ロックする | |
466 mutex_lock(lock); | |
467 #if 0 | |
468 printk(KERN_INFO "Addr=%x:%d:%d\n", wblock->addr, wblock->count, size); | |
469 for(lp = 0 ; lp < wblock->count ; lp++){ | |
470 printk(KERN_INFO "%x\n", wblock->value[lp]); | |
471 } | |
472 printk(KERN_INFO "\n"); | |
473 #endif | |
474 blockread(regs, wblock, size); | |
475 | |
476 writel(FIFO_GO, regs + FIFO_GO_ADDR); | |
477 | |
478 for(lp = 0 ; lp < 100 ; lp++){ | |
479 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
480 val = readl(regs + FIFO_RESULT_ADDR); | |
481 if(!(val & FIFO_DONE)){ | |
482 break ; | |
483 } | |
484 } | |
485 | |
486 val = readl(regs + I2C_RESULT_ADDR); | |
487 mutex_unlock(lock); | |
488 return val ; | |
489 } |