Mercurial > pt1
annotate driver/pt1_tuner_data.c @ 131:2dc994610477
kernel 3.4.x no longer has asm/system.h
author | Yoshiki Yazawa <yaz@honeyplanet.jp> |
---|---|
date | Wed, 27 Jun 2012 06:42:55 +0900 |
parents | 3914cc1b2375 |
children | 62aa473fc295 |
rev | line source |
---|---|
0 | 1 |
2 #include <linux/module.h> | |
3 #include <linux/kernel.h> | |
4 #include <linux/errno.h> | |
5 #include <linux/pci.h> | |
6 #include <linux/init.h> | |
7 #include <linux/interrupt.h> | |
131
2dc994610477
kernel 3.4.x no longer has asm/system.h
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
120
diff
changeset
|
8 #include <linux/version.h> |
0 | 9 |
131
2dc994610477
kernel 3.4.x no longer has asm/system.h
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
120
diff
changeset
|
10 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0) |
0 | 11 #include <asm/system.h> |
131
2dc994610477
kernel 3.4.x no longer has asm/system.h
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
120
diff
changeset
|
12 #endif |
0 | 13 #include <asm/io.h> |
14 #include <asm/irq.h> | |
15 #include <asm/uaccess.h> | |
16 | |
17 #include "pt1_com.h" | |
18 #include "pt1_pci.h" | |
19 #include "pt1_i2c.h" | |
20 #include "pt1_tuner.h" | |
21 #include "pt1_tuner_data.h" | |
22 | |
23 /***************************************************************************/ | |
24 /* 省電力テーブル */ | |
25 /***************************************************************************/ | |
26 /* | |
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
27 ISDB-S省電力 |
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
28 送信:7Bit Address Mode(1b):17:01 |
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
29 |
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
30 ISDB-S省電力OFF |
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
31 送信:7Bit Address Mode(1b):fe:c0:e4:fe:c0:f4:d6 |
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
32 送信:7Bit Address Mode(1b):17:00 |
0 | 33 */ |
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
34 WBLOCK isdb_s_sleep = { |
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
35 0, |
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
36 2, |
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
37 {0x17, 0x01} |
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
38 }; |
0 | 39 WBLOCK isdb_s_wake = { |
40 0, | |
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
41 7, |
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
42 {0xFE, 0xC0, 0xE4, 0xFE, 0xC0, 0xF4, 0xD6} |
0 | 43 }; |
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
44 WBLOCK isdb_s_wake2 = { |
0 | 45 0, |
46 2, | |
47 {0x17, 0x00} | |
48 }; | |
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
49 |
0 | 50 /* |
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
51 ISDB-T省電力 |
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
52 送信:7Bit Address Mode(1a):03:90 |
0 | 53 |
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
54 ISDB-T省電力OFF |
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
55 送信:7Bit Address Mode(1a):fe:c2:0e:7f:c1:84:80 |
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
56 送信:7Bit Address Mode(1a):03:80 |
0 | 57 */ |
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
58 WBLOCK isdb_t_sleep = { |
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
59 0, |
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
60 2, |
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
61 {0x03, 0x90} |
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
62 }; |
0 | 63 WBLOCK isdb_t_wake = { |
64 0, | |
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
65 7, |
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
66 {0xFE, 0xC2, 0x0E, 0x7F, 0xC1, 0x84, 0x80} |
0 | 67 }; |
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
68 WBLOCK isdb_t_wake2 = { |
0 | 69 0, |
70 2, | |
71 {0x03, 0x80} | |
72 }; | |
73 | |
74 /***************************************************************************/ | |
75 /* 初期化データ定義(共通) */ | |
76 /***************************************************************************/ | |
77 WBLOCK com_initdata = { | |
78 0, | |
79 2, | |
80 {0x01, 0x80} | |
81 }; | |
82 | |
83 /***************************************************************************/ | |
84 /* 初期化データ定義(ISDB-S) */ | |
85 /***************************************************************************/ | |
86 // ISDB-S初期化値1 | |
87 WBLOCK isdb_s_init1 ={ | |
88 0, | |
89 1, | |
79 | 90 {0x0f} |
0 | 91 }; |
92 // ISDB-S初期化値2 | |
93 WBLOCK isdb_s_init2 ={ | |
94 0, | |
95 2, | |
96 {0x04, 0x02} | |
97 }; | |
98 // ISDB-S初期化値3 | |
99 WBLOCK isdb_s_init3 ={ | |
100 0, | |
101 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
102 {0x0D, 0x55} //pt1 only |
0 | 103 }; |
104 // ISDB-S初期化値4 | |
105 WBLOCK isdb_s_init4 ={ | |
106 0, | |
107 2, | |
108 {0x11, 0x40} | |
109 }; | |
110 // ISDB-S初期化値5 | |
111 WBLOCK isdb_s_init5 ={ | |
112 0, | |
113 2, | |
114 {0x13, 0x80} | |
115 }; | |
116 // ISDB-S初期化値6 | |
117 WBLOCK isdb_s_init6 ={ | |
118 0, | |
119 2, | |
120 {0x17, 0x01} | |
121 }; | |
122 // ISDB-S初期化値7 | |
123 WBLOCK isdb_s_init7 ={ | |
124 0, | |
125 2, | |
126 {0x1C, 0x0A} | |
127 }; | |
128 // ISDB-S初期化値8 | |
129 WBLOCK isdb_s_init8 ={ | |
130 0, | |
131 2, | |
132 {0x1D, 0xAA} | |
133 }; | |
134 // ISDB-S初期化値9 | |
135 WBLOCK isdb_s_init9 ={ | |
136 0, | |
137 2, | |
138 {0x1E, 0x20} | |
139 }; | |
140 // ISDB-S初期化値10 | |
141 WBLOCK isdb_s_init10 ={ | |
142 0, | |
143 2, | |
144 {0x1F, 0x88} | |
145 }; | |
146 // ISDB-S初期化値11 | |
147 WBLOCK isdb_s_init11 ={ | |
148 0, | |
149 2, | |
150 {0x51, 0xB0} | |
151 }; | |
152 // ISDB-S初期化値12 | |
153 WBLOCK isdb_s_init12 ={ | |
154 0, | |
155 2, | |
156 {0x52, 0x89} | |
157 }; | |
158 // ISDB-S初期化値13 | |
159 WBLOCK isdb_s_init13 ={ | |
160 0, | |
161 2, | |
162 {0x53, 0xB3} | |
163 }; | |
164 // ISDB-S初期化値14 | |
165 WBLOCK isdb_s_init14 ={ | |
166 0, | |
167 2, | |
168 {0x5A, 0x2D} | |
169 }; | |
170 // ISDB-S初期化値15 | |
171 WBLOCK isdb_s_init15 ={ | |
172 0, | |
173 2, | |
174 {0x5B, 0xD3} | |
175 }; | |
176 // ISDB-S初期化値16 | |
177 WBLOCK isdb_s_init16 ={ | |
178 0, | |
179 2, | |
180 {0x85, 0x69} | |
181 }; | |
182 // ISDB-S初期化値17 | |
183 WBLOCK isdb_s_init17 ={ | |
184 0, | |
185 2, | |
186 {0x87, 0x04} | |
187 }; | |
188 // ISDB-S初期化値18 | |
189 WBLOCK isdb_s_init18 ={ | |
190 0, | |
191 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
192 {0x8E, 0x26} |
0 | 193 }; |
194 // ISDB-S初期化値19 | |
195 WBLOCK isdb_s_init19 ={ | |
196 0, | |
197 2, | |
198 {0xA3, 0xF7} | |
199 }; | |
200 // ISDB-S初期化値20 | |
201 WBLOCK isdb_s_init20 ={ | |
202 0, | |
203 2, | |
204 {0xA5, 0xC0} | |
205 }; | |
206 // ISDB-S初期化値21 | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
207 WBLOCK isdb_s_init21 ={ |
0 | 208 0, |
209 4, | |
210 {0xFE, 0xC0, 0xF0, 0x04} | |
211 }; | |
212 /***************************************************************************/ | |
213 /* 初期化データ定義(ISDB-T) */ | |
214 /***************************************************************************/ | |
215 // ISDB-T初期化値1 | |
216 WBLOCK isdb_t_init1 ={ | |
217 0, | |
218 2, | |
219 {0x03, 0x90} | |
220 }; | |
221 // ISDB-T初期化値2 | |
222 WBLOCK isdb_t_init2 ={ | |
223 0, | |
224 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
225 {0x14, 0x8F} //pt1 only |
0 | 226 }; |
227 // ISDB-T初期化値3 | |
228 WBLOCK isdb_t_init3 ={ | |
229 0, | |
230 2, | |
231 {0x1C, 0x2A} | |
232 }; | |
233 // ISDB-T初期化値4 | |
234 WBLOCK isdb_t_init4 ={ | |
235 0, | |
236 2, | |
237 {0x1D, 0xA8} | |
238 }; | |
239 // ISDB-T初期化値5 | |
240 WBLOCK isdb_t_init5 ={ | |
241 0, | |
242 2, | |
243 {0x1E, 0xA2} | |
244 }; | |
245 // ISDB-T初期化値6 | |
246 WBLOCK isdb_t_init6 ={ | |
247 0, | |
248 2, | |
249 {0x22, 0x83} | |
250 }; | |
251 // ISDB-T初期化値7 | |
252 WBLOCK isdb_t_init7 ={ | |
253 0, | |
254 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
255 {0x31, 0x0D} //pt1 |
0 | 256 }; |
257 // ISDB-T初期化値8 | |
258 WBLOCK isdb_t_init8 ={ | |
259 0, | |
260 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
261 {0x32, 0xE0} //pt1 |
0 | 262 }; |
263 // ISDB-T初期化値9 | |
264 WBLOCK isdb_t_init9 ={ | |
265 0, | |
266 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
267 {0x39, 0xD3} //pt1 |
0 | 268 }; |
269 // ISDB-T初期化値10 | |
270 WBLOCK isdb_t_init10 ={ | |
271 0, | |
272 2, | |
273 {0x3A, 0x00} | |
274 }; | |
275 // ISDB-T初期化値11 | |
276 WBLOCK isdb_t_init11 ={ | |
277 0, | |
278 2, | |
279 {0x5C, 0x40} | |
280 }; | |
281 // ISDB-T初期化値12 | |
282 WBLOCK isdb_t_init12 ={ | |
283 0, | |
284 2, | |
285 {0x5F, 0x80} | |
286 }; | |
287 // ISDB-T初期化値13 | |
288 WBLOCK isdb_t_init13 ={ | |
289 0, | |
290 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
291 {0x75, 0x0a} |
0 | 292 }; |
293 // ISDB-T初期化値14 | |
294 WBLOCK isdb_t_init14 ={ | |
295 0, | |
296 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
297 {0x76, 0x4c} |
0 | 298 }; |
299 // ISDB-T初期化値15 | |
300 WBLOCK isdb_t_init15 ={ | |
301 0, | |
302 2, | |
303 {0x77, 0x03} | |
304 }; | |
305 // ISDB-T初期化値16 | |
306 WBLOCK isdb_t_init16 ={ | |
307 0, | |
308 2, | |
309 {0xEF, 0x01} | |
310 }; | |
311 // ISDB-T初期化値17 | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
312 WBLOCK isdb_t_init17 ={ |
0 | 313 0, |
314 7, | |
315 {0xFE, 0xC2, 0x01, 0x8F, 0xC1, 0x80, 0x80} | |
316 }; | |
317 /***************************************************************************/ | |
318 /* 初期化データブロック定義(ISDB-S) */ | |
319 /***************************************************************************/ | |
77 | 320 WBLOCK *isdb_s_initial_pt1[PT1_MAX_ISDB_S_INIT] = |
0 | 321 { |
322 &isdb_s_init2, &isdb_s_init3, &isdb_s_init4, &isdb_s_init5, | |
323 &isdb_s_init6, &isdb_s_init7, &isdb_s_init8, &isdb_s_init9, | |
324 &isdb_s_init10, &isdb_s_init11, &isdb_s_init12, &isdb_s_init13, | |
325 &isdb_s_init14, &isdb_s_init15, &isdb_s_init16, &isdb_s_init17, | |
326 &isdb_s_init18, &isdb_s_init19, &isdb_s_init20 | |
327 }; | |
77 | 328 WBLOCK *isdb_s_initial_pt2[PT2_MAX_ISDB_S_INIT] = |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
329 { |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
330 &isdb_s_init2, &isdb_s_init4, &isdb_s_init5, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
331 &isdb_s_init6, &isdb_s_init7, &isdb_s_init8, &isdb_s_init9, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
332 &isdb_s_init10, &isdb_s_init11, &isdb_s_init12, &isdb_s_init13, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
333 &isdb_s_init14, &isdb_s_init15, &isdb_s_init16, &isdb_s_init17, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
334 &isdb_s_init18, &isdb_s_init19, &isdb_s_init20 |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
335 }; |
0 | 336 /***************************************************************************/ |
337 /* 初期化データブロック定義(ISDB-T) */ | |
338 /***************************************************************************/ | |
77 | 339 WBLOCK *isdb_t_initial_pt1[PT1_MAX_ISDB_T_INIT] = |
0 | 340 { |
341 &isdb_t_init1, &isdb_t_init2, &isdb_t_init3, &isdb_t_init4, | |
342 &isdb_t_init5, &isdb_t_init6, &isdb_t_init7, &isdb_t_init8, | |
343 &isdb_t_init9, &isdb_t_init10, &isdb_t_init11, &isdb_t_init12, | |
344 &isdb_t_init13, &isdb_t_init14, &isdb_t_init15, &isdb_t_init16 | |
345 }; | |
77 | 346 WBLOCK *isdb_t_initial_pt2[PT2_MAX_ISDB_T_INIT] = |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
347 { |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
348 &isdb_t_init1, &isdb_t_init3, &isdb_t_init4, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
349 &isdb_t_init5, &isdb_t_init6, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
350 &isdb_t_init10, &isdb_t_init11, &isdb_t_init12, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
351 &isdb_t_init13, &isdb_t_init14, &isdb_t_init15, &isdb_t_init16 |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
352 }; |
0 | 353 /***************************************************************************/ |
354 /* 地上デジタル用データ */ | |
355 /***************************************************************************/ | |
356 /***************************************************************************/ | |
357 /* 周波数設定基本テーブル */ | |
358 /* 0〜1: 固定 */ | |
359 /* 2〜3: 計算結果 */ | |
360 /* 4〜5: 追加計算結果 */ | |
361 /***************************************************************************/ | |
362 | |
363 WBLOCK isdb_t_pll_base = { | |
364 0, | |
365 2, | |
366 {0xFE, 0xC2, 0, 0, 0, 0, 0, 0} | |
367 }; | |
368 /***************************************************************************/ | |
369 /* 地デジ周波数ロックチェック */ | |
370 /***************************************************************************/ | |
371 WBLOCK isdb_t_pll_lock = { | |
372 0, | |
373 2, | |
374 {0xFE, 0xC3} | |
375 }; | |
376 | |
377 WBLOCK isdb_t_check_tune = { | |
378 0, | |
379 2, | |
380 {0x01, 0x40} | |
381 }; | |
382 | |
383 WBLOCK isdb_t_tune_read = { | |
384 0, | |
385 1, | |
386 {0x80} | |
387 }; | |
388 WBLOCK isdb_t_tmcc_read_1 = { | |
389 0, | |
390 1, | |
391 {0xB2} | |
392 }; | |
393 WBLOCK isdb_t_tmcc_read_2 = { | |
394 0, | |
395 1, | |
396 {0xB6} | |
397 }; | |
398 /***************************************************************************/ | |
399 /* 地デジ周波数ロックチェック */ | |
400 /***************************************************************************/ | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
401 WBLOCK isdb_t_signal1 = { |
0 | 402 0, |
403 1, | |
404 {0x8C} | |
405 }; | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
406 WBLOCK isdb_t_signal2 = { |
0 | 407 0, |
408 1, | |
409 {0x8D} | |
410 }; | |
411 WBLOCK isdb_t_agc2 = { | |
412 0, | |
413 1, | |
414 {0x82} | |
415 }; | |
416 WBLOCK isdb_t_lockedt1 = { | |
417 0, | |
418 1, | |
419 {0x96} | |
420 }; | |
421 WBLOCK isdb_t_lockedt2 = { | |
422 0, | |
423 1, | |
424 {0xB0} | |
425 }; | |
426 WBLOCK isdb_t_get_clock = { | |
427 0, | |
428 1, | |
429 {0x86} | |
430 }; | |
431 WBLOCK isdb_t_get_carrir = { | |
432 0, | |
433 1, | |
434 {0x84} | |
435 }; | |
436 | |
437 /***************************************************************************/ | |
438 /* 地デジ用データ */ | |
439 /***************************************************************************/ | |
440 | |
441 /***************************************************************************/ | |
442 /* BS用データ */ | |
443 /***************************************************************************/ | |
444 /***************************************************************************/ | |
445 /* BS周波数ロックチェック */ | |
446 /***************************************************************************/ | |
447 WBLOCK bs_pll_lock = { | |
448 0, | |
449 2, | |
450 {0xFE, 0xC1} | |
451 }; | |
452 /***************************************************************************/ | |
453 /* TMCC取得 */ | |
454 /***************************************************************************/ | |
455 WBLOCK bs_tmcc_get_1 = { | |
456 0, | |
457 2, | |
458 {0x03, 0x01} | |
459 }; | |
460 WBLOCK bs_tmcc_get_2 = { | |
461 0, | |
462 1, | |
463 {0xC3} | |
464 }; | |
465 /***************************************************************************/ | |
466 /* TMCC取得 */ | |
467 /***************************************************************************/ | |
468 WBLOCK bs_get_slot_ts_id_1 = { | |
469 0, | |
470 1, | |
471 {0xCE} | |
472 }; | |
473 WBLOCK bs_get_slot_ts_id_2 = { | |
474 0, | |
475 1, | |
476 {0xD2} | |
477 }; | |
478 WBLOCK bs_get_slot_ts_id_3 = { | |
479 0, | |
480 1, | |
481 {0xD6} | |
482 }; | |
483 WBLOCK bs_get_slot_ts_id_4 = { | |
484 0, | |
485 1, | |
486 {0xDA} | |
487 }; | |
488 /***************************************************************************/ | |
489 /* TS-IDロック */ | |
490 /***************************************************************************/ | |
491 WBLOCK bs_set_ts_lock = { | |
492 0, | |
493 3, | |
494 {0x8F, 0x00, 0x00} | |
495 }; | |
496 /***************************************************************************/ | |
497 /* TS-ID取得 */ | |
498 /***************************************************************************/ | |
499 WBLOCK bs_get_ts_lock = { | |
500 0, | |
501 1, | |
502 {0xE6} | |
503 }; | |
504 /***************************************************************************/ | |
505 /* スロット取得 */ | |
506 /***************************************************************************/ | |
507 WBLOCK bs_get_slot = { | |
508 0, | |
509 1, | |
510 {0xE8} | |
511 }; | |
512 /***************************************************************************/ | |
513 /* CN/AGC/MAXAGC取得 */ | |
514 /***************************************************************************/ | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
515 WBLOCK bs_get_signal1 = { |
0 | 516 0, |
517 1, | |
518 {0xBC} | |
519 }; | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
520 WBLOCK bs_get_signal2 = { |
0 | 521 0, |
522 1, | |
523 {0xBD} | |
524 }; | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
525 WBLOCK bs_get_agc = { |
0 | 526 0, |
527 1, | |
528 {0xBA} | |
529 }; | |
530 /***************************************************************************/ | |
531 /* クロック周波数誤差取得 */ | |
532 /***************************************************************************/ | |
533 WBLOCK bs_get_clock = { | |
534 0, | |
535 1, | |
536 {0xBE} | |
537 }; | |
538 /***************************************************************************/ | |
539 /* キャリア周波数誤差取得 */ | |
540 /***************************************************************************/ | |
541 WBLOCK bs_get_carrir = { | |
542 0, | |
543 1, | |
544 {0xBB} | |
545 }; | |
546 /***************************************************************************/ | |
547 /* 周波数設定テーブル */ | |
548 /* BSに関してのみ。とりあえずテーブルとしたが、計算で算出出来るなら */ | |
549 /* 計算で算出させる。 */ | |
550 /***************************************************************************/ | |
551 /***************************************************************************/ | |
552 /* BS共通テーブル */ | |
553 /***************************************************************************/ | |
554 WBLOCK bs_com_step2 = { | |
555 0, | |
556 3, | |
557 {0xFE, 0xC0, 0xE4} | |
558 }; | |
559 /***************************************************************************/ | |
560 /* BS-1 */ | |
561 /***************************************************************************/ | |
562 WBLOCK bs_1_step1 = { | |
563 0, | |
564 6, | |
565 {0xFE, 0xC0, 0x48, 0x29, 0xE0, 0xD2} | |
566 }; | |
567 WBLOCK bs_1_step3 = { | |
568 0, | |
569 4, | |
570 {0xFE, 0xC0, 0xF4, 0xD6} | |
571 }; | |
572 /***************************************************************************/ | |
573 /* BS-3 */ | |
574 /***************************************************************************/ | |
575 WBLOCK bs_3_step1 = { | |
576 0, | |
577 6, | |
578 {0xFE, 0xC0, 0x44, 0x40, 0xE0, 0xE2} | |
579 }; | |
580 WBLOCK bs_3_step3 = { | |
581 0, | |
582 4, | |
583 {0xFE, 0xC0, 0xF4, 0xE6} | |
584 }; | |
585 /***************************************************************************/ | |
586 /* BS-5 */ | |
587 /***************************************************************************/ | |
588 WBLOCK bs_5_step1 = { | |
589 0, | |
590 6, | |
591 {0xFE, 0xC0, 0x44, 0x66, 0xE0, 0xE2} | |
592 }; | |
593 WBLOCK bs_5_step3 = { | |
594 0, | |
595 4, | |
596 {0xFE, 0xC0, 0xF4, 0xE6} | |
597 }; | |
598 /***************************************************************************/ | |
599 /* BS-7 */ | |
600 /***************************************************************************/ | |
601 WBLOCK bs_7_step1 = { | |
602 0, | |
603 6, | |
604 {0xFE, 0xC0, 0x44, 0x8D, 0xE0, 0x20} | |
605 }; | |
606 WBLOCK bs_7_step3 = { | |
607 0, | |
608 4, | |
609 {0xFE, 0xC0, 0xF4, 0x24} | |
610 }; | |
611 /***************************************************************************/ | |
612 /* BS-9 */ | |
613 /***************************************************************************/ | |
614 WBLOCK bs_9_step1 = { | |
615 0, | |
616 6, | |
617 {0xFE, 0xC0, 0x44, 0xB3, 0xE0, 0x20} | |
618 }; | |
619 WBLOCK bs_9_step3 = { | |
620 0, | |
621 4, | |
622 {0xFE, 0xC0, 0xF4, 0x24} | |
623 }; | |
624 /***************************************************************************/ | |
625 /* BS-11 */ | |
626 /***************************************************************************/ | |
627 WBLOCK bs_11_step1 = { | |
628 0, | |
629 6, | |
630 {0xFE, 0xC0, 0x44, 0xD9, 0xE0, 0x20} | |
631 }; | |
632 WBLOCK bs_11_step3 = { | |
633 0, | |
634 4, | |
635 {0xFE, 0xC0, 0xF4, 0x24} | |
636 }; | |
637 /***************************************************************************/ | |
638 /* BS-13 */ | |
639 /***************************************************************************/ | |
640 WBLOCK bs_13_step1 = { | |
641 0, | |
642 6, | |
643 {0xFE, 0xC0, 0x45, 0x00, 0xE0, 0x20} | |
644 }; | |
645 WBLOCK bs_13_step3 = { | |
646 0, | |
647 4, | |
648 {0xFE, 0xC0, 0xF4, 0x24} | |
649 }; | |
650 /***************************************************************************/ | |
651 /* BS-15 */ | |
652 /***************************************************************************/ | |
653 WBLOCK bs_15_step1 = { | |
654 0, | |
655 6, | |
656 {0xFE, 0xC0, 0x45, 0x26, 0xE0, 0x40} | |
657 }; | |
658 WBLOCK bs_15_step3 = { | |
659 0, | |
660 4, | |
661 {0xFE, 0xC0, 0xF4, 0x44} | |
662 }; | |
663 /***************************************************************************/ | |
664 /* BS-17 */ | |
665 /***************************************************************************/ | |
666 WBLOCK bs_17_step1 = { | |
667 0, | |
668 6, | |
120
3914cc1b2375
- adapted to 3.x kernels
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
102
diff
changeset
|
669 {0xFE, 0xC0, 0x45, 0x4C, 0xE0, 0x40} |
0 | 670 }; |
671 WBLOCK bs_17_step3 = { | |
672 0, | |
673 4, | |
674 {0xFE, 0xC0, 0xF4, 0X44} | |
675 }; | |
676 /***************************************************************************/ | |
677 /* BS-19 */ | |
678 /***************************************************************************/ | |
679 WBLOCK bs_19_step1 = { | |
680 0, | |
681 6, | |
682 {0xFE, 0xC0, 0x45, 0x73, 0xE0, 0x40} | |
683 }; | |
684 WBLOCK bs_19_step3 = { | |
685 0, | |
686 4, | |
687 {0xFE, 0xC0, 0xF4, 0x44} | |
688 }; | |
689 /***************************************************************************/ | |
690 /* BS-21 */ | |
691 /***************************************************************************/ | |
692 WBLOCK bs_21_step1 = { | |
693 0, | |
694 6, | |
695 {0xFE, 0xC0, 0x45, 0x99, 0xE0, 0x40} | |
696 }; | |
697 WBLOCK bs_21_step3 = { | |
698 0, | |
699 4, | |
700 {0xFE, 0xC0, 0xF4, 0x44} | |
701 }; | |
702 /***************************************************************************/ | |
703 /* BS-23 */ | |
704 /***************************************************************************/ | |
705 WBLOCK bs_23_step1 = { | |
706 0, | |
707 6, | |
708 {0xFE, 0xC0, 0x45, 0xBF, 0xE0, 0x60} | |
709 }; | |
710 WBLOCK bs_23_step3 = { | |
711 0, | |
712 4, | |
713 {0xFE, 0xC0, 0xF4, 0x64} | |
714 }; | |
715 | |
716 /***************************************************************************/ | |
717 /* ND 2 */ | |
718 /***************************************************************************/ | |
719 WBLOCK nd_2_step1 = { | |
720 0, | |
721 6, | |
722 {0xFE, 0xC0, 0x46, 0x4D, 0xE0, 0x60} | |
723 }; | |
724 WBLOCK nd_2_step3 = { | |
725 0, | |
726 4, | |
727 {0xFE, 0xC0, 0xF4, 0x64} | |
728 }; | |
729 | |
730 /***************************************************************************/ | |
731 /* ND 4 */ | |
732 /***************************************************************************/ | |
733 WBLOCK nd_4_step1 = { | |
734 0, | |
735 6, | |
736 {0xFE, 0xC0, 0x46, 0x75, 0xE0, 0x80} | |
737 }; | |
738 WBLOCK nd_4_step3 = { | |
739 0, | |
740 4, | |
741 {0xFE, 0xC0, 0xF4, 0x84} | |
742 }; | |
743 | |
744 /***************************************************************************/ | |
745 /* ND 6 */ | |
746 /***************************************************************************/ | |
747 WBLOCK nd_6_step1 = { | |
748 0, | |
749 6, | |
750 {0xFE, 0xC0, 0x46, 0x9D, 0xE0, 0x80} | |
751 }; | |
752 WBLOCK nd_6_step3 = { | |
753 0, | |
754 4, | |
755 {0xFE, 0xC0, 0xF4, 0x84} | |
756 }; | |
757 | |
758 /***************************************************************************/ | |
759 /* ND 8 */ | |
760 /***************************************************************************/ | |
761 WBLOCK nd_8_step1 = { | |
762 0, | |
763 6, | |
764 {0xFE, 0xC0, 0x46, 0xC5, 0xE0, 0x80} | |
765 }; | |
766 WBLOCK nd_8_step3 = { | |
767 0, | |
768 4, | |
769 {0xFE, 0xC0, 0xF4, 0x84} | |
770 }; | |
771 | |
772 /***************************************************************************/ | |
773 /* ND 10 */ | |
774 /***************************************************************************/ | |
775 WBLOCK nd_10_step1 = { | |
776 0, | |
777 6, | |
778 {0xFE, 0xC0, 0x46, 0xED, 0xE0, 0x80} | |
779 }; | |
780 WBLOCK nd_10_step3 = { | |
781 0, | |
782 4, | |
783 {0xFE, 0xC0, 0xF4, 0x84} | |
784 }; | |
785 | |
786 /***************************************************************************/ | |
787 /* ND 12 */ | |
788 /***************************************************************************/ | |
789 WBLOCK nd_12_step1 = { | |
790 0, | |
791 6, | |
792 {0xFE, 0xC0, 0x47, 0x15, 0xE0, 0xA0} | |
793 }; | |
794 WBLOCK nd_12_step3 = { | |
795 0, | |
796 4, | |
797 {0xFE, 0xC0, 0xF4, 0xA4} | |
798 }; | |
799 | |
800 /***************************************************************************/ | |
801 /* ND 14 */ | |
802 /***************************************************************************/ | |
803 WBLOCK nd_14_step1 = { | |
804 0, | |
805 6, | |
806 {0xFE, 0xC0, 0x47, 0x3D, 0xE0, 0xA0} | |
807 }; | |
808 WBLOCK nd_14_step3 = { | |
809 0, | |
810 4, | |
811 {0xFE, 0xC0, 0xF4, 0xA4} | |
812 }; | |
813 | |
814 /***************************************************************************/ | |
815 /* ND 16 */ | |
816 /***************************************************************************/ | |
817 WBLOCK nd_16_step1 = { | |
818 0, | |
819 6, | |
820 {0xFE, 0xC0, 0x47, 0x65, 0xE0, 0xA0} | |
821 }; | |
822 WBLOCK nd_16_step3 = { | |
823 0, | |
824 4, | |
825 {0xFE, 0xC0, 0xF4, 0xA4} | |
826 }; | |
827 | |
828 /***************************************************************************/ | |
829 /* ND 18 */ | |
830 /***************************************************************************/ | |
831 WBLOCK nd_18_step1 = { | |
832 0, | |
833 6, | |
834 {0xFE, 0xC0, 0x47, 0x8D, 0xE0, 0xA0} | |
835 }; | |
836 WBLOCK nd_18_step3 = { | |
837 0, | |
838 4, | |
839 {0xFE, 0xC0, 0xF4, 0xA4} | |
840 }; | |
841 | |
842 /***************************************************************************/ | |
843 /* ND 20 */ | |
844 /***************************************************************************/ | |
845 WBLOCK nd_20_step1 = { | |
846 0, | |
847 6, | |
848 {0xFE, 0xC0, 0x47, 0xB5, 0xE0, 0xC0} | |
849 }; | |
850 WBLOCK nd_20_step3 = { | |
851 0, | |
852 4, | |
853 {0xFE, 0xC0, 0xF4, 0xC4} | |
854 }; | |
855 | |
856 /***************************************************************************/ | |
857 /* ND 22 */ | |
858 /***************************************************************************/ | |
859 WBLOCK nd_22_step1 = { | |
860 0, | |
861 6, | |
862 {0xFE, 0xC0, 0x47, 0xDD, 0xE0, 0xC0} | |
863 }; | |
864 WBLOCK nd_22_step3 = { | |
865 0, | |
866 4, | |
867 {0xFE, 0xC0, 0xF4, 0xC4} | |
868 }; | |
869 | |
870 /***************************************************************************/ | |
871 /* ND 24 */ | |
872 /***************************************************************************/ | |
873 WBLOCK nd_24_step1 = { | |
874 0, | |
875 6, | |
876 {0xFE, 0xC0, 0x48, 0x05, 0xE0, 0xC0} | |
877 }; | |
878 WBLOCK nd_24_step3 = { | |
879 0, | |
880 4, | |
881 {0xFE, 0xC0, 0xF4, 0xC4} | |
882 }; | |
883 | |
884 /***************************************************************************/ | |
885 /* ND 1 */ | |
886 /***************************************************************************/ | |
887 WBLOCK nd_1_step1 = { | |
888 0, | |
889 6, | |
890 {0xFE, 0xC0, 0x46, 0x39, 0xE0, 0x60} | |
891 }; | |
892 WBLOCK nd_1_step3 = { | |
893 0, | |
894 4, | |
895 {0xFE, 0xC0, 0xF4, 0x64} | |
896 }; | |
897 | |
898 /***************************************************************************/ | |
899 /* ND 3 */ | |
900 /***************************************************************************/ | |
901 WBLOCK nd_3_step1 = { | |
902 0, | |
903 6, | |
904 {0xFE, 0xC0, 0x46, 0x61, 0xE0, 0x80} | |
905 }; | |
906 WBLOCK nd_3_step3 = { | |
907 0, | |
908 4, | |
909 {0xFE, 0xC0, 0xF4, 0x84} | |
910 }; | |
911 | |
912 /***************************************************************************/ | |
913 /* ND 5 */ | |
914 /***************************************************************************/ | |
915 WBLOCK nd_5_step1 = { | |
916 0, | |
917 6, | |
918 {0xFE, 0xC0, 0x46, 0x89, 0xE0, 0x80} | |
919 }; | |
920 WBLOCK nd_5_step3 = { | |
921 0, | |
922 4, | |
923 {0xFE, 0xC0, 0xF4, 0x84} | |
924 }; | |
925 | |
926 /***************************************************************************/ | |
927 /* ND 7 */ | |
928 /***************************************************************************/ | |
929 WBLOCK nd_7_step1 = { | |
930 0, | |
931 6, | |
932 {0xFE, 0xC0, 0x46, 0xB1, 0xE0, 0x80} | |
933 }; | |
934 WBLOCK nd_7_step3 = { | |
935 0, | |
936 4, | |
937 {0xFE, 0xC0, 0xF4, 0x84} | |
938 }; | |
939 | |
940 /***************************************************************************/ | |
941 /* ND 9 */ | |
942 /***************************************************************************/ | |
943 WBLOCK nd_9_step1 = { | |
944 0, | |
945 6, | |
946 {0xFE, 0xC0, 0x46, 0xD9, 0xE0, 0x80} | |
947 }; | |
948 WBLOCK nd_9_step3 = { | |
949 0, | |
950 4, | |
951 {0xFE, 0xC0, 0xF4, 0x84} | |
952 }; | |
953 | |
954 /***************************************************************************/ | |
955 /* ND 11 */ | |
956 /***************************************************************************/ | |
957 WBLOCK nd_11_step1 = { | |
958 0, | |
959 6, | |
960 {0xFE, 0xC0, 0x47, 0x01, 0xE0, 0xA0} | |
961 }; | |
962 WBLOCK nd_11_step3 = { | |
963 0, | |
964 4, | |
965 {0xFE, 0xC0, 0xF4, 0xA4} | |
966 }; | |
967 | |
968 /***************************************************************************/ | |
969 /* ND 13 */ | |
970 /***************************************************************************/ | |
971 WBLOCK nd_13_step1 = { | |
972 0, | |
973 6, | |
974 {0xFE, 0xC0, 0x47, 0x29, 0xE0, 0xA0} | |
975 }; | |
976 WBLOCK nd_13_step3 = { | |
977 0, | |
978 4, | |
979 {0xFE, 0xC0, 0xF4, 0xA4} | |
980 }; | |
981 | |
982 /***************************************************************************/ | |
983 /* ND 15 */ | |
984 /***************************************************************************/ | |
985 WBLOCK nd_15_step1 = { | |
986 0, | |
987 6, | |
988 {0xFE, 0xC0, 0x47, 0x51, 0xE0, 0xA0} | |
989 }; | |
990 WBLOCK nd_15_step3 = { | |
991 0, | |
992 4, | |
993 {0xFE, 0xC0, 0xF4, 0xA4} | |
994 }; | |
995 | |
996 /***************************************************************************/ | |
997 /* ND 17 */ | |
998 /***************************************************************************/ | |
999 WBLOCK nd_17_step1 = { | |
1000 0, | |
1001 6, | |
1002 {0xFE, 0xC0, 0x47, 0x79, 0xE0, 0xA0} | |
1003 }; | |
1004 WBLOCK nd_17_step3 = { | |
1005 0, | |
1006 4, | |
1007 {0xFE, 0xC0, 0xF4, 0xA4} | |
1008 }; | |
1009 | |
1010 /***************************************************************************/ | |
1011 /* ND 19 */ | |
1012 /***************************************************************************/ | |
1013 WBLOCK nd_19_step1 = { | |
1014 0, | |
1015 6, | |
1016 {0xFE, 0xC0, 0x47, 0xA1, 0xE0, 0xA0} | |
1017 }; | |
1018 WBLOCK nd_19_step3 = { | |
1019 0, | |
1020 4, | |
1021 {0xFE, 0xC0, 0xF4, 0xA4} | |
1022 }; | |
1023 | |
1024 /***************************************************************************/ | |
1025 /* ND 21 */ | |
1026 /***************************************************************************/ | |
1027 WBLOCK nd_21_step1 = { | |
1028 0, | |
1029 6, | |
1030 {0xFE, 0xC0, 0x47, 0xC9, 0xE0, 0xC0} | |
1031 }; | |
1032 WBLOCK nd_21_step3 = { | |
1033 0, | |
1034 4, | |
1035 {0xFE, 0xC0, 0xF4, 0xC4} | |
1036 }; | |
1037 | |
1038 /***************************************************************************/ | |
1039 /* ND 23 */ | |
1040 /***************************************************************************/ | |
1041 WBLOCK nd_23_step1 = { | |
1042 0, | |
1043 6, | |
1044 {0xFE, 0xC0, 0x47, 0xF1, 0xE0, 0xC0} | |
1045 }; | |
1046 WBLOCK nd_23_step3 = { | |
1047 0, | |
1048 4, | |
1049 {0xFE, 0xC0, 0xF4, 0xC4} | |
1050 }; | |
1051 | |
1052 /***************************************************************************/ | |
1053 /* BS-周波数テーブル */ | |
1054 /***************************************************************************/ | |
1055 WBLOCK_BS_PLL bs_pll[MAX_BS_CHANNEL] = { | |
36 | 1056 {{&bs_1_step1, &bs_com_step2, &bs_1_step3}}, |
1057 {{&bs_3_step1, &bs_com_step2, &bs_3_step3}}, | |
1058 {{&bs_5_step1, &bs_com_step2, &bs_5_step3}}, | |
1059 {{&bs_7_step1, &bs_com_step2, &bs_7_step3}}, | |
1060 {{&bs_9_step1, &bs_com_step2, &bs_9_step3}}, | |
1061 {{&bs_11_step1, &bs_com_step2, &bs_11_step3}}, | |
1062 {{&bs_13_step1, &bs_com_step2, &bs_13_step3}}, | |
1063 {{&bs_15_step1, &bs_com_step2, &bs_15_step3}}, | |
1064 {{&bs_17_step1, &bs_com_step2, &bs_17_step3}}, | |
1065 {{&bs_19_step1, &bs_com_step2, &bs_19_step3}}, | |
1066 {{&bs_21_step1, &bs_com_step2, &bs_21_step3}}, | |
1067 {{&bs_23_step1, &bs_com_step2, &bs_21_step3}}, | |
1068 {{&nd_2_step1, &bs_com_step2, &nd_2_step3}}, | |
1069 {{&nd_4_step1, &bs_com_step2, &nd_4_step3}}, | |
1070 {{&nd_6_step1, &bs_com_step2, &nd_6_step3}}, | |
1071 {{&nd_8_step1, &bs_com_step2, &nd_8_step3}}, | |
1072 {{&nd_10_step1, &bs_com_step2, &nd_10_step3}}, | |
1073 {{&nd_12_step1, &bs_com_step2, &nd_12_step3}}, | |
1074 {{&nd_14_step1, &bs_com_step2, &nd_14_step3}}, | |
1075 {{&nd_16_step1, &bs_com_step2, &nd_16_step3}}, | |
1076 {{&nd_18_step1, &bs_com_step2, &nd_18_step3}}, | |
1077 {{&nd_20_step1, &bs_com_step2, &nd_20_step3}}, | |
1078 {{&nd_22_step1, &bs_com_step2, &nd_22_step3}}, | |
1079 {{&nd_24_step1, &bs_com_step2, &nd_24_step3}}, | |
1080 {{&nd_1_step1, &bs_com_step2, &nd_1_step3}}, | |
1081 {{&nd_3_step1, &bs_com_step2, &nd_3_step3}}, | |
1082 {{&nd_5_step1, &bs_com_step2, &nd_5_step3}}, | |
1083 {{&nd_7_step1, &bs_com_step2, &nd_7_step3}}, | |
1084 {{&nd_9_step1, &bs_com_step2, &nd_9_step3}}, | |
1085 {{&nd_11_step1, &bs_com_step2, &nd_11_step3}}, | |
1086 {{&nd_13_step1, &bs_com_step2, &nd_13_step3}}, | |
1087 {{&nd_15_step1, &bs_com_step2, &nd_15_step3}}, | |
1088 {{&nd_17_step1, &bs_com_step2, &nd_17_step3}}, | |
1089 {{&nd_19_step1, &bs_com_step2, &nd_19_step3}}, | |
1090 {{&nd_21_step1, &bs_com_step2, &nd_21_step3}}, | |
1091 {{&nd_23_step1, &bs_com_step2, &nd_23_step3}} | |
0 | 1092 }; |
1093 WBLOCK *bs_get_ts_id[(MAX_BS_TS_ID / 2)] = { | |
1094 &bs_get_slot_ts_id_1, | |
1095 &bs_get_slot_ts_id_2, | |
1096 &bs_get_slot_ts_id_3, | |
1097 &bs_get_slot_ts_id_4 | |
1098 }; |