Mercurial > pt1
annotate driver/pt1_pci.c @ 34:3f2487de156e
should not loop if tuner device is specified.
author | Yoshiki Yazawa <yaz@honeyplanet.jp> |
---|---|
date | Thu, 05 Mar 2009 01:05:32 +0900 |
parents | 289794dc265f |
children | 65c8ac567074 |
rev | line source |
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0 | 1 /* pt1-pci.c: A PT1 on PCI bus driver for Linux. */ |
2 #define DRV_NAME "pt1-pci" | |
3 #define DRV_VERSION "1.00" | |
4 #define DRV_RELDATE "11/28/2008" | |
5 | |
6 | |
7 #include <linux/module.h> | |
8 #include <linux/kernel.h> | |
9 #include <linux/errno.h> | |
10 #include <linux/pci.h> | |
11 #include <linux/init.h> | |
12 #include <linux/interrupt.h> | |
13 | |
14 #include <asm/system.h> | |
15 #include <asm/io.h> | |
16 #include <asm/irq.h> | |
17 #include <asm/uaccess.h> | |
18 #include <linux/version.h> | |
19 #include <linux/mutex.h> | |
20 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23) | |
21 #include <linux/freezer.h> | |
22 #else | |
23 #define set_freezable() | |
24 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) | |
25 typedef struct pm_message { | |
26 int event; | |
27 } pm_message_t; | |
28 #endif | |
29 #endif | |
30 #include <linux/kthread.h> | |
31 #include <linux/dma-mapping.h> | |
32 | |
33 #include <linux/fs.h> | |
34 #include <linux/cdev.h> | |
35 | |
36 #include <linux/ioctl.h> | |
37 | |
38 #include "pt1_com.h" | |
39 #include "pt1_pci.h" | |
40 #include "pt1_tuner.h" | |
41 #include "pt1_i2c.h" | |
42 #include "pt1_tuner_data.h" | |
43 #include "pt1_ioctl.h" | |
44 | |
45 /* These identify the driver base version and may not be removed. */ | |
46 static char version[] __devinitdata = | |
47 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " \n"; | |
48 | |
49 MODULE_AUTHOR("Tomoaki Ishikawa tomy@users.sourceforge.jp"); | |
50 #define DRIVER_DESC "PCI earthsoft PT1 driver" | |
51 MODULE_DESCRIPTION(DRIVER_DESC); | |
52 MODULE_LICENSE("GPL"); | |
53 | |
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54 static int debug = 7; /* 1 normal messages, 0 quiet .. 7 verbose. */ |
0 | 55 static int lnb = 0; /* LNB OFF:0 +11V:1 +15V:2 */ |
56 | |
57 module_param(debug, int, 0); | |
58 module_param(lnb, int, 0); | |
59 MODULE_PARM_DESC(debug, "debug level (1-2)"); | |
60 MODULE_PARM_DESC(debug, "LNB level (0:OFF 1:+11V 2:+15V)"); | |
61 | |
62 static struct pci_device_id pt1_pci_tbl[] = { | |
63 { 0x10ee, 0x211a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, | |
64 { 0, } | |
65 }; | |
66 MODULE_DEVICE_TABLE(pci, pt1_pci_tbl); | |
67 #define DEV_NAME "pt1video" | |
68 | |
69 #define MAX_READ_BLOCK 4 // 1度に読み出す最大DMAバッファ数 | |
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70 #define MAX_PCI_DEVICE 128 // 最大64枚 |
0 | 71 #define DMA_SIZE 4096 // DMAバッファサイズ |
72 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22) | |
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73 #define DMA_RING_SIZE 128 // RINGサイズ |
0 | 74 #define DMA_RING_MAX 511 // 1RINGにいくつ詰めるか(1023はNGで511まで) |
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75 #define CHANEL_DMA_SIZE (2*1024*1024) // 地デジ用(16Mbps) |
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76 #define BS_CHANEL_DMA_SIZE (4*1024*1024) // BS用(32Mbps) |
0 | 77 #else |
78 #define DMA_RING_SIZE 28 // RINGサイズ | |
79 #define DMA_RING_MAX 511 // 1RINGにいくつ詰めるか(1023はNGで511まで) | |
80 #define CHANEL_DMA_SIZE (1*128*1024) // 地デジ用(16Mbps) | |
81 #define BS_CHANEL_DMA_SIZE (1*128*1024) // BS用(32Mbps) | |
82 #endif | |
83 | |
84 typedef struct _DMA_CONTROL{ | |
85 dma_addr_t ring_dma[DMA_RING_MAX] ; // DMA情報 | |
86 __u32 *data[DMA_RING_MAX]; | |
87 }DMA_CONTROL; | |
88 | |
89 typedef struct _PT1_CHANNEL PT1_CHANNEL; | |
90 | |
91 typedef struct _pt1_device{ | |
92 unsigned long mmio_start ; | |
93 __u32 mmio_len ; | |
94 void __iomem *regs; | |
95 struct mutex lock ; | |
96 dma_addr_t ring_dma[DMA_RING_SIZE] ; // DMA情報 | |
97 void *dmaptr[DMA_RING_SIZE] ; | |
98 struct task_struct *kthread; | |
99 dev_t dev ; | |
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100 int card_number; |
0 | 101 __u32 base_minor ; |
102 struct cdev cdev[MAX_CHANNEL]; | |
103 wait_queue_head_t dma_wait_q ;// for poll on reading | |
104 DMA_CONTROL dmactl[DMA_RING_SIZE]; | |
105 PT1_CHANNEL *channel[MAX_CHANNEL]; | |
106 }PT1_DEVICE; | |
107 | |
108 typedef struct _MICRO_PACKET{ | |
109 char data[3]; | |
110 char head ; | |
111 }MICRO_PACKET; | |
112 | |
113 struct _PT1_CHANNEL{ | |
114 __u32 valid ; // 使用中フラグ | |
115 __u32 address ; // I2Cアドレス | |
116 __u32 channel ; // チャネル番号 | |
117 int type ; // チャネルタイプ | |
118 __u32 drop ; // パケットドロップ数 | |
119 struct mutex lock ; // CH別mutex_lock用 | |
120 __u32 size ; // DMAされたサイズ | |
121 __u32 maxsize ; // DMA用バッファサイズ | |
122 __u32 bufsize ; // チャネルに割り振られたサイズ | |
123 __u32 overflow ; // オーバーフローエラー発生 | |
124 __u32 counetererr ; // 転送カウンタ1エラー | |
125 __u32 transerr ; // 転送エラー | |
126 __u32 minor ; // マイナー番号 | |
127 __u8 *buf; // CH別受信メモリ | |
128 __u8 req_dma ; // 溢れたチャネル | |
129 PT1_DEVICE *ptr ; // カード別情報 | |
130 wait_queue_head_t wait_q ; // for poll on reading | |
131 }; | |
132 | |
133 // I2Cアドレス(video0, 1 = ISDB-S) (video2, 3 = ISDB-T) | |
134 int i2c_address[MAX_CHANNEL] = {T0_ISDB_S, T1_ISDB_S, T0_ISDB_T, T1_ISDB_T}; | |
135 int real_chanel[MAX_CHANNEL] = {0, 2, 1, 3}; | |
136 int channeltype[MAX_CHANNEL] = {CHANNEL_TYPE_ISDB_S, CHANNEL_TYPE_ISDB_S, | |
137 CHANNEL_TYPE_ISDB_T, CHANNEL_TYPE_ISDB_T}; | |
138 | |
139 static PT1_DEVICE *device[MAX_PCI_DEVICE]; | |
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140 static struct class *pt1video_class; |
0 | 141 |
142 #define PT1MAJOR 251 | |
143 #define DRIVERNAME "pt1video" | |
144 | |
145 static void reset_dma(PT1_DEVICE *dev_conf) | |
146 { | |
147 | |
148 int lp ; | |
149 __u32 addr ; | |
150 int ring_pos = 0; | |
151 int data_pos = 0 ; | |
152 __u32 *dataptr ; | |
153 | |
154 // データ初期化 | |
155 for(ring_pos = 0 ; ring_pos < DMA_RING_SIZE ; ring_pos++){ | |
156 for(data_pos = 0 ; data_pos < DMA_RING_MAX ; data_pos++){ | |
157 dataptr = dev_conf->dmactl[ring_pos].data[data_pos]; | |
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158 dataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0; |
0 | 159 } |
160 } | |
161 // 転送カウンタをリセット | |
162 writel(0x00000010, dev_conf->regs); | |
163 // 転送カウンタをインクリメント | |
164 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
165 writel(0x00000020, dev_conf->regs); | |
166 } | |
167 | |
168 addr = (int)dev_conf->ring_dma[0] ; | |
169 addr >>= 12 ; | |
170 // DMAバッファ設定 | |
171 writel(addr, dev_conf->regs + DMA_ADDR); | |
172 // DMA開始 | |
173 writel(0x0c000040, dev_conf->regs); | |
174 | |
175 } | |
176 static int pt1_thread(void *data) | |
177 { | |
178 PT1_DEVICE *dev_conf = data ; | |
179 PT1_CHANNEL *channel ; | |
180 int ring_pos = 0; | |
181 int data_pos = 0 ; | |
182 int lp ; | |
183 int chno ; | |
184 int lp2 ; | |
185 __u32 addr ; | |
186 __u32 *dataptr ; | |
187 __u32 *curdataptr ; | |
188 __u32 val ; | |
189 union mpacket{ | |
190 __u32 val ; | |
191 MICRO_PACKET packet ; | |
192 }micro; | |
193 | |
194 set_freezable(); | |
195 reset_dma(dev_conf); | |
196 printk(KERN_INFO "pt1_thread run\n"); | |
197 | |
198 for(;;){ | |
199 if(kthread_should_stop()){ | |
200 break ; | |
201 } | |
202 | |
203 for(;;){ | |
204 dataptr = dev_conf->dmactl[ring_pos].data[data_pos]; | |
205 // データあり? | |
206 if(dataptr[(DMA_SIZE / sizeof(__u32)) - 2] == 0){ | |
207 break ; | |
208 } | |
209 micro.val = *dataptr ; | |
210 curdataptr = dataptr ; | |
211 data_pos += 1 ; | |
212 for(lp = 0 ; lp < (DMA_SIZE / sizeof(__u32)) ; lp++, dataptr++){ | |
213 micro.val = *dataptr ; | |
214 chno = real_chanel[(((micro.packet.head >> 5) & 0x07) - 1)]; | |
215 channel = dev_conf->channel[chno] ; | |
216 // エラーチェック | |
217 if((micro.packet.head & MICROPACKET_ERROR)){ | |
218 val = readl(dev_conf->regs); | |
219 if((val & BIT_RAM_OVERFLOW)){ | |
220 channel->overflow += 1 ; | |
221 } | |
222 if((val & BIT_INITIATOR_ERROR)){ | |
223 channel->counetererr += 1 ; | |
224 } | |
225 if((val & BIT_INITIATOR_WARNING)){ | |
226 channel->transerr += 1 ; | |
227 } | |
228 // 初期化して先頭から | |
229 reset_dma(dev_conf); | |
230 ring_pos = data_pos = 0 ; | |
231 break ; | |
232 } | |
233 // 未使用チャネルは捨てる | |
234 if(channel->valid == FALSE){ | |
235 continue ; | |
236 } | |
237 mutex_lock(&channel->lock); | |
238 // あふれたら読み出すまで待つ | |
239 while(1){ | |
240 if(channel->size >= (channel->maxsize - 4)){ | |
241 // 該当チャンネルのDMA読みだし待ちにする | |
242 wake_up(&channel->wait_q); | |
243 channel->req_dma = TRUE ; | |
244 mutex_unlock(&channel->lock); | |
245 // タスクに時間を渡す為中断 | |
246 wait_event_timeout(dev_conf->dma_wait_q, (channel->req_dma == FALSE), | |
247 msecs_to_jiffies(500)); | |
248 mutex_lock(&channel->lock); | |
249 channel->drop += 1 ; | |
250 }else{ | |
251 break ; | |
252 } | |
253 } | |
254 // データコピー | |
255 for(lp2 = 2 ; lp2 >= 0 ; lp2--){ | |
256 channel->buf[channel->size] = micro.packet.data[lp2]; | |
257 channel->size += 1 ; | |
258 } | |
259 mutex_unlock(&channel->lock); | |
260 } | |
261 curdataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0; | |
262 | |
263 if(data_pos >= DMA_RING_MAX){ | |
264 data_pos = 0; | |
265 ring_pos += 1 ; | |
266 // DMAリングが変わった場合はインクリメント | |
267 writel(0x00000020, dev_conf->regs); | |
268 if(ring_pos >= DMA_RING_SIZE){ | |
269 ring_pos = 0 ; | |
270 } | |
271 } | |
272 | |
273 // 頻度を落す(4Kで起動させる) | |
274 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
275 channel = dev_conf->channel[real_chanel[lp]] ; | |
276 if((channel->size >= DMA_SIZE) && (channel->valid == TRUE)){ | |
277 wake_up(&channel->wait_q); | |
278 } | |
279 } | |
280 } | |
281 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
282 } | |
283 return 0 ; | |
284 } | |
285 static int pt1_open(struct inode *inode, struct file *file) | |
286 { | |
287 | |
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288 int major = imajor(inode); |
0 | 289 int minor = iminor(inode); |
290 int lp ; | |
291 int lp2 ; | |
292 PT1_CHANNEL *channel ; | |
293 | |
294 for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){ | |
295 if(device[lp] == NULL){ | |
296 return -EIO ; | |
297 } | |
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298 |
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299 if(MAJOR(device[lp]->dev) == major && |
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300 device[lp]->base_minor <= minor && |
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301 device[lp]->base_minor + MAX_CHANNEL > minor) { |
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302 |
0 | 303 mutex_lock(&device[lp]->lock); |
304 for(lp2 = 0 ; lp2 < MAX_CHANNEL ; lp2++){ | |
305 channel = device[lp]->channel[lp2] ; | |
306 if(channel->minor == minor){ | |
307 if(channel->valid == TRUE){ | |
308 mutex_unlock(&device[lp]->lock); | |
309 return -EIO ; | |
310 } | |
311 channel->drop = 0 ; | |
312 channel->valid = TRUE ; | |
313 channel->overflow = 0 ; | |
314 channel->counetererr = 0 ; | |
315 channel->transerr = 0 ; | |
316 file->private_data = channel; | |
317 mutex_lock(&channel->lock); | |
318 // データ初期化 | |
319 channel->size = 0 ; | |
320 mutex_unlock(&channel->lock); | |
321 mutex_unlock(&device[lp]->lock); | |
322 return 0 ; | |
323 } | |
324 } | |
325 } | |
326 } | |
327 return -EIO; | |
328 } | |
329 static int pt1_release(struct inode *inode, struct file *file) | |
330 { | |
331 int minor = iminor(inode); | |
332 PT1_CHANNEL *channel = file->private_data; | |
333 | |
334 mutex_lock(&channel->ptr->lock); | |
335 SetStream(channel->ptr->regs, channel->channel, FALSE); | |
336 channel->valid = FALSE ; | |
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337 printk(KERN_INFO "(%d:%d)Drop=%08d:%08d:%08d:%08d\n", imajor(inode), iminor(inode), channel->drop, |
0 | 338 channel->overflow, channel->counetererr, channel->transerr); |
339 channel->overflow = 0 ; | |
340 channel->counetererr = 0 ; | |
341 channel->transerr = 0 ; | |
342 channel->drop = 0 ; | |
343 // 停止している場合は起こす | |
344 if(channel->req_dma == TRUE){ | |
345 channel->req_dma = FALSE ; | |
346 wake_up(&channel->ptr->dma_wait_q); | |
347 } | |
348 mutex_unlock(&channel->ptr->lock); | |
349 return 0; | |
350 } | |
351 | |
352 static ssize_t pt1_read(struct file *file, char __user *buf, size_t cnt, loff_t * ppos) | |
353 { | |
354 PT1_CHANNEL *channel = file->private_data; | |
355 __u32 size ; | |
356 | |
357 | |
358 // 4K単位で起こされるのを待つ(CPU負荷対策) | |
359 if(channel->size < DMA_SIZE){ | |
360 wait_event_timeout(channel->wait_q, (channel->size >= DMA_SIZE), | |
361 msecs_to_jiffies(500)); | |
362 } | |
363 mutex_lock(&channel->lock); | |
364 if(!channel->size){ | |
365 size = 0 ; | |
366 }else{ | |
367 if(cnt < channel->size){ | |
368 // バッファが足りない場合は残りを移動する | |
369 size = cnt ; | |
370 copy_to_user(buf, channel->buf, cnt); | |
371 memmove(channel->buf, &channel->buf[cnt], (channel->size - cnt)); | |
372 channel->size -= cnt ; | |
373 }else{ | |
374 size = channel->size ; | |
375 copy_to_user(buf, channel->buf, size); | |
376 channel->size = 0 ; | |
377 } | |
378 } | |
379 // 読み終わったかつ使用しているのがが4K以下 | |
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380 if(channel->req_dma == TRUE){ |
0 | 381 channel->req_dma = FALSE ; |
382 wake_up(&channel->ptr->dma_wait_q); | |
383 } | |
384 mutex_unlock(&channel->lock); | |
385 return size ; | |
386 } | |
387 static int SetFreq(PT1_CHANNEL *channel, FREQUENCY *freq) | |
388 { | |
389 | |
390 switch(channel->type){ | |
391 case CHANNEL_TYPE_ISDB_S: | |
392 { | |
393 ISDB_S_TMCC tmcc ; | |
394 if(bs_tune(channel->ptr->regs, | |
395 &channel->ptr->lock, | |
396 channel->address, | |
397 freq->frequencyno, | |
398 &tmcc) < 0){ | |
399 return -EIO ; | |
400 } | |
401 | |
402 #if 0 | |
403 printk(KERN_INFO "clockmargin = (%x)\n", (tmcc.clockmargin & 0xFF)); | |
404 printk(KERN_INFO "carriermargin = (%x)\n", (tmcc.carriermargin & 0xFF)); | |
405 | |
406 for(lp = 0 ; lp < MAX_BS_TS_ID ; lp++){ | |
407 if(tmcc.ts_id[lp].ts_id == 0xFFFF){ | |
408 continue ; | |
409 } | |
410 printk(KERN_INFO "Slot(%d:%x)\n", lp, tmcc.ts_id[lp].ts_id); | |
411 printk(KERN_INFO "mode (low/high) = (%x:%x)\n", | |
412 tmcc.ts_id[lp].low_mode, tmcc.ts_id[lp].high_mode); | |
413 printk(KERN_INFO "slot (low/high) = (%x:%x)\n", | |
414 tmcc.ts_id[lp].low_slot, | |
415 tmcc.ts_id[lp].high_slot); | |
416 } | |
417 #endif | |
418 ts_lock(channel->ptr->regs, | |
419 &channel->ptr->lock, | |
420 channel->address, | |
421 tmcc.ts_id[freq->slot].ts_id); | |
422 } | |
423 break ; | |
424 case CHANNEL_TYPE_ISDB_T: | |
425 { | |
426 if(isdb_t_frequency(channel->ptr->regs, | |
427 &channel->ptr->lock, | |
428 channel->address, | |
429 freq->frequencyno, freq->slot) < 0){ | |
430 return -EINVAL ; | |
431 } | |
432 } | |
433 } | |
434 return 0 ; | |
435 } | |
436 static int pt1_ioctl(struct inode *inode, struct file *file, unsigned int cmd, void *arg) | |
437 { | |
438 PT1_CHANNEL *channel = file->private_data; | |
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439 int signal ; |
0 | 440 |
441 switch(cmd){ | |
442 case SET_CHANNEL: | |
443 { | |
444 FREQUENCY freq ; | |
445 copy_from_user(&freq, arg, sizeof(FREQUENCY)); | |
446 return SetFreq(channel, &freq); | |
447 } | |
448 case START_REC: | |
449 SetStream(channel->ptr->regs, channel->channel, TRUE); | |
450 return 0 ; | |
451 case STOP_REC: | |
452 SetStream(channel->ptr->regs, channel->channel, FALSE); | |
453 return 0 ; | |
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454 case GET_SIGNAL_STRENGTH: |
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455 switch(channel->type){ |
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456 case CHANNEL_TYPE_ISDB_S: |
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457 { |
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458 signal = isdb_s_read_signal_strength(channel->ptr->regs, |
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459 &channel->ptr->lock, |
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460 channel->address); |
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461 } |
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462 break ; |
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463 case CHANNEL_TYPE_ISDB_T: |
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464 // calc C/N |
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465 signal = isdb_t_read_signal_strength(channel->ptr->regs, |
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466 &channel->ptr->lock, channel->address); |
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467 break ; |
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468 } |
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469 copy_to_user(arg, &signal, sizeof(int)); |
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470 return 0 ; |
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471 case LNB_ENABLE: |
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472 if(lnb){ |
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473 settuner_reset(channel->ptr->regs, lnb, TUNER_POWER_ON_RESET_DISABLE); |
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474 } |
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475 return 0 ; |
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476 case LNB_DISABLE: |
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477 if(lnb){ |
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478 settuner_reset(channel->ptr->regs, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE); |
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479 } |
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480 return 0 ; |
0 | 481 } |
482 return -EINVAL; | |
483 } | |
484 | |
485 /* | |
486 */ | |
487 static const struct file_operations pt1_fops = { | |
488 .owner = THIS_MODULE, | |
489 .open = pt1_open, | |
490 .release = pt1_release, | |
491 .read = pt1_read, | |
492 .ioctl = pt1_ioctl, | |
493 .llseek = no_llseek, | |
494 }; | |
495 | |
496 int pt1_makering(struct pci_dev *pdev, PT1_DEVICE *dev_conf) | |
497 { | |
498 int lp ; | |
499 int lp2 ; | |
500 DMA_CONTROL *dmactl; | |
501 __u32 *dmaptr ; | |
502 __u32 addr ; | |
503 __u32 *ptr ; | |
504 | |
505 //DMAリング作成 | |
506 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
507 ptr = dev_conf->dmaptr[lp]; | |
508 if(lp == (DMA_RING_SIZE - 1)){ | |
509 addr = (__u32)dev_conf->ring_dma[0]; | |
510 }else{ | |
511 addr = (__u32)dev_conf->ring_dma[(lp + 1)]; | |
512 } | |
513 addr >>= 12 ; | |
514 memcpy(ptr, &addr, sizeof(__u32)); | |
515 ptr += 1 ; | |
516 | |
517 dmactl = &dev_conf->dmactl[lp]; | |
518 for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){ | |
519 dmaptr = pci_alloc_consistent(pdev, DMA_SIZE, &dmactl->ring_dma[lp2]); | |
520 if(dmaptr == NULL){ | |
521 printk(KERN_INFO "PT1:DMA ALLOC ERROR\n"); | |
522 return -1 ; | |
523 } | |
524 dmactl->data[lp2] = dmaptr ; | |
525 // DMAデータエリア初期化 | |
526 dmaptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0 ; | |
527 addr = (__u32)dmactl->ring_dma[lp2]; | |
528 addr >>= 12 ; | |
529 memcpy(ptr, &addr, sizeof(__u32)); | |
530 ptr += 1 ; | |
531 } | |
532 } | |
533 return 0 ; | |
534 } | |
535 int pt1_dma_init(struct pci_dev *pdev, PT1_DEVICE *dev_conf) | |
536 { | |
537 int lp ; | |
538 void *ptr ; | |
539 | |
540 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
541 ptr = pci_alloc_consistent(pdev, DMA_SIZE, &dev_conf->ring_dma[lp]); | |
542 if(ptr == NULL){ | |
543 printk(KERN_INFO "PT1:DMA ALLOC ERROR\n"); | |
544 return -1 ; | |
545 } | |
546 dev_conf->dmaptr[lp] = ptr ; | |
547 } | |
548 | |
549 return pt1_makering(pdev, dev_conf); | |
550 } | |
551 int pt1_dma_free(struct pci_dev *pdev, PT1_DEVICE *dev_conf) | |
552 { | |
553 | |
554 int lp ; | |
555 int lp2 ; | |
556 | |
557 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
558 if(dev_conf->dmaptr[lp] != NULL){ | |
559 pci_free_consistent(pdev, DMA_SIZE, | |
560 dev_conf->dmaptr[lp], dev_conf->ring_dma[lp]); | |
561 for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){ | |
562 if(dev_conf->dmactl[lp].data[lp2] != NULL){ | |
563 pci_free_consistent(pdev, DMA_SIZE, | |
564 dev_conf->dmactl[lp].data[lp2], | |
565 dev_conf->dmactl[lp].ring_dma[lp2]); | |
566 } | |
567 } | |
568 } | |
569 } | |
570 return 0 ; | |
571 } | |
572 static int __devinit pt1_pci_init_one (struct pci_dev *pdev, | |
573 const struct pci_device_id *ent) | |
574 { | |
575 int rc ; | |
576 int lp ; | |
577 int minor ; | |
578 u16 cmd ; | |
579 PT1_DEVICE *dev_conf ; | |
580 PT1_CHANNEL *channel ; | |
581 | |
582 rc = pci_enable_device(pdev); | |
583 if (rc) | |
584 return rc; | |
585 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
586 if (rc) { | |
587 printk(KERN_ERR "PT1:DMA MASK ERROR"); | |
588 return rc; | |
589 } | |
590 | |
591 pci_read_config_word(pdev, PCI_COMMAND, &cmd); | |
592 if (!(cmd & PCI_COMMAND_MASTER)) { | |
593 printk(KERN_INFO "Attempting to enable Bus Mastering\n"); | |
594 pci_set_master(pdev); | |
595 pci_read_config_word(pdev, PCI_COMMAND, &cmd); | |
596 if (!(cmd & PCI_COMMAND_MASTER)) { | |
597 printk(KERN_ERR "Bus Mastering is not enabled\n"); | |
598 return -EIO; | |
599 } | |
600 } | |
601 printk(KERN_INFO "Bus Mastering Enabled.\n"); | |
602 | |
603 dev_conf = kzalloc(sizeof(PT1_DEVICE), GFP_KERNEL); | |
604 if(!dev_conf){ | |
605 printk(KERN_ERR "PT1:out of memory !"); | |
606 return -ENOMEM ; | |
607 } | |
608 // PCIアドレスをマップする | |
609 dev_conf->mmio_start = pci_resource_start(pdev, 0); | |
610 dev_conf->mmio_len = pci_resource_len(pdev, 0); | |
611 rc = request_mem_region(dev_conf->mmio_start, dev_conf->mmio_len, DEV_NAME); | |
612 if (!rc) { | |
613 printk(KERN_ERR "PT1: cannot request iomem (0x%llx).\n", (unsigned long long) dev_conf->mmio_start); | |
614 goto out_err_regbase; | |
615 } | |
616 | |
617 dev_conf->regs = ioremap(dev_conf->mmio_start, dev_conf->mmio_len); | |
618 if (!dev_conf->regs){ | |
619 printk(KERN_ERR "pt1: Can't remap register area.\n"); | |
620 goto out_err_regbase; | |
621 } | |
622 // 初期化処理 | |
623 if(xc3s_init(dev_conf->regs)){ | |
624 printk(KERN_ERR "Error xc3s_init\n"); | |
625 goto out_err_fpga; | |
626 } | |
627 // チューナリセット | |
628 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_ON_RESET_ENABLE); | |
629 schedule_timeout_interruptible(msecs_to_jiffies(50)); | |
630 | |
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631 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE); |
0 | 632 schedule_timeout_interruptible(msecs_to_jiffies(10)); |
633 mutex_init(&dev_conf->lock); | |
634 | |
635 // Tuner 初期化処理 | |
636 for(lp = 0 ; lp < MAX_TUNER ; lp++){ | |
637 rc = tuner_init(dev_conf->regs, &dev_conf->lock, lp); | |
638 if(rc < 0){ | |
639 printk(KERN_ERR "Error tuner_init\n"); | |
640 goto out_err_fpga; | |
641 } | |
642 } | |
643 // 初期化完了 | |
644 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
645 set_sleepmode(dev_conf->regs, &dev_conf->lock, | |
646 i2c_address[lp], channeltype[lp], TYPE_SLEEP); | |
647 | |
648 schedule_timeout_interruptible(msecs_to_jiffies(50)); | |
649 } | |
650 rc = alloc_chrdev_region(&dev_conf->dev, 0, MAX_CHANNEL, DEV_NAME); | |
651 if(rc < 0){ | |
652 goto out_err_fpga; | |
653 } | |
654 | |
655 // 初期化 | |
656 init_waitqueue_head(&dev_conf->dma_wait_q); | |
657 | |
658 minor = MINOR(dev_conf->dev) ; | |
659 dev_conf->base_minor = minor ; | |
660 for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){ | |
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661 printk(KERN_INFO "PT1: device[%d]=%p\n", lp, device[lp]); |
0 | 662 if(device[lp] == NULL){ |
663 device[lp] = dev_conf ; | |
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664 dev_conf->card_number = lp; |
0 | 665 break ; |
666 } | |
667 } | |
668 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
669 cdev_init(&dev_conf->cdev[lp], &pt1_fops); | |
30
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670 dev_conf->cdev[lp].owner = THIS_MODULE; |
31
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671 cdev_add(&dev_conf->cdev[lp], |
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672 MKDEV(MAJOR(dev_conf->dev), (MINOR(dev_conf->dev) + lp)), 1); |
0 | 673 channel = kzalloc(sizeof(PT1_CHANNEL), GFP_KERNEL); |
674 if(!channel){ | |
675 printk(KERN_ERR "PT1:out of memory !"); | |
676 return -ENOMEM ; | |
677 } | |
678 | |
679 // 共通情報 | |
680 mutex_init(&channel->lock); | |
681 // 待ち状態を解除 | |
682 channel->req_dma = FALSE ; | |
683 // マイナー番号設定 | |
684 channel->minor = MINOR(dev_conf->dev) + lp ; | |
685 // 対象のI2Cデバイス | |
686 channel->address = i2c_address[lp] ; | |
687 channel->type = channeltype[lp] ; | |
688 // 実際のチューナ番号 | |
689 channel->channel = real_chanel[lp] ; | |
690 channel->ptr = dev_conf ; | |
691 channel->size = 0 ; | |
692 dev_conf->channel[lp] = channel ; | |
693 | |
694 init_waitqueue_head(&channel->wait_q); | |
695 | |
696 switch(channel->type){ | |
697 case CHANNEL_TYPE_ISDB_T: | |
698 channel->maxsize = CHANEL_DMA_SIZE ; | |
699 channel->buf = kzalloc(CHANEL_DMA_SIZE, GFP_KERNEL); | |
700 break ; | |
701 case CHANNEL_TYPE_ISDB_S: | |
702 channel->maxsize = BS_CHANEL_DMA_SIZE ; | |
703 channel->buf = kzalloc(BS_CHANEL_DMA_SIZE, GFP_KERNEL); | |
704 break ; | |
705 } | |
706 if(channel->buf == NULL){ | |
707 goto out_err_v4l; | |
708 } | |
9
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diff
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709 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) |
31
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diff
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710 printk(KERN_INFO "PT1: card_number = %d\n", |
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diff
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711 dev_conf->card_number); |
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diff
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|
712 device_create(pt1video_class, |
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713 NULL, |
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diff
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|
714 MKDEV(MAJOR(dev_conf->dev), |
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diff
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715 (MINOR(dev_conf->dev) + lp)), |
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|
716 NULL, |
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diff
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|
717 "pt1video%u", |
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|
718 MINOR(dev_conf->dev) + lp + |
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diff
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719 dev_conf->card_number * MAX_CHANNEL); |
9
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720 #else |
31
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diff
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|
721 device_create(pt1video_class, |
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diff
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|
722 NULL, |
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|
723 MKDEV(MAJOR(dev_conf->dev), |
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diff
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|
724 (MINOR(dev_conf->dev) + lp)), |
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|
725 "pt1video%u", |
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726 MINOR(dev_conf->dev) + lp + |
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727 dev_conf->card_number * MAX_CHANNEL); |
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|
728 #endif |
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729 |
0 | 730 #if 0 |
731 dev_conf->vdev[lp] = video_device_alloc(); | |
732 memcpy(dev_conf->vdev[lp], &pt1_template, sizeof(pt1_template)); | |
733 video_set_drvdata(dev_conf->vdev[lp], channel); | |
734 video_register_device(dev_conf->vdev[lp], VFL_TYPE_GRABBER, -1); | |
735 #endif | |
736 } | |
31
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737 |
0 | 738 if(pt1_dma_init(pdev, dev_conf) < 0){ |
739 goto out_err_dma; | |
740 } | |
741 dev_conf->kthread = kthread_run(pt1_thread, dev_conf, "pt1"); | |
742 pci_set_drvdata(pdev, dev_conf); | |
743 return 0; | |
744 | |
745 out_err_dma: | |
746 pt1_dma_free(pdev, dev_conf); | |
747 out_err_v4l: | |
748 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
749 if(dev_conf->channel[lp] != NULL){ | |
750 if(dev_conf->channel[lp]->buf != NULL){ | |
751 kfree(dev_conf->channel[lp]->buf); | |
752 } | |
753 kfree(dev_conf->channel[lp]); | |
754 } | |
755 } | |
756 out_err_fpga: | |
757 writel(0xb0b0000, dev_conf->regs); | |
758 writel(0, dev_conf->regs + 4); | |
759 iounmap(dev_conf->regs); | |
760 release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len); | |
761 kfree(dev_conf); | |
762 out_err_regbase: | |
763 return -EIO; | |
764 | |
765 } | |
766 | |
767 static void __devexit pt1_pci_remove_one(struct pci_dev *pdev) | |
768 { | |
769 | |
770 int lp ; | |
771 __u32 val ; | |
772 PT1_DEVICE *dev_conf = (PT1_DEVICE *)pci_get_drvdata(pdev); | |
773 | |
774 if(dev_conf){ | |
775 if(dev_conf->kthread) { | |
776 kthread_stop(dev_conf->kthread); | |
777 dev_conf->kthread = NULL; | |
778 } | |
779 | |
780 // DMA終了 | |
781 writel(0x08080000, dev_conf->regs); | |
782 for(lp = 0 ; lp < 10 ; lp++){ | |
783 val = readl(dev_conf->regs); | |
784 if(!(val & (1 << 6))){ | |
785 break ; | |
786 } | |
787 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
788 } | |
789 pt1_dma_free(pdev, dev_conf); | |
790 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
791 if(dev_conf->channel[lp] != NULL){ | |
792 cdev_del(&dev_conf->cdev[lp]); | |
793 kfree(dev_conf->channel[lp]->buf); | |
794 kfree(dev_conf->channel[lp]); | |
795 } | |
31
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diff
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|
796 device_destroy(pt1video_class, |
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diff
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|
797 MKDEV(MAJOR(dev_conf->dev), |
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|
798 (MINOR(dev_conf->dev) + lp))); |
0 | 799 } |
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diff
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|
800 |
0 | 801 unregister_chrdev_region(dev_conf->dev, MAX_CHANNEL); |
802 writel(0xb0b0000, dev_conf->regs); | |
803 writel(0, dev_conf->regs + 4); | |
804 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_OFF); | |
805 release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len); | |
806 iounmap(dev_conf->regs); | |
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|
807 device[dev_conf->card_number] = NULL; |
0 | 808 kfree(dev_conf); |
809 } | |
810 pci_set_drvdata(pdev, NULL); | |
811 } | |
812 #ifdef CONFIG_PM | |
813 | |
814 static int pt1_pci_suspend (struct pci_dev *pdev, pm_message_t state) | |
815 { | |
816 return 0; | |
817 } | |
818 | |
819 static int pt1_pci_resume (struct pci_dev *pdev) | |
820 { | |
821 return 0; | |
822 } | |
823 | |
824 #endif /* CONFIG_PM */ | |
825 | |
826 | |
827 static struct pci_driver pt1_driver = { | |
828 .name = DRV_NAME, | |
829 .probe = pt1_pci_init_one, | |
830 .remove = __devexit_p(pt1_pci_remove_one), | |
831 .id_table = pt1_pci_tbl, | |
832 #ifdef CONFIG_PM | |
833 .suspend = pt1_pci_suspend, | |
834 .resume = pt1_pci_resume, | |
835 #endif /* CONFIG_PM */ | |
836 | |
837 }; | |
838 | |
839 | |
840 static int __init pt1_pci_init(void) | |
841 { | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
842 pt1video_class = class_create(THIS_MODULE, DRIVERNAME); |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
843 if (IS_ERR(pt1video_class)) |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
844 return PTR_ERR(pt1video_class); |
0 | 845 return pci_register_driver(&pt1_driver); |
846 } | |
847 | |
848 | |
849 static void __exit pt1_pci_cleanup(void) | |
850 { | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
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851 class_destroy(pt1video_class); |
31
289794dc265f
adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
30
diff
changeset
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852 pci_unregister_driver(&pt1_driver); |
0 | 853 } |
854 | |
855 module_init(pt1_pci_init); | |
856 module_exit(pt1_pci_cleanup); |