annotate driver/pt1_pci.c @ 97:4d201756c593

- restore channel conversion table - show CATV channels in channel list
author Yoshiki Yazawa <yaz@honeyplanet.jp>
date Wed, 10 Feb 2010 14:55:03 +0900
parents a201531113ca
children 6e661e828b43
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
1 /* pt1-pci.c: A PT1 on PCI bus driver for Linux. */
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
2 #define DRV_NAME "pt1-pci"
90
c6311b6efd9c - version string should be generated upon revision on mercurial repository
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 86
diff changeset
3 #include "version.h"
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
4
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
5 #include <linux/module.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
6 #include <linux/kernel.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
7 #include <linux/errno.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
8 #include <linux/pci.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
9 #include <linux/init.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
10 #include <linux/interrupt.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
11
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
12 #include <asm/system.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
13 #include <asm/io.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
14 #include <asm/irq.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
15 #include <asm/uaccess.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
16 #include <linux/version.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
17 #include <linux/mutex.h>
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
18 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23)
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
19 #include <linux/freezer.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
20 #else
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
21 #define set_freezable()
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
22 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11)
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
23 typedef struct pm_message {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
24 int event;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
25 } pm_message_t;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
26 #endif
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
27 #endif
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
28 #include <linux/kthread.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
29 #include <linux/dma-mapping.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
30
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
31 #include <linux/fs.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
32 #include <linux/cdev.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
33
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
34 #include <linux/ioctl.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
35
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
36 #include "pt1_com.h"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
37 #include "pt1_pci.h"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
38 #include "pt1_tuner.h"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
39 #include "pt1_i2c.h"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
40 #include "pt1_tuner_data.h"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
41 #include "pt1_ioctl.h"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
42
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
43 /* These identify the driver base version and may not be removed. */
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
44 static char version[] __devinitdata =
93
ee357d8f987f suppress silly warning
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 90
diff changeset
45 DRV_NAME ".c: " DRV_VERSION " " DRV_RELDATE " \n";
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
46
90
c6311b6efd9c - version string should be generated upon revision on mercurial repository
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 86
diff changeset
47 MODULE_AUTHOR("Tomoaki Ishikawa tomy@users.sourceforge.jp and Yoshiki Yazawa yaz@honeyplanet.jp");
c6311b6efd9c - version string should be generated upon revision on mercurial repository
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 86
diff changeset
48 #define DRIVER_DESC "PCI earthsoft PT1/2 driver"
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
49 MODULE_DESCRIPTION(DRIVER_DESC);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
50 MODULE_LICENSE("GPL");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
51
51
c915076353ae backout 23b6f99f65b2 for now. it may cause scheduling while atomic operation.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 50
diff changeset
52 static int debug = 7; /* 1 normal messages, 0 quiet .. 7 verbose. */
c915076353ae backout 23b6f99f65b2 for now. it may cause scheduling while atomic operation.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 50
diff changeset
53 static int lnb = 0; /* LNB OFF:0 +11V:1 +15V:2 */
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
54
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
55 module_param(debug, int, 0);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
56 module_param(lnb, int, 0);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
57 MODULE_PARM_DESC(debug, "debug level (1-2)");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
58 MODULE_PARM_DESC(debug, "LNB level (0:OFF 1:+11V 2:+15V)");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
59
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
60 #define VENDOR_EARTHSOFT 0x10ee
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
61 #define PCI_PT1_ID 0x211a
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
62 #define PCI_PT2_ID 0x222a
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
63
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
64 static struct pci_device_id pt1_pci_tbl[] = {
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
65 { VENDOR_EARTHSOFT, PCI_PT1_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
66 { VENDOR_EARTHSOFT, PCI_PT2_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
67 { 0, }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
68 };
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
69 MODULE_DEVICE_TABLE(pci, pt1_pci_tbl);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
70 #define DEV_NAME "pt1video"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
71
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
72 #define PACKET_SIZE 188 // 1パケット長
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
73 #define MAX_READ_BLOCK 4 // 1度に読み出す最大DMAバッファ数
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
74 #define MAX_PCI_DEVICE 128 // 最大64枚
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
75 #define DMA_SIZE 4096 // DMAバッファサイズ
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
76 #define DMA_RING_SIZE 128 // RINGサイズ
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
77 #define DMA_RING_MAX 511 // 1RINGにいくつ詰めるか(1023はNGで511まで)
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
78 #define CHANEL_DMA_SIZE (2*1024*1024) // 地デジ用(16Mbps)
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
79 #define BS_CHANEL_DMA_SIZE (4*1024*1024) // BS用(32Mbps)
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
80
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
81 typedef struct _DMA_CONTROL{
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
82 dma_addr_t ring_dma[DMA_RING_MAX] ; // DMA情報
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
83 __u32 *data[DMA_RING_MAX];
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
84 }DMA_CONTROL;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
85
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
86 typedef struct _PT1_CHANNEL PT1_CHANNEL;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
87
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
88 typedef struct _pt1_device{
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
89 unsigned long mmio_start ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
90 __u32 mmio_len ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
91 void __iomem *regs;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
92 struct mutex lock ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
93 dma_addr_t ring_dma[DMA_RING_SIZE] ; // DMA情報
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
94 void *dmaptr[DMA_RING_SIZE] ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
95 struct task_struct *kthread;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
96 dev_t dev ;
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
97 int card_number;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
98 __u32 base_minor ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
99 struct cdev cdev[MAX_CHANNEL];
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
100 wait_queue_head_t dma_wait_q ;// for poll on reading
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
101 DMA_CONTROL *dmactl[DMA_RING_SIZE];
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
102 PT1_CHANNEL *channel[MAX_CHANNEL];
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
103 int cardtype;
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
104 } PT1_DEVICE;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
105
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
106 typedef struct _MICRO_PACKET{
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
107 char data[3];
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
108 char head ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
109 }MICRO_PACKET;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
110
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
111 struct _PT1_CHANNEL{
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
112 __u32 valid ; // 使用中フラグ
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
113 __u32 address ; // I2Cアドレス
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
114 __u32 channel ; // チャネル番号
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
115 int type ; // チャネルタイプ
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
116 __u32 packet_size ; // パケットサイズ
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
117 __u32 drop ; // パケットドロップ数
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
118 struct mutex lock ; // CH別mutex_lock用
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
119 __u32 size ; // DMAされたサイズ
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
120 __u32 maxsize ; // DMA用バッファサイズ
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
121 __u32 bufsize ; // チャネルに割り振られたサイズ
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
122 __u32 overflow ; // オーバーフローエラー発生
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
123 __u32 counetererr ; // 転送カウンタ1エラー
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
124 __u32 transerr ; // 転送エラー
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
125 __u32 minor ; // マイナー番号
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
126 __u8 *buf; // CH別受信メモリ
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
127 __u32 pointer;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
128 __u8 req_dma ; // 溢れたチャネル
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
129 __u8 packet_buf[PACKET_SIZE] ; // 溢れたチャネル
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
130 PT1_DEVICE *ptr ; // カード別情報
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
131 wait_queue_head_t wait_q ; // for poll on reading
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
132 };
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
133
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
134 // I2Cアドレス(video0, 1 = ISDB-S) (video2, 3 = ISDB-T)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
135 int i2c_address[MAX_CHANNEL] = {T0_ISDB_S, T1_ISDB_S, T0_ISDB_T, T1_ISDB_T};
86
015481a6a900 clean up a bit.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 82
diff changeset
136 int real_channel[MAX_CHANNEL] = {0, 2, 1, 3};
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
137 int channeltype[MAX_CHANNEL] = {CHANNEL_TYPE_ISDB_S, CHANNEL_TYPE_ISDB_S,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
138 CHANNEL_TYPE_ISDB_T, CHANNEL_TYPE_ISDB_T};
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
139
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
140 static PT1_DEVICE *device[MAX_PCI_DEVICE];
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
141 static struct class *pt1video_class;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
142
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
143 #define PT1MAJOR 251
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
144 #define DRIVERNAME "pt1video"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
145
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
146 static void reset_dma(PT1_DEVICE *dev_conf)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
147 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
148
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
149 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
150 __u32 addr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
151 int ring_pos = 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
152 int data_pos = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
153 __u32 *dataptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
154
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
155 // データ初期化
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
156 for(ring_pos = 0 ; ring_pos < DMA_RING_SIZE ; ring_pos++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
157 for(data_pos = 0 ; data_pos < DMA_RING_MAX ; data_pos++){
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
158 dataptr = (dev_conf->dmactl[ring_pos])->data[data_pos];
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
159 dataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
160 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
161 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
162 // 転送カウンタをリセット
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
163 writel(0x00000010, dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
164 // 転送カウンタをインクリメント
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
165 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
166 writel(0x00000020, dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
167 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
168
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
169 addr = (int)dev_conf->ring_dma[0] ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
170 addr >>= 12 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
171 // DMAバッファ設定
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
172 writel(addr, dev_conf->regs + DMA_ADDR);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
173 // DMA開始
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
174 writel(0x0c000040, dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
175
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
176 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
177 static int pt1_thread(void *data)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
178 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
179 PT1_DEVICE *dev_conf = data ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
180 PT1_CHANNEL *channel ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
181 int ring_pos = 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
182 int data_pos = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
183 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
184 int chno ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
185 int lp2 ;
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
186 int dma_channel ;
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
187 int packet_pos ;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
188 __u32 *dataptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
189 __u32 *curdataptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
190 __u32 val ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
191 union mpacket{
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
192 __u32 val ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
193 MICRO_PACKET packet ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
194 }micro;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
195
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
196 set_freezable();
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
197 reset_dma(dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
198 printk(KERN_INFO "pt1_thread run\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
199
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
200 for(;;){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
201 if(kthread_should_stop()){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
202 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
203 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
204
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
205 for(;;){
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
206 dataptr = (dev_conf->dmactl[ring_pos])->data[data_pos];
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
207 // データあり?
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
208 if(dataptr[(DMA_SIZE / sizeof(__u32)) - 2] == 0){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
209 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
210 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
211 micro.val = *dataptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
212 curdataptr = dataptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
213 data_pos += 1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
214 for(lp = 0 ; lp < (DMA_SIZE / sizeof(__u32)) ; lp++, dataptr++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
215 micro.val = *dataptr ;
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
216 dma_channel = ((micro.packet.head >> 5) & 0x07);
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
217 //チャネル情報不正
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
218 if(dma_channel > MAX_CHANNEL){
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
219 printk(KERN_ERR "DMA Channel Number Error(%d)\n", dma_channel);
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
220 continue ;
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
221 }
86
015481a6a900 clean up a bit.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 82
diff changeset
222 chno = real_channel[(((micro.packet.head >> 5) & 0x07) - 1)];
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
223 packet_pos = ((micro.packet.head >> 2) & 0x07);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
224 channel = dev_conf->channel[chno] ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
225 // エラーチェック
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
226 if((micro.packet.head & MICROPACKET_ERROR)){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
227 val = readl(dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
228 if((val & BIT_RAM_OVERFLOW)){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
229 channel->overflow += 1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
230 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
231 if((val & BIT_INITIATOR_ERROR)){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
232 channel->counetererr += 1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
233 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
234 if((val & BIT_INITIATOR_WARNING)){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
235 channel->transerr += 1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
236 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
237 // 初期化して先頭から
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
238 reset_dma(dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
239 ring_pos = data_pos = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
240 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
241 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
242 // 未使用チャネルは捨てる
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
243 if(channel->valid == FALSE){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
244 continue ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
245 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
246 mutex_lock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
247 // あふれたら読み出すまで待つ
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
248 while(1){
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
249 if(channel->size >= (channel->maxsize - PACKET_SIZE - 4)){
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
250 // 該当チャンネルのDMA読みだし待ちにする
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
251 wake_up(&channel->wait_q);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
252 channel->req_dma = TRUE ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
253 mutex_unlock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
254 // タスクに時間を渡す為中断
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
255 wait_event_timeout(dev_conf->dma_wait_q, (channel->req_dma == FALSE),
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
256 msecs_to_jiffies(500));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
257 mutex_lock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
258 channel->drop += 1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
259 }else{
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
260 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
261 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
262 }
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
263 // 先頭で、一時バッファに残っている場合
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
264 if((micro.packet.head & 0x02) && (channel->packet_size != 0)){
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
265 channel->packet_size = 0 ;
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
266 }
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
267 // データコピー
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
268 for(lp2 = 2 ; lp2 >= 0 ; lp2--){
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
269 channel->packet_buf[channel->packet_size] = micro.packet.data[lp2] ;
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
270 channel->packet_size += 1 ;
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
271 }
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
272
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
273 // パケットが出来たらコピーする
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
274 if(channel->packet_size >= PACKET_SIZE){
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
275 if (channel->pointer + channel->size >= channel->maxsize) {
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
276 // リングバッファの境界を越えていてリングバッファの先頭に戻っている場合
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
277 // channel->pointer + channel->size - channel->maxsize でリングバッファ先頭からのアドレスになる
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
278 memcpy(&channel->buf[channel->pointer + channel->size - channel->maxsize], channel->packet_buf, PACKET_SIZE);
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
279 } else if (channel->pointer + channel->size + PACKET_SIZE > channel->maxsize) {
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
280 // リングバッファの境界をまたぐように書き込まれる場合
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
281 // リングバッファの境界まで書き込み
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
282 __u32 tmp_size = channel->maxsize - (channel->pointer + channel->size);
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
283 memcpy(&channel->buf[channel->pointer + channel->size], channel->packet_buf, tmp_size);
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
284 // 先頭に戻って書き込み
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
285 memcpy(channel->buf, &channel->packet_buf[tmp_size], PACKET_SIZE - tmp_size);
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
286 } else {
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
287 // リングバッファ内で収まる場合
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
288 // 通常の書き込み
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
289 memcpy(&channel->buf[channel->pointer + channel->size], channel->packet_buf, PACKET_SIZE);
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
290 }
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
291 channel->size += PACKET_SIZE ;
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
292 channel->packet_size = 0 ;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
293 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
294 mutex_unlock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
295 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
296 curdataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
297
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
298 if(data_pos >= DMA_RING_MAX){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
299 data_pos = 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
300 ring_pos += 1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
301 // DMAリングが変わった場合はインクリメント
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
302 writel(0x00000020, dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
303 if(ring_pos >= DMA_RING_SIZE){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
304 ring_pos = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
305 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
306 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
307
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
308 // 頻度を落す(4Kで起動させる)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
309 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
86
015481a6a900 clean up a bit.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 82
diff changeset
310 channel = dev_conf->channel[real_channel[lp]] ;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
311 if((channel->size >= DMA_SIZE) && (channel->valid == TRUE)){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
312 wake_up(&channel->wait_q);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
313 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
314 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
315 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
316 schedule_timeout_interruptible(msecs_to_jiffies(1));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
317 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
318 return 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
319 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
320 static int pt1_open(struct inode *inode, struct file *file)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
321 {
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
322 int major = imajor(inode);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
323 int minor = iminor(inode);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
324 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
325 int lp2 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
326 PT1_CHANNEL *channel ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
327
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
328 for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
329 if(device[lp] == NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
330 return -EIO ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
331 }
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
332
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
333 if(MAJOR(device[lp]->dev) == major &&
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
334 device[lp]->base_minor <= minor &&
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
335 device[lp]->base_minor + MAX_CHANNEL > minor) {
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
336
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
337 mutex_lock(&device[lp]->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
338 for(lp2 = 0 ; lp2 < MAX_CHANNEL ; lp2++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
339 channel = device[lp]->channel[lp2] ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
340 if(channel->minor == minor){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
341 if(channel->valid == TRUE){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
342 mutex_unlock(&device[lp]->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
343 return -EIO ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
344 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
345 channel->drop = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
346 channel->valid = TRUE ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
347 channel->overflow = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
348 channel->counetererr = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
349 channel->transerr = 0 ;
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
350 channel->packet_size = 0 ;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
351 file->private_data = channel;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
352 mutex_lock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
353 // データ初期化
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
354 channel->size = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
355 mutex_unlock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
356 mutex_unlock(&device[lp]->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
357 return 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
358 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
359 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
360 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
361 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
362 return -EIO;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
363 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
364 static int pt1_release(struct inode *inode, struct file *file)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
365 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
366 PT1_CHANNEL *channel = file->private_data;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
367
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
368 mutex_lock(&channel->ptr->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
369 SetStream(channel->ptr->regs, channel->channel, FALSE);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
370 channel->valid = FALSE ;
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
371 printk(KERN_INFO "(%d:%d)Drop=%08d:%08d:%08d:%08d\n", imajor(inode), iminor(inode), channel->drop,
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
372 channel->overflow, channel->counetererr, channel->transerr);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
373 channel->overflow = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
374 channel->counetererr = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
375 channel->transerr = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
376 channel->drop = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
377 // 停止している場合は起こす
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
378 if(channel->req_dma == TRUE){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
379 channel->req_dma = FALSE ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
380 wake_up(&channel->ptr->dma_wait_q);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
381 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
382 mutex_unlock(&channel->ptr->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
383 return 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
384 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
385
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
386 static ssize_t pt1_read(struct file *file, char __user *buf, size_t cnt, loff_t * ppos)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
387 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
388 PT1_CHANNEL *channel = file->private_data;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
389 __u32 size ;
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
390 unsigned long dummy;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
391
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
392 // 4K単位で起こされるのを待つ(CPU負荷対策)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
393 if(channel->size < DMA_SIZE){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
394 wait_event_timeout(channel->wait_q, (channel->size >= DMA_SIZE),
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
395 msecs_to_jiffies(500));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
396 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
397 mutex_lock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
398 if(!channel->size){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
399 size = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
400 }else{
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
401 __u32 tmp_size = 0;
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
402 if (cnt < channel->size) {
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
403 // バッファにあるデータより小さい読み込みの場合
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
404 size = cnt;
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
405 } else {
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
406 // バッファにあるデータ以上の読み込みの場合
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
407 size = channel->size;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
408 }
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
409 if (channel->maxsize <= size + channel->pointer) {
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
410 // リングバッファの境界を越える場合
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
411 tmp_size = channel->maxsize - channel->pointer;
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
412 // 境界までコピー
44
07d71b1484a8 suppress warnings
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 41
diff changeset
413 dummy = copy_to_user(buf, &channel->buf[channel->pointer], tmp_size);
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
414 // 残りをコピー
44
07d71b1484a8 suppress warnings
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 41
diff changeset
415 dummy = copy_to_user(&buf[tmp_size], channel->buf, size - tmp_size);
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
416 channel->pointer = size - tmp_size;
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
417 } else {
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
418 // 普通にコピー
44
07d71b1484a8 suppress warnings
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 41
diff changeset
419 dummy = copy_to_user(buf, &channel->buf[channel->pointer], size);
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
420 channel->pointer += size;
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
421 }
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
422 channel->size -= size;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
423 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
424 // 読み終わったかつ使用しているのがが4K以下
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
425 if(channel->req_dma == TRUE){
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
426 channel->req_dma = FALSE ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
427 wake_up(&channel->ptr->dma_wait_q);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
428 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
429 mutex_unlock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
430 return size ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
431 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
432 static int SetFreq(PT1_CHANNEL *channel, FREQUENCY *freq)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
433 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
434
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
435 switch(channel->type){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
436 case CHANNEL_TYPE_ISDB_S:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
437 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
438 ISDB_S_TMCC tmcc ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
439 if(bs_tune(channel->ptr->regs,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
440 &channel->ptr->lock,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
441 channel->address,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
442 freq->frequencyno,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
443 &tmcc) < 0){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
444 return -EIO ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
445 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
446
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
447 #if 0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
448 printk(KERN_INFO "clockmargin = (%x)\n", (tmcc.clockmargin & 0xFF));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
449 printk(KERN_INFO "carriermargin = (%x)\n", (tmcc.carriermargin & 0xFF));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
450
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
451 for(lp = 0 ; lp < MAX_BS_TS_ID ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
452 if(tmcc.ts_id[lp].ts_id == 0xFFFF){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
453 continue ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
454 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
455 printk(KERN_INFO "Slot(%d:%x)\n", lp, tmcc.ts_id[lp].ts_id);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
456 printk(KERN_INFO "mode (low/high) = (%x:%x)\n",
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
457 tmcc.ts_id[lp].low_mode, tmcc.ts_id[lp].high_mode);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
458 printk(KERN_INFO "slot (low/high) = (%x:%x)\n",
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
459 tmcc.ts_id[lp].low_slot,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
460 tmcc.ts_id[lp].high_slot);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
461 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
462 #endif
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
463 ts_lock(channel->ptr->regs,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
464 &channel->ptr->lock,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
465 channel->address,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
466 tmcc.ts_id[freq->slot].ts_id);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
467 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
468 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
469 case CHANNEL_TYPE_ISDB_T:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
470 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
471 if(isdb_t_frequency(channel->ptr->regs,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
472 &channel->ptr->lock,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
473 channel->address,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
474 freq->frequencyno, freq->slot) < 0){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
475 return -EINVAL ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
476 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
477 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
478 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
479 return 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
480 }
95
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
481
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
482 static int count_used_bs_tuners(PT1_DEVICE *device)
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
483 {
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
484 int count = 0;
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
485 int i;
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
486
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
487 for(i=0; i<MAX_CHANNEL; i++) {
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
488 if(device && device->channel[i] &&
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
489 device->channel[i]->type == CHANNEL_TYPE_ISDB_S &&
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
490 device->channel[i]->valid)
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
491 count++;
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
492 }
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
493
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
494 printk(KERN_INFO "used bs tuners on %p = %d\n", device, count);
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
495 return count;
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
496 }
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
497
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
498 static int pt1_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg0)
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
499 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
500 PT1_CHANNEL *channel = file->private_data;
95
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
501 int signal;
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
502 unsigned long dummy;
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
503 void *arg = (void *)arg0;
80
f336fd2dcf28 make LNB voltage can be specified from user application
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 79
diff changeset
504 int lnb_eff, lnb_usr;
f336fd2dcf28 make LNB voltage can be specified from user application
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 79
diff changeset
505 char *voltage[] = {"0V", "11V", "15V"};
95
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
506 int count;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
507
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
508 switch(cmd){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
509 case SET_CHANNEL:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
510 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
511 FREQUENCY freq ;
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
512 dummy = copy_from_user(&freq, arg, sizeof(FREQUENCY));
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
513 return SetFreq(channel, &freq);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
514 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
515 case START_REC:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
516 SetStream(channel->ptr->regs, channel->channel, TRUE);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
517 return 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
518 case STOP_REC:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
519 SetStream(channel->ptr->regs, channel->channel, FALSE);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
520 return 0 ;
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
521 case GET_SIGNAL_STRENGTH:
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
522 switch(channel->type){
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
523 case CHANNEL_TYPE_ISDB_S:
86
015481a6a900 clean up a bit.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 82
diff changeset
524 signal = isdb_s_read_signal_strength(channel->ptr->regs,
015481a6a900 clean up a bit.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 82
diff changeset
525 &channel->ptr->lock,
015481a6a900 clean up a bit.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 82
diff changeset
526 channel->address);
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
527 break ;
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
528 case CHANNEL_TYPE_ISDB_T:
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
529 signal = isdb_t_read_signal_strength(channel->ptr->regs,
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
530 &channel->ptr->lock, channel->address);
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
531 break ;
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
532 }
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
533 dummy = copy_to_user(arg, &signal, sizeof(int));
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
534 return 0 ;
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
535 case LNB_ENABLE:
95
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
536 count = count_used_bs_tuners(channel->ptr);
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
537 if(count <= 1) {
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
538 lnb_usr = (int)arg0;
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
539 lnb_eff = lnb_usr ? lnb_usr : lnb;
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
540 settuner_reset(channel->ptr->regs, channel->ptr->cardtype, lnb_eff, TUNER_POWER_ON_RESET_DISABLE);
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
541 printk(KERN_INFO "PT1:LNB on %s\n", voltage[lnb_eff]);
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
542 }
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
543 return 0 ;
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
544 case LNB_DISABLE:
95
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
545 count = count_used_bs_tuners(channel->ptr);
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
546 if(count <= 1) {
82
cfb2da5ee428 added LNB reference count to maintain power state during recording.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 80
diff changeset
547 settuner_reset(channel->ptr->regs, channel->ptr->cardtype, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE);
95
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
548 printk(KERN_INFO "PT1:LNB off\n");
a201531113ca implement decent LNB management
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 93
diff changeset
549 }
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
550 return 0 ;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
551 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
552 return -EINVAL;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
553 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
554
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
555 /*
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
556 */
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
557 static const struct file_operations pt1_fops = {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
558 .owner = THIS_MODULE,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
559 .open = pt1_open,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
560 .release = pt1_release,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
561 .read = pt1_read,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
562 .ioctl = pt1_ioctl,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
563 .llseek = no_llseek,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
564 };
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
565
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
566 int pt1_makering(struct pci_dev *pdev, PT1_DEVICE *dev_conf)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
567 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
568 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
569 int lp2 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
570 DMA_CONTROL *dmactl;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
571 __u32 *dmaptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
572 __u32 addr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
573 __u32 *ptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
574
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
575 //DMAリング作成
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
576 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
577 ptr = dev_conf->dmaptr[lp];
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
578 if(lp == (DMA_RING_SIZE - 1)){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
579 addr = (__u32)dev_conf->ring_dma[0];
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
580 }else{
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
581 addr = (__u32)dev_conf->ring_dma[(lp + 1)];
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
582 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
583 addr >>= 12 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
584 memcpy(ptr, &addr, sizeof(__u32));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
585 ptr += 1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
586
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
587 dmactl = dev_conf->dmactl[lp];
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
588 for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
589 dmaptr = pci_alloc_consistent(pdev, DMA_SIZE, &dmactl->ring_dma[lp2]);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
590 if(dmaptr == NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
591 printk(KERN_INFO "PT1:DMA ALLOC ERROR\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
592 return -1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
593 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
594 dmactl->data[lp2] = dmaptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
595 // DMAデータエリア初期化
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
596 dmaptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
597 addr = (__u32)dmactl->ring_dma[lp2];
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
598 addr >>= 12 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
599 memcpy(ptr, &addr, sizeof(__u32));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
600 ptr += 1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
601 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
602 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
603 return 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
604 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
605 int pt1_dma_init(struct pci_dev *pdev, PT1_DEVICE *dev_conf)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
606 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
607 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
608 void *ptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
609
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
610 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
611 ptr = pci_alloc_consistent(pdev, DMA_SIZE, &dev_conf->ring_dma[lp]);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
612 if(ptr == NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
613 printk(KERN_INFO "PT1:DMA ALLOC ERROR\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
614 return -1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
615 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
616 dev_conf->dmaptr[lp] = ptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
617 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
618
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
619 return pt1_makering(pdev, dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
620 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
621 int pt1_dma_free(struct pci_dev *pdev, PT1_DEVICE *dev_conf)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
622 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
623
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
624 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
625 int lp2 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
626
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
627 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
628 if(dev_conf->dmaptr[lp] != NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
629 pci_free_consistent(pdev, DMA_SIZE,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
630 dev_conf->dmaptr[lp], dev_conf->ring_dma[lp]);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
631 for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
632 if((dev_conf->dmactl[lp])->data[lp2] != NULL){
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
633 pci_free_consistent(pdev, DMA_SIZE,
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
634 (dev_conf->dmactl[lp])->data[lp2],
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
635 (dev_conf->dmactl[lp])->ring_dma[lp2]);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
636 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
637 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
638 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
639 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
640 return 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
641 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
642 static int __devinit pt1_pci_init_one (struct pci_dev *pdev,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
643 const struct pci_device_id *ent)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
644 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
645 int rc ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
646 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
647 int minor ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
648 u16 cmd ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
649 PT1_DEVICE *dev_conf ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
650 PT1_CHANNEL *channel ;
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
651 int i;
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
652 struct resource *dummy;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
653
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
654 rc = pci_enable_device(pdev);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
655 if (rc)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
656 return rc;
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
657 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
658 if (rc) {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
659 printk(KERN_ERR "PT1:DMA MASK ERROR");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
660 return rc;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
661 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
662
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
663 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
664 if (!(cmd & PCI_COMMAND_MASTER)) {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
665 printk(KERN_INFO "Attempting to enable Bus Mastering\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
666 pci_set_master(pdev);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
667 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
668 if (!(cmd & PCI_COMMAND_MASTER)) {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
669 printk(KERN_ERR "Bus Mastering is not enabled\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
670 return -EIO;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
671 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
672 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
673 printk(KERN_INFO "Bus Mastering Enabled.\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
674
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
675 dev_conf = kzalloc(sizeof(PT1_DEVICE), GFP_KERNEL);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
676 if(!dev_conf){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
677 printk(KERN_ERR "PT1:out of memory !");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
678 return -ENOMEM ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
679 }
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
680 for (i = 0; i < DMA_RING_SIZE; i++) {
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
681 dev_conf->dmactl[i] = kzalloc(sizeof(DMA_CONTROL), GFP_KERNEL);
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
682 if(!dev_conf->dmactl[i]){
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
683 int j;
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
684 for (j = 0; j < i; j++) {
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
685 kfree(dev_conf->dmactl[j]);
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
686 }
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
687 kfree(dev_conf);
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
688 printk(KERN_ERR "PT1:out of memory !");
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
689 return -ENOMEM ;
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
690 }
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
691 }
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
692
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
693 switch(ent->device) {
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
694 case PCI_PT1_ID:
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
695 dev_conf->cardtype = PT1;
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
696 break;
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
697 case PCI_PT2_ID:
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
698 dev_conf->cardtype = PT2;
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
699 break;
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
700 default:
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
701 break;
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
702 }
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
703
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
704 // PCIアドレスをマップする
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
705 dev_conf->mmio_start = pci_resource_start(pdev, 0);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
706 dev_conf->mmio_len = pci_resource_len(pdev, 0);
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
707 dummy = request_mem_region(dev_conf->mmio_start, dev_conf->mmio_len, DEV_NAME);
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
708 if (!dummy) {
79
3c2123189edf improve PT2 support.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 69
diff changeset
709 printk(KERN_ERR "PT1:cannot request iomem (0x%llx).\n", (unsigned long long) dev_conf->mmio_start);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
710 goto out_err_regbase;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
711 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
712
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
713 dev_conf->regs = ioremap(dev_conf->mmio_start, dev_conf->mmio_len);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
714 if (!dev_conf->regs){
79
3c2123189edf improve PT2 support.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 69
diff changeset
715 printk(KERN_ERR "pt1:Can't remap register area.\n");
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
716 goto out_err_regbase;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
717 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
718 // 初期化処理
79
3c2123189edf improve PT2 support.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 69
diff changeset
719 if(xc3s_init(dev_conf->regs, dev_conf->cardtype)){
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
720 printk(KERN_ERR "Error xc3s_init\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
721 goto out_err_fpga;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
722 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
723 // チューナリセット
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
724 settuner_reset(dev_conf->regs, dev_conf->cardtype, LNB_OFF, TUNER_POWER_ON_RESET_ENABLE);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
725 schedule_timeout_interruptible(msecs_to_jiffies(50));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
726
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
727 settuner_reset(dev_conf->regs, dev_conf->cardtype, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
728 schedule_timeout_interruptible(msecs_to_jiffies(10));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
729 mutex_init(&dev_conf->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
730
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
731 // Tuner 初期化処理
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
732 for(lp = 0 ; lp < MAX_TUNER ; lp++){
69
272a8fba970b added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 64
diff changeset
733 rc = tuner_init(dev_conf->regs, dev_conf->cardtype, &dev_conf->lock, lp);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
734 if(rc < 0){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
735 printk(KERN_ERR "Error tuner_init\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
736 goto out_err_fpga;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
737 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
738 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
739 // 初期化完了
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
740 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
741 set_sleepmode(dev_conf->regs, &dev_conf->lock,
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
742 i2c_address[lp], channeltype[lp], TYPE_SLEEP);
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
743
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
744 schedule_timeout_interruptible(msecs_to_jiffies(50));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
745 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
746 rc = alloc_chrdev_region(&dev_conf->dev, 0, MAX_CHANNEL, DEV_NAME);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
747 if(rc < 0){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
748 goto out_err_fpga;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
749 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
750
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
751 // 初期化
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
752 init_waitqueue_head(&dev_conf->dma_wait_q);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
753
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
754 minor = MINOR(dev_conf->dev) ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
755 dev_conf->base_minor = minor ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
756 for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){
79
3c2123189edf improve PT2 support.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 69
diff changeset
757 printk(KERN_INFO "PT1:device[%d]=%p\n", lp, device[lp]);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
758 if(device[lp] == NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
759 device[lp] = dev_conf ;
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
760 dev_conf->card_number = lp;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
761 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
762 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
763 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
764 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
765 cdev_init(&dev_conf->cdev[lp], &pt1_fops);
30
eb694d8e4c7e setup owner in initialization
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 9
diff changeset
766 dev_conf->cdev[lp].owner = THIS_MODULE;
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
767 cdev_add(&dev_conf->cdev[lp],
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
768 MKDEV(MAJOR(dev_conf->dev), (MINOR(dev_conf->dev) + lp)), 1);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
769 channel = kzalloc(sizeof(PT1_CHANNEL), GFP_KERNEL);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
770 if(!channel){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
771 printk(KERN_ERR "PT1:out of memory !");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
772 return -ENOMEM ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
773 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
774
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
775 // 共通情報
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
776 mutex_init(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
777 // 待ち状態を解除
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
778 channel->req_dma = FALSE ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
779 // マイナー番号設定
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
780 channel->minor = MINOR(dev_conf->dev) + lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
781 // 対象のI2Cデバイス
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
782 channel->address = i2c_address[lp] ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
783 channel->type = channeltype[lp] ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
784 // 実際のチューナ番号
86
015481a6a900 clean up a bit.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 82
diff changeset
785 channel->channel = real_channel[lp] ;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
786 channel->ptr = dev_conf ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
787 channel->size = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
788 dev_conf->channel[lp] = channel ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
789
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
790 init_waitqueue_head(&channel->wait_q);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
791
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
792 switch(channel->type){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
793 case CHANNEL_TYPE_ISDB_T:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
794 channel->maxsize = CHANEL_DMA_SIZE ;
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
795 channel->buf = vmalloc(CHANEL_DMA_SIZE);
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
796 channel->pointer = 0;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
797 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
798 case CHANNEL_TYPE_ISDB_S:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
799 channel->maxsize = BS_CHANEL_DMA_SIZE ;
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
800 channel->buf = vmalloc(BS_CHANEL_DMA_SIZE);
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
801 channel->pointer = 0;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
802 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
803 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
804 if(channel->buf == NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
805 goto out_err_v4l;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
806 }
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
807 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
79
3c2123189edf improve PT2 support.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 69
diff changeset
808 printk(KERN_INFO "PT1:card_number = %d\n",
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
809 dev_conf->card_number);
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
810 device_create(pt1video_class,
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
811 NULL,
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
812 MKDEV(MAJOR(dev_conf->dev),
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
813 (MINOR(dev_conf->dev) + lp)),
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
814 NULL,
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
815 "pt1video%u",
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
816 MINOR(dev_conf->dev) + lp +
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
817 dev_conf->card_number * MAX_CHANNEL);
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
818 #else
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
819 device_create(pt1video_class,
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
820 NULL,
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
821 MKDEV(MAJOR(dev_conf->dev),
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
822 (MINOR(dev_conf->dev) + lp)),
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
823 "pt1video%u",
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
824 MINOR(dev_conf->dev) + lp +
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
825 dev_conf->card_number * MAX_CHANNEL);
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
826 #endif
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
827
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
828 #if 0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
829 dev_conf->vdev[lp] = video_device_alloc();
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
830 memcpy(dev_conf->vdev[lp], &pt1_template, sizeof(pt1_template));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
831 video_set_drvdata(dev_conf->vdev[lp], channel);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
832 video_register_device(dev_conf->vdev[lp], VFL_TYPE_GRABBER, -1);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
833 #endif
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
834 }
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
835
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
836 if(pt1_dma_init(pdev, dev_conf) < 0){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
837 goto out_err_dma;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
838 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
839 dev_conf->kthread = kthread_run(pt1_thread, dev_conf, "pt1");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
840 pci_set_drvdata(pdev, dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
841 return 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
842
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
843 out_err_dma:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
844 pt1_dma_free(pdev, dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
845 out_err_v4l:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
846 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
847 if(dev_conf->channel[lp] != NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
848 if(dev_conf->channel[lp]->buf != NULL){
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
849 vfree(dev_conf->channel[lp]->buf);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
850 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
851 kfree(dev_conf->channel[lp]);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
852 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
853 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
854 out_err_fpga:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
855 writel(0xb0b0000, dev_conf->regs);
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
856 writel(0, dev_conf->regs + CFG_REGS_ADDR);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
857 iounmap(dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
858 release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len);
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
859 for (i = 0; i < DMA_RING_SIZE; i++) {
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
860 kfree(dev_conf->dmactl[i]);
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
861 }
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
862 kfree(dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
863 out_err_regbase:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
864 return -EIO;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
865
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
866 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
867
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
868 static void __devexit pt1_pci_remove_one(struct pci_dev *pdev)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
869 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
870
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
871 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
872 __u32 val ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
873 PT1_DEVICE *dev_conf = (PT1_DEVICE *)pci_get_drvdata(pdev);
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
874 int i;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
875
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
876 if(dev_conf){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
877 if(dev_conf->kthread) {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
878 kthread_stop(dev_conf->kthread);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
879 dev_conf->kthread = NULL;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
880 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
881
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
882 // DMA終了
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
883 writel(0x08080000, dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
884 for(lp = 0 ; lp < 10 ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
885 val = readl(dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
886 if(!(val & (1 << 6))){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
887 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
888 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
889 schedule_timeout_interruptible(msecs_to_jiffies(1));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
890 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
891 pt1_dma_free(pdev, dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
892 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
893 if(dev_conf->channel[lp] != NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
894 cdev_del(&dev_conf->cdev[lp]);
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
895 vfree(dev_conf->channel[lp]->buf);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
896 kfree(dev_conf->channel[lp]);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
897 }
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
898 device_destroy(pt1video_class,
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
899 MKDEV(MAJOR(dev_conf->dev),
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
900 (MINOR(dev_conf->dev) + lp)));
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
901 }
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
902
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
903 unregister_chrdev_region(dev_conf->dev, MAX_CHANNEL);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
904 writel(0xb0b0000, dev_conf->regs);
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
905 writel(0, dev_conf->regs + CFG_REGS_ADDR);
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
906 settuner_reset(dev_conf->regs, dev_conf->cardtype, LNB_OFF, TUNER_POWER_OFF);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
907 release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
908 iounmap(dev_conf->regs);
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
909 for (i = 0; i < DMA_RING_SIZE; i++) {
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
910 kfree(dev_conf->dmactl[i]);
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
911 }
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
912 device[dev_conf->card_number] = NULL;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
913 kfree(dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
914 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
915 pci_set_drvdata(pdev, NULL);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
916 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
917 #ifdef CONFIG_PM
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
918
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
919 static int pt1_pci_suspend (struct pci_dev *pdev, pm_message_t state)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
920 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
921 return 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
922 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
923
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
924 static int pt1_pci_resume (struct pci_dev *pdev)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
925 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
926 return 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
927 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
928
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
929 #endif /* CONFIG_PM */
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
930
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
931
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
932 static struct pci_driver pt1_driver = {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
933 .name = DRV_NAME,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
934 .probe = pt1_pci_init_one,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
935 .remove = __devexit_p(pt1_pci_remove_one),
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
936 .id_table = pt1_pci_tbl,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
937 #ifdef CONFIG_PM
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
938 .suspend = pt1_pci_suspend,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
939 .resume = pt1_pci_resume,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
940 #endif /* CONFIG_PM */
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
941
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
942 };
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
943
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
944
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
945 static int __init pt1_pci_init(void)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
946 {
93
ee357d8f987f suppress silly warning
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 90
diff changeset
947 printk(KERN_INFO "%s", version);
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
948 pt1video_class = class_create(THIS_MODULE, DRIVERNAME);
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
949 if (IS_ERR(pt1video_class))
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
950 return PTR_ERR(pt1video_class);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
951 return pci_register_driver(&pt1_driver);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
952 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
953
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
954
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
955 static void __exit pt1_pci_cleanup(void)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
956 {
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
957 class_destroy(pt1video_class);
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
958 pci_unregister_driver(&pt1_driver);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
959 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
960
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
961 module_init(pt1_pci_init);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
962 module_exit(pt1_pci_cleanup);