Mercurial > pt1
annotate driver/pt1_tuner.c @ 134:550ee373afbc
imported a patch which adds new service id for epg only output
author | Yoshiki Yazawa <yaz@honeyplanet.jp> |
---|---|
date | Thu, 25 Apr 2013 15:02:26 +0900 |
parents | 2dc994610477 |
children | 1e7718cc2556 |
rev | line source |
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0 | 1 /* pt1-tuner.c: A PT1 on Tuner driver for Linux. */ |
2 | |
3 #include <linux/module.h> | |
4 #include <linux/kernel.h> | |
5 #include <linux/errno.h> | |
6 #include <linux/pci.h> | |
7 #include <linux/init.h> | |
8 #include <linux/interrupt.h> | |
9 #include <linux/mutex.h> | |
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10 #include <linux/version.h> |
0 | 11 |
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12 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0) |
0 | 13 #include <asm/system.h> |
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14 #endif |
0 | 15 #include <asm/io.h> |
16 #include <asm/irq.h> | |
17 #include <asm/uaccess.h> | |
18 | |
19 #include "pt1_com.h" | |
20 #include "pt1_pci.h" | |
21 #include "pt1_i2c.h" | |
22 #include "pt1_tuner.h" | |
23 #include "pt1_tuner_data.h" | |
24 | |
25 typedef struct _TUNER_INFO{ | |
26 int isdb_s ; | |
27 int isdb_t ; | |
28 }TUNER_INFO; | |
29 | |
30 TUNER_INFO tuner_info[2] = { | |
31 {T0_ISDB_S, T0_ISDB_T}, | |
32 {T1_ISDB_S, T1_ISDB_T} | |
33 }; | |
34 | |
35 typedef struct _isdb_t_freq_add_table{ | |
36 __u16 pos ; // Äɲ乤ë¥Á¥ã¥ó¥Í¥ë¥Ý¥¸¥·¥ç¥ó | |
37 __u16 add_freq ; // Äɲ乤ëÃÍ | |
38 }isdb_t_freq_add_table; | |
39 | |
40 isdb_t_freq_add_table isdb_t_freq_add[10] = { | |
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41 { 7, 0x8081}, // 0¡Á7Ëø |
0 | 42 { 12, 0x80A1}, // 8¡Á12Ëø |
43 { 21, 0x8062}, // 13¡Á21Ëø | |
44 { 39, 0x80A2}, // 22¡Á39Ëø | |
45 { 51, 0x80E2}, // 40¡Á51Ëø | |
46 { 59, 0x8064}, // 52¡Á59Ëø | |
47 { 75, 0x8084}, // 60¡Á75Ëø | |
48 { 84, 0x80a4}, // 76¡Á84Ëø | |
49 {100, 0x80C4}, // 85¡Á100Ëø | |
50 {112, 0x80E4} // 101¡Á112Ëø | |
51 }; | |
52 | |
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53 void settuner_reset(void __iomem *regs, int cardtype, __u32 lnb, __u32 tuner) |
0 | 54 { |
77 | 55 __u32 val = TUNER_POWER_OFF; |
0 | 56 switch(lnb){ |
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57 case LNB_11V: |
65 | 58 val = (1 << BIT_LNB_DOWN); |
59 break ; | |
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60 case LNB_15V: |
65 | 61 val = (1 << BIT_LNB_UP) | (1 << BIT_LNB_DOWN); |
62 break ; | |
0 | 63 } |
64 | |
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65 if(cardtype == PT1) { |
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66 switch(tuner){ |
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67 case TUNER_POWER_ON_RESET_ENABLE: |
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68 val |= (1 << BIT_TUNER); |
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69 break; |
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70 case TUNER_POWER_ON_RESET_DISABLE: |
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71 val |= (1 << BIT_TUNER) | (1 << BIT_RESET); |
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72 break ; |
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73 } |
0 | 74 } |
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75 else if(cardtype == PT2) { |
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76 switch(tuner){ |
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77 case TUNER_POWER_ON_RESET_ENABLE: |
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78 val |= (1 << BIT_TUNER) |
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79 | (1 << BIT_33A1) |
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80 | (1 << BIT_33A2) |
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81 | (1 << BIT_5A_) |
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82 | (1 << BIT_5A1) |
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83 | (1 << BIT_5A2); |
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84 break; |
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85 case TUNER_POWER_ON_RESET_DISABLE: |
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86 val |= (1 << BIT_TUNER) |
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87 | (1 << BIT_RESET) |
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88 | (1 << BIT_33A1) |
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89 | (1 << BIT_33A2) |
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90 | (1 << BIT_5A_) |
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91 | (1 << BIT_5A1) |
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92 | (1 << BIT_5A2); |
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93 break ; |
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94 } |
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95 } |
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96 writel(val, (regs + CFG_REGS_ADDR)); |
0 | 97 } |
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98 static int init_isdb_s(void __iomem *regs, int cardtype, struct mutex *lock, __u32 addr) |
0 | 99 { |
100 | |
101 WBLOCK wk; | |
102 int lp ; | |
103 __u32 val ; | |
104 | |
105 // ISDB-S/T½é´ü²½ | |
106 memcpy(&wk, &com_initdata, sizeof(WBLOCK)); | |
107 | |
108 // ½é´ü²½£±(¤Ê¤¼¤«READ¤Ê¤Î¤Ç) | |
109 memcpy(&wk, &isdb_s_init1, sizeof(WBLOCK)); | |
110 wk.addr = addr; | |
111 val = i2c_read(regs, lock, &wk, 1); | |
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112 |
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113 if(cardtype == PT1) { |
79 | 114 if((val & 0xff) != 0x4c) { |
115 printk(KERN_INFO "PT1:ISDB-S Read(%x)\n", val); | |
116 return -EIO ; | |
117 } | |
118 for(lp = 0 ; lp < PT1_MAX_ISDB_S_INIT ; lp++) { | |
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119 memcpy(&wk, isdb_s_initial_pt1[lp], sizeof(WBLOCK)); |
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120 wk.addr = addr; |
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121 i2c_write(regs, lock, &wk); |
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122 } |
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123 } |
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124 else if(cardtype == PT2) { |
79 | 125 if((val & 0xff) != 0x52) { |
126 printk(KERN_INFO "PT2:ISDB-S Read(%x)\n", val); | |
127 return -EIO ; | |
128 } | |
129 for(lp = 0 ; lp < PT2_MAX_ISDB_S_INIT ; lp++) { | |
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130 memcpy(&wk, isdb_s_initial_pt2[lp], sizeof(WBLOCK)); |
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131 wk.addr = addr; |
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132 i2c_write(regs, lock, &wk); |
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133 } |
0 | 134 } |
135 | |
136 return 0 ; | |
137 } | |
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138 static void init_isdb_t(void __iomem *regs, int cardtype, struct mutex *lock, __u32 addr) |
0 | 139 { |
140 int lp ; | |
141 WBLOCK wk; | |
142 | |
143 // ISDB-S/T½é´ü²½ | |
71
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144 if(cardtype == PT1) { |
77 | 145 for(lp = 0 ; lp < PT1_MAX_ISDB_T_INIT ; lp++){ |
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146 memcpy(&wk, isdb_t_initial_pt1[lp], sizeof(WBLOCK)); |
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147 wk.addr = addr; |
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148 i2c_write(regs, lock, &wk); |
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149 } |
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150 } |
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151 else if(cardtype == PT2) { |
77 | 152 for(lp = 0 ; lp < PT2_MAX_ISDB_T_INIT ; lp++){ |
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153 memcpy(&wk, isdb_t_initial_pt2[lp], sizeof(WBLOCK)); |
71
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154 wk.addr = addr; |
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155 i2c_write(regs, lock, &wk); |
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156 } |
0 | 157 } |
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158 } |
0 | 159 |
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160 int tuner_init(void __iomem *regs, int cardtype, struct mutex *lock, int tuner_no) |
0 | 161 { |
162 | |
163 int rc ; | |
164 WBLOCK wk; | |
165 | |
166 // ISDB-S/T½é´ü²½ | |
167 memcpy(&wk, &com_initdata, sizeof(WBLOCK)); | |
168 | |
169 // ½é´ü²½(¶¦ÄÌ) | |
170 wk.addr = tuner_info[tuner_no].isdb_t ; | |
171 i2c_write(regs, lock, &wk); | |
172 wk.addr = tuner_info[tuner_no].isdb_s ; | |
173 i2c_write(regs, lock, &wk); | |
174 | |
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175 rc = init_isdb_s(regs, cardtype, lock, tuner_info[tuner_no].isdb_s); |
0 | 176 if(rc < 0){ |
177 return rc ; | |
178 } | |
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179 init_isdb_t(regs, cardtype, lock, tuner_info[tuner_no].isdb_t); |
0 | 180 |
181 memcpy(&wk, &isdb_s_init21, sizeof(WBLOCK)); | |
182 wk.addr = tuner_info[tuner_no].isdb_s ; | |
183 i2c_write(regs, lock, &wk); | |
184 | |
185 memcpy(&wk, &isdb_t_init17, sizeof(WBLOCK)); | |
186 wk.addr = tuner_info[tuner_no].isdb_t ; | |
187 i2c_write(regs, lock, &wk); | |
188 | |
189 return 0 ; | |
190 } | |
191 void set_sleepmode(void __iomem *regs, struct mutex *lock, int address, int tuner_type, int type) | |
192 { | |
193 WBLOCK wk; | |
194 | |
195 if(type == TYPE_WAKEUP){ | |
196 switch(tuner_type){ | |
77 | 197 case CHANNEL_TYPE_ISDB_S: |
198 printk(KERN_INFO "PT1:ISDB-S Wakeup\n"); | |
199 memcpy(&wk, &isdb_s_wake, sizeof(WBLOCK)); | |
102
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200 wk.addr = address; |
77 | 201 i2c_write(regs, lock, &wk); |
202 | |
102
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203 memcpy(&wk, &isdb_s_wake2, sizeof(WBLOCK)); |
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204 wk.addr = address; |
77 | 205 i2c_write(regs, lock, &wk); |
206 break ; | |
207 case CHANNEL_TYPE_ISDB_T: | |
208 printk(KERN_INFO "PT1:ISDB-T Wakeup\n"); | |
209 memcpy(&wk, &isdb_t_wake, sizeof(WBLOCK)); | |
102
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210 wk.addr = address; |
77 | 211 i2c_write(regs, lock, &wk); |
212 | |
102
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213 memcpy(&wk, &isdb_t_wake2, sizeof(WBLOCK)); |
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214 wk.addr = address; |
77 | 215 i2c_write(regs, lock, &wk); |
216 break ; | |
0 | 217 } |
218 } | |
77 | 219 if(type == TYPE_SLEEP){ |
220 switch(tuner_type){ | |
0 | 221 case CHANNEL_TYPE_ISDB_S: |
222 printk(KERN_INFO "PT1:ISDB-S Sleep\n"); | |
223 memcpy(&wk, &isdb_s_sleep, sizeof(WBLOCK)); | |
77 | 224 wk.addr = address; |
225 i2c_write(regs, lock, &wk); | |
0 | 226 break ; |
227 case CHANNEL_TYPE_ISDB_T: | |
228 printk(KERN_INFO "PT1:ISDB-T Sleep\n"); | |
229 memcpy(&wk, &isdb_t_sleep, sizeof(WBLOCK)); | |
77 | 230 wk.addr = address; |
231 i2c_write(regs, lock, &wk); | |
0 | 232 break ; |
77 | 233 } |
0 | 234 } |
235 } | |
236 | |
237 int bs_frequency(void __iomem *regs, struct mutex *lock, int addr, int channel) | |
238 { | |
239 int lp ; | |
240 int tmcclock = FALSE ; | |
241 WBLOCK wk; | |
242 __u32 val ; | |
243 | |
244 if(channel >= MAX_BS_CHANNEL){ | |
245 return -EIO ; | |
246 } | |
247 // ISDB-S PLL¥í¥Ã¥¯ | |
248 for(lp = 0 ; lp < MAX_BS_CHANNEL_PLL_COMMAND ; lp++){ | |
249 memcpy(&wk, bs_pll[channel].wblock[lp], sizeof(WBLOCK)); | |
250 wk.addr = addr ; | |
251 i2c_write(regs, lock, &wk); | |
252 } | |
253 | |
254 // PLL¥í¥Ã¥¯³Îǧ | |
255 // ¥Á¥§¥Ã¥¯ÍÑ | |
256 for(lp = 0 ; lp < 200 ; lp++){ | |
257 memcpy(&wk, &bs_pll_lock, sizeof(WBLOCK)); | |
258 wk.addr = addr; | |
259 val = i2c_read(regs, lock, &wk, 1); | |
260 if(((val & 0xFF) != 0) && ((val & 0XFF) != 0XFF)){ | |
261 tmcclock = TRUE ; | |
262 break ; | |
263 } | |
264 } | |
265 | |
266 if(tmcclock == FALSE){ | |
267 printk(KERN_INFO "PLL LOCK ERROR\n"); | |
268 return -EIO; | |
269 } | |
270 | |
271 memcpy(&wk, &bs_tmcc_get_1, sizeof(WBLOCK)); | |
272 wk.addr = addr; | |
273 i2c_write(regs, lock, &wk); | |
274 | |
275 tmcclock = FALSE ; | |
276 | |
277 for(lp = 0 ; lp < 200 ; lp++){ | |
278 memcpy(&wk, &bs_tmcc_get_2, sizeof(WBLOCK)); | |
279 wk.addr = addr; | |
280 | |
281 val = i2c_read(regs, lock, &wk, 1); | |
282 if(((val & 0XFF) != 0XFF) && (!(val & 0x10))){ | |
283 tmcclock = TRUE ; | |
284 break ; | |
285 } | |
286 } | |
287 | |
288 if(tmcclock == FALSE){ | |
289 printk(KERN_INFO "TMCC LOCK ERROR\n"); | |
290 return -EIO; | |
291 } | |
292 | |
293 return 0 ; | |
294 } | |
295 int ts_lock(void __iomem *regs, struct mutex *lock, int addr, __u16 ts_id) | |
296 { | |
297 | |
298 int lp ; | |
299 WBLOCK wk; | |
300 __u32 val ; | |
301 union{ | |
302 __u8 ts[2]; | |
303 __u16 tsid; | |
304 }uts_id ; | |
305 | |
306 uts_id.tsid = ts_id ; | |
307 memcpy(&wk, &bs_set_ts_lock, sizeof(WBLOCK)); | |
308 wk.addr = addr; | |
309 // TS-IDÀßÄê | |
310 wk.value[1] = uts_id.ts[1]; | |
311 wk.value[2] = uts_id.ts[0]; | |
312 i2c_write(regs, lock, &wk); | |
313 | |
314 for(lp = 0 ; lp < 100 ; lp++){ | |
315 memcpy(&wk, &bs_get_ts_lock, sizeof(WBLOCK)); | |
316 wk.addr = addr; | |
317 val = i2c_read(regs, lock, &wk, 2); | |
318 if((val & 0xFFFF) == ts_id){ | |
319 return 0 ; | |
320 } | |
321 } | |
322 printk(KERN_INFO "PT1:ERROR TS-LOCK(%x)\n", ts_id); | |
323 return -EIO ; | |
324 } | |
325 int bs_tune(void __iomem *regs, struct mutex *lock, int addr, int channel, ISDB_S_TMCC *tmcc) | |
326 { | |
327 | |
328 int lp ; | |
329 int lp2; | |
330 WBLOCK wk; | |
331 __u32 val ; | |
332 ISDB_S_TS_ID *tsid ; | |
333 union{ | |
334 __u8 slot[4]; | |
335 __u32 u32slot; | |
336 }ts_slot ; | |
337 union{ | |
338 __u16 ts[2]; | |
339 __u32 tsid; | |
340 }ts_id ; | |
341 | |
342 if(channel >= MAX_BS_CHANNEL){ | |
343 printk(KERN_INFO "Invalid Channel(%d)\n", channel); | |
344 return -EIO ; | |
345 } | |
346 val = bs_frequency(regs, lock, addr, channel); | |
347 if(val == -EIO){ | |
348 return val ; | |
349 } | |
350 | |
351 tsid = &tmcc->ts_id[0] ; | |
352 // ³ºÅö¼þÇÈ¿ô¤ÎTS-ID¤ò¼èÆÀ | |
353 for(lp = 0 ; lp < (MAX_BS_TS_ID / 2) ; lp++){ | |
354 for(lp2 = 0 ; lp2 < 100 ; lp2++){ | |
355 memcpy(&wk, bs_get_ts_id[lp], sizeof(WBLOCK)); | |
356 wk.addr = addr; | |
357 ts_id.tsid = i2c_read(regs, lock, &wk, 4); | |
358 // TS-ID¤¬0¤Î¾ì¹ç¤ÏºÆ¼èÆÀ¤¹¤ë | |
359 if((ts_id.ts[0] != 0) && (ts_id.ts[1] != 0)){ | |
360 break ; | |
361 } | |
362 } | |
363 tsid->ts_id = ts_id.ts[1] ; | |
364 tsid += 1; | |
365 tsid->ts_id = ts_id.ts[0] ; | |
366 tsid += 1; | |
367 } | |
368 | |
369 memcpy(&wk, &bs_get_agc, sizeof(WBLOCK)); | |
370 wk.addr = addr; | |
371 tmcc->agc = i2c_read(regs, lock, &wk, 1); | |
372 | |
373 // TS-IDÊ̤ξðÊó¤ò¼èÆÀ | |
374 tsid = &tmcc->ts_id[0] ; | |
375 for(lp = 0 ; lp < MAX_BS_TS_ID ; lp++, tsid += 1){ | |
376 // TS-ID¤Ê¤·=0XFFFF | |
377 if(tsid->ts_id == 0xFFFF){ | |
378 continue ; | |
379 } | |
380 ts_lock(regs, lock, addr, tsid->ts_id); | |
381 | |
382 //¥¹¥í¥Ã¥È¼èÆÀ | |
383 memcpy(&wk, &bs_get_slot, sizeof(WBLOCK)); | |
384 wk.addr = addr; | |
385 ts_slot.u32slot = i2c_read(regs, lock, &wk, 3); | |
386 tsid->high_mode = 0; | |
387 tsid->low_slot = ts_slot.slot[0] ; | |
388 tsid->high_slot = ts_slot.slot[1] ; | |
389 tsid->low_mode = ts_slot.slot[2] ; | |
390 } | |
391 | |
392 memcpy(&wk, &bs_get_clock, sizeof(WBLOCK)); | |
393 wk.addr = addr; | |
394 tmcc->clockmargin = i2c_read(regs, lock, &wk, 1); | |
395 | |
396 memcpy(&wk, &bs_get_carrir, sizeof(WBLOCK)); | |
397 wk.addr = addr; | |
398 tmcc->carriermargin = i2c_read(regs, lock, &wk, 1); | |
399 return 0 ; | |
400 } | |
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401 int isdb_s_read_signal_strength(void __iomem *regs, struct mutex *lock, int addr) |
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402 { |
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403 WBLOCK wk; |
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404 __u32 val ; |
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405 __u32 val2; |
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406 int val3 ; |
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407 |
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408 memcpy(&wk, &bs_get_signal1, sizeof(WBLOCK)); |
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409 wk.addr = addr; |
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410 val = i2c_read(regs, lock, &wk, 1); |
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411 |
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412 memcpy(&wk, &bs_get_signal2, sizeof(WBLOCK)); |
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413 wk.addr = addr; |
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414 val2 = i2c_read(regs, lock, &wk, 1); |
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415 val3 = (((val << 8) & 0XFF00) | (val2 & 0XFF)); |
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416 |
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417 return val3 ; |
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418 } |
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419 |
0 | 420 __u32 getfrequency_add(__u32 channel) |
421 { | |
422 int lp ; | |
423 | |
424 for(lp = 0 ; lp < 10 ; lp++){ | |
425 if(channel <= isdb_t_freq_add[lp].pos){ | |
426 return isdb_t_freq_add[lp].add_freq ; | |
427 } | |
428 } | |
429 return 0 ; | |
430 } | |
431 __u32 getfrequency(__u32 channel, int addfreq) | |
432 { | |
433 __u32 frequencyoffset = 0; | |
434 __u32 frequencyOffset = 0; | |
435 | |
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436 if (12 <= channel) |
0 | 437 frequencyoffset += 2; |
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438 if (17 <= channel) |
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439 frequencyoffset -= 2; |
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440 if (63 <= channel){ |
0 | 441 frequencyoffset += 2; |
442 } | |
443 #if 0 | |
444 return (((93 + channel * 6 + frequencyOffset) + addfreq) * 7) + 400; | |
445 #endif | |
446 frequencyOffset = 93 + channel * 6 + frequencyoffset; | |
447 frequencyOffset = 7 * (frequencyOffset + addfreq); | |
448 return frequencyOffset + 400; | |
449 | |
450 } | |
451 int isdb_t_frequency(void __iomem *regs, struct mutex *lock, int addr, int channel, int addfreq) | |
452 { | |
453 | |
454 int lp ; | |
455 WBLOCK wk; | |
456 __u32 val ; | |
457 int tmcclock = FALSE ; | |
458 union{ | |
459 __u8 charfreq[2]; | |
460 __u16 freq; | |
461 }freq[2] ; | |
462 | |
463 if(channel >= MAX_ISDB_T_CHANNEL){ | |
464 return -EIO ; | |
465 } | |
466 | |
467 freq[0].freq = getfrequency(channel, addfreq); | |
468 freq[1].freq = getfrequency_add(channel); | |
469 //»ØÄê¼þÇÈ¿ô | |
470 memcpy(&wk, &isdb_t_pll_base, sizeof(WBLOCK)); | |
471 wk.addr = addr ; | |
472 // ·×»»¤·¤¿¼þÇÈ¿ô¤òÀßÄê | |
473 wk.value[wk.count] = freq[0].charfreq[1]; | |
474 wk.count += 1 ; | |
475 wk.value[wk.count] = freq[0].charfreq[0]; | |
476 wk.count += 1 ; | |
477 | |
478 // ·×»»¤·¤¿¼þÇÈ¿ôÉղþðÊó¤òÀßÄê | |
479 wk.value[wk.count] = freq[1].charfreq[1]; | |
480 wk.count += 1 ; | |
481 wk.value[wk.count] = freq[1].charfreq[0]; | |
482 wk.count += 1 ; | |
483 | |
484 i2c_write(regs, lock, &wk); | |
485 | |
486 for(lp = 0 ; lp < 100 ; lp++){ | |
487 memcpy(&wk, &isdb_t_pll_lock, sizeof(WBLOCK)); | |
488 wk.addr = addr; | |
489 val = i2c_read(regs, lock, &wk, 1); | |
490 if(((val & 0xFF) != 0XFF) && ((val & 0X50) == 0x50)){ | |
491 tmcclock = TRUE ; | |
492 break ; | |
493 } | |
494 } | |
495 if(tmcclock != TRUE){ | |
496 printk(KERN_INFO "PT1:ISDB-T LOCK NG(%08x)\n", val); | |
497 return -EIO ; | |
498 } | |
499 | |
500 memcpy(&wk, &isdb_t_check_tune, sizeof(WBLOCK)); | |
501 wk.addr = addr ; | |
502 i2c_write(regs, lock, &wk); | |
503 | |
504 tmcclock = FALSE ; | |
505 for(lp = 0 ; lp < 1000 ; lp++){ | |
506 memcpy(&wk, &isdb_t_tune_read, sizeof(WBLOCK)); | |
507 wk.addr = addr; | |
508 val = i2c_read(regs, lock, &wk, 1); | |
509 if(((val & 0xFF) != 0XFF) && ((val & 0X8) != 8)){ | |
510 tmcclock = TRUE ; | |
511 break ; | |
512 } | |
513 } | |
514 if(tmcclock != TRUE){ | |
515 return -EIO ; | |
516 } | |
517 return 0 ; | |
518 } | |
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519 int isdb_t_read_signal_strength(void __iomem *regs, struct mutex *lock, int addr) |
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520 { |
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521 __u32 val ; |
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522 __u32 val2; |
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523 __u32 val3; |
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524 WBLOCK wk; |
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525 |
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526 memcpy(&wk, &isdb_t_signal1, sizeof(WBLOCK)); |
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527 wk.addr = addr; |
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528 val = i2c_read(regs, lock, &wk, 1); |
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529 printk(KERN_INFO "CN(1)Val(%x)\n", val); |
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530 |
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531 memcpy(&wk, &isdb_t_signal2, sizeof(WBLOCK)); |
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532 wk.addr = addr; |
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533 val2 = i2c_read(regs, lock, &wk, 1); |
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534 val3 = (((val << 8) & 0XFF00) | (val2 & 0XFF)); |
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535 return val3 ; |
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536 } |
0 | 537 #if 0 |
538 int isdb_t_tune(void __iomem *regs, struct mutex *lock, int addr, int channel, ISDB_T_TMCC *tmcc) | |
539 { | |
540 | |
541 int lp ; | |
542 int rc ; | |
543 int lp2 ; | |
544 WBLOCK wk; | |
545 __u32 val ; | |
546 | |
547 printk(KERN_INFO "Channel(%d) Start\n", channel); | |
548 if(channel >= MAX_ISDB_T_CHANNEL){ | |
549 return -EIO ; | |
550 } | |
551 rc = isdb_t_frequency(regs, lock, addr, channel); | |
552 if(rc < 0){ | |
553 return -EIO ; | |
554 } | |
555 for(lp = 0 ; lp < 100 ; lp++){ | |
556 memcpy(&wk, &isdb_t_tmcc_read_1, sizeof(WBLOCK)); | |
557 wk.addr = addr; | |
558 val = i2c_read(regs, lock, &wk, 4); | |
559 if((val & 0xFF) != 0){ | |
560 break ; | |
561 } | |
562 } | |
563 printk(KERN_INFO "TMCC(1)Val(%x)\n", val); | |
564 | |
565 for(lp = 0 ; lp < 100 ; lp++){ | |
566 memcpy(&wk, &isdb_t_tmcc_read_2, sizeof(WBLOCK)); | |
567 wk.addr = addr; | |
568 val = i2c_read(regs, lock, &wk, 4); | |
569 if((val & 0xFF) != 0){ | |
570 break ; | |
571 } | |
572 } | |
573 printk(KERN_INFO "TMCC(2)Val(%x)\n", val); | |
574 | |
575 memcpy(&wk, &isdb_t_cn_1, sizeof(WBLOCK)); | |
576 wk.addr = addr; | |
577 val = i2c_read(regs, lock, &wk, 1); | |
578 printk(KERN_INFO "CN(1)Val(%x)\n", val); | |
579 | |
580 memcpy(&wk, &isdb_t_cn_2, sizeof(WBLOCK)); | |
581 wk.addr = addr; | |
582 val = i2c_read(regs, lock, &wk, 1); | |
583 printk(KERN_INFO "CN(2)Val(%x)\n", val); | |
584 | |
585 memcpy(&wk, &isdb_t_agc_1, sizeof(WBLOCK)); | |
586 wk.addr = addr; | |
587 val = i2c_read(regs, lock, &wk, 1); | |
588 printk(KERN_INFO "AGC(1)Val(%x)\n", val); | |
589 | |
590 memcpy(&wk, &isdb_t_agc_2, sizeof(WBLOCK)); | |
591 wk.addr = addr; | |
592 val = i2c_read(regs, lock, &wk, 1); | |
593 printk(KERN_INFO "AGC(2)Val(%x)\n", val); | |
594 return 0; | |
595 } | |
596 #endif |