Mercurial > pt1
annotate driver/pt1_tuner_data.c @ 88:59065b569eec
improve stability on changing channel
author | Yoshiki Yazawa <yaz@honeyplanet.jp> |
---|---|
date | Wed, 27 Jan 2010 14:36:47 +0900 |
parents | 3c2123189edf |
children | 6e661e828b43 |
rev | line source |
---|---|
0 | 1 |
2 #include <linux/module.h> | |
3 #include <linux/kernel.h> | |
4 #include <linux/errno.h> | |
5 #include <linux/pci.h> | |
6 #include <linux/init.h> | |
7 #include <linux/interrupt.h> | |
8 | |
9 #include <asm/system.h> | |
10 #include <asm/io.h> | |
11 #include <asm/irq.h> | |
12 #include <asm/uaccess.h> | |
13 | |
14 #include "pt1_com.h" | |
15 #include "pt1_pci.h" | |
16 #include "pt1_i2c.h" | |
17 #include "pt1_tuner.h" | |
18 #include "pt1_tuner_data.h" | |
19 | |
20 /***************************************************************************/ | |
21 /* 省電力テーブル */ | |
22 /***************************************************************************/ | |
23 /* | |
24 ISDB-Sの省電力設定 | |
25 C0 C1 | |
26 送信:7Bit Address Mode(1b/19):17:00 | |
27 ISDB-Sの省電力無効(2コマンド) | |
28 C0 C1 | |
29 送信:7Bit Address Mode(1B/19):fe:c0:f0:04 | |
30 送信:7Bit Address Mode(1B/19):17:01 | |
31 */ | |
32 WBLOCK isdb_s_wake = { | |
33 0, | |
34 4, | |
35 {0xFE, 0xC0, 0xF0, 0x04} | |
36 }; | |
37 WBLOCK isdb_s_sleep = { | |
38 0, | |
39 2, | |
40 {0x17, 0x00} | |
41 }; | |
42 /* | |
43 ISDB-Tの省電力設定 | |
44 C0 C1 | |
45 送信:7Bit Address Mode(1A/18):03:80 | |
46 | |
47 ISDB-Tの省電力無効(2コマンド) | |
48 C0 C1 | |
49 送信:7Bit Address Mode(1A/18):fe:c2 | |
50 送信:7Bit Address Mode(1A/18):03:90 | |
51 */ | |
52 | |
53 WBLOCK isdb_t_wake = { | |
54 0, | |
55 2, | |
56 {0xFE, 0xC2} | |
57 }; | |
58 WBLOCK isdb_t_sleep = { | |
59 0, | |
60 2, | |
61 {0x03, 0x80} | |
62 }; | |
63 | |
64 /***************************************************************************/ | |
65 /* 初期化データ定義(共通) */ | |
66 /***************************************************************************/ | |
67 WBLOCK com_initdata = { | |
68 0, | |
69 2, | |
70 {0x01, 0x80} | |
71 }; | |
72 | |
73 /***************************************************************************/ | |
74 /* 初期化データ定義(ISDB-S) */ | |
75 /***************************************************************************/ | |
76 // ISDB-S初期化値1 | |
77 WBLOCK isdb_s_init1 ={ | |
78 0, | |
79 1, | |
79 | 80 {0x0f} |
0 | 81 }; |
82 // ISDB-S初期化値2 | |
83 WBLOCK isdb_s_init2 ={ | |
84 0, | |
85 2, | |
86 {0x04, 0x02} | |
87 }; | |
88 // ISDB-S初期化値3 | |
89 WBLOCK isdb_s_init3 ={ | |
90 0, | |
91 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
92 {0x0D, 0x55} //pt1 only |
0 | 93 }; |
94 // ISDB-S初期化値4 | |
95 WBLOCK isdb_s_init4 ={ | |
96 0, | |
97 2, | |
98 {0x11, 0x40} | |
99 }; | |
100 // ISDB-S初期化値5 | |
101 WBLOCK isdb_s_init5 ={ | |
102 0, | |
103 2, | |
104 {0x13, 0x80} | |
105 }; | |
106 // ISDB-S初期化値6 | |
107 WBLOCK isdb_s_init6 ={ | |
108 0, | |
109 2, | |
110 {0x17, 0x01} | |
111 }; | |
112 // ISDB-S初期化値7 | |
113 WBLOCK isdb_s_init7 ={ | |
114 0, | |
115 2, | |
116 {0x1C, 0x0A} | |
117 }; | |
118 // ISDB-S初期化値8 | |
119 WBLOCK isdb_s_init8 ={ | |
120 0, | |
121 2, | |
122 {0x1D, 0xAA} | |
123 }; | |
124 // ISDB-S初期化値9 | |
125 WBLOCK isdb_s_init9 ={ | |
126 0, | |
127 2, | |
128 {0x1E, 0x20} | |
129 }; | |
130 // ISDB-S初期化値10 | |
131 WBLOCK isdb_s_init10 ={ | |
132 0, | |
133 2, | |
134 {0x1F, 0x88} | |
135 }; | |
136 // ISDB-S初期化値11 | |
137 WBLOCK isdb_s_init11 ={ | |
138 0, | |
139 2, | |
140 {0x51, 0xB0} | |
141 }; | |
142 // ISDB-S初期化値12 | |
143 WBLOCK isdb_s_init12 ={ | |
144 0, | |
145 2, | |
146 {0x52, 0x89} | |
147 }; | |
148 // ISDB-S初期化値13 | |
149 WBLOCK isdb_s_init13 ={ | |
150 0, | |
151 2, | |
152 {0x53, 0xB3} | |
153 }; | |
154 // ISDB-S初期化値14 | |
155 WBLOCK isdb_s_init14 ={ | |
156 0, | |
157 2, | |
158 {0x5A, 0x2D} | |
159 }; | |
160 // ISDB-S初期化値15 | |
161 WBLOCK isdb_s_init15 ={ | |
162 0, | |
163 2, | |
164 {0x5B, 0xD3} | |
165 }; | |
166 // ISDB-S初期化値16 | |
167 WBLOCK isdb_s_init16 ={ | |
168 0, | |
169 2, | |
170 {0x85, 0x69} | |
171 }; | |
172 // ISDB-S初期化値17 | |
173 WBLOCK isdb_s_init17 ={ | |
174 0, | |
175 2, | |
176 {0x87, 0x04} | |
177 }; | |
178 // ISDB-S初期化値18 | |
179 WBLOCK isdb_s_init18 ={ | |
180 0, | |
181 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
182 {0x8E, 0x26} |
0 | 183 }; |
184 // ISDB-S初期化値19 | |
185 WBLOCK isdb_s_init19 ={ | |
186 0, | |
187 2, | |
188 {0xA3, 0xF7} | |
189 }; | |
190 // ISDB-S初期化値20 | |
191 WBLOCK isdb_s_init20 ={ | |
192 0, | |
193 2, | |
194 {0xA5, 0xC0} | |
195 }; | |
196 // ISDB-S初期化値21 | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
197 WBLOCK isdb_s_init21 ={ |
0 | 198 0, |
199 4, | |
200 {0xFE, 0xC0, 0xF0, 0x04} | |
201 }; | |
202 /***************************************************************************/ | |
203 /* 初期化データ定義(ISDB-T) */ | |
204 /***************************************************************************/ | |
205 // ISDB-T初期化値1 | |
206 WBLOCK isdb_t_init1 ={ | |
207 0, | |
208 2, | |
209 {0x03, 0x90} | |
210 }; | |
211 // ISDB-T初期化値2 | |
212 WBLOCK isdb_t_init2 ={ | |
213 0, | |
214 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
215 {0x14, 0x8F} //pt1 only |
0 | 216 }; |
217 // ISDB-T初期化値3 | |
218 WBLOCK isdb_t_init3 ={ | |
219 0, | |
220 2, | |
221 {0x1C, 0x2A} | |
222 }; | |
223 // ISDB-T初期化値4 | |
224 WBLOCK isdb_t_init4 ={ | |
225 0, | |
226 2, | |
227 {0x1D, 0xA8} | |
228 }; | |
229 // ISDB-T初期化値5 | |
230 WBLOCK isdb_t_init5 ={ | |
231 0, | |
232 2, | |
233 {0x1E, 0xA2} | |
234 }; | |
235 // ISDB-T初期化値6 | |
236 WBLOCK isdb_t_init6 ={ | |
237 0, | |
238 2, | |
239 {0x22, 0x83} | |
240 }; | |
241 // ISDB-T初期化値7 | |
242 WBLOCK isdb_t_init7 ={ | |
243 0, | |
244 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
245 {0x31, 0x0D} //pt1 |
0 | 246 }; |
247 // ISDB-T初期化値8 | |
248 WBLOCK isdb_t_init8 ={ | |
249 0, | |
250 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
251 {0x32, 0xE0} //pt1 |
0 | 252 }; |
253 // ISDB-T初期化値9 | |
254 WBLOCK isdb_t_init9 ={ | |
255 0, | |
256 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
257 {0x39, 0xD3} //pt1 |
0 | 258 }; |
259 // ISDB-T初期化値10 | |
260 WBLOCK isdb_t_init10 ={ | |
261 0, | |
262 2, | |
263 {0x3A, 0x00} | |
264 }; | |
265 // ISDB-T初期化値11 | |
266 WBLOCK isdb_t_init11 ={ | |
267 0, | |
268 2, | |
269 {0x5C, 0x40} | |
270 }; | |
271 // ISDB-T初期化値12 | |
272 WBLOCK isdb_t_init12 ={ | |
273 0, | |
274 2, | |
275 {0x5F, 0x80} | |
276 }; | |
277 // ISDB-T初期化値13 | |
278 WBLOCK isdb_t_init13 ={ | |
279 0, | |
280 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
281 {0x75, 0x0a} |
0 | 282 }; |
283 // ISDB-T初期化値14 | |
284 WBLOCK isdb_t_init14 ={ | |
285 0, | |
286 2, | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
287 {0x76, 0x4c} |
0 | 288 }; |
289 // ISDB-T初期化値15 | |
290 WBLOCK isdb_t_init15 ={ | |
291 0, | |
292 2, | |
293 {0x77, 0x03} | |
294 }; | |
295 // ISDB-T初期化値16 | |
296 WBLOCK isdb_t_init16 ={ | |
297 0, | |
298 2, | |
299 {0xEF, 0x01} | |
300 }; | |
301 // ISDB-T初期化値17 | |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
302 WBLOCK isdb_t_init17 ={ |
0 | 303 0, |
304 7, | |
305 {0xFE, 0xC2, 0x01, 0x8F, 0xC1, 0x80, 0x80} | |
306 }; | |
307 /***************************************************************************/ | |
308 /* 初期化データブロック定義(ISDB-S) */ | |
309 /***************************************************************************/ | |
77 | 310 WBLOCK *isdb_s_initial_pt1[PT1_MAX_ISDB_S_INIT] = |
0 | 311 { |
312 &isdb_s_init2, &isdb_s_init3, &isdb_s_init4, &isdb_s_init5, | |
313 &isdb_s_init6, &isdb_s_init7, &isdb_s_init8, &isdb_s_init9, | |
314 &isdb_s_init10, &isdb_s_init11, &isdb_s_init12, &isdb_s_init13, | |
315 &isdb_s_init14, &isdb_s_init15, &isdb_s_init16, &isdb_s_init17, | |
316 &isdb_s_init18, &isdb_s_init19, &isdb_s_init20 | |
317 }; | |
77 | 318 WBLOCK *isdb_s_initial_pt2[PT2_MAX_ISDB_S_INIT] = |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
319 { |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
320 &isdb_s_init2, &isdb_s_init4, &isdb_s_init5, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
321 &isdb_s_init6, &isdb_s_init7, &isdb_s_init8, &isdb_s_init9, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
322 &isdb_s_init10, &isdb_s_init11, &isdb_s_init12, &isdb_s_init13, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
323 &isdb_s_init14, &isdb_s_init15, &isdb_s_init16, &isdb_s_init17, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
324 &isdb_s_init18, &isdb_s_init19, &isdb_s_init20 |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
325 }; |
0 | 326 /***************************************************************************/ |
327 /* 初期化データブロック定義(ISDB-T) */ | |
328 /***************************************************************************/ | |
77 | 329 WBLOCK *isdb_t_initial_pt1[PT1_MAX_ISDB_T_INIT] = |
0 | 330 { |
331 &isdb_t_init1, &isdb_t_init2, &isdb_t_init3, &isdb_t_init4, | |
332 &isdb_t_init5, &isdb_t_init6, &isdb_t_init7, &isdb_t_init8, | |
333 &isdb_t_init9, &isdb_t_init10, &isdb_t_init11, &isdb_t_init12, | |
334 &isdb_t_init13, &isdb_t_init14, &isdb_t_init15, &isdb_t_init16 | |
335 }; | |
77 | 336 WBLOCK *isdb_t_initial_pt2[PT2_MAX_ISDB_T_INIT] = |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
337 { |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
338 &isdb_t_init1, &isdb_t_init3, &isdb_t_init4, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
339 &isdb_t_init5, &isdb_t_init6, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
340 &isdb_t_init10, &isdb_t_init11, &isdb_t_init12, |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
341 &isdb_t_init13, &isdb_t_init14, &isdb_t_init15, &isdb_t_init16 |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
342 }; |
0 | 343 /***************************************************************************/ |
344 /* 地上デジタル用データ */ | |
345 /***************************************************************************/ | |
346 /***************************************************************************/ | |
347 /* 周波数設定基本テーブル */ | |
348 /* 0〜1: 固定 */ | |
349 /* 2〜3: 計算結果 */ | |
350 /* 4〜5: 追加計算結果 */ | |
351 /***************************************************************************/ | |
352 | |
353 WBLOCK isdb_t_pll_base = { | |
354 0, | |
355 2, | |
356 {0xFE, 0xC2, 0, 0, 0, 0, 0, 0} | |
357 }; | |
358 /***************************************************************************/ | |
359 /* 地デジ周波数ロックチェック */ | |
360 /***************************************************************************/ | |
361 WBLOCK isdb_t_pll_lock = { | |
362 0, | |
363 2, | |
364 {0xFE, 0xC3} | |
365 }; | |
366 | |
367 WBLOCK isdb_t_check_tune = { | |
368 0, | |
369 2, | |
370 {0x01, 0x40} | |
371 }; | |
372 | |
373 WBLOCK isdb_t_tune_read = { | |
374 0, | |
375 1, | |
376 {0x80} | |
377 }; | |
378 WBLOCK isdb_t_tmcc_read_1 = { | |
379 0, | |
380 1, | |
381 {0xB2} | |
382 }; | |
383 WBLOCK isdb_t_tmcc_read_2 = { | |
384 0, | |
385 1, | |
386 {0xB6} | |
387 }; | |
388 /***************************************************************************/ | |
389 /* 地デジ周波数ロックチェック */ | |
390 /***************************************************************************/ | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
391 WBLOCK isdb_t_signal1 = { |
0 | 392 0, |
393 1, | |
394 {0x8C} | |
395 }; | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
396 WBLOCK isdb_t_signal2 = { |
0 | 397 0, |
398 1, | |
399 {0x8D} | |
400 }; | |
401 WBLOCK isdb_t_agc2 = { | |
402 0, | |
403 1, | |
404 {0x82} | |
405 }; | |
406 WBLOCK isdb_t_lockedt1 = { | |
407 0, | |
408 1, | |
409 {0x96} | |
410 }; | |
411 WBLOCK isdb_t_lockedt2 = { | |
412 0, | |
413 1, | |
414 {0xB0} | |
415 }; | |
416 WBLOCK isdb_t_get_clock = { | |
417 0, | |
418 1, | |
419 {0x86} | |
420 }; | |
421 WBLOCK isdb_t_get_carrir = { | |
422 0, | |
423 1, | |
424 {0x84} | |
425 }; | |
426 | |
427 /***************************************************************************/ | |
428 /* 地デジ用データ */ | |
429 /***************************************************************************/ | |
430 | |
431 /***************************************************************************/ | |
432 /* BS用データ */ | |
433 /***************************************************************************/ | |
434 /***************************************************************************/ | |
435 /* BS周波数ロックチェック */ | |
436 /***************************************************************************/ | |
437 WBLOCK bs_pll_lock = { | |
438 0, | |
439 2, | |
440 {0xFE, 0xC1} | |
441 }; | |
442 /***************************************************************************/ | |
443 /* TMCC取得 */ | |
444 /***************************************************************************/ | |
445 WBLOCK bs_tmcc_get_1 = { | |
446 0, | |
447 2, | |
448 {0x03, 0x01} | |
449 }; | |
450 WBLOCK bs_tmcc_get_2 = { | |
451 0, | |
452 1, | |
453 {0xC3} | |
454 }; | |
455 /***************************************************************************/ | |
456 /* TMCC取得 */ | |
457 /***************************************************************************/ | |
458 WBLOCK bs_get_slot_ts_id_1 = { | |
459 0, | |
460 1, | |
461 {0xCE} | |
462 }; | |
463 WBLOCK bs_get_slot_ts_id_2 = { | |
464 0, | |
465 1, | |
466 {0xD2} | |
467 }; | |
468 WBLOCK bs_get_slot_ts_id_3 = { | |
469 0, | |
470 1, | |
471 {0xD6} | |
472 }; | |
473 WBLOCK bs_get_slot_ts_id_4 = { | |
474 0, | |
475 1, | |
476 {0xDA} | |
477 }; | |
478 /***************************************************************************/ | |
479 /* TS-IDロック */ | |
480 /***************************************************************************/ | |
481 WBLOCK bs_set_ts_lock = { | |
482 0, | |
483 3, | |
484 {0x8F, 0x00, 0x00} | |
485 }; | |
486 /***************************************************************************/ | |
487 /* TS-ID取得 */ | |
488 /***************************************************************************/ | |
489 WBLOCK bs_get_ts_lock = { | |
490 0, | |
491 1, | |
492 {0xE6} | |
493 }; | |
494 /***************************************************************************/ | |
495 /* スロット取得 */ | |
496 /***************************************************************************/ | |
497 WBLOCK bs_get_slot = { | |
498 0, | |
499 1, | |
500 {0xE8} | |
501 }; | |
502 /***************************************************************************/ | |
503 /* CN/AGC/MAXAGC取得 */ | |
504 /***************************************************************************/ | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
505 WBLOCK bs_get_signal1 = { |
0 | 506 0, |
507 1, | |
508 {0xBC} | |
509 }; | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
510 WBLOCK bs_get_signal2 = { |
0 | 511 0, |
512 1, | |
513 {0xBD} | |
514 }; | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
515 WBLOCK bs_get_agc = { |
0 | 516 0, |
517 1, | |
518 {0xBA} | |
519 }; | |
520 /***************************************************************************/ | |
521 /* クロック周波数誤差取得 */ | |
522 /***************************************************************************/ | |
523 WBLOCK bs_get_clock = { | |
524 0, | |
525 1, | |
526 {0xBE} | |
527 }; | |
528 /***************************************************************************/ | |
529 /* キャリア周波数誤差取得 */ | |
530 /***************************************************************************/ | |
531 WBLOCK bs_get_carrir = { | |
532 0, | |
533 1, | |
534 {0xBB} | |
535 }; | |
536 /***************************************************************************/ | |
537 /* 周波数設定テーブル */ | |
538 /* BSに関してのみ。とりあえずテーブルとしたが、計算で算出出来るなら */ | |
539 /* 計算で算出させる。 */ | |
540 /***************************************************************************/ | |
541 /***************************************************************************/ | |
542 /* BS共通テーブル */ | |
543 /***************************************************************************/ | |
544 WBLOCK bs_com_step2 = { | |
545 0, | |
546 3, | |
547 {0xFE, 0xC0, 0xE4} | |
548 }; | |
549 /***************************************************************************/ | |
550 /* BS-1 */ | |
551 /***************************************************************************/ | |
552 WBLOCK bs_1_step1 = { | |
553 0, | |
554 6, | |
555 {0xFE, 0xC0, 0x48, 0x29, 0xE0, 0xD2} | |
556 }; | |
557 WBLOCK bs_1_step3 = { | |
558 0, | |
559 4, | |
560 {0xFE, 0xC0, 0xF4, 0xD6} | |
561 }; | |
562 /***************************************************************************/ | |
563 /* BS-3 */ | |
564 /***************************************************************************/ | |
565 WBLOCK bs_3_step1 = { | |
566 0, | |
567 6, | |
568 {0xFE, 0xC0, 0x44, 0x40, 0xE0, 0xE2} | |
569 }; | |
570 WBLOCK bs_3_step3 = { | |
571 0, | |
572 4, | |
573 {0xFE, 0xC0, 0xF4, 0xE6} | |
574 }; | |
575 /***************************************************************************/ | |
576 /* BS-5 */ | |
577 /***************************************************************************/ | |
578 WBLOCK bs_5_step1 = { | |
579 0, | |
580 6, | |
581 {0xFE, 0xC0, 0x44, 0x66, 0xE0, 0xE2} | |
582 }; | |
583 WBLOCK bs_5_step3 = { | |
584 0, | |
585 4, | |
586 {0xFE, 0xC0, 0xF4, 0xE6} | |
587 }; | |
588 /***************************************************************************/ | |
589 /* BS-7 */ | |
590 /***************************************************************************/ | |
591 WBLOCK bs_7_step1 = { | |
592 0, | |
593 6, | |
594 {0xFE, 0xC0, 0x44, 0x8D, 0xE0, 0x20} | |
595 }; | |
596 WBLOCK bs_7_step3 = { | |
597 0, | |
598 4, | |
599 {0xFE, 0xC0, 0xF4, 0x24} | |
600 }; | |
601 /***************************************************************************/ | |
602 /* BS-9 */ | |
603 /***************************************************************************/ | |
604 WBLOCK bs_9_step1 = { | |
605 0, | |
606 6, | |
607 {0xFE, 0xC0, 0x44, 0xB3, 0xE0, 0x20} | |
608 }; | |
609 WBLOCK bs_9_step3 = { | |
610 0, | |
611 4, | |
612 {0xFE, 0xC0, 0xF4, 0x24} | |
613 }; | |
614 /***************************************************************************/ | |
615 /* BS-11 */ | |
616 /***************************************************************************/ | |
617 WBLOCK bs_11_step1 = { | |
618 0, | |
619 6, | |
620 {0xFE, 0xC0, 0x44, 0xD9, 0xE0, 0x20} | |
621 }; | |
622 WBLOCK bs_11_step3 = { | |
623 0, | |
624 4, | |
625 {0xFE, 0xC0, 0xF4, 0x24} | |
626 }; | |
627 /***************************************************************************/ | |
628 /* BS-13 */ | |
629 /***************************************************************************/ | |
630 WBLOCK bs_13_step1 = { | |
631 0, | |
632 6, | |
633 {0xFE, 0xC0, 0x45, 0x00, 0xE0, 0x20} | |
634 }; | |
635 WBLOCK bs_13_step3 = { | |
636 0, | |
637 4, | |
638 {0xFE, 0xC0, 0xF4, 0x24} | |
639 }; | |
640 /***************************************************************************/ | |
641 /* BS-15 */ | |
642 /***************************************************************************/ | |
643 WBLOCK bs_15_step1 = { | |
644 0, | |
645 6, | |
646 {0xFE, 0xC0, 0x45, 0x26, 0xE0, 0x40} | |
647 }; | |
648 WBLOCK bs_15_step3 = { | |
649 0, | |
650 4, | |
651 {0xFE, 0xC0, 0xF4, 0x44} | |
652 }; | |
653 /***************************************************************************/ | |
654 /* BS-17 */ | |
655 /***************************************************************************/ | |
656 WBLOCK bs_17_step1 = { | |
657 0, | |
658 6, | |
659 {0xFE, 0xC0, 0x45, 0x73, 0xE0, 0x40} | |
660 }; | |
661 WBLOCK bs_17_step3 = { | |
662 0, | |
663 4, | |
664 {0xFE, 0xC0, 0xF4, 0X44} | |
665 }; | |
666 /***************************************************************************/ | |
667 /* BS-19 */ | |
668 /***************************************************************************/ | |
669 WBLOCK bs_19_step1 = { | |
670 0, | |
671 6, | |
672 {0xFE, 0xC0, 0x45, 0x73, 0xE0, 0x40} | |
673 }; | |
674 WBLOCK bs_19_step3 = { | |
675 0, | |
676 4, | |
677 {0xFE, 0xC0, 0xF4, 0x44} | |
678 }; | |
679 /***************************************************************************/ | |
680 /* BS-21 */ | |
681 /***************************************************************************/ | |
682 WBLOCK bs_21_step1 = { | |
683 0, | |
684 6, | |
685 {0xFE, 0xC0, 0x45, 0x99, 0xE0, 0x40} | |
686 }; | |
687 WBLOCK bs_21_step3 = { | |
688 0, | |
689 4, | |
690 {0xFE, 0xC0, 0xF4, 0x44} | |
691 }; | |
692 /***************************************************************************/ | |
693 /* BS-23 */ | |
694 /***************************************************************************/ | |
695 WBLOCK bs_23_step1 = { | |
696 0, | |
697 6, | |
698 {0xFE, 0xC0, 0x45, 0xBF, 0xE0, 0x60} | |
699 }; | |
700 WBLOCK bs_23_step3 = { | |
701 0, | |
702 4, | |
703 {0xFE, 0xC0, 0xF4, 0x64} | |
704 }; | |
705 | |
706 /***************************************************************************/ | |
707 /* ND 2 */ | |
708 /***************************************************************************/ | |
709 WBLOCK nd_2_step1 = { | |
710 0, | |
711 6, | |
712 {0xFE, 0xC0, 0x46, 0x4D, 0xE0, 0x60} | |
713 }; | |
714 WBLOCK nd_2_step3 = { | |
715 0, | |
716 4, | |
717 {0xFE, 0xC0, 0xF4, 0x64} | |
718 }; | |
719 | |
720 /***************************************************************************/ | |
721 /* ND 4 */ | |
722 /***************************************************************************/ | |
723 WBLOCK nd_4_step1 = { | |
724 0, | |
725 6, | |
726 {0xFE, 0xC0, 0x46, 0x75, 0xE0, 0x80} | |
727 }; | |
728 WBLOCK nd_4_step3 = { | |
729 0, | |
730 4, | |
731 {0xFE, 0xC0, 0xF4, 0x84} | |
732 }; | |
733 | |
734 /***************************************************************************/ | |
735 /* ND 6 */ | |
736 /***************************************************************************/ | |
737 WBLOCK nd_6_step1 = { | |
738 0, | |
739 6, | |
740 {0xFE, 0xC0, 0x46, 0x9D, 0xE0, 0x80} | |
741 }; | |
742 WBLOCK nd_6_step3 = { | |
743 0, | |
744 4, | |
745 {0xFE, 0xC0, 0xF4, 0x84} | |
746 }; | |
747 | |
748 /***************************************************************************/ | |
749 /* ND 8 */ | |
750 /***************************************************************************/ | |
751 WBLOCK nd_8_step1 = { | |
752 0, | |
753 6, | |
754 {0xFE, 0xC0, 0x46, 0xC5, 0xE0, 0x80} | |
755 }; | |
756 WBLOCK nd_8_step3 = { | |
757 0, | |
758 4, | |
759 {0xFE, 0xC0, 0xF4, 0x84} | |
760 }; | |
761 | |
762 /***************************************************************************/ | |
763 /* ND 10 */ | |
764 /***************************************************************************/ | |
765 WBLOCK nd_10_step1 = { | |
766 0, | |
767 6, | |
768 {0xFE, 0xC0, 0x46, 0xED, 0xE0, 0x80} | |
769 }; | |
770 WBLOCK nd_10_step3 = { | |
771 0, | |
772 4, | |
773 {0xFE, 0xC0, 0xF4, 0x84} | |
774 }; | |
775 | |
776 /***************************************************************************/ | |
777 /* ND 12 */ | |
778 /***************************************************************************/ | |
779 WBLOCK nd_12_step1 = { | |
780 0, | |
781 6, | |
782 {0xFE, 0xC0, 0x47, 0x15, 0xE0, 0xA0} | |
783 }; | |
784 WBLOCK nd_12_step3 = { | |
785 0, | |
786 4, | |
787 {0xFE, 0xC0, 0xF4, 0xA4} | |
788 }; | |
789 | |
790 /***************************************************************************/ | |
791 /* ND 14 */ | |
792 /***************************************************************************/ | |
793 WBLOCK nd_14_step1 = { | |
794 0, | |
795 6, | |
796 {0xFE, 0xC0, 0x47, 0x3D, 0xE0, 0xA0} | |
797 }; | |
798 WBLOCK nd_14_step3 = { | |
799 0, | |
800 4, | |
801 {0xFE, 0xC0, 0xF4, 0xA4} | |
802 }; | |
803 | |
804 /***************************************************************************/ | |
805 /* ND 16 */ | |
806 /***************************************************************************/ | |
807 WBLOCK nd_16_step1 = { | |
808 0, | |
809 6, | |
810 {0xFE, 0xC0, 0x47, 0x65, 0xE0, 0xA0} | |
811 }; | |
812 WBLOCK nd_16_step3 = { | |
813 0, | |
814 4, | |
815 {0xFE, 0xC0, 0xF4, 0xA4} | |
816 }; | |
817 | |
818 /***************************************************************************/ | |
819 /* ND 18 */ | |
820 /***************************************************************************/ | |
821 WBLOCK nd_18_step1 = { | |
822 0, | |
823 6, | |
824 {0xFE, 0xC0, 0x47, 0x8D, 0xE0, 0xA0} | |
825 }; | |
826 WBLOCK nd_18_step3 = { | |
827 0, | |
828 4, | |
829 {0xFE, 0xC0, 0xF4, 0xA4} | |
830 }; | |
831 | |
832 /***************************************************************************/ | |
833 /* ND 20 */ | |
834 /***************************************************************************/ | |
835 WBLOCK nd_20_step1 = { | |
836 0, | |
837 6, | |
838 {0xFE, 0xC0, 0x47, 0xB5, 0xE0, 0xC0} | |
839 }; | |
840 WBLOCK nd_20_step3 = { | |
841 0, | |
842 4, | |
843 {0xFE, 0xC0, 0xF4, 0xC4} | |
844 }; | |
845 | |
846 /***************************************************************************/ | |
847 /* ND 22 */ | |
848 /***************************************************************************/ | |
849 WBLOCK nd_22_step1 = { | |
850 0, | |
851 6, | |
852 {0xFE, 0xC0, 0x47, 0xDD, 0xE0, 0xC0} | |
853 }; | |
854 WBLOCK nd_22_step3 = { | |
855 0, | |
856 4, | |
857 {0xFE, 0xC0, 0xF4, 0xC4} | |
858 }; | |
859 | |
860 /***************************************************************************/ | |
861 /* ND 24 */ | |
862 /***************************************************************************/ | |
863 WBLOCK nd_24_step1 = { | |
864 0, | |
865 6, | |
866 {0xFE, 0xC0, 0x48, 0x05, 0xE0, 0xC0} | |
867 }; | |
868 WBLOCK nd_24_step3 = { | |
869 0, | |
870 4, | |
871 {0xFE, 0xC0, 0xF4, 0xC4} | |
872 }; | |
873 | |
874 /***************************************************************************/ | |
875 /* ND 1 */ | |
876 /***************************************************************************/ | |
877 WBLOCK nd_1_step1 = { | |
878 0, | |
879 6, | |
880 {0xFE, 0xC0, 0x46, 0x39, 0xE0, 0x60} | |
881 }; | |
882 WBLOCK nd_1_step3 = { | |
883 0, | |
884 4, | |
885 {0xFE, 0xC0, 0xF4, 0x64} | |
886 }; | |
887 | |
888 /***************************************************************************/ | |
889 /* ND 3 */ | |
890 /***************************************************************************/ | |
891 WBLOCK nd_3_step1 = { | |
892 0, | |
893 6, | |
894 {0xFE, 0xC0, 0x46, 0x61, 0xE0, 0x80} | |
895 }; | |
896 WBLOCK nd_3_step3 = { | |
897 0, | |
898 4, | |
899 {0xFE, 0xC0, 0xF4, 0x84} | |
900 }; | |
901 | |
902 /***************************************************************************/ | |
903 /* ND 5 */ | |
904 /***************************************************************************/ | |
905 WBLOCK nd_5_step1 = { | |
906 0, | |
907 6, | |
908 {0xFE, 0xC0, 0x46, 0x89, 0xE0, 0x80} | |
909 }; | |
910 WBLOCK nd_5_step3 = { | |
911 0, | |
912 4, | |
913 {0xFE, 0xC0, 0xF4, 0x84} | |
914 }; | |
915 | |
916 /***************************************************************************/ | |
917 /* ND 7 */ | |
918 /***************************************************************************/ | |
919 WBLOCK nd_7_step1 = { | |
920 0, | |
921 6, | |
922 {0xFE, 0xC0, 0x46, 0xB1, 0xE0, 0x80} | |
923 }; | |
924 WBLOCK nd_7_step3 = { | |
925 0, | |
926 4, | |
927 {0xFE, 0xC0, 0xF4, 0x84} | |
928 }; | |
929 | |
930 /***************************************************************************/ | |
931 /* ND 9 */ | |
932 /***************************************************************************/ | |
933 WBLOCK nd_9_step1 = { | |
934 0, | |
935 6, | |
936 {0xFE, 0xC0, 0x46, 0xD9, 0xE0, 0x80} | |
937 }; | |
938 WBLOCK nd_9_step3 = { | |
939 0, | |
940 4, | |
941 {0xFE, 0xC0, 0xF4, 0x84} | |
942 }; | |
943 | |
944 /***************************************************************************/ | |
945 /* ND 11 */ | |
946 /***************************************************************************/ | |
947 WBLOCK nd_11_step1 = { | |
948 0, | |
949 6, | |
950 {0xFE, 0xC0, 0x47, 0x01, 0xE0, 0xA0} | |
951 }; | |
952 WBLOCK nd_11_step3 = { | |
953 0, | |
954 4, | |
955 {0xFE, 0xC0, 0xF4, 0xA4} | |
956 }; | |
957 | |
958 /***************************************************************************/ | |
959 /* ND 13 */ | |
960 /***************************************************************************/ | |
961 WBLOCK nd_13_step1 = { | |
962 0, | |
963 6, | |
964 {0xFE, 0xC0, 0x47, 0x29, 0xE0, 0xA0} | |
965 }; | |
966 WBLOCK nd_13_step3 = { | |
967 0, | |
968 4, | |
969 {0xFE, 0xC0, 0xF4, 0xA4} | |
970 }; | |
971 | |
972 /***************************************************************************/ | |
973 /* ND 15 */ | |
974 /***************************************************************************/ | |
975 WBLOCK nd_15_step1 = { | |
976 0, | |
977 6, | |
978 {0xFE, 0xC0, 0x47, 0x51, 0xE0, 0xA0} | |
979 }; | |
980 WBLOCK nd_15_step3 = { | |
981 0, | |
982 4, | |
983 {0xFE, 0xC0, 0xF4, 0xA4} | |
984 }; | |
985 | |
986 /***************************************************************************/ | |
987 /* ND 17 */ | |
988 /***************************************************************************/ | |
989 WBLOCK nd_17_step1 = { | |
990 0, | |
991 6, | |
992 {0xFE, 0xC0, 0x47, 0x79, 0xE0, 0xA0} | |
993 }; | |
994 WBLOCK nd_17_step3 = { | |
995 0, | |
996 4, | |
997 {0xFE, 0xC0, 0xF4, 0xA4} | |
998 }; | |
999 | |
1000 /***************************************************************************/ | |
1001 /* ND 19 */ | |
1002 /***************************************************************************/ | |
1003 WBLOCK nd_19_step1 = { | |
1004 0, | |
1005 6, | |
1006 {0xFE, 0xC0, 0x47, 0xA1, 0xE0, 0xA0} | |
1007 }; | |
1008 WBLOCK nd_19_step3 = { | |
1009 0, | |
1010 4, | |
1011 {0xFE, 0xC0, 0xF4, 0xA4} | |
1012 }; | |
1013 | |
1014 /***************************************************************************/ | |
1015 /* ND 21 */ | |
1016 /***************************************************************************/ | |
1017 WBLOCK nd_21_step1 = { | |
1018 0, | |
1019 6, | |
1020 {0xFE, 0xC0, 0x47, 0xC9, 0xE0, 0xC0} | |
1021 }; | |
1022 WBLOCK nd_21_step3 = { | |
1023 0, | |
1024 4, | |
1025 {0xFE, 0xC0, 0xF4, 0xC4} | |
1026 }; | |
1027 | |
1028 /***************************************************************************/ | |
1029 /* ND 23 */ | |
1030 /***************************************************************************/ | |
1031 WBLOCK nd_23_step1 = { | |
1032 0, | |
1033 6, | |
1034 {0xFE, 0xC0, 0x47, 0xF1, 0xE0, 0xC0} | |
1035 }; | |
1036 WBLOCK nd_23_step3 = { | |
1037 0, | |
1038 4, | |
1039 {0xFE, 0xC0, 0xF4, 0xC4} | |
1040 }; | |
1041 | |
1042 /***************************************************************************/ | |
1043 /* BS-周波数テーブル */ | |
1044 /***************************************************************************/ | |
1045 WBLOCK_BS_PLL bs_pll[MAX_BS_CHANNEL] = { | |
36 | 1046 {{&bs_1_step1, &bs_com_step2, &bs_1_step3}}, |
1047 {{&bs_3_step1, &bs_com_step2, &bs_3_step3}}, | |
1048 {{&bs_5_step1, &bs_com_step2, &bs_5_step3}}, | |
1049 {{&bs_7_step1, &bs_com_step2, &bs_7_step3}}, | |
1050 {{&bs_9_step1, &bs_com_step2, &bs_9_step3}}, | |
1051 {{&bs_11_step1, &bs_com_step2, &bs_11_step3}}, | |
1052 {{&bs_13_step1, &bs_com_step2, &bs_13_step3}}, | |
1053 {{&bs_15_step1, &bs_com_step2, &bs_15_step3}}, | |
1054 {{&bs_17_step1, &bs_com_step2, &bs_17_step3}}, | |
1055 {{&bs_19_step1, &bs_com_step2, &bs_19_step3}}, | |
1056 {{&bs_21_step1, &bs_com_step2, &bs_21_step3}}, | |
1057 {{&bs_23_step1, &bs_com_step2, &bs_21_step3}}, | |
1058 {{&nd_2_step1, &bs_com_step2, &nd_2_step3}}, | |
1059 {{&nd_4_step1, &bs_com_step2, &nd_4_step3}}, | |
1060 {{&nd_6_step1, &bs_com_step2, &nd_6_step3}}, | |
1061 {{&nd_8_step1, &bs_com_step2, &nd_8_step3}}, | |
1062 {{&nd_10_step1, &bs_com_step2, &nd_10_step3}}, | |
1063 {{&nd_12_step1, &bs_com_step2, &nd_12_step3}}, | |
1064 {{&nd_14_step1, &bs_com_step2, &nd_14_step3}}, | |
1065 {{&nd_16_step1, &bs_com_step2, &nd_16_step3}}, | |
1066 {{&nd_18_step1, &bs_com_step2, &nd_18_step3}}, | |
1067 {{&nd_20_step1, &bs_com_step2, &nd_20_step3}}, | |
1068 {{&nd_22_step1, &bs_com_step2, &nd_22_step3}}, | |
1069 {{&nd_24_step1, &bs_com_step2, &nd_24_step3}}, | |
1070 {{&nd_1_step1, &bs_com_step2, &nd_1_step3}}, | |
1071 {{&nd_3_step1, &bs_com_step2, &nd_3_step3}}, | |
1072 {{&nd_5_step1, &bs_com_step2, &nd_5_step3}}, | |
1073 {{&nd_7_step1, &bs_com_step2, &nd_7_step3}}, | |
1074 {{&nd_9_step1, &bs_com_step2, &nd_9_step3}}, | |
1075 {{&nd_11_step1, &bs_com_step2, &nd_11_step3}}, | |
1076 {{&nd_13_step1, &bs_com_step2, &nd_13_step3}}, | |
1077 {{&nd_15_step1, &bs_com_step2, &nd_15_step3}}, | |
1078 {{&nd_17_step1, &bs_com_step2, &nd_17_step3}}, | |
1079 {{&nd_19_step1, &bs_com_step2, &nd_19_step3}}, | |
1080 {{&nd_21_step1, &bs_com_step2, &nd_21_step3}}, | |
1081 {{&nd_23_step1, &bs_com_step2, &nd_23_step3}} | |
0 | 1082 }; |
1083 WBLOCK *bs_get_ts_id[(MAX_BS_TS_ID / 2)] = { | |
1084 &bs_get_slot_ts_id_1, | |
1085 &bs_get_slot_ts_id_2, | |
1086 &bs_get_slot_ts_id_3, | |
1087 &bs_get_slot_ts_id_4 | |
1088 }; |