Mercurial > pt1
annotate driver/pt1_pci.c @ 20:669f7080a8dc
reworked Makefile so that shared object would be built
author | Yoshiki Yazawa <yaz@honeyplanet.jp> |
---|---|
date | Wed, 25 Feb 2009 22:54:07 +0900 |
parents | 07b2fc07ff48 |
children | eb694d8e4c7e |
rev | line source |
---|---|
0 | 1 /* pt1-pci.c: A PT1 on PCI bus driver for Linux. */ |
2 #define DRV_NAME "pt1-pci" | |
3 #define DRV_VERSION "1.00" | |
4 #define DRV_RELDATE "11/28/2008" | |
5 | |
6 | |
7 #include <linux/module.h> | |
8 #include <linux/kernel.h> | |
9 #include <linux/errno.h> | |
10 #include <linux/pci.h> | |
11 #include <linux/init.h> | |
12 #include <linux/interrupt.h> | |
13 | |
14 #include <asm/system.h> | |
15 #include <asm/io.h> | |
16 #include <asm/irq.h> | |
17 #include <asm/uaccess.h> | |
18 #include <linux/version.h> | |
19 #include <linux/mutex.h> | |
20 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23) | |
21 #include <linux/freezer.h> | |
22 #else | |
23 #define set_freezable() | |
24 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) | |
25 typedef struct pm_message { | |
26 int event; | |
27 } pm_message_t; | |
28 #endif | |
29 #endif | |
30 #include <linux/kthread.h> | |
31 #include <linux/dma-mapping.h> | |
32 | |
33 #include <linux/fs.h> | |
34 #include <linux/cdev.h> | |
35 | |
36 #include <linux/ioctl.h> | |
37 | |
38 #include "pt1_com.h" | |
39 #include "pt1_pci.h" | |
40 #include "pt1_tuner.h" | |
41 #include "pt1_i2c.h" | |
42 #include "pt1_tuner_data.h" | |
43 #include "pt1_ioctl.h" | |
44 | |
45 /* These identify the driver base version and may not be removed. */ | |
46 static char version[] __devinitdata = | |
47 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " \n"; | |
48 | |
49 MODULE_AUTHOR("Tomoaki Ishikawa tomy@users.sourceforge.jp"); | |
50 #define DRIVER_DESC "PCI earthsoft PT1 driver" | |
51 MODULE_DESCRIPTION(DRIVER_DESC); | |
52 MODULE_LICENSE("GPL"); | |
53 | |
54 static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */ | |
55 static int lnb = 0; /* LNB OFF:0 +11V:1 +15V:2 */ | |
56 | |
57 module_param(debug, int, 0); | |
58 module_param(lnb, int, 0); | |
59 MODULE_PARM_DESC(debug, "debug level (1-2)"); | |
60 MODULE_PARM_DESC(debug, "LNB level (0:OFF 1:+11V 2:+15V)"); | |
61 | |
62 static struct pci_device_id pt1_pci_tbl[] = { | |
63 { 0x10ee, 0x211a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, | |
64 { 0, } | |
65 }; | |
66 MODULE_DEVICE_TABLE(pci, pt1_pci_tbl); | |
67 #define DEV_NAME "pt1video" | |
68 | |
69 #define MAX_READ_BLOCK 4 // 1度に読み出す最大DMAバッファ数 | |
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parents:
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70 #define MAX_PCI_DEVICE 128 // 最大64枚 |
0 | 71 #define DMA_SIZE 4096 // DMAバッファサイズ |
72 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22) | |
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73 #define DMA_RING_SIZE 128 // RINGサイズ |
0 | 74 #define DMA_RING_MAX 511 // 1RINGにいくつ詰めるか(1023はNGで511まで) |
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75 #define CHANEL_DMA_SIZE (2*1024*1024) // 地デジ用(16Mbps) |
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76 #define BS_CHANEL_DMA_SIZE (4*1024*1024) // BS用(32Mbps) |
0 | 77 #else |
78 #define DMA_RING_SIZE 28 // RINGサイズ | |
79 #define DMA_RING_MAX 511 // 1RINGにいくつ詰めるか(1023はNGで511まで) | |
80 #define CHANEL_DMA_SIZE (1*128*1024) // 地デジ用(16Mbps) | |
81 #define BS_CHANEL_DMA_SIZE (1*128*1024) // BS用(32Mbps) | |
82 #endif | |
83 | |
84 typedef struct _DMA_CONTROL{ | |
85 dma_addr_t ring_dma[DMA_RING_MAX] ; // DMA情報 | |
86 __u32 *data[DMA_RING_MAX]; | |
87 }DMA_CONTROL; | |
88 | |
89 typedef struct _PT1_CHANNEL PT1_CHANNEL; | |
90 | |
91 typedef struct _pt1_device{ | |
92 unsigned long mmio_start ; | |
93 __u32 mmio_len ; | |
94 void __iomem *regs; | |
95 struct mutex lock ; | |
96 dma_addr_t ring_dma[DMA_RING_SIZE] ; // DMA情報 | |
97 void *dmaptr[DMA_RING_SIZE] ; | |
98 struct task_struct *kthread; | |
99 dev_t dev ; | |
100 __u32 base_minor ; | |
101 struct cdev cdev[MAX_CHANNEL]; | |
102 wait_queue_head_t dma_wait_q ;// for poll on reading | |
103 DMA_CONTROL dmactl[DMA_RING_SIZE]; | |
104 PT1_CHANNEL *channel[MAX_CHANNEL]; | |
105 }PT1_DEVICE; | |
106 | |
107 typedef struct _MICRO_PACKET{ | |
108 char data[3]; | |
109 char head ; | |
110 }MICRO_PACKET; | |
111 | |
112 struct _PT1_CHANNEL{ | |
113 __u32 valid ; // 使用中フラグ | |
114 __u32 address ; // I2Cアドレス | |
115 __u32 channel ; // チャネル番号 | |
116 int type ; // チャネルタイプ | |
117 __u32 drop ; // パケットドロップ数 | |
118 struct mutex lock ; // CH別mutex_lock用 | |
119 __u32 size ; // DMAされたサイズ | |
120 __u32 maxsize ; // DMA用バッファサイズ | |
121 __u32 bufsize ; // チャネルに割り振られたサイズ | |
122 __u32 overflow ; // オーバーフローエラー発生 | |
123 __u32 counetererr ; // 転送カウンタ1エラー | |
124 __u32 transerr ; // 転送エラー | |
125 __u32 minor ; // マイナー番号 | |
126 __u8 *buf; // CH別受信メモリ | |
127 __u8 req_dma ; // 溢れたチャネル | |
128 PT1_DEVICE *ptr ; // カード別情報 | |
129 wait_queue_head_t wait_q ; // for poll on reading | |
130 }; | |
131 | |
132 // I2Cアドレス(video0, 1 = ISDB-S) (video2, 3 = ISDB-T) | |
133 int i2c_address[MAX_CHANNEL] = {T0_ISDB_S, T1_ISDB_S, T0_ISDB_T, T1_ISDB_T}; | |
134 int real_chanel[MAX_CHANNEL] = {0, 2, 1, 3}; | |
135 int channeltype[MAX_CHANNEL] = {CHANNEL_TYPE_ISDB_S, CHANNEL_TYPE_ISDB_S, | |
136 CHANNEL_TYPE_ISDB_T, CHANNEL_TYPE_ISDB_T}; | |
137 | |
138 static PT1_DEVICE *device[MAX_PCI_DEVICE]; | |
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parents:
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139 static struct class *pt1video_class; |
0 | 140 |
141 #define PT1MAJOR 251 | |
142 #define DRIVERNAME "pt1video" | |
143 | |
144 static void reset_dma(PT1_DEVICE *dev_conf) | |
145 { | |
146 | |
147 int lp ; | |
148 __u32 addr ; | |
149 int ring_pos = 0; | |
150 int data_pos = 0 ; | |
151 __u32 *dataptr ; | |
152 | |
153 // データ初期化 | |
154 for(ring_pos = 0 ; ring_pos < DMA_RING_SIZE ; ring_pos++){ | |
155 for(data_pos = 0 ; data_pos < DMA_RING_MAX ; data_pos++){ | |
156 dataptr = dev_conf->dmactl[ring_pos].data[data_pos]; | |
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parents:
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diff
changeset
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157 dataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0; |
0 | 158 } |
159 } | |
160 // 転送カウンタをリセット | |
161 writel(0x00000010, dev_conf->regs); | |
162 // 転送カウンタをインクリメント | |
163 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
164 writel(0x00000020, dev_conf->regs); | |
165 } | |
166 | |
167 addr = (int)dev_conf->ring_dma[0] ; | |
168 addr >>= 12 ; | |
169 // DMAバッファ設定 | |
170 writel(addr, dev_conf->regs + DMA_ADDR); | |
171 // DMA開始 | |
172 writel(0x0c000040, dev_conf->regs); | |
173 | |
174 } | |
175 static int pt1_thread(void *data) | |
176 { | |
177 PT1_DEVICE *dev_conf = data ; | |
178 PT1_CHANNEL *channel ; | |
179 int ring_pos = 0; | |
180 int data_pos = 0 ; | |
181 int lp ; | |
182 int chno ; | |
183 int lp2 ; | |
184 __u32 addr ; | |
185 __u32 *dataptr ; | |
186 __u32 *curdataptr ; | |
187 __u32 val ; | |
188 union mpacket{ | |
189 __u32 val ; | |
190 MICRO_PACKET packet ; | |
191 }micro; | |
192 | |
193 set_freezable(); | |
194 reset_dma(dev_conf); | |
195 printk(KERN_INFO "pt1_thread run\n"); | |
196 | |
197 for(;;){ | |
198 if(kthread_should_stop()){ | |
199 break ; | |
200 } | |
201 | |
202 for(;;){ | |
203 dataptr = dev_conf->dmactl[ring_pos].data[data_pos]; | |
204 // データあり? | |
205 if(dataptr[(DMA_SIZE / sizeof(__u32)) - 2] == 0){ | |
206 break ; | |
207 } | |
208 micro.val = *dataptr ; | |
209 curdataptr = dataptr ; | |
210 data_pos += 1 ; | |
211 for(lp = 0 ; lp < (DMA_SIZE / sizeof(__u32)) ; lp++, dataptr++){ | |
212 micro.val = *dataptr ; | |
213 chno = real_chanel[(((micro.packet.head >> 5) & 0x07) - 1)]; | |
214 channel = dev_conf->channel[chno] ; | |
215 // エラーチェック | |
216 if((micro.packet.head & MICROPACKET_ERROR)){ | |
217 val = readl(dev_conf->regs); | |
218 if((val & BIT_RAM_OVERFLOW)){ | |
219 channel->overflow += 1 ; | |
220 } | |
221 if((val & BIT_INITIATOR_ERROR)){ | |
222 channel->counetererr += 1 ; | |
223 } | |
224 if((val & BIT_INITIATOR_WARNING)){ | |
225 channel->transerr += 1 ; | |
226 } | |
227 // 初期化して先頭から | |
228 reset_dma(dev_conf); | |
229 ring_pos = data_pos = 0 ; | |
230 break ; | |
231 } | |
232 // 未使用チャネルは捨てる | |
233 if(channel->valid == FALSE){ | |
234 continue ; | |
235 } | |
236 mutex_lock(&channel->lock); | |
237 // あふれたら読み出すまで待つ | |
238 while(1){ | |
239 if(channel->size >= (channel->maxsize - 4)){ | |
240 // 該当チャンネルのDMA読みだし待ちにする | |
241 wake_up(&channel->wait_q); | |
242 channel->req_dma = TRUE ; | |
243 mutex_unlock(&channel->lock); | |
244 // タスクに時間を渡す為中断 | |
245 wait_event_timeout(dev_conf->dma_wait_q, (channel->req_dma == FALSE), | |
246 msecs_to_jiffies(500)); | |
247 mutex_lock(&channel->lock); | |
248 channel->drop += 1 ; | |
249 }else{ | |
250 break ; | |
251 } | |
252 } | |
253 // データコピー | |
254 for(lp2 = 2 ; lp2 >= 0 ; lp2--){ | |
255 channel->buf[channel->size] = micro.packet.data[lp2]; | |
256 channel->size += 1 ; | |
257 } | |
258 mutex_unlock(&channel->lock); | |
259 } | |
260 curdataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0; | |
261 | |
262 if(data_pos >= DMA_RING_MAX){ | |
263 data_pos = 0; | |
264 ring_pos += 1 ; | |
265 // DMAリングが変わった場合はインクリメント | |
266 writel(0x00000020, dev_conf->regs); | |
267 if(ring_pos >= DMA_RING_SIZE){ | |
268 ring_pos = 0 ; | |
269 } | |
270 } | |
271 | |
272 // 頻度を落す(4Kで起動させる) | |
273 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
274 channel = dev_conf->channel[real_chanel[lp]] ; | |
275 if((channel->size >= DMA_SIZE) && (channel->valid == TRUE)){ | |
276 wake_up(&channel->wait_q); | |
277 } | |
278 } | |
279 } | |
280 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
281 } | |
282 return 0 ; | |
283 } | |
284 static int pt1_open(struct inode *inode, struct file *file) | |
285 { | |
286 | |
287 int minor = iminor(inode); | |
288 int lp ; | |
289 int lp2 ; | |
290 PT1_CHANNEL *channel ; | |
291 | |
292 for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){ | |
293 if(device[lp] == NULL){ | |
294 return -EIO ; | |
295 } | |
296 if((device[lp]->base_minor <= minor) && | |
297 ((device[lp]->base_minor + MAX_CHANNEL) > minor)){ | |
298 mutex_lock(&device[lp]->lock); | |
299 for(lp2 = 0 ; lp2 < MAX_CHANNEL ; lp2++){ | |
300 channel = device[lp]->channel[lp2] ; | |
301 if(channel->minor == minor){ | |
302 if(channel->valid == TRUE){ | |
303 mutex_unlock(&device[lp]->lock); | |
304 return -EIO ; | |
305 } | |
306 channel->drop = 0 ; | |
307 channel->valid = TRUE ; | |
308 channel->overflow = 0 ; | |
309 channel->counetererr = 0 ; | |
310 channel->transerr = 0 ; | |
311 file->private_data = channel; | |
312 mutex_lock(&channel->lock); | |
313 // データ初期化 | |
314 channel->size = 0 ; | |
315 mutex_unlock(&channel->lock); | |
316 mutex_unlock(&device[lp]->lock); | |
317 return 0 ; | |
318 } | |
319 } | |
320 } | |
321 } | |
322 return -EIO; | |
323 } | |
324 static int pt1_release(struct inode *inode, struct file *file) | |
325 { | |
326 int minor = iminor(inode); | |
327 PT1_CHANNEL *channel = file->private_data; | |
328 | |
329 mutex_lock(&channel->ptr->lock); | |
330 SetStream(channel->ptr->regs, channel->channel, FALSE); | |
331 channel->valid = FALSE ; | |
332 printk(KERN_INFO "(%d)Drop=%08d:%08d:%08d:%08d\n", iminor(inode), channel->drop, | |
333 channel->overflow, channel->counetererr, channel->transerr); | |
334 channel->overflow = 0 ; | |
335 channel->counetererr = 0 ; | |
336 channel->transerr = 0 ; | |
337 channel->drop = 0 ; | |
338 // 停止している場合は起こす | |
339 if(channel->req_dma == TRUE){ | |
340 channel->req_dma = FALSE ; | |
341 wake_up(&channel->ptr->dma_wait_q); | |
342 } | |
343 mutex_unlock(&channel->ptr->lock); | |
344 return 0; | |
345 } | |
346 | |
347 static ssize_t pt1_read(struct file *file, char __user *buf, size_t cnt, loff_t * ppos) | |
348 { | |
349 PT1_CHANNEL *channel = file->private_data; | |
350 __u32 size ; | |
351 | |
352 | |
353 // 4K単位で起こされるのを待つ(CPU負荷対策) | |
354 if(channel->size < DMA_SIZE){ | |
355 wait_event_timeout(channel->wait_q, (channel->size >= DMA_SIZE), | |
356 msecs_to_jiffies(500)); | |
357 } | |
358 mutex_lock(&channel->lock); | |
359 if(!channel->size){ | |
360 size = 0 ; | |
361 }else{ | |
362 if(cnt < channel->size){ | |
363 // バッファが足りない場合は残りを移動する | |
364 size = cnt ; | |
365 copy_to_user(buf, channel->buf, cnt); | |
366 memmove(channel->buf, &channel->buf[cnt], (channel->size - cnt)); | |
367 channel->size -= cnt ; | |
368 }else{ | |
369 size = channel->size ; | |
370 copy_to_user(buf, channel->buf, size); | |
371 channel->size = 0 ; | |
372 } | |
373 } | |
374 // 読み終わったかつ使用しているのがが4K以下 | |
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parents:
0
diff
changeset
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375 if(channel->req_dma == TRUE){ |
0 | 376 channel->req_dma = FALSE ; |
377 wake_up(&channel->ptr->dma_wait_q); | |
378 } | |
379 mutex_unlock(&channel->lock); | |
380 return size ; | |
381 } | |
382 static int SetFreq(PT1_CHANNEL *channel, FREQUENCY *freq) | |
383 { | |
384 | |
385 switch(channel->type){ | |
386 case CHANNEL_TYPE_ISDB_S: | |
387 { | |
388 ISDB_S_TMCC tmcc ; | |
389 if(bs_tune(channel->ptr->regs, | |
390 &channel->ptr->lock, | |
391 channel->address, | |
392 freq->frequencyno, | |
393 &tmcc) < 0){ | |
394 return -EIO ; | |
395 } | |
396 | |
397 #if 0 | |
398 printk(KERN_INFO "clockmargin = (%x)\n", (tmcc.clockmargin & 0xFF)); | |
399 printk(KERN_INFO "carriermargin = (%x)\n", (tmcc.carriermargin & 0xFF)); | |
400 | |
401 for(lp = 0 ; lp < MAX_BS_TS_ID ; lp++){ | |
402 if(tmcc.ts_id[lp].ts_id == 0xFFFF){ | |
403 continue ; | |
404 } | |
405 printk(KERN_INFO "Slot(%d:%x)\n", lp, tmcc.ts_id[lp].ts_id); | |
406 printk(KERN_INFO "mode (low/high) = (%x:%x)\n", | |
407 tmcc.ts_id[lp].low_mode, tmcc.ts_id[lp].high_mode); | |
408 printk(KERN_INFO "slot (low/high) = (%x:%x)\n", | |
409 tmcc.ts_id[lp].low_slot, | |
410 tmcc.ts_id[lp].high_slot); | |
411 } | |
412 #endif | |
413 ts_lock(channel->ptr->regs, | |
414 &channel->ptr->lock, | |
415 channel->address, | |
416 tmcc.ts_id[freq->slot].ts_id); | |
417 } | |
418 break ; | |
419 case CHANNEL_TYPE_ISDB_T: | |
420 { | |
421 if(isdb_t_frequency(channel->ptr->regs, | |
422 &channel->ptr->lock, | |
423 channel->address, | |
424 freq->frequencyno, freq->slot) < 0){ | |
425 return -EINVAL ; | |
426 } | |
427 } | |
428 } | |
429 return 0 ; | |
430 } | |
431 static int pt1_ioctl(struct inode *inode, struct file *file, unsigned int cmd, void *arg) | |
432 { | |
433 PT1_CHANNEL *channel = file->private_data; | |
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parents:
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diff
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434 int signal ; |
0 | 435 |
436 switch(cmd){ | |
437 case SET_CHANNEL: | |
438 { | |
439 FREQUENCY freq ; | |
440 copy_from_user(&freq, arg, sizeof(FREQUENCY)); | |
441 return SetFreq(channel, &freq); | |
442 } | |
443 case START_REC: | |
444 SetStream(channel->ptr->regs, channel->channel, TRUE); | |
445 return 0 ; | |
446 case STOP_REC: | |
447 SetStream(channel->ptr->regs, channel->channel, FALSE); | |
448 return 0 ; | |
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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diff
changeset
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449 case GET_SIGNAL_STRENGTH: |
07b2fc07ff48
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parents:
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diff
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450 switch(channel->type){ |
07b2fc07ff48
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parents:
0
diff
changeset
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451 case CHANNEL_TYPE_ISDB_S: |
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parents:
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452 { |
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parents:
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453 signal = isdb_s_read_signal_strength(channel->ptr->regs, |
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parents:
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changeset
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454 &channel->ptr->lock, |
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parents:
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455 channel->address); |
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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456 } |
07b2fc07ff48
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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457 break ; |
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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458 case CHANNEL_TYPE_ISDB_T: |
07b2fc07ff48
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parents:
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459 // calc C/N |
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parents:
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460 signal = isdb_t_read_signal_strength(channel->ptr->regs, |
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parents:
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diff
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461 &channel->ptr->lock, channel->address); |
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462 break ; |
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parents:
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463 } |
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parents:
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464 copy_to_user(arg, &signal, sizeof(int)); |
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parents:
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465 return 0 ; |
07b2fc07ff48
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466 case LNB_ENABLE: |
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467 if(lnb){ |
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468 settuner_reset(channel->ptr->regs, lnb, TUNER_POWER_ON_RESET_DISABLE); |
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469 } |
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470 return 0 ; |
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471 case LNB_DISABLE: |
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472 if(lnb){ |
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473 settuner_reset(channel->ptr->regs, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE); |
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474 } |
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475 return 0 ; |
0 | 476 } |
477 return -EINVAL; | |
478 } | |
479 | |
480 /* | |
481 */ | |
482 static const struct file_operations pt1_fops = { | |
483 .owner = THIS_MODULE, | |
484 .open = pt1_open, | |
485 .release = pt1_release, | |
486 .read = pt1_read, | |
487 .ioctl = pt1_ioctl, | |
488 .llseek = no_llseek, | |
489 }; | |
490 | |
491 int pt1_makering(struct pci_dev *pdev, PT1_DEVICE *dev_conf) | |
492 { | |
493 int lp ; | |
494 int lp2 ; | |
495 DMA_CONTROL *dmactl; | |
496 __u32 *dmaptr ; | |
497 __u32 addr ; | |
498 __u32 *ptr ; | |
499 | |
500 //DMAリング作成 | |
501 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
502 ptr = dev_conf->dmaptr[lp]; | |
503 if(lp == (DMA_RING_SIZE - 1)){ | |
504 addr = (__u32)dev_conf->ring_dma[0]; | |
505 }else{ | |
506 addr = (__u32)dev_conf->ring_dma[(lp + 1)]; | |
507 } | |
508 addr >>= 12 ; | |
509 memcpy(ptr, &addr, sizeof(__u32)); | |
510 ptr += 1 ; | |
511 | |
512 dmactl = &dev_conf->dmactl[lp]; | |
513 for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){ | |
514 dmaptr = pci_alloc_consistent(pdev, DMA_SIZE, &dmactl->ring_dma[lp2]); | |
515 if(dmaptr == NULL){ | |
516 printk(KERN_INFO "PT1:DMA ALLOC ERROR\n"); | |
517 return -1 ; | |
518 } | |
519 dmactl->data[lp2] = dmaptr ; | |
520 // DMAデータエリア初期化 | |
521 dmaptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0 ; | |
522 addr = (__u32)dmactl->ring_dma[lp2]; | |
523 addr >>= 12 ; | |
524 memcpy(ptr, &addr, sizeof(__u32)); | |
525 ptr += 1 ; | |
526 } | |
527 } | |
528 return 0 ; | |
529 } | |
530 int pt1_dma_init(struct pci_dev *pdev, PT1_DEVICE *dev_conf) | |
531 { | |
532 int lp ; | |
533 void *ptr ; | |
534 | |
535 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
536 ptr = pci_alloc_consistent(pdev, DMA_SIZE, &dev_conf->ring_dma[lp]); | |
537 if(ptr == NULL){ | |
538 printk(KERN_INFO "PT1:DMA ALLOC ERROR\n"); | |
539 return -1 ; | |
540 } | |
541 dev_conf->dmaptr[lp] = ptr ; | |
542 } | |
543 | |
544 return pt1_makering(pdev, dev_conf); | |
545 } | |
546 int pt1_dma_free(struct pci_dev *pdev, PT1_DEVICE *dev_conf) | |
547 { | |
548 | |
549 int lp ; | |
550 int lp2 ; | |
551 | |
552 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){ | |
553 if(dev_conf->dmaptr[lp] != NULL){ | |
554 pci_free_consistent(pdev, DMA_SIZE, | |
555 dev_conf->dmaptr[lp], dev_conf->ring_dma[lp]); | |
556 for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){ | |
557 if(dev_conf->dmactl[lp].data[lp2] != NULL){ | |
558 pci_free_consistent(pdev, DMA_SIZE, | |
559 dev_conf->dmactl[lp].data[lp2], | |
560 dev_conf->dmactl[lp].ring_dma[lp2]); | |
561 } | |
562 } | |
563 } | |
564 } | |
565 return 0 ; | |
566 } | |
567 static int __devinit pt1_pci_init_one (struct pci_dev *pdev, | |
568 const struct pci_device_id *ent) | |
569 { | |
570 int rc ; | |
571 int lp ; | |
572 int minor ; | |
573 u16 cmd ; | |
574 PT1_DEVICE *dev_conf ; | |
575 PT1_CHANNEL *channel ; | |
576 | |
577 rc = pci_enable_device(pdev); | |
578 if (rc) | |
579 return rc; | |
580 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
581 if (rc) { | |
582 printk(KERN_ERR "PT1:DMA MASK ERROR"); | |
583 return rc; | |
584 } | |
585 | |
586 pci_read_config_word(pdev, PCI_COMMAND, &cmd); | |
587 if (!(cmd & PCI_COMMAND_MASTER)) { | |
588 printk(KERN_INFO "Attempting to enable Bus Mastering\n"); | |
589 pci_set_master(pdev); | |
590 pci_read_config_word(pdev, PCI_COMMAND, &cmd); | |
591 if (!(cmd & PCI_COMMAND_MASTER)) { | |
592 printk(KERN_ERR "Bus Mastering is not enabled\n"); | |
593 return -EIO; | |
594 } | |
595 } | |
596 printk(KERN_INFO "Bus Mastering Enabled.\n"); | |
597 | |
598 dev_conf = kzalloc(sizeof(PT1_DEVICE), GFP_KERNEL); | |
599 if(!dev_conf){ | |
600 printk(KERN_ERR "PT1:out of memory !"); | |
601 return -ENOMEM ; | |
602 } | |
603 // PCIアドレスをマップする | |
604 dev_conf->mmio_start = pci_resource_start(pdev, 0); | |
605 dev_conf->mmio_len = pci_resource_len(pdev, 0); | |
606 rc = request_mem_region(dev_conf->mmio_start, dev_conf->mmio_len, DEV_NAME); | |
607 if (!rc) { | |
608 printk(KERN_ERR "PT1: cannot request iomem (0x%llx).\n", (unsigned long long) dev_conf->mmio_start); | |
609 goto out_err_regbase; | |
610 } | |
611 | |
612 dev_conf->regs = ioremap(dev_conf->mmio_start, dev_conf->mmio_len); | |
613 if (!dev_conf->regs){ | |
614 printk(KERN_ERR "pt1: Can't remap register area.\n"); | |
615 goto out_err_regbase; | |
616 } | |
617 // 初期化処理 | |
618 if(xc3s_init(dev_conf->regs)){ | |
619 printk(KERN_ERR "Error xc3s_init\n"); | |
620 goto out_err_fpga; | |
621 } | |
622 // チューナリセット | |
623 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_ON_RESET_ENABLE); | |
624 schedule_timeout_interruptible(msecs_to_jiffies(50)); | |
625 | |
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626 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE); |
0 | 627 schedule_timeout_interruptible(msecs_to_jiffies(10)); |
628 mutex_init(&dev_conf->lock); | |
629 | |
630 // Tuner 初期化処理 | |
631 for(lp = 0 ; lp < MAX_TUNER ; lp++){ | |
632 rc = tuner_init(dev_conf->regs, &dev_conf->lock, lp); | |
633 if(rc < 0){ | |
634 printk(KERN_ERR "Error tuner_init\n"); | |
635 goto out_err_fpga; | |
636 } | |
637 } | |
638 // 初期化完了 | |
639 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
640 set_sleepmode(dev_conf->regs, &dev_conf->lock, | |
641 i2c_address[lp], channeltype[lp], TYPE_SLEEP); | |
642 | |
643 schedule_timeout_interruptible(msecs_to_jiffies(50)); | |
644 } | |
645 rc = alloc_chrdev_region(&dev_conf->dev, 0, MAX_CHANNEL, DEV_NAME); | |
646 if(rc < 0){ | |
647 goto out_err_fpga; | |
648 } | |
649 | |
650 // 初期化 | |
651 init_waitqueue_head(&dev_conf->dma_wait_q); | |
652 | |
653 minor = MINOR(dev_conf->dev) ; | |
654 dev_conf->base_minor = minor ; | |
655 for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){ | |
656 if(device[lp] == NULL){ | |
657 device[lp] = dev_conf ; | |
658 break ; | |
659 } | |
660 } | |
661 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
662 cdev_init(&dev_conf->cdev[lp], &pt1_fops); | |
663 cdev_add(&dev_conf->cdev[lp], MKDEV(MAJOR(dev_conf->dev), (MINOR(dev_conf->dev) + lp)), 1); | |
664 channel = kzalloc(sizeof(PT1_CHANNEL), GFP_KERNEL); | |
665 if(!channel){ | |
666 printk(KERN_ERR "PT1:out of memory !"); | |
667 return -ENOMEM ; | |
668 } | |
669 | |
670 // 共通情報 | |
671 mutex_init(&channel->lock); | |
672 // 待ち状態を解除 | |
673 channel->req_dma = FALSE ; | |
674 // マイナー番号設定 | |
675 channel->minor = MINOR(dev_conf->dev) + lp ; | |
676 // 対象のI2Cデバイス | |
677 channel->address = i2c_address[lp] ; | |
678 channel->type = channeltype[lp] ; | |
679 // 実際のチューナ番号 | |
680 channel->channel = real_chanel[lp] ; | |
681 channel->ptr = dev_conf ; | |
682 channel->size = 0 ; | |
683 dev_conf->channel[lp] = channel ; | |
684 | |
685 init_waitqueue_head(&channel->wait_q); | |
686 | |
687 switch(channel->type){ | |
688 case CHANNEL_TYPE_ISDB_T: | |
689 channel->maxsize = CHANEL_DMA_SIZE ; | |
690 channel->buf = kzalloc(CHANEL_DMA_SIZE, GFP_KERNEL); | |
691 break ; | |
692 case CHANNEL_TYPE_ISDB_S: | |
693 channel->maxsize = BS_CHANEL_DMA_SIZE ; | |
694 channel->buf = kzalloc(BS_CHANEL_DMA_SIZE, GFP_KERNEL); | |
695 break ; | |
696 } | |
697 if(channel->buf == NULL){ | |
698 goto out_err_v4l; | |
699 } | |
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700 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27) |
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701 device_create(pt1video_class, NULL, MKDEV(MAJOR(dev_conf->dev), |
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702 (MINOR(dev_conf->dev) + lp)), NULL, |
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703 "pt1video%u", MINOR(dev_conf->dev) + lp); |
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704 #else |
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705 device_create(pt1video_class, NULL, MKDEV(MAJOR(dev_conf->dev), |
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706 (MINOR(dev_conf->dev) + lp)), |
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707 "pt1video%u", MINOR(dev_conf->dev) + lp); |
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708 #endif |
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709 |
0 | 710 #if 0 |
711 dev_conf->vdev[lp] = video_device_alloc(); | |
712 memcpy(dev_conf->vdev[lp], &pt1_template, sizeof(pt1_template)); | |
713 video_set_drvdata(dev_conf->vdev[lp], channel); | |
714 video_register_device(dev_conf->vdev[lp], VFL_TYPE_GRABBER, -1); | |
715 #endif | |
716 } | |
717 if(pt1_dma_init(pdev, dev_conf) < 0){ | |
718 goto out_err_dma; | |
719 } | |
720 dev_conf->kthread = kthread_run(pt1_thread, dev_conf, "pt1"); | |
721 pci_set_drvdata(pdev, dev_conf); | |
722 return 0; | |
723 | |
724 out_err_dma: | |
725 pt1_dma_free(pdev, dev_conf); | |
726 out_err_v4l: | |
727 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
728 if(dev_conf->channel[lp] != NULL){ | |
729 if(dev_conf->channel[lp]->buf != NULL){ | |
730 kfree(dev_conf->channel[lp]->buf); | |
731 } | |
732 kfree(dev_conf->channel[lp]); | |
733 } | |
734 } | |
735 out_err_fpga: | |
736 writel(0xb0b0000, dev_conf->regs); | |
737 writel(0, dev_conf->regs + 4); | |
738 iounmap(dev_conf->regs); | |
739 release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len); | |
740 kfree(dev_conf); | |
741 out_err_regbase: | |
742 return -EIO; | |
743 | |
744 } | |
745 | |
746 static void __devexit pt1_pci_remove_one(struct pci_dev *pdev) | |
747 { | |
748 | |
749 int lp ; | |
750 __u32 val ; | |
751 PT1_DEVICE *dev_conf = (PT1_DEVICE *)pci_get_drvdata(pdev); | |
752 | |
753 if(dev_conf){ | |
754 if(dev_conf->kthread) { | |
755 kthread_stop(dev_conf->kthread); | |
756 dev_conf->kthread = NULL; | |
757 } | |
758 | |
759 // DMA終了 | |
760 writel(0x08080000, dev_conf->regs); | |
761 for(lp = 0 ; lp < 10 ; lp++){ | |
762 val = readl(dev_conf->regs); | |
763 if(!(val & (1 << 6))){ | |
764 break ; | |
765 } | |
766 schedule_timeout_interruptible(msecs_to_jiffies(1)); | |
767 } | |
768 pt1_dma_free(pdev, dev_conf); | |
769 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){ | |
770 if(dev_conf->channel[lp] != NULL){ | |
771 cdev_del(&dev_conf->cdev[lp]); | |
772 kfree(dev_conf->channel[lp]->buf); | |
773 kfree(dev_conf->channel[lp]); | |
774 } | |
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775 device_destroy(pt1video_class, |
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776 MKDEV(MAJOR(dev_conf->dev), (MINOR(dev_conf->dev) + lp))); |
0 | 777 } |
778 unregister_chrdev_region(dev_conf->dev, MAX_CHANNEL); | |
779 writel(0xb0b0000, dev_conf->regs); | |
780 writel(0, dev_conf->regs + 4); | |
781 settuner_reset(dev_conf->regs, LNB_OFF, TUNER_POWER_OFF); | |
782 release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len); | |
783 iounmap(dev_conf->regs); | |
784 kfree(dev_conf); | |
785 } | |
786 pci_set_drvdata(pdev, NULL); | |
787 } | |
788 #ifdef CONFIG_PM | |
789 | |
790 static int pt1_pci_suspend (struct pci_dev *pdev, pm_message_t state) | |
791 { | |
792 return 0; | |
793 } | |
794 | |
795 static int pt1_pci_resume (struct pci_dev *pdev) | |
796 { | |
797 return 0; | |
798 } | |
799 | |
800 #endif /* CONFIG_PM */ | |
801 | |
802 | |
803 static struct pci_driver pt1_driver = { | |
804 .name = DRV_NAME, | |
805 .probe = pt1_pci_init_one, | |
806 .remove = __devexit_p(pt1_pci_remove_one), | |
807 .id_table = pt1_pci_tbl, | |
808 #ifdef CONFIG_PM | |
809 .suspend = pt1_pci_suspend, | |
810 .resume = pt1_pci_resume, | |
811 #endif /* CONFIG_PM */ | |
812 | |
813 }; | |
814 | |
815 | |
816 static int __init pt1_pci_init(void) | |
817 { | |
9
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818 pt1video_class = class_create(THIS_MODULE, DRIVERNAME); |
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819 if (IS_ERR(pt1video_class)) |
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820 return PTR_ERR(pt1video_class); |
0 | 821 return pci_register_driver(&pt1_driver); |
822 } | |
823 | |
824 | |
825 static void __exit pt1_pci_cleanup(void) | |
826 { | |
9
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827 class_destroy(pt1video_class); |
0 | 828 pci_unregister_driver (&pt1_driver); |
829 } | |
830 | |
831 module_init(pt1_pci_init); | |
832 module_exit(pt1_pci_cleanup); |