Mercurial > pt1
annotate driver/pt1_tuner.c @ 70:babd84ff70ff
added a LF
author | Yoshiki Yazawa <yaz@honeyplanet.jp> |
---|---|
date | Wed, 28 Oct 2009 21:04:53 +0900 |
parents | 272a8fba970b |
children | 28f25ec7f962 |
rev | line source |
---|---|
0 | 1 /* pt1-tuner.c: A PT1 on Tuner driver for Linux. */ |
2 | |
3 #include <linux/module.h> | |
4 #include <linux/kernel.h> | |
5 #include <linux/errno.h> | |
6 #include <linux/pci.h> | |
7 #include <linux/init.h> | |
8 #include <linux/interrupt.h> | |
9 #include <linux/mutex.h> | |
10 | |
11 #include <asm/system.h> | |
12 #include <asm/io.h> | |
13 #include <asm/irq.h> | |
14 #include <asm/uaccess.h> | |
15 | |
16 #include "pt1_com.h" | |
17 #include "pt1_pci.h" | |
18 #include "pt1_i2c.h" | |
19 #include "pt1_tuner.h" | |
20 #include "pt1_tuner_data.h" | |
21 | |
22 typedef struct _TUNER_INFO{ | |
23 int isdb_s ; | |
24 int isdb_t ; | |
25 }TUNER_INFO; | |
26 | |
27 TUNER_INFO tuner_info[2] = { | |
28 {T0_ISDB_S, T0_ISDB_T}, | |
29 {T1_ISDB_S, T1_ISDB_T} | |
30 }; | |
31 | |
32 typedef struct _isdb_t_freq_add_table{ | |
33 __u16 pos ; // Äɲ乤ë¥Á¥ã¥ó¥Í¥ë¥Ý¥¸¥·¥ç¥ó | |
34 __u16 add_freq ; // Äɲ乤ëÃÍ | |
35 }isdb_t_freq_add_table; | |
36 | |
37 isdb_t_freq_add_table isdb_t_freq_add[10] = { | |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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38 { 7, 0x8081}, // 0¡Á7Ëø |
0 | 39 { 12, 0x80A1}, // 8¡Á12Ëø |
40 { 21, 0x8062}, // 13¡Á21Ëø | |
41 { 39, 0x80A2}, // 22¡Á39Ëø | |
42 { 51, 0x80E2}, // 40¡Á51Ëø | |
43 { 59, 0x8064}, // 52¡Á59Ëø | |
44 { 75, 0x8084}, // 60¡Á75Ëø | |
45 { 84, 0x80a4}, // 76¡Á84Ëø | |
46 {100, 0x80C4}, // 85¡Á100Ëø | |
47 {112, 0x80E4} // 101¡Á112Ëø | |
48 }; | |
49 | |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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50 void settuner_reset(void __iomem *regs, int cardtype, __u32 lnb, __u32 tuner) |
0 | 51 { |
52 __u32 val = 0; | |
53 switch(lnb){ | |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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54 case LNB_11V: |
65 | 55 val = (1 << BIT_LNB_DOWN); |
56 break ; | |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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57 case LNB_15V: |
65 | 58 val = (1 << BIT_LNB_UP) | (1 << BIT_LNB_DOWN); |
59 break ; | |
0 | 60 } |
61 | |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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62 if(cardtype == PT1) { |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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63 switch(tuner){ |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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64 case TUNER_POWER_ON_RESET_ENABLE: |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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65 val |= (1 << BIT_TUNER); |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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66 break; |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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67 case TUNER_POWER_ON_RESET_DISABLE: |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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68 val |= (1 << BIT_TUNER) | (1 << BIT_RESET); |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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69 break ; |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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70 } |
0 | 71 } |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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72 else if(cardtype == PT2) { |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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73 switch(tuner){ |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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74 case TUNER_POWER_ON_RESET_ENABLE: |
69
272a8fba970b
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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75 val |= (1 << BIT_TUNER) |
272a8fba970b
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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76 | (1 << BIT_33A1) |
272a8fba970b
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parents:
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77 | (1 << BIT_33A2) |
272a8fba970b
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parents:
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78 | (1 << BIT_5A_) |
272a8fba970b
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79 | (1 << BIT_5A1) |
272a8fba970b
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80 | (1 << BIT_5A2); |
64
98a92ce5382e
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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81 break; |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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82 case TUNER_POWER_ON_RESET_DISABLE: |
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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83 val |= (1 << BIT_TUNER) |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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84 | (1 << BIT_RESET) |
272a8fba970b
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
65
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85 | (1 << BIT_33A1) |
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
65
diff
changeset
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86 | (1 << BIT_33A2) |
272a8fba970b
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
65
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87 | (1 << BIT_5A_) |
272a8fba970b
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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88 | (1 << BIT_5A1) |
272a8fba970b
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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89 | (1 << BIT_5A2); |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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90 break ; |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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91 } |
98a92ce5382e
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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92 } |
98a92ce5382e
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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93 writel(val, (regs + CFG_REGS_ADDR)); |
0 | 94 } |
69
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parents:
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95 static int init_isdb_s(void __iomem *regs, int cardtype, struct mutex *lock, __u32 addr) |
0 | 96 { |
97 | |
98 WBLOCK wk; | |
99 int lp ; | |
100 __u32 val ; | |
101 | |
102 // ISDB-S/T½é´ü²½ | |
103 memcpy(&wk, &com_initdata, sizeof(WBLOCK)); | |
104 | |
105 // ½é´ü²½£±(¤Ê¤¼¤«READ¤Ê¤Î¤Ç) | |
106 memcpy(&wk, &isdb_s_init1, sizeof(WBLOCK)); | |
107 wk.addr = addr; | |
108 val = i2c_read(regs, lock, &wk, 1); | |
109 if((val & 0xff) != 0x41){ | |
110 printk(KERN_INFO "PT1:ISDB-S Read(%x)\n", val); | |
111 return -EIO ; | |
112 } | |
113 for(lp = 0 ; lp < MAX_ISDB_S_INIT ; lp++){ | |
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parents:
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114 if(cardtype == PT1) |
272a8fba970b
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115 memcpy(&wk, isdb_s_initial_pt1[lp], sizeof(WBLOCK)); |
272a8fba970b
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parents:
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116 if(cardtype == PT2) |
272a8fba970b
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117 memcpy(&wk, isdb_s_initial_pt2[lp], sizeof(WBLOCK)); |
0 | 118 wk.addr = addr; |
119 i2c_write(regs, lock, &wk); | |
120 } | |
121 | |
122 return 0 ; | |
123 } | |
69
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parents:
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124 static void init_isdb_t(void __iomem *regs, int cardtype, struct mutex *lock, __u32 addr) |
0 | 125 { |
126 int lp ; | |
127 WBLOCK wk; | |
128 | |
129 // ISDB-S/T½é´ü²½ | |
130 for(lp = 0 ; lp < MAX_ISDB_T_INIT ; lp++){ | |
69
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parents:
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131 if(cardtype == PT1) |
272a8fba970b
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parents:
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132 memcpy(&wk, isdb_t_initial_pt1[lp], sizeof(WBLOCK)); |
272a8fba970b
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parents:
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133 if(cardtype == PT2) |
272a8fba970b
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parents:
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134 memcpy(&wk, isdb_t_initial_pt2[lp], sizeof(WBLOCK)); |
0 | 135 wk.addr = addr; |
136 i2c_write(regs, lock, &wk); | |
137 } | |
138 | |
139 | |
140 } | |
69
272a8fba970b
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parents:
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141 int tuner_init(void __iomem *regs, int cardtype, struct mutex *lock, int tuner_no) |
0 | 142 { |
143 | |
144 int rc ; | |
145 WBLOCK wk; | |
146 | |
147 // ISDB-S/T½é´ü²½ | |
148 memcpy(&wk, &com_initdata, sizeof(WBLOCK)); | |
149 | |
150 // ½é´ü²½(¶¦ÄÌ) | |
151 wk.addr = tuner_info[tuner_no].isdb_t ; | |
152 i2c_write(regs, lock, &wk); | |
153 wk.addr = tuner_info[tuner_no].isdb_s ; | |
154 i2c_write(regs, lock, &wk); | |
155 | |
69
272a8fba970b
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parents:
65
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156 rc = init_isdb_s(regs, cardtype, lock, tuner_info[tuner_no].isdb_s); |
0 | 157 if(rc < 0){ |
158 return rc ; | |
159 } | |
69
272a8fba970b
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parents:
65
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160 init_isdb_t(regs, cardtype, lock, tuner_info[tuner_no].isdb_t); |
0 | 161 |
162 memcpy(&wk, &isdb_s_init21, sizeof(WBLOCK)); | |
163 wk.addr = tuner_info[tuner_no].isdb_s ; | |
164 i2c_write(regs, lock, &wk); | |
165 | |
166 memcpy(&wk, &isdb_t_init17, sizeof(WBLOCK)); | |
167 wk.addr = tuner_info[tuner_no].isdb_t ; | |
168 i2c_write(regs, lock, &wk); | |
169 | |
170 return 0 ; | |
171 } | |
172 void set_sleepmode(void __iomem *regs, struct mutex *lock, int address, int tuner_type, int type) | |
173 { | |
174 WBLOCK wk; | |
175 | |
176 if(type == TYPE_WAKEUP){ | |
177 switch(tuner_type){ | |
64
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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178 case CHANNEL_TYPE_ISDB_S: |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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changeset
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179 memcpy(&wk, &isdb_s_wake, sizeof(WBLOCK)); |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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180 break ; |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
diff
changeset
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181 case CHANNEL_TYPE_ISDB_T: |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
diff
changeset
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182 memcpy(&wk, &isdb_t_wake, sizeof(WBLOCK)); |
98a92ce5382e
added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
9
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changeset
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183 break ; |
0 | 184 } |
185 wk.addr = address ; | |
186 i2c_write(regs, lock, &wk); | |
187 } | |
188 switch(tuner_type){ | |
189 case CHANNEL_TYPE_ISDB_S: | |
190 printk(KERN_INFO "PT1:ISDB-S Sleep\n"); | |
191 memcpy(&wk, &isdb_s_sleep, sizeof(WBLOCK)); | |
192 if(type == TYPE_WAKEUP){ | |
193 wk.value[1] = 0x01 ; | |
194 } | |
195 break ; | |
196 case CHANNEL_TYPE_ISDB_T: | |
197 printk(KERN_INFO "PT1:ISDB-T Sleep\n"); | |
198 memcpy(&wk, &isdb_t_sleep, sizeof(WBLOCK)); | |
199 if(type == TYPE_WAKEUP){ | |
200 wk.value[1] = 0x90 ; | |
201 } | |
202 break ; | |
203 } | |
204 wk.addr = address; | |
205 i2c_write(regs, lock, &wk); | |
206 } | |
207 | |
208 int bs_frequency(void __iomem *regs, struct mutex *lock, int addr, int channel) | |
209 { | |
210 int lp ; | |
211 int tmcclock = FALSE ; | |
212 WBLOCK wk; | |
213 __u32 val ; | |
214 | |
215 if(channel >= MAX_BS_CHANNEL){ | |
216 return -EIO ; | |
217 } | |
218 // ISDB-S PLL¥í¥Ã¥¯ | |
219 for(lp = 0 ; lp < MAX_BS_CHANNEL_PLL_COMMAND ; lp++){ | |
220 memcpy(&wk, bs_pll[channel].wblock[lp], sizeof(WBLOCK)); | |
221 wk.addr = addr ; | |
222 i2c_write(regs, lock, &wk); | |
223 } | |
224 | |
225 // PLL¥í¥Ã¥¯³Îǧ | |
226 // ¥Á¥§¥Ã¥¯ÍÑ | |
227 for(lp = 0 ; lp < 200 ; lp++){ | |
228 memcpy(&wk, &bs_pll_lock, sizeof(WBLOCK)); | |
229 wk.addr = addr; | |
230 val = i2c_read(regs, lock, &wk, 1); | |
231 if(((val & 0xFF) != 0) && ((val & 0XFF) != 0XFF)){ | |
232 tmcclock = TRUE ; | |
233 break ; | |
234 } | |
235 } | |
236 | |
237 if(tmcclock == FALSE){ | |
238 printk(KERN_INFO "PLL LOCK ERROR\n"); | |
239 return -EIO; | |
240 } | |
241 | |
242 memcpy(&wk, &bs_tmcc_get_1, sizeof(WBLOCK)); | |
243 wk.addr = addr; | |
244 i2c_write(regs, lock, &wk); | |
245 | |
246 tmcclock = FALSE ; | |
247 | |
248 for(lp = 0 ; lp < 200 ; lp++){ | |
249 memcpy(&wk, &bs_tmcc_get_2, sizeof(WBLOCK)); | |
250 wk.addr = addr; | |
251 | |
252 val = i2c_read(regs, lock, &wk, 1); | |
253 if(((val & 0XFF) != 0XFF) && (!(val & 0x10))){ | |
254 tmcclock = TRUE ; | |
255 break ; | |
256 } | |
257 } | |
258 | |
259 if(tmcclock == FALSE){ | |
260 printk(KERN_INFO "TMCC LOCK ERROR\n"); | |
261 return -EIO; | |
262 } | |
263 | |
264 return 0 ; | |
265 } | |
266 int ts_lock(void __iomem *regs, struct mutex *lock, int addr, __u16 ts_id) | |
267 { | |
268 | |
269 int lp ; | |
270 WBLOCK wk; | |
271 __u32 val ; | |
272 union{ | |
273 __u8 ts[2]; | |
274 __u16 tsid; | |
275 }uts_id ; | |
276 | |
277 uts_id.tsid = ts_id ; | |
278 memcpy(&wk, &bs_set_ts_lock, sizeof(WBLOCK)); | |
279 wk.addr = addr; | |
280 // TS-IDÀßÄê | |
281 wk.value[1] = uts_id.ts[1]; | |
282 wk.value[2] = uts_id.ts[0]; | |
283 i2c_write(regs, lock, &wk); | |
284 | |
285 for(lp = 0 ; lp < 100 ; lp++){ | |
286 memcpy(&wk, &bs_get_ts_lock, sizeof(WBLOCK)); | |
287 wk.addr = addr; | |
288 val = i2c_read(regs, lock, &wk, 2); | |
289 if((val & 0xFFFF) == ts_id){ | |
290 return 0 ; | |
291 } | |
292 } | |
293 printk(KERN_INFO "PT1:ERROR TS-LOCK(%x)\n", ts_id); | |
294 return -EIO ; | |
295 } | |
296 int bs_tune(void __iomem *regs, struct mutex *lock, int addr, int channel, ISDB_S_TMCC *tmcc) | |
297 { | |
298 | |
299 int lp ; | |
300 int lp2; | |
301 WBLOCK wk; | |
302 __u32 val ; | |
303 ISDB_S_TS_ID *tsid ; | |
304 union{ | |
305 __u8 slot[4]; | |
306 __u32 u32slot; | |
307 }ts_slot ; | |
308 union{ | |
309 __u16 ts[2]; | |
310 __u32 tsid; | |
311 }ts_id ; | |
312 | |
313 if(channel >= MAX_BS_CHANNEL){ | |
314 printk(KERN_INFO "Invalid Channel(%d)\n", channel); | |
315 return -EIO ; | |
316 } | |
317 val = bs_frequency(regs, lock, addr, channel); | |
318 if(val == -EIO){ | |
319 return val ; | |
320 } | |
321 | |
322 tsid = &tmcc->ts_id[0] ; | |
323 // ³ºÅö¼þÇÈ¿ô¤ÎTS-ID¤ò¼èÆÀ | |
324 for(lp = 0 ; lp < (MAX_BS_TS_ID / 2) ; lp++){ | |
325 for(lp2 = 0 ; lp2 < 100 ; lp2++){ | |
326 memcpy(&wk, bs_get_ts_id[lp], sizeof(WBLOCK)); | |
327 wk.addr = addr; | |
328 ts_id.tsid = i2c_read(regs, lock, &wk, 4); | |
329 // TS-ID¤¬0¤Î¾ì¹ç¤ÏºÆ¼èÆÀ¤¹¤ë | |
330 if((ts_id.ts[0] != 0) && (ts_id.ts[1] != 0)){ | |
331 break ; | |
332 } | |
333 } | |
334 tsid->ts_id = ts_id.ts[1] ; | |
335 tsid += 1; | |
336 tsid->ts_id = ts_id.ts[0] ; | |
337 tsid += 1; | |
338 } | |
339 | |
340 memcpy(&wk, &bs_get_agc, sizeof(WBLOCK)); | |
341 wk.addr = addr; | |
342 tmcc->agc = i2c_read(regs, lock, &wk, 1); | |
343 | |
344 // TS-IDÊ̤ξðÊó¤ò¼èÆÀ | |
345 tsid = &tmcc->ts_id[0] ; | |
346 for(lp = 0 ; lp < MAX_BS_TS_ID ; lp++, tsid += 1){ | |
347 // TS-ID¤Ê¤·=0XFFFF | |
348 if(tsid->ts_id == 0xFFFF){ | |
349 continue ; | |
350 } | |
351 ts_lock(regs, lock, addr, tsid->ts_id); | |
352 | |
353 //¥¹¥í¥Ã¥È¼èÆÀ | |
354 memcpy(&wk, &bs_get_slot, sizeof(WBLOCK)); | |
355 wk.addr = addr; | |
356 ts_slot.u32slot = i2c_read(regs, lock, &wk, 3); | |
357 tsid->high_mode = 0; | |
358 tsid->low_slot = ts_slot.slot[0] ; | |
359 tsid->high_slot = ts_slot.slot[1] ; | |
360 tsid->low_mode = ts_slot.slot[2] ; | |
361 } | |
362 | |
363 memcpy(&wk, &bs_get_clock, sizeof(WBLOCK)); | |
364 wk.addr = addr; | |
365 tmcc->clockmargin = i2c_read(regs, lock, &wk, 1); | |
366 | |
367 memcpy(&wk, &bs_get_carrir, sizeof(WBLOCK)); | |
368 wk.addr = addr; | |
369 tmcc->carriermargin = i2c_read(regs, lock, &wk, 1); | |
370 return 0 ; | |
371 } | |
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372 int isdb_s_read_signal_strength(void __iomem *regs, struct mutex *lock, int addr) |
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373 { |
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374 WBLOCK wk; |
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375 __u32 val ; |
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376 __u32 val2; |
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377 int val3 ; |
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378 |
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379 memcpy(&wk, &bs_get_signal1, sizeof(WBLOCK)); |
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380 wk.addr = addr; |
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381 val = i2c_read(regs, lock, &wk, 1); |
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382 |
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383 memcpy(&wk, &bs_get_signal2, sizeof(WBLOCK)); |
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384 wk.addr = addr; |
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385 val2 = i2c_read(regs, lock, &wk, 1); |
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386 val3 = (((val << 8) & 0XFF00) | (val2 & 0XFF)); |
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387 |
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388 return val3 ; |
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389 } |
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390 |
0 | 391 __u32 getfrequency_add(__u32 channel) |
392 { | |
393 int lp ; | |
394 | |
395 for(lp = 0 ; lp < 10 ; lp++){ | |
396 if(channel <= isdb_t_freq_add[lp].pos){ | |
397 return isdb_t_freq_add[lp].add_freq ; | |
398 } | |
399 } | |
400 return 0 ; | |
401 } | |
402 __u32 getfrequency(__u32 channel, int addfreq) | |
403 { | |
404 __u32 frequencyoffset = 0; | |
405 __u32 frequencyOffset = 0; | |
406 | |
407 if (12 <= channel){ | |
408 frequencyoffset += 2; | |
409 }else if (17 <= channel){ | |
410 frequencyoffset = 0; | |
411 }else if (63 <= channel){ | |
412 frequencyoffset += 2; | |
413 } | |
414 #if 0 | |
415 return (((93 + channel * 6 + frequencyOffset) + addfreq) * 7) + 400; | |
416 #endif | |
417 frequencyOffset = 93 + channel * 6 + frequencyoffset; | |
418 frequencyOffset = 7 * (frequencyOffset + addfreq); | |
419 return frequencyOffset + 400; | |
420 | |
421 } | |
422 int isdb_t_frequency(void __iomem *regs, struct mutex *lock, int addr, int channel, int addfreq) | |
423 { | |
424 | |
425 int lp ; | |
426 WBLOCK wk; | |
427 __u32 val ; | |
428 int tmcclock = FALSE ; | |
429 union{ | |
430 __u8 charfreq[2]; | |
431 __u16 freq; | |
432 }freq[2] ; | |
433 | |
434 if(channel >= MAX_ISDB_T_CHANNEL){ | |
435 return -EIO ; | |
436 } | |
437 | |
438 freq[0].freq = getfrequency(channel, addfreq); | |
439 freq[1].freq = getfrequency_add(channel); | |
440 //»ØÄê¼þÇÈ¿ô | |
441 memcpy(&wk, &isdb_t_pll_base, sizeof(WBLOCK)); | |
442 wk.addr = addr ; | |
443 // ·×»»¤·¤¿¼þÇÈ¿ô¤òÀßÄê | |
444 wk.value[wk.count] = freq[0].charfreq[1]; | |
445 wk.count += 1 ; | |
446 wk.value[wk.count] = freq[0].charfreq[0]; | |
447 wk.count += 1 ; | |
448 | |
449 // ·×»»¤·¤¿¼þÇÈ¿ôÉղþðÊó¤òÀßÄê | |
450 wk.value[wk.count] = freq[1].charfreq[1]; | |
451 wk.count += 1 ; | |
452 wk.value[wk.count] = freq[1].charfreq[0]; | |
453 wk.count += 1 ; | |
454 | |
455 i2c_write(regs, lock, &wk); | |
456 | |
457 for(lp = 0 ; lp < 100 ; lp++){ | |
458 memcpy(&wk, &isdb_t_pll_lock, sizeof(WBLOCK)); | |
459 wk.addr = addr; | |
460 val = i2c_read(regs, lock, &wk, 1); | |
461 if(((val & 0xFF) != 0XFF) && ((val & 0X50) == 0x50)){ | |
462 tmcclock = TRUE ; | |
463 break ; | |
464 } | |
465 } | |
466 if(tmcclock != TRUE){ | |
467 printk(KERN_INFO "PT1:ISDB-T LOCK NG(%08x)\n", val); | |
468 return -EIO ; | |
469 } | |
470 | |
471 memcpy(&wk, &isdb_t_check_tune, sizeof(WBLOCK)); | |
472 wk.addr = addr ; | |
473 i2c_write(regs, lock, &wk); | |
474 | |
475 tmcclock = FALSE ; | |
476 for(lp = 0 ; lp < 1000 ; lp++){ | |
477 memcpy(&wk, &isdb_t_tune_read, sizeof(WBLOCK)); | |
478 wk.addr = addr; | |
479 val = i2c_read(regs, lock, &wk, 1); | |
480 if(((val & 0xFF) != 0XFF) && ((val & 0X8) != 8)){ | |
481 tmcclock = TRUE ; | |
482 break ; | |
483 } | |
484 } | |
485 if(tmcclock != TRUE){ | |
486 return -EIO ; | |
487 } | |
488 return 0 ; | |
489 } | |
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490 int isdb_t_read_signal_strength(void __iomem *regs, struct mutex *lock, int addr) |
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491 { |
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492 __u32 val ; |
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493 __u32 val2; |
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494 __u32 val3; |
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495 WBLOCK wk; |
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496 |
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497 memcpy(&wk, &isdb_t_signal1, sizeof(WBLOCK)); |
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498 wk.addr = addr; |
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499 val = i2c_read(regs, lock, &wk, 1); |
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500 printk(KERN_INFO "CN(1)Val(%x)\n", val); |
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501 |
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502 memcpy(&wk, &isdb_t_signal2, sizeof(WBLOCK)); |
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503 wk.addr = addr; |
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504 val2 = i2c_read(regs, lock, &wk, 1); |
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505 val3 = (((val << 8) & 0XFF00) | (val2 & 0XFF)); |
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506 return val3 ; |
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507 } |
0 | 508 #if 0 |
509 int isdb_t_tune(void __iomem *regs, struct mutex *lock, int addr, int channel, ISDB_T_TMCC *tmcc) | |
510 { | |
511 | |
512 int lp ; | |
513 int rc ; | |
514 int lp2 ; | |
515 WBLOCK wk; | |
516 __u32 val ; | |
517 | |
518 printk(KERN_INFO "Channel(%d) Start\n", channel); | |
519 if(channel >= MAX_ISDB_T_CHANNEL){ | |
520 return -EIO ; | |
521 } | |
522 rc = isdb_t_frequency(regs, lock, addr, channel); | |
523 if(rc < 0){ | |
524 return -EIO ; | |
525 } | |
526 for(lp = 0 ; lp < 100 ; lp++){ | |
527 memcpy(&wk, &isdb_t_tmcc_read_1, sizeof(WBLOCK)); | |
528 wk.addr = addr; | |
529 val = i2c_read(regs, lock, &wk, 4); | |
530 if((val & 0xFF) != 0){ | |
531 break ; | |
532 } | |
533 } | |
534 printk(KERN_INFO "TMCC(1)Val(%x)\n", val); | |
535 | |
536 for(lp = 0 ; lp < 100 ; lp++){ | |
537 memcpy(&wk, &isdb_t_tmcc_read_2, sizeof(WBLOCK)); | |
538 wk.addr = addr; | |
539 val = i2c_read(regs, lock, &wk, 4); | |
540 if((val & 0xFF) != 0){ | |
541 break ; | |
542 } | |
543 } | |
544 printk(KERN_INFO "TMCC(2)Val(%x)\n", val); | |
545 | |
546 memcpy(&wk, &isdb_t_cn_1, sizeof(WBLOCK)); | |
547 wk.addr = addr; | |
548 val = i2c_read(regs, lock, &wk, 1); | |
549 printk(KERN_INFO "CN(1)Val(%x)\n", val); | |
550 | |
551 memcpy(&wk, &isdb_t_cn_2, sizeof(WBLOCK)); | |
552 wk.addr = addr; | |
553 val = i2c_read(regs, lock, &wk, 1); | |
554 printk(KERN_INFO "CN(2)Val(%x)\n", val); | |
555 | |
556 memcpy(&wk, &isdb_t_agc_1, sizeof(WBLOCK)); | |
557 wk.addr = addr; | |
558 val = i2c_read(regs, lock, &wk, 1); | |
559 printk(KERN_INFO "AGC(1)Val(%x)\n", val); | |
560 | |
561 memcpy(&wk, &isdb_t_agc_2, sizeof(WBLOCK)); | |
562 wk.addr = addr; | |
563 val = i2c_read(regs, lock, &wk, 1); | |
564 printk(KERN_INFO "AGC(2)Val(%x)\n", val); | |
565 return 0; | |
566 } | |
567 #endif |