Mercurial > pt1
annotate driver/pt1_tuner.c @ 24:f2cce7becf52
fixed a bug that recpt1 could not exit when recsec is specified.
author | Yoshiki Yazawa <yaz@honeyplanet.jp> |
---|---|
date | Fri, 27 Feb 2009 22:17:39 +0900 |
parents | 07b2fc07ff48 |
children | 98a92ce5382e |
rev | line source |
---|---|
0 | 1 /* pt1-tuner.c: A PT1 on Tuner driver for Linux. */ |
2 | |
3 #include <linux/module.h> | |
4 #include <linux/kernel.h> | |
5 #include <linux/errno.h> | |
6 #include <linux/pci.h> | |
7 #include <linux/init.h> | |
8 #include <linux/interrupt.h> | |
9 #include <linux/mutex.h> | |
10 | |
11 #include <asm/system.h> | |
12 #include <asm/io.h> | |
13 #include <asm/irq.h> | |
14 #include <asm/uaccess.h> | |
15 | |
16 #include "pt1_com.h" | |
17 #include "pt1_pci.h" | |
18 #include "pt1_i2c.h" | |
19 #include "pt1_tuner.h" | |
20 #include "pt1_tuner_data.h" | |
21 | |
22 typedef struct _TUNER_INFO{ | |
23 int isdb_s ; | |
24 int isdb_t ; | |
25 }TUNER_INFO; | |
26 | |
27 TUNER_INFO tuner_info[2] = { | |
28 {T0_ISDB_S, T0_ISDB_T}, | |
29 {T1_ISDB_S, T1_ISDB_T} | |
30 }; | |
31 | |
32 typedef struct _isdb_t_freq_add_table{ | |
33 __u16 pos ; // 追加するチャンネルポジション | |
34 __u16 add_freq ; // 追加する値 | |
35 }isdb_t_freq_add_table; | |
36 | |
37 isdb_t_freq_add_table isdb_t_freq_add[10] = { | |
38 { 7, 0x8081}, // 0〜7迄 | |
39 { 12, 0x80A1}, // 8〜12迄 | |
40 { 21, 0x8062}, // 13〜21迄 | |
41 { 39, 0x80A2}, // 22〜39迄 | |
42 { 51, 0x80E2}, // 40〜51迄 | |
43 { 59, 0x8064}, // 52〜59迄 | |
44 { 75, 0x8084}, // 60〜75迄 | |
45 { 84, 0x80a4}, // 76〜84迄 | |
46 {100, 0x80C4}, // 85〜100迄 | |
47 {112, 0x80E4} // 101〜112迄 | |
48 }; | |
49 | |
50 void settuner_reset(void __iomem *regs, __u32 lnb, __u32 tuner) | |
51 { | |
52 __u32 val = 0; | |
53 switch(lnb){ | |
54 case LNB_11V: val = (1 << BIT_LNB_DOWN); break ; | |
55 case LNB_15V: val = (1 << BIT_LNB_UP) | (1 << BIT_LNB_DOWN) ; break ; | |
56 } | |
57 | |
58 switch(tuner){ | |
59 case TUNER_POWER_ON_RESET_ENABLE: val |= (1 << BIT_TUNER) ; break ; | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
60 case TUNER_POWER_ON_RESET_DISABLE: val |= (1 << BIT_TUNER) | (1 << BIT_RESET) ; break ; |
0 | 61 } |
62 | |
63 writel(val, (regs + 4)); | |
64 } | |
65 static int init_isdb_s(void __iomem *regs, struct mutex *lock, __u32 addr) | |
66 { | |
67 | |
68 WBLOCK wk; | |
69 int lp ; | |
70 __u32 val ; | |
71 | |
72 // ISDB-S/T初期化 | |
73 memcpy(&wk, &com_initdata, sizeof(WBLOCK)); | |
74 | |
75 // 初期化1(なぜかREADなので) | |
76 memcpy(&wk, &isdb_s_init1, sizeof(WBLOCK)); | |
77 wk.addr = addr; | |
78 val = i2c_read(regs, lock, &wk, 1); | |
79 if((val & 0xff) != 0x41){ | |
80 printk(KERN_INFO "PT1:ISDB-S Read(%x)\n", val); | |
81 return -EIO ; | |
82 } | |
83 for(lp = 0 ; lp < MAX_ISDB_S_INIT ; lp++){ | |
84 memcpy(&wk, isdb_s_initial[lp], sizeof(WBLOCK)); | |
85 wk.addr = addr; | |
86 i2c_write(regs, lock, &wk); | |
87 } | |
88 | |
89 return 0 ; | |
90 } | |
91 static void init_isdb_t(void __iomem *regs, struct mutex *lock, __u32 addr) | |
92 { | |
93 int lp ; | |
94 WBLOCK wk; | |
95 | |
96 // ISDB-S/T初期化 | |
97 for(lp = 0 ; lp < MAX_ISDB_T_INIT ; lp++){ | |
98 memcpy(&wk, isdb_t_initial[lp], sizeof(WBLOCK)); | |
99 wk.addr = addr; | |
100 i2c_write(regs, lock, &wk); | |
101 } | |
102 | |
103 | |
104 } | |
105 int tuner_init(void __iomem *regs, struct mutex *lock, int tuner_no) | |
106 { | |
107 | |
108 int rc ; | |
109 WBLOCK wk; | |
110 | |
111 // ISDB-S/T初期化 | |
112 memcpy(&wk, &com_initdata, sizeof(WBLOCK)); | |
113 | |
114 // 初期化(共通) | |
115 wk.addr = tuner_info[tuner_no].isdb_t ; | |
116 i2c_write(regs, lock, &wk); | |
117 wk.addr = tuner_info[tuner_no].isdb_s ; | |
118 i2c_write(regs, lock, &wk); | |
119 | |
120 rc = init_isdb_s(regs, lock, tuner_info[tuner_no].isdb_s); | |
121 if(rc < 0){ | |
122 return rc ; | |
123 } | |
124 init_isdb_t(regs, lock, tuner_info[tuner_no].isdb_t); | |
125 | |
126 memcpy(&wk, &isdb_s_init21, sizeof(WBLOCK)); | |
127 wk.addr = tuner_info[tuner_no].isdb_s ; | |
128 i2c_write(regs, lock, &wk); | |
129 | |
130 memcpy(&wk, &isdb_t_init17, sizeof(WBLOCK)); | |
131 wk.addr = tuner_info[tuner_no].isdb_t ; | |
132 i2c_write(regs, lock, &wk); | |
133 | |
134 return 0 ; | |
135 } | |
136 void set_sleepmode(void __iomem *regs, struct mutex *lock, int address, int tuner_type, int type) | |
137 { | |
138 WBLOCK wk; | |
139 | |
140 if(type == TYPE_WAKEUP){ | |
141 switch(tuner_type){ | |
142 case CHANNEL_TYPE_ISDB_S:memcpy(&wk, &isdb_s_wake, sizeof(WBLOCK));break ; | |
143 case CHANNEL_TYPE_ISDB_T:memcpy(&wk, &isdb_t_wake, sizeof(WBLOCK));break ; | |
144 } | |
145 wk.addr = address ; | |
146 i2c_write(regs, lock, &wk); | |
147 } | |
148 switch(tuner_type){ | |
149 case CHANNEL_TYPE_ISDB_S: | |
150 printk(KERN_INFO "PT1:ISDB-S Sleep\n"); | |
151 memcpy(&wk, &isdb_s_sleep, sizeof(WBLOCK)); | |
152 if(type == TYPE_WAKEUP){ | |
153 wk.value[1] = 0x01 ; | |
154 } | |
155 break ; | |
156 case CHANNEL_TYPE_ISDB_T: | |
157 printk(KERN_INFO "PT1:ISDB-T Sleep\n"); | |
158 memcpy(&wk, &isdb_t_sleep, sizeof(WBLOCK)); | |
159 if(type == TYPE_WAKEUP){ | |
160 wk.value[1] = 0x90 ; | |
161 } | |
162 break ; | |
163 } | |
164 wk.addr = address; | |
165 i2c_write(regs, lock, &wk); | |
166 } | |
167 | |
168 int bs_frequency(void __iomem *regs, struct mutex *lock, int addr, int channel) | |
169 { | |
170 int lp ; | |
171 int tmcclock = FALSE ; | |
172 WBLOCK wk; | |
173 __u32 val ; | |
174 | |
175 if(channel >= MAX_BS_CHANNEL){ | |
176 return -EIO ; | |
177 } | |
178 // ISDB-S PLLロック | |
179 for(lp = 0 ; lp < MAX_BS_CHANNEL_PLL_COMMAND ; lp++){ | |
180 memcpy(&wk, bs_pll[channel].wblock[lp], sizeof(WBLOCK)); | |
181 wk.addr = addr ; | |
182 i2c_write(regs, lock, &wk); | |
183 } | |
184 | |
185 // PLLロック確認 | |
186 // チェック用 | |
187 for(lp = 0 ; lp < 200 ; lp++){ | |
188 memcpy(&wk, &bs_pll_lock, sizeof(WBLOCK)); | |
189 wk.addr = addr; | |
190 val = i2c_read(regs, lock, &wk, 1); | |
191 if(((val & 0xFF) != 0) && ((val & 0XFF) != 0XFF)){ | |
192 tmcclock = TRUE ; | |
193 break ; | |
194 } | |
195 } | |
196 | |
197 if(tmcclock == FALSE){ | |
198 printk(KERN_INFO "PLL LOCK ERROR\n"); | |
199 return -EIO; | |
200 } | |
201 | |
202 memcpy(&wk, &bs_tmcc_get_1, sizeof(WBLOCK)); | |
203 wk.addr = addr; | |
204 i2c_write(regs, lock, &wk); | |
205 | |
206 tmcclock = FALSE ; | |
207 | |
208 for(lp = 0 ; lp < 200 ; lp++){ | |
209 memcpy(&wk, &bs_tmcc_get_2, sizeof(WBLOCK)); | |
210 wk.addr = addr; | |
211 | |
212 val = i2c_read(regs, lock, &wk, 1); | |
213 if(((val & 0XFF) != 0XFF) && (!(val & 0x10))){ | |
214 tmcclock = TRUE ; | |
215 break ; | |
216 } | |
217 } | |
218 | |
219 if(tmcclock == FALSE){ | |
220 printk(KERN_INFO "TMCC LOCK ERROR\n"); | |
221 return -EIO; | |
222 } | |
223 | |
224 return 0 ; | |
225 } | |
226 int ts_lock(void __iomem *regs, struct mutex *lock, int addr, __u16 ts_id) | |
227 { | |
228 | |
229 int lp ; | |
230 WBLOCK wk; | |
231 __u32 val ; | |
232 union{ | |
233 __u8 ts[2]; | |
234 __u16 tsid; | |
235 }uts_id ; | |
236 | |
237 uts_id.tsid = ts_id ; | |
238 memcpy(&wk, &bs_set_ts_lock, sizeof(WBLOCK)); | |
239 wk.addr = addr; | |
240 // TS-ID設定 | |
241 wk.value[1] = uts_id.ts[1]; | |
242 wk.value[2] = uts_id.ts[0]; | |
243 i2c_write(regs, lock, &wk); | |
244 | |
245 for(lp = 0 ; lp < 100 ; lp++){ | |
246 memcpy(&wk, &bs_get_ts_lock, sizeof(WBLOCK)); | |
247 wk.addr = addr; | |
248 val = i2c_read(regs, lock, &wk, 2); | |
249 if((val & 0xFFFF) == ts_id){ | |
250 return 0 ; | |
251 } | |
252 } | |
253 printk(KERN_INFO "PT1:ERROR TS-LOCK(%x)\n", ts_id); | |
254 return -EIO ; | |
255 } | |
256 int bs_tune(void __iomem *regs, struct mutex *lock, int addr, int channel, ISDB_S_TMCC *tmcc) | |
257 { | |
258 | |
259 int lp ; | |
260 int lp2; | |
261 WBLOCK wk; | |
262 __u32 val ; | |
263 ISDB_S_TS_ID *tsid ; | |
264 union{ | |
265 __u8 slot[4]; | |
266 __u32 u32slot; | |
267 }ts_slot ; | |
268 union{ | |
269 __u16 ts[2]; | |
270 __u32 tsid; | |
271 }ts_id ; | |
272 | |
273 if(channel >= MAX_BS_CHANNEL){ | |
274 printk(KERN_INFO "Invalid Channel(%d)\n", channel); | |
275 return -EIO ; | |
276 } | |
277 val = bs_frequency(regs, lock, addr, channel); | |
278 if(val == -EIO){ | |
279 return val ; | |
280 } | |
281 | |
282 tsid = &tmcc->ts_id[0] ; | |
283 // 該当周波数のTS-IDを取得 | |
284 for(lp = 0 ; lp < (MAX_BS_TS_ID / 2) ; lp++){ | |
285 for(lp2 = 0 ; lp2 < 100 ; lp2++){ | |
286 memcpy(&wk, bs_get_ts_id[lp], sizeof(WBLOCK)); | |
287 wk.addr = addr; | |
288 ts_id.tsid = i2c_read(regs, lock, &wk, 4); | |
289 // TS-IDが0の場合は再取得する | |
290 if((ts_id.ts[0] != 0) && (ts_id.ts[1] != 0)){ | |
291 break ; | |
292 } | |
293 } | |
294 tsid->ts_id = ts_id.ts[1] ; | |
295 tsid += 1; | |
296 tsid->ts_id = ts_id.ts[0] ; | |
297 tsid += 1; | |
298 } | |
299 | |
300 memcpy(&wk, &bs_get_agc, sizeof(WBLOCK)); | |
301 wk.addr = addr; | |
302 tmcc->agc = i2c_read(regs, lock, &wk, 1); | |
303 | |
304 // TS-ID別の情報を取得 | |
305 tsid = &tmcc->ts_id[0] ; | |
306 for(lp = 0 ; lp < MAX_BS_TS_ID ; lp++, tsid += 1){ | |
307 // TS-IDなし=0XFFFF | |
308 if(tsid->ts_id == 0xFFFF){ | |
309 continue ; | |
310 } | |
311 ts_lock(regs, lock, addr, tsid->ts_id); | |
312 | |
313 //スロット取得 | |
314 memcpy(&wk, &bs_get_slot, sizeof(WBLOCK)); | |
315 wk.addr = addr; | |
316 ts_slot.u32slot = i2c_read(regs, lock, &wk, 3); | |
317 tsid->high_mode = 0; | |
318 tsid->low_slot = ts_slot.slot[0] ; | |
319 tsid->high_slot = ts_slot.slot[1] ; | |
320 tsid->low_mode = ts_slot.slot[2] ; | |
321 } | |
322 | |
323 memcpy(&wk, &bs_get_clock, sizeof(WBLOCK)); | |
324 wk.addr = addr; | |
325 tmcc->clockmargin = i2c_read(regs, lock, &wk, 1); | |
326 | |
327 memcpy(&wk, &bs_get_carrir, sizeof(WBLOCK)); | |
328 wk.addr = addr; | |
329 tmcc->carriermargin = i2c_read(regs, lock, &wk, 1); | |
330 return 0 ; | |
331 } | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
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332 int isdb_s_read_signal_strength(void __iomem *regs, struct mutex *lock, int addr) |
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parents:
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diff
changeset
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333 { |
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parents:
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changeset
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334 WBLOCK wk; |
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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335 __u32 val ; |
07b2fc07ff48
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parents:
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336 __u32 val2; |
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parents:
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337 int val3 ; |
07b2fc07ff48
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parents:
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338 |
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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339 memcpy(&wk, &bs_get_signal1, sizeof(WBLOCK)); |
07b2fc07ff48
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
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340 wk.addr = addr; |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
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341 val = i2c_read(regs, lock, &wk, 1); |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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diff
changeset
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342 |
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parents:
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343 memcpy(&wk, &bs_get_signal2, sizeof(WBLOCK)); |
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
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344 wk.addr = addr; |
07b2fc07ff48
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Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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diff
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345 val2 = i2c_read(regs, lock, &wk, 1); |
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parents:
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346 val3 = (((val << 8) & 0XFF00) | (val2 & 0XFF)); |
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parents:
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347 |
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parents:
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348 return val3 ; |
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parents:
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349 } |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
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350 |
0 | 351 __u32 getfrequency_add(__u32 channel) |
352 { | |
353 int lp ; | |
354 | |
355 for(lp = 0 ; lp < 10 ; lp++){ | |
356 if(channel <= isdb_t_freq_add[lp].pos){ | |
357 return isdb_t_freq_add[lp].add_freq ; | |
358 } | |
359 } | |
360 return 0 ; | |
361 } | |
362 __u32 getfrequency(__u32 channel, int addfreq) | |
363 { | |
364 __u32 frequencyoffset = 0; | |
365 __u32 frequencyOffset = 0; | |
366 | |
367 if (12 <= channel){ | |
368 frequencyoffset += 2; | |
369 }else if (17 <= channel){ | |
370 frequencyoffset = 0; | |
371 }else if (63 <= channel){ | |
372 frequencyoffset += 2; | |
373 } | |
374 #if 0 | |
375 return (((93 + channel * 6 + frequencyOffset) + addfreq) * 7) + 400; | |
376 #endif | |
377 frequencyOffset = 93 + channel * 6 + frequencyoffset; | |
378 frequencyOffset = 7 * (frequencyOffset + addfreq); | |
379 return frequencyOffset + 400; | |
380 | |
381 } | |
382 int isdb_t_frequency(void __iomem *regs, struct mutex *lock, int addr, int channel, int addfreq) | |
383 { | |
384 | |
385 int lp ; | |
386 WBLOCK wk; | |
387 __u32 val ; | |
388 int tmcclock = FALSE ; | |
389 union{ | |
390 __u8 charfreq[2]; | |
391 __u16 freq; | |
392 }freq[2] ; | |
393 | |
394 if(channel >= MAX_ISDB_T_CHANNEL){ | |
395 return -EIO ; | |
396 } | |
397 | |
398 freq[0].freq = getfrequency(channel, addfreq); | |
399 freq[1].freq = getfrequency_add(channel); | |
400 //指定周波数 | |
401 memcpy(&wk, &isdb_t_pll_base, sizeof(WBLOCK)); | |
402 wk.addr = addr ; | |
403 // 計算した周波数を設定 | |
404 wk.value[wk.count] = freq[0].charfreq[1]; | |
405 wk.count += 1 ; | |
406 wk.value[wk.count] = freq[0].charfreq[0]; | |
407 wk.count += 1 ; | |
408 | |
409 // 計算した周波数付加情報を設定 | |
410 wk.value[wk.count] = freq[1].charfreq[1]; | |
411 wk.count += 1 ; | |
412 wk.value[wk.count] = freq[1].charfreq[0]; | |
413 wk.count += 1 ; | |
414 | |
415 i2c_write(regs, lock, &wk); | |
416 | |
417 for(lp = 0 ; lp < 100 ; lp++){ | |
418 memcpy(&wk, &isdb_t_pll_lock, sizeof(WBLOCK)); | |
419 wk.addr = addr; | |
420 val = i2c_read(regs, lock, &wk, 1); | |
421 if(((val & 0xFF) != 0XFF) && ((val & 0X50) == 0x50)){ | |
422 tmcclock = TRUE ; | |
423 break ; | |
424 } | |
425 } | |
426 if(tmcclock != TRUE){ | |
427 printk(KERN_INFO "PT1:ISDB-T LOCK NG(%08x)\n", val); | |
428 return -EIO ; | |
429 } | |
430 | |
431 memcpy(&wk, &isdb_t_check_tune, sizeof(WBLOCK)); | |
432 wk.addr = addr ; | |
433 i2c_write(regs, lock, &wk); | |
434 | |
435 tmcclock = FALSE ; | |
436 for(lp = 0 ; lp < 1000 ; lp++){ | |
437 memcpy(&wk, &isdb_t_tune_read, sizeof(WBLOCK)); | |
438 wk.addr = addr; | |
439 val = i2c_read(regs, lock, &wk, 1); | |
440 if(((val & 0xFF) != 0XFF) && ((val & 0X8) != 8)){ | |
441 tmcclock = TRUE ; | |
442 break ; | |
443 } | |
444 } | |
445 if(tmcclock != TRUE){ | |
446 return -EIO ; | |
447 } | |
448 return 0 ; | |
449 } | |
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
450 int isdb_t_read_signal_strength(void __iomem *regs, struct mutex *lock, int addr) |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
451 { |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
452 __u32 val ; |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
453 __u32 val2; |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
454 __u32 val3; |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
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455 WBLOCK wk; |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
456 |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
457 memcpy(&wk, &isdb_t_signal1, sizeof(WBLOCK)); |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
458 wk.addr = addr; |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
459 val = i2c_read(regs, lock, &wk, 1); |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
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460 printk(KERN_INFO "CN(1)Val(%x)\n", val); |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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461 |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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462 memcpy(&wk, &isdb_t_signal2, sizeof(WBLOCK)); |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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diff
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463 wk.addr = addr; |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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464 val2 = i2c_read(regs, lock, &wk, 1); |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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465 val3 = (((val << 8) & 0XFF00) | (val2 & 0XFF)); |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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466 return val3 ; |
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
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467 } |
0 | 468 #if 0 |
469 int isdb_t_tune(void __iomem *regs, struct mutex *lock, int addr, int channel, ISDB_T_TMCC *tmcc) | |
470 { | |
471 | |
472 int lp ; | |
473 int rc ; | |
474 int lp2 ; | |
475 WBLOCK wk; | |
476 __u32 val ; | |
477 | |
478 printk(KERN_INFO "Channel(%d) Start\n", channel); | |
479 if(channel >= MAX_ISDB_T_CHANNEL){ | |
480 return -EIO ; | |
481 } | |
482 rc = isdb_t_frequency(regs, lock, addr, channel); | |
483 if(rc < 0){ | |
484 return -EIO ; | |
485 } | |
486 for(lp = 0 ; lp < 100 ; lp++){ | |
487 memcpy(&wk, &isdb_t_tmcc_read_1, sizeof(WBLOCK)); | |
488 wk.addr = addr; | |
489 val = i2c_read(regs, lock, &wk, 4); | |
490 if((val & 0xFF) != 0){ | |
491 break ; | |
492 } | |
493 } | |
494 printk(KERN_INFO "TMCC(1)Val(%x)\n", val); | |
495 | |
496 for(lp = 0 ; lp < 100 ; lp++){ | |
497 memcpy(&wk, &isdb_t_tmcc_read_2, sizeof(WBLOCK)); | |
498 wk.addr = addr; | |
499 val = i2c_read(regs, lock, &wk, 4); | |
500 if((val & 0xFF) != 0){ | |
501 break ; | |
502 } | |
503 } | |
504 printk(KERN_INFO "TMCC(2)Val(%x)\n", val); | |
505 | |
506 memcpy(&wk, &isdb_t_cn_1, sizeof(WBLOCK)); | |
507 wk.addr = addr; | |
508 val = i2c_read(regs, lock, &wk, 1); | |
509 printk(KERN_INFO "CN(1)Val(%x)\n", val); | |
510 | |
511 memcpy(&wk, &isdb_t_cn_2, sizeof(WBLOCK)); | |
512 wk.addr = addr; | |
513 val = i2c_read(regs, lock, &wk, 1); | |
514 printk(KERN_INFO "CN(2)Val(%x)\n", val); | |
515 | |
516 memcpy(&wk, &isdb_t_agc_1, sizeof(WBLOCK)); | |
517 wk.addr = addr; | |
518 val = i2c_read(regs, lock, &wk, 1); | |
519 printk(KERN_INFO "AGC(1)Val(%x)\n", val); | |
520 | |
521 memcpy(&wk, &isdb_t_agc_2, sizeof(WBLOCK)); | |
522 wk.addr = addr; | |
523 val = i2c_read(regs, lock, &wk, 1); | |
524 printk(KERN_INFO "AGC(2)Val(%x)\n", val); | |
525 return 0; | |
526 } | |
527 #endif |