changeset 1153:b391fddc35b2 trunk

[svn] Fix handling of SPC efb register when echo instruction has been called. Shift right of 14 is too high of a modifier and does not match the response of the FIR filter in the SPC700. Shift right of 16 delivers a more accurate result.
author nenolod
date Tue, 29 May 2007 21:57:06 -0700
parents 949457464b28
children 5a8f6bfe3e4e
files ChangeLog src/console/Spc_Dsp.cxx
diffstat 2 files changed, 10 insertions(+), 2 deletions(-) [+]
line wrap: on
line diff
--- a/ChangeLog	Tue May 29 03:58:22 2007 -0700
+++ b/ChangeLog	Tue May 29 21:57:06 2007 -0700
@@ -1,3 +1,11 @@
+2007-05-29 10:58:22 +0000  Yoshiki Yazawa <yaz@cc.rim.or.jp>
+  revision [2470]
+  - fix for crash when file extension is not available.
+  
+  trunk/src/tta/libtta.c |    2 +-
+  1 file changed, 1 insertion(+), 1 deletion(-)
+
+
 2007-05-29 07:59:45 +0000  William Pitcock <nenolod@sacredspiral.co.uk>
   revision [2468]
   - fix FD leakage. closes #954.
--- a/src/console/Spc_Dsp.cxx	Tue May 29 03:58:22 2007 -0700
+++ b/src/console/Spc_Dsp.cxx	Tue May 29 21:57:06 2007 -0700
@@ -589,8 +589,8 @@
 		// Echo out
 		if ( !(REG(flg) & 0x20) )
 		{
-			int l = (echo_out_l >> 7) + ((echo_in_l * (int8_t) REG(efb)) >> 14);
-			int r = (echo_out_r >> 7) + ((echo_in_r * (int8_t) REG(efb)) >> 14);
+			int l = (echo_out_l >> 7) + ((echo_in_l * (int8_t) REG(efb)) >> 16);
+			int r = (echo_out_r >> 7) + ((echo_in_r * (int8_t) REG(efb)) >> 16);
 			
 			// just to help pass more validation tests
 			#if SPC_MORE_ACCURACY