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8335
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1 /*
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2 * ARM NEON IDCT
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3 *
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4 * Copyright (c) 2008 Mans Rullgard <mans@mansr.com>
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5 *
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6 * Based on Simple IDCT
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7 * Copyright (c) 2001 Michael Niedermayer <michaelni@gmx.at>
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8 *
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9 * This file is part of FFmpeg.
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10 *
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11 * FFmpeg is free software; you can redistribute it and/or
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12 * modify it under the terms of the GNU Lesser General Public
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13 * License as published by the Free Software Foundation; either
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14 * version 2.1 of the License, or (at your option) any later version.
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15 *
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16 * FFmpeg is distributed in the hope that it will be useful,
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17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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19 * Lesser General Public License for more details.
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20 *
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21 * You should have received a copy of the GNU Lesser General Public
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22 * License along with FFmpeg; if not, write to the Free Software
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23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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24 */
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25
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26 #include "asm.S"
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27
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28 #define W1 22725 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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29 #define W2 21407 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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30 #define W3 19266 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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31 #define W4 16383 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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32 #define W5 12873 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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33 #define W6 8867 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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34 #define W7 4520 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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35 #define W4c ((1<<(COL_SHIFT-1))/W4)
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36 #define ROW_SHIFT 11
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37 #define COL_SHIFT 20
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38
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39 #define w1 d0[0]
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40 #define w2 d0[1]
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41 #define w3 d0[2]
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42 #define w4 d0[3]
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43 #define w5 d1[0]
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44 #define w6 d1[1]
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45 #define w7 d1[2]
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46 #define w4c d1[3]
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47
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48 .fpu neon
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49
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50 .macro idct_col4_top
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51 vmull.s16 q7, d6, w2 /* q9 = W2 * col[2] */
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52 vmull.s16 q8, d6, w6 /* q10 = W6 * col[2] */
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53 vmull.s16 q9, d4, w1 /* q9 = W1 * col[1] */
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54 vadd.i32 q11, q15, q7
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55 vmull.s16 q10, d4, w3 /* q10 = W3 * col[1] */
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56 vadd.i32 q12, q15, q8
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57 vmull.s16 q5, d4, w5 /* q5 = W5 * col[1] */
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58 vsub.i32 q13, q15, q8
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59 vmull.s16 q6, d4, w7 /* q6 = W7 * col[1] */
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60 vsub.i32 q14, q15, q7
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61
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62 vmlal.s16 q9, d8, w3 /* q9 += W3 * col[3] */
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63 vmlsl.s16 q10, d8, w7 /* q10 -= W7 * col[3] */
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64 vmlsl.s16 q5, d8, w1 /* q5 -= W1 * col[3] */
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65 vmlsl.s16 q6, d8, w5 /* q6 -= W5 * col[3] */
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66 .endm
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67
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68 .text
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69 .align 6
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70
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71 function idct_row4_neon
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72 vmov.i32 q15, #(1<<(ROW_SHIFT-1))
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73 vld1.64 {d2-d5}, [r2,:128]!
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74 vmlal.s16 q15, d2, w4 /* q15 += W4 * col[0] */
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75 vld1.64 {d6,d7}, [r2,:128]!
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76 vorr d10, d3, d5
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77 vld1.64 {d8,d9}, [r2,:128]!
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78 add r2, r2, #-64
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79
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80 vorr d11, d7, d9
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81 vorr d10, d10, d11
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82 vmov r3, r4, d10
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83
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84 idct_col4_top
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85
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86 orrs r3, r3, r4
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87 beq 1f
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88
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89 vmull.s16 q7, d3, w4 /* q7 = W4 * col[4] */
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90 vmlal.s16 q9, d5, w5 /* q9 += W5 * col[5] */
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91 vmlsl.s16 q10, d5, w1 /* q10 -= W1 * col[5] */
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92 vmull.s16 q8, d7, w2 /* q8 = W2 * col[6] */
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93 vmlal.s16 q5, d5, w7 /* q5 += W7 * col[5] */
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94 vadd.i32 q11, q11, q7
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95 vsub.i32 q12, q12, q7
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96 vsub.i32 q13, q13, q7
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97 vadd.i32 q14, q14, q7
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98 vmlal.s16 q6, d5, w3 /* q6 += W3 * col[5] */
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99 vmull.s16 q7, d7, w6 /* q7 = W6 * col[6] */
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100 vmlal.s16 q9, d9, w7
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101 vmlsl.s16 q10, d9, w5
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102 vmlal.s16 q5, d9, w3
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103 vmlsl.s16 q6, d9, w1
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104 vadd.i32 q11, q11, q7
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105 vsub.i32 q12, q12, q8
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106 vadd.i32 q13, q13, q8
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107 vsub.i32 q14, q14, q7
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108
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109 1: vadd.i32 q3, q11, q9
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110 vadd.i32 q4, q12, q10
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111 vshrn.i32 d2, q3, #ROW_SHIFT
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112 vshrn.i32 d4, q4, #ROW_SHIFT
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113 vadd.i32 q7, q13, q5
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114 vadd.i32 q8, q14, q6
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115 vtrn.16 d2, d4
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116 vshrn.i32 d6, q7, #ROW_SHIFT
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117 vshrn.i32 d8, q8, #ROW_SHIFT
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118 vsub.i32 q14, q14, q6
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119 vsub.i32 q11, q11, q9
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120 vtrn.16 d6, d8
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121 vsub.i32 q13, q13, q5
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122 vshrn.i32 d3, q14, #ROW_SHIFT
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123 vtrn.32 d2, d6
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124 vsub.i32 q12, q12, q10
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125 vtrn.32 d4, d8
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126 vshrn.i32 d5, q13, #ROW_SHIFT
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127 vshrn.i32 d7, q12, #ROW_SHIFT
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128 vshrn.i32 d9, q11, #ROW_SHIFT
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129
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130 vtrn.16 d3, d5
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131 vtrn.16 d7, d9
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132 vtrn.32 d3, d7
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133 vtrn.32 d5, d9
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134
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135 vst1.64 {d2-d5}, [r2,:128]!
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136 vst1.64 {d6-d9}, [r2,:128]!
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137
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138 bx lr
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139 .endfunc
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140
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141 function idct_col4_neon
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142 mov ip, #16
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143 vld1.64 {d2}, [r2,:64], ip /* d2 = col[0] */
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144 vdup.16 d30, w4c
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145 vld1.64 {d4}, [r2,:64], ip /* d3 = col[1] */
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146 vadd.i16 d30, d30, d2
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147 vld1.64 {d6}, [r2,:64], ip /* d4 = col[2] */
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148 vmull.s16 q15, d30, w4 /* q15 = W4*(col[0]+(1<<COL_SHIFT-1)/W4)*/
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149 vld1.64 {d8}, [r2,:64], ip /* d5 = col[3] */
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150
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151 ldrd r4, [r2]
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152 ldrd r6, [r2, #16]
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153 orrs r4, r4, r5
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154
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155 idct_col4_top
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156 addeq r2, r2, #16
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157 beq 1f
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158
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159 vld1.64 {d3}, [r2,:64], ip /* d6 = col[4] */
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160 vmull.s16 q7, d3, w4 /* q7 = W4 * col[4] */
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161 vadd.i32 q11, q11, q7
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162 vsub.i32 q12, q12, q7
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163 vsub.i32 q13, q13, q7
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164 vadd.i32 q14, q14, q7
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165
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166 1: orrs r6, r6, r7
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167 ldrd r4, [r2, #16]
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168 addeq r2, r2, #16
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169 beq 2f
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170
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171 vld1.64 {d5}, [r2,:64], ip /* d7 = col[5] */
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172 vmlal.s16 q9, d5, w5 /* q9 += W5 * col[5] */
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173 vmlsl.s16 q10, d5, w1 /* q10 -= W1 * col[5] */
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174 vmlal.s16 q5, d5, w7 /* q5 += W7 * col[5] */
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175 vmlal.s16 q6, d5, w3 /* q6 += W3 * col[5] */
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176
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177 2: orrs r4, r4, r5
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178 ldrd r4, [r2, #16]
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179 addeq r2, r2, #16
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180 beq 3f
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181
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182 vld1.64 {d7}, [r2,:64], ip /* d8 = col[6] */
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183 vmull.s16 q7, d7, w6 /* q7 = W6 * col[6] */
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184 vmull.s16 q8, d7, w2 /* q8 = W2 * col[6] */
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185 vadd.i32 q11, q11, q7
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186 vsub.i32 q14, q14, q7
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187 vsub.i32 q12, q12, q8
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188 vadd.i32 q13, q13, q8
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189
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190 3: orrs r4, r4, r5
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191 addeq r2, r2, #16
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192 beq 4f
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193
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194 vld1.64 {d9}, [r2,:64], ip /* d9 = col[7] */
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195 vmlal.s16 q9, d9, w7
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196 vmlsl.s16 q10, d9, w5
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197 vmlal.s16 q5, d9, w3
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198 vmlsl.s16 q6, d9, w1
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199
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200 4: vaddhn.i32 d2, q11, q9
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201 vaddhn.i32 d3, q12, q10
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202 vaddhn.i32 d4, q13, q5
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203 vaddhn.i32 d5, q14, q6
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204 vsubhn.i32 d9, q11, q9
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205 vsubhn.i32 d8, q12, q10
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206 vsubhn.i32 d7, q13, q5
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207 vsubhn.i32 d6, q14, q6
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208
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209 bx lr
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210 .endfunc
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211
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212 .align 6
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213
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214 function idct_col4_st8_neon
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215 vqshrun.s16 d2, q1, #COL_SHIFT-16
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216 vqshrun.s16 d3, q2, #COL_SHIFT-16
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217 vqshrun.s16 d4, q3, #COL_SHIFT-16
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218 vqshrun.s16 d5, q4, #COL_SHIFT-16
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219 vst1.32 {d2[0]}, [r0,:32], r1
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220 vst1.32 {d2[1]}, [r0,:32], r1
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221 vst1.32 {d3[0]}, [r0,:32], r1
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222 vst1.32 {d3[1]}, [r0,:32], r1
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223 vst1.32 {d4[0]}, [r0,:32], r1
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224 vst1.32 {d4[1]}, [r0,:32], r1
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225 vst1.32 {d5[0]}, [r0,:32], r1
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226 vst1.32 {d5[1]}, [r0,:32], r1
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227
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228 bx lr
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229 .endfunc
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230
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231 .section .rodata
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232 .align 4
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8506
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233 idct_coeff_neon:
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234 .short W1, W2, W3, W4, W5, W6, W7, W4c
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8335
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235 .previous
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236
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237 .macro idct_start data
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238 push {r4-r7, lr}
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239 pld [\data]
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240 pld [\data, #64]
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241 vpush {d8-d15}
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8506
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242 movw r3, #:lower16:idct_coeff_neon
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243 movt r3, #:upper16:idct_coeff_neon
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8335
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244 vld1.64 {d0,d1}, [r3,:128]
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245 .endm
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246
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247 .macro idct_end
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248 vpop {d8-d15}
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249 pop {r4-r7, pc}
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250 .endm
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251
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252 /* void ff_simple_idct_put_neon(uint8_t *dst, int line_size, DCTELEM *data); */
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253 function ff_simple_idct_put_neon, export=1
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254 idct_start r2
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255
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256 bl idct_row4_neon
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257 bl idct_row4_neon
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258 add r2, r2, #-128
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259 bl idct_col4_neon
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260 bl idct_col4_st8_neon
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261 sub r0, r0, r1, lsl #3
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262 add r0, r0, #4
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263 add r2, r2, #-120
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264 bl idct_col4_neon
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265 bl idct_col4_st8_neon
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266
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267 idct_end
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268 .endfunc
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269
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270 .align 6
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271
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272 function idct_col4_add8_neon
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273 mov ip, r0
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274
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275 vld1.32 {d10[0]}, [r0,:32], r1
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276 vshr.s16 q1, q1, #COL_SHIFT-16
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277 vld1.32 {d10[1]}, [r0,:32], r1
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278 vshr.s16 q2, q2, #COL_SHIFT-16
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279 vld1.32 {d11[0]}, [r0,:32], r1
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280 vshr.s16 q3, q3, #COL_SHIFT-16
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281 vld1.32 {d11[1]}, [r0,:32], r1
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282 vshr.s16 q4, q4, #COL_SHIFT-16
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283 vld1.32 {d12[0]}, [r0,:32], r1
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284 vaddw.u8 q1, q1, d10
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285 vld1.32 {d12[1]}, [r0,:32], r1
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286 vaddw.u8 q2, q2, d11
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287 vld1.32 {d13[0]}, [r0,:32], r1
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288 vqmovun.s16 d2, q1
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289 vld1.32 {d13[1]}, [r0,:32], r1
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290 vaddw.u8 q3, q3, d12
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291 vst1.32 {d2[0]}, [ip,:32], r1
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292 vqmovun.s16 d3, q2
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293 vst1.32 {d2[1]}, [ip,:32], r1
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294 vaddw.u8 q4, q4, d13
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295 vst1.32 {d3[0]}, [ip,:32], r1
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296 vqmovun.s16 d4, q3
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297 vst1.32 {d3[1]}, [ip,:32], r1
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298 vqmovun.s16 d5, q4
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299 vst1.32 {d4[0]}, [ip,:32], r1
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300 vst1.32 {d4[1]}, [ip,:32], r1
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301 vst1.32 {d5[0]}, [ip,:32], r1
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302 vst1.32 {d5[1]}, [ip,:32], r1
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303
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304 bx lr
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305 .endfunc
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306
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307 /* void ff_simple_idct_add_neon(uint8_t *dst, int line_size, DCTELEM *data); */
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308 function ff_simple_idct_add_neon, export=1
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309 idct_start r2
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310
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311 bl idct_row4_neon
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312 bl idct_row4_neon
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313 add r2, r2, #-128
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314 bl idct_col4_neon
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315 bl idct_col4_add8_neon
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316 sub r0, r0, r1, lsl #3
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317 add r0, r0, #4
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318 add r2, r2, #-120
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319 bl idct_col4_neon
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320 bl idct_col4_add8_neon
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321
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322 idct_end
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323 .endfunc
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324
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325 .align 6
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326
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327 function idct_col4_st16_neon
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328 mov ip, #16
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329
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330 vshr.s16 q1, q1, #COL_SHIFT-16
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331 vshr.s16 q2, q2, #COL_SHIFT-16
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332 vst1.64 {d2}, [r2,:64], ip
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333 vshr.s16 q3, q3, #COL_SHIFT-16
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334 vst1.64 {d3}, [r2,:64], ip
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335 vshr.s16 q4, q4, #COL_SHIFT-16
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336 vst1.64 {d4}, [r2,:64], ip
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337 vst1.64 {d5}, [r2,:64], ip
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338 vst1.64 {d6}, [r2,:64], ip
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339 vst1.64 {d7}, [r2,:64], ip
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340 vst1.64 {d8}, [r2,:64], ip
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341 vst1.64 {d9}, [r2,:64], ip
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342
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343 bx lr
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344 .endfunc
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345
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346 /* void ff_simple_idct_neon(DCTELEM *data); */
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347 function ff_simple_idct_neon, export=1
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348 idct_start r0
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349
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350 mov r2, r0
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351 bl idct_row4_neon
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352 bl idct_row4_neon
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353 add r2, r2, #-128
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354 bl idct_col4_neon
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355 add r2, r2, #-128
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356 bl idct_col4_st16_neon
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357 add r2, r2, #-120
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358 bl idct_col4_neon
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359 add r2, r2, #-128
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360 bl idct_col4_st16_neon
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361
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362 idct_end
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363 .endfunc
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