annotate x86/vp8dsp-init.c @ 12340:2d15f62f4f8a libavcodec

VP8: move zeroing of luma DC block into the WHT Lets us do the zeroing in asm instead of C. Also makes it consistent with the way the regular iDCT code does it.
author darkshikari
date Mon, 02 Aug 2010 20:18:09 +0000
parents 435319d67bd8
children 3fc4c625b6f3
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1 /*
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2 * VP8 DSP functions x86-optimized
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3 * Copyright (c) 2010 Ronald S. Bultje <rsbultje@gmail.com>
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4 * Copyright (c) 2010 Jason Garrett-Glaser <darkshikari@gmail.com>
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5 *
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6 * This file is part of FFmpeg.
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7 *
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8 * FFmpeg is free software; you can redistribute it and/or
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9 * modify it under the terms of the GNU Lesser General Public
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10 * License as published by the Free Software Foundation; either
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11 * version 2.1 of the License, or (at your option) any later version.
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12 *
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13 * FFmpeg is distributed in the hope that it will be useful,
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14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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16 * Lesser General Public License for more details.
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17 *
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18 * You should have received a copy of the GNU Lesser General Public
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19 * License along with FFmpeg; if not, write to the Free Software
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20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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21 */
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22
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23 #include "libavutil/x86_cpu.h"
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24 #include "libavcodec/vp8dsp.h"
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25
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26 #if HAVE_YASM
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27
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28 /*
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29 * MC functions
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30 */
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31 extern void ff_put_vp8_epel4_h4_mmxext(uint8_t *dst, int dststride,
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32 uint8_t *src, int srcstride,
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33 int height, int mx, int my);
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34 extern void ff_put_vp8_epel4_h6_mmxext(uint8_t *dst, int dststride,
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35 uint8_t *src, int srcstride,
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36 int height, int mx, int my);
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37 extern void ff_put_vp8_epel4_v4_mmxext(uint8_t *dst, int dststride,
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38 uint8_t *src, int srcstride,
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39 int height, int mx, int my);
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40 extern void ff_put_vp8_epel4_v6_mmxext(uint8_t *dst, int dststride,
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41 uint8_t *src, int srcstride,
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42 int height, int mx, int my);
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43
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44 extern void ff_put_vp8_epel8_h4_sse2 (uint8_t *dst, int dststride,
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45 uint8_t *src, int srcstride,
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46 int height, int mx, int my);
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47 extern void ff_put_vp8_epel8_h6_sse2 (uint8_t *dst, int dststride,
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48 uint8_t *src, int srcstride,
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49 int height, int mx, int my);
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50 extern void ff_put_vp8_epel8_v4_sse2 (uint8_t *dst, int dststride,
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51 uint8_t *src, int srcstride,
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52 int height, int mx, int my);
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53 extern void ff_put_vp8_epel8_v6_sse2 (uint8_t *dst, int dststride,
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54 uint8_t *src, int srcstride,
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55 int height, int mx, int my);
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56
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57 extern void ff_put_vp8_epel4_h4_ssse3 (uint8_t *dst, int dststride,
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58 uint8_t *src, int srcstride,
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59 int height, int mx, int my);
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60 extern void ff_put_vp8_epel4_h6_ssse3 (uint8_t *dst, int dststride,
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61 uint8_t *src, int srcstride,
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62 int height, int mx, int my);
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63 extern void ff_put_vp8_epel4_v4_ssse3 (uint8_t *dst, int dststride,
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64 uint8_t *src, int srcstride,
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65 int height, int mx, int my);
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66 extern void ff_put_vp8_epel4_v6_ssse3 (uint8_t *dst, int dststride,
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67 uint8_t *src, int srcstride,
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68 int height, int mx, int my);
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69 extern void ff_put_vp8_epel8_h4_ssse3 (uint8_t *dst, int dststride,
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70 uint8_t *src, int srcstride,
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71 int height, int mx, int my);
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72 extern void ff_put_vp8_epel8_h6_ssse3 (uint8_t *dst, int dststride,
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73 uint8_t *src, int srcstride,
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74 int height, int mx, int my);
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75 extern void ff_put_vp8_epel8_v4_ssse3 (uint8_t *dst, int dststride,
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76 uint8_t *src, int srcstride,
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77 int height, int mx, int my);
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78 extern void ff_put_vp8_epel8_v6_ssse3 (uint8_t *dst, int dststride,
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79 uint8_t *src, int srcstride,
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80 int height, int mx, int my);
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81
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82 extern void ff_put_vp8_bilinear4_h_mmxext(uint8_t *dst, int dststride,
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83 uint8_t *src, int srcstride,
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84 int height, int mx, int my);
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85 extern void ff_put_vp8_bilinear8_h_sse2 (uint8_t *dst, int dststride,
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86 uint8_t *src, int srcstride,
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87 int height, int mx, int my);
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88 extern void ff_put_vp8_bilinear4_h_ssse3 (uint8_t *dst, int dststride,
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89 uint8_t *src, int srcstride,
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90 int height, int mx, int my);
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91 extern void ff_put_vp8_bilinear8_h_ssse3 (uint8_t *dst, int dststride,
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92 uint8_t *src, int srcstride,
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93 int height, int mx, int my);
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94
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95 extern void ff_put_vp8_bilinear4_v_mmxext(uint8_t *dst, int dststride,
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96 uint8_t *src, int srcstride,
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97 int height, int mx, int my);
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98 extern void ff_put_vp8_bilinear8_v_sse2 (uint8_t *dst, int dststride,
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99 uint8_t *src, int srcstride,
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100 int height, int mx, int my);
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101 extern void ff_put_vp8_bilinear4_v_ssse3 (uint8_t *dst, int dststride,
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102 uint8_t *src, int srcstride,
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103 int height, int mx, int my);
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104 extern void ff_put_vp8_bilinear8_v_ssse3 (uint8_t *dst, int dststride,
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105 uint8_t *src, int srcstride,
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106 int height, int mx, int my);
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107
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108
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109 extern void ff_put_vp8_pixels8_mmx (uint8_t *dst, int dststride,
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110 uint8_t *src, int srcstride,
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111 int height, int mx, int my);
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112 extern void ff_put_vp8_pixels16_mmx(uint8_t *dst, int dststride,
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113 uint8_t *src, int srcstride,
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114 int height, int mx, int my);
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115 extern void ff_put_vp8_pixels16_sse(uint8_t *dst, int dststride,
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116 uint8_t *src, int srcstride,
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117 int height, int mx, int my);
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118
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119 #define TAP_W16(OPT, FILTERTYPE, TAPTYPE) \
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120 static void ff_put_vp8_ ## FILTERTYPE ## 16_ ## TAPTYPE ## _ ## OPT( \
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121 uint8_t *dst, int dststride, uint8_t *src, \
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122 int srcstride, int height, int mx, int my) \
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123 { \
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124 ff_put_vp8_ ## FILTERTYPE ## 8_ ## TAPTYPE ## _ ## OPT( \
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125 dst, dststride, src, srcstride, height, mx, my); \
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126 ff_put_vp8_ ## FILTERTYPE ## 8_ ## TAPTYPE ## _ ## OPT( \
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127 dst + 8, dststride, src + 8, srcstride, height, mx, my); \
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128 }
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129 #define TAP_W8(OPT, FILTERTYPE, TAPTYPE) \
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130 static void ff_put_vp8_ ## FILTERTYPE ## 8_ ## TAPTYPE ## _ ## OPT( \
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131 uint8_t *dst, int dststride, uint8_t *src, \
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132 int srcstride, int height, int mx, int my) \
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133 { \
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134 ff_put_vp8_ ## FILTERTYPE ## 4_ ## TAPTYPE ## _ ## OPT( \
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135 dst, dststride, src, srcstride, height, mx, my); \
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136 ff_put_vp8_ ## FILTERTYPE ## 4_ ## TAPTYPE ## _ ## OPT( \
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137 dst + 4, dststride, src + 4, srcstride, height, mx, my); \
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138 }
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139
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140 TAP_W8 (mmxext, epel, h4)
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141 TAP_W8 (mmxext, epel, h6)
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142 TAP_W16(mmxext, epel, h6)
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143 TAP_W8 (mmxext, epel, v4)
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144 TAP_W8 (mmxext, epel, v6)
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145 TAP_W16(mmxext, epel, v6)
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146 TAP_W8 (mmxext, bilinear, h)
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147 TAP_W16(mmxext, bilinear, h)
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148 TAP_W8 (mmxext, bilinear, v)
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149 TAP_W16(mmxext, bilinear, v)
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150
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151 TAP_W16(sse2, epel, h6)
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152 TAP_W16(sse2, epel, v6)
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153 TAP_W16(sse2, bilinear, h)
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154 TAP_W16(sse2, bilinear, v)
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155
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156 TAP_W16(ssse3, epel, h6)
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157 TAP_W16(ssse3, epel, v6)
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158 TAP_W16(ssse3, bilinear, h)
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159 TAP_W16(ssse3, bilinear, v)
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160
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161 #define HVTAP(OPT, ALIGN, TAPNUMX, TAPNUMY, SIZE, MAXHEIGHT) \
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162 static void ff_put_vp8_epel ## SIZE ## _h ## TAPNUMX ## v ## TAPNUMY ## _ ## OPT( \
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163 uint8_t *dst, int dststride, uint8_t *src, \
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164 int srcstride, int height, int mx, int my) \
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165 { \
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166 DECLARE_ALIGNED(ALIGN, uint8_t, tmp)[SIZE * (MAXHEIGHT + TAPNUMY - 1)]; \
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167 uint8_t *tmpptr = tmp + SIZE * (TAPNUMY / 2 - 1); \
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168 src -= srcstride * (TAPNUMY / 2 - 1); \
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169 ff_put_vp8_epel ## SIZE ## _h ## TAPNUMX ## _ ## OPT( \
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170 tmp, SIZE, src, srcstride, height + TAPNUMY - 1, mx, my); \
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171 ff_put_vp8_epel ## SIZE ## _v ## TAPNUMY ## _ ## OPT( \
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172 dst, dststride, tmpptr, SIZE, height, mx, my); \
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173 }
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174
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175 #define HVTAPMMX(x, y) \
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176 HVTAP(mmxext, 8, x, y, 4, 8) \
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177 HVTAP(mmxext, 8, x, y, 8, 16)
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178
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179 HVTAPMMX(4, 4)
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180 HVTAPMMX(4, 6)
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181 HVTAPMMX(6, 4)
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182 HVTAPMMX(6, 6)
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183 HVTAP(mmxext, 8, 6, 6, 16, 16)
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184
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185 #define HVTAPSSE2(x, y, w) \
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186 HVTAP(sse2, 16, x, y, w, 16) \
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187 HVTAP(ssse3, 16, x, y, w, 16)
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188
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189 HVTAPSSE2(4, 4, 8)
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190 HVTAPSSE2(4, 6, 8)
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191 HVTAPSSE2(6, 4, 8)
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192 HVTAPSSE2(6, 6, 8)
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193 HVTAPSSE2(6, 6, 16)
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194
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195 HVTAP(ssse3, 16, 4, 4, 4, 8)
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196 HVTAP(ssse3, 16, 4, 6, 4, 8)
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197 HVTAP(ssse3, 16, 6, 4, 4, 8)
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198 HVTAP(ssse3, 16, 6, 6, 4, 8)
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199
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200 #define HVBILIN(OPT, ALIGN, SIZE, MAXHEIGHT) \
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201 static void ff_put_vp8_bilinear ## SIZE ## _hv_ ## OPT( \
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202 uint8_t *dst, int dststride, uint8_t *src, \
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203 int srcstride, int height, int mx, int my) \
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204 { \
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205 DECLARE_ALIGNED(ALIGN, uint8_t, tmp)[SIZE * (MAXHEIGHT + 2)]; \
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206 ff_put_vp8_bilinear ## SIZE ## _h_ ## OPT( \
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207 tmp, SIZE, src, srcstride, height + 1, mx, my); \
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208 ff_put_vp8_bilinear ## SIZE ## _v_ ## OPT( \
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209 dst, dststride, tmp, SIZE, height, mx, my); \
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210 }
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211
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212 HVBILIN(mmxext, 8, 4, 8)
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213 HVBILIN(mmxext, 8, 8, 16)
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214 HVBILIN(mmxext, 8, 16, 16)
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215 HVBILIN(sse2, 8, 8, 16)
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216 HVBILIN(sse2, 8, 16, 16)
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217 HVBILIN(ssse3, 8, 4, 8)
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218 HVBILIN(ssse3, 8, 8, 16)
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219 HVBILIN(ssse3, 8, 16, 16)
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220
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221 extern void ff_vp8_idct_dc_add_mmx(uint8_t *dst, DCTELEM block[16], int stride);
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222 extern void ff_vp8_idct_dc_add_sse4(uint8_t *dst, DCTELEM block[16], int stride);
12241
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223 extern void ff_vp8_idct_dc_add4y_mmx(uint8_t *dst, DCTELEM block[4][16], int stride);
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224 extern void ff_vp8_idct_dc_add4y_sse2(uint8_t *dst, DCTELEM block[4][16], int stride);
c7f6ddcc5c01 VP8: optimize DC-only chroma case in the same way as luma.
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225 extern void ff_vp8_idct_dc_add4uv_mmx(uint8_t *dst, DCTELEM block[2][16], int stride);
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226 extern void ff_vp8_luma_dc_wht_mmx(DCTELEM block[4][4][16], DCTELEM dc[16]);
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2d15f62f4f8a VP8: move zeroing of luma DC block into the WHT
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227 extern void ff_vp8_luma_dc_wht_sse(DCTELEM block[4][4][16], DCTELEM dc[16]);
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228 extern void ff_vp8_idct_add_mmx(uint8_t *dst, DCTELEM block[16], int stride);
12235
e08d65897115 VP8: clear DCT blocks in iDCT instead of using clear_blocks.
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229 extern void ff_vp8_idct_add_sse(uint8_t *dst, DCTELEM block[16], int stride);
12086
d780ae746855 Simple H/V loopfilter for VP8 in MMX, MMX2 and SSE2 (yay for yasm macros).
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230
12210
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231 #define DECLARE_LOOP_FILTER(NAME)\
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232 extern void ff_vp8_v_loop_filter_simple_ ## NAME(uint8_t *dst, int stride, int flim);\
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233 extern void ff_vp8_h_loop_filter_simple_ ## NAME(uint8_t *dst, int stride, int flim);\
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234 extern void ff_vp8_v_loop_filter16y_inner_ ## NAME (uint8_t *dst, int stride,\
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235 int e, int i, int hvt);\
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236 extern void ff_vp8_h_loop_filter16y_inner_ ## NAME (uint8_t *dst, int stride,\
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237 int e, int i, int hvt);\
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238 extern void ff_vp8_v_loop_filter8uv_inner_ ## NAME (uint8_t *dstU, uint8_t *dstV,\
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239 int s, int e, int i, int hvt);\
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240 extern void ff_vp8_h_loop_filter8uv_inner_ ## NAME (uint8_t *dstU, uint8_t *dstV,\
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241 int s, int e, int i, int hvt);\
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242 extern void ff_vp8_v_loop_filter16y_mbedge_ ## NAME(uint8_t *dst, int stride,\
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243 int e, int i, int hvt);\
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244 extern void ff_vp8_h_loop_filter16y_mbedge_ ## NAME(uint8_t *dst, int stride,\
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245 int e, int i, int hvt);\
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246 extern void ff_vp8_v_loop_filter8uv_mbedge_ ## NAME(uint8_t *dstU, uint8_t *dstV,\
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247 int s, int e, int i, int hvt);\
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248 extern void ff_vp8_h_loop_filter8uv_mbedge_ ## NAME(uint8_t *dstU, uint8_t *dstV,\
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249 int s, int e, int i, int hvt);
12204
563339ea87aa Chroma (width=8) inner loopfilter MMX/MMX2/SSE2 for VP8 decoder.
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250
12210
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251 DECLARE_LOOP_FILTER(mmx)
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252 DECLARE_LOOP_FILTER(mmxext)
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253 DECLARE_LOOP_FILTER(sse2)
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254 DECLARE_LOOP_FILTER(ssse3)
12227
d07e6037846d Use pextrw for SSE4 mbedge filter result writing, speedup 5-10cycles on
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255 DECLARE_LOOP_FILTER(sse4)
12205
d38e8565ba05 VP8 MBedge loopfilter MMX/MMX2/SSE2 functions for both luma (width=16)
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256
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257 #endif
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258
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259 #define VP8_LUMA_MC_FUNC(IDX, SIZE, OPT) \
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260 c->put_vp8_epel_pixels_tab[IDX][0][2] = ff_put_vp8_epel ## SIZE ## _h6_ ## OPT; \
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261 c->put_vp8_epel_pixels_tab[IDX][2][0] = ff_put_vp8_epel ## SIZE ## _v6_ ## OPT; \
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262 c->put_vp8_epel_pixels_tab[IDX][2][2] = ff_put_vp8_epel ## SIZE ## _h6v6_ ## OPT
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263
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264 #define VP8_MC_FUNC(IDX, SIZE, OPT) \
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265 c->put_vp8_epel_pixels_tab[IDX][0][1] = ff_put_vp8_epel ## SIZE ## _h4_ ## OPT; \
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266 c->put_vp8_epel_pixels_tab[IDX][1][0] = ff_put_vp8_epel ## SIZE ## _v4_ ## OPT; \
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
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267 c->put_vp8_epel_pixels_tab[IDX][1][1] = ff_put_vp8_epel ## SIZE ## _h4v4_ ## OPT; \
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
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268 c->put_vp8_epel_pixels_tab[IDX][1][2] = ff_put_vp8_epel ## SIZE ## _h6v4_ ## OPT; \
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
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269 c->put_vp8_epel_pixels_tab[IDX][2][1] = ff_put_vp8_epel ## SIZE ## _h4v6_ ## OPT; \
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diff changeset
270 VP8_LUMA_MC_FUNC(IDX, SIZE, OPT)
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
271
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
272 #define VP8_BILINEAR_MC_FUNC(IDX, SIZE, OPT) \
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
273 c->put_vp8_bilinear_pixels_tab[IDX][0][1] = ff_put_vp8_bilinear ## SIZE ## _h_ ## OPT; \
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
274 c->put_vp8_bilinear_pixels_tab[IDX][0][2] = ff_put_vp8_bilinear ## SIZE ## _h_ ## OPT; \
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
275 c->put_vp8_bilinear_pixels_tab[IDX][1][0] = ff_put_vp8_bilinear ## SIZE ## _v_ ## OPT; \
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
276 c->put_vp8_bilinear_pixels_tab[IDX][1][1] = ff_put_vp8_bilinear ## SIZE ## _hv_ ## OPT; \
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
277 c->put_vp8_bilinear_pixels_tab[IDX][1][2] = ff_put_vp8_bilinear ## SIZE ## _hv_ ## OPT; \
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
278 c->put_vp8_bilinear_pixels_tab[IDX][2][0] = ff_put_vp8_bilinear ## SIZE ## _v_ ## OPT; \
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
279 c->put_vp8_bilinear_pixels_tab[IDX][2][1] = ff_put_vp8_bilinear ## SIZE ## _hv_ ## OPT; \
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
280 c->put_vp8_bilinear_pixels_tab[IDX][2][2] = ff_put_vp8_bilinear ## SIZE ## _hv_ ## OPT
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
281
11975
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
diff changeset
282
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
diff changeset
283 av_cold void ff_vp8dsp_init_x86(VP8DSPContext* c)
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
diff changeset
284 {
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
diff changeset
285 mm_flags = mm_support();
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
diff changeset
286
11976
19374f2992bf Fix build without yasm
conrad
parents: 11975
diff changeset
287 #if HAVE_YASM
11975
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
diff changeset
288 if (mm_flags & FF_MM_MMX) {
12241
c7f6ddcc5c01 VP8: optimize DC-only chroma case in the same way as luma.
darkshikari
parents: 12238
diff changeset
289 c->vp8_idct_dc_add = ff_vp8_idct_dc_add_mmx;
c7f6ddcc5c01 VP8: optimize DC-only chroma case in the same way as luma.
darkshikari
parents: 12238
diff changeset
290 c->vp8_idct_dc_add4y = ff_vp8_idct_dc_add4y_mmx;
c7f6ddcc5c01 VP8: optimize DC-only chroma case in the same way as luma.
darkshikari
parents: 12238
diff changeset
291 c->vp8_idct_dc_add4uv = ff_vp8_idct_dc_add4uv_mmx;
c7f6ddcc5c01 VP8: optimize DC-only chroma case in the same way as luma.
darkshikari
parents: 12238
diff changeset
292 c->vp8_idct_add = ff_vp8_idct_add_mmx;
c7f6ddcc5c01 VP8: optimize DC-only chroma case in the same way as luma.
darkshikari
parents: 12238
diff changeset
293 c->vp8_luma_dc_wht = ff_vp8_luma_dc_wht_mmx;
11992
da388061b227 Add x86 asm functions for VP8 put_pixels
darkshikari
parents: 11991
diff changeset
294 c->put_vp8_epel_pixels_tab[0][0][0] =
da388061b227 Add x86 asm functions for VP8 put_pixels
darkshikari
parents: 11991
diff changeset
295 c->put_vp8_bilinear_pixels_tab[0][0][0] = ff_put_vp8_pixels16_mmx;
da388061b227 Add x86 asm functions for VP8 put_pixels
darkshikari
parents: 11991
diff changeset
296 c->put_vp8_epel_pixels_tab[1][0][0] =
da388061b227 Add x86 asm functions for VP8 put_pixels
darkshikari
parents: 11991
diff changeset
297 c->put_vp8_bilinear_pixels_tab[1][0][0] = ff_put_vp8_pixels8_mmx;
12086
d780ae746855 Simple H/V loopfilter for VP8 in MMX, MMX2 and SSE2 (yay for yasm macros).
rbultje
parents: 12082
diff changeset
298
d780ae746855 Simple H/V loopfilter for VP8 in MMX, MMX2 and SSE2 (yay for yasm macros).
rbultje
parents: 12082
diff changeset
299 c->vp8_v_loop_filter_simple = ff_vp8_v_loop_filter_simple_mmx;
d780ae746855 Simple H/V loopfilter for VP8 in MMX, MMX2 and SSE2 (yay for yasm macros).
rbultje
parents: 12082
diff changeset
300 c->vp8_h_loop_filter_simple = ff_vp8_h_loop_filter_simple_mmx;
12168
b246b214c2e9 VP8 H/V inner loopfilter MMX/MMXEXT/SSE2 optimizations.
rbultje
parents: 12086
diff changeset
301
12194
80b142c2e9f7 Change function prototypes for width=8 inner and mbedge loopfilter functions
rbultje
parents: 12168
diff changeset
302 c->vp8_v_loop_filter16y_inner = ff_vp8_v_loop_filter16y_inner_mmx;
80b142c2e9f7 Change function prototypes for width=8 inner and mbedge loopfilter functions
rbultje
parents: 12168
diff changeset
303 c->vp8_h_loop_filter16y_inner = ff_vp8_h_loop_filter16y_inner_mmx;
12204
563339ea87aa Chroma (width=8) inner loopfilter MMX/MMX2/SSE2 for VP8 decoder.
rbultje
parents: 12198
diff changeset
304 c->vp8_v_loop_filter8uv_inner = ff_vp8_v_loop_filter8uv_inner_mmx;
563339ea87aa Chroma (width=8) inner loopfilter MMX/MMX2/SSE2 for VP8 decoder.
rbultje
parents: 12198
diff changeset
305 c->vp8_h_loop_filter8uv_inner = ff_vp8_h_loop_filter8uv_inner_mmx;
12205
d38e8565ba05 VP8 MBedge loopfilter MMX/MMX2/SSE2 functions for both luma (width=16)
rbultje
parents: 12204
diff changeset
306
d38e8565ba05 VP8 MBedge loopfilter MMX/MMX2/SSE2 functions for both luma (width=16)
rbultje
parents: 12204
diff changeset
307 c->vp8_v_loop_filter16y = ff_vp8_v_loop_filter16y_mbedge_mmx;
d38e8565ba05 VP8 MBedge loopfilter MMX/MMX2/SSE2 functions for both luma (width=16)
rbultje
parents: 12204
diff changeset
308 c->vp8_h_loop_filter16y = ff_vp8_h_loop_filter16y_mbedge_mmx;
d38e8565ba05 VP8 MBedge loopfilter MMX/MMX2/SSE2 functions for both luma (width=16)
rbultje
parents: 12204
diff changeset
309 c->vp8_v_loop_filter8uv = ff_vp8_v_loop_filter8uv_mbedge_mmx;
d38e8565ba05 VP8 MBedge loopfilter MMX/MMX2/SSE2 functions for both luma (width=16)
rbultje
parents: 12204
diff changeset
310 c->vp8_h_loop_filter8uv = ff_vp8_h_loop_filter8uv_mbedge_mmx;
11975
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
diff changeset
311 }
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
diff changeset
312
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
diff changeset
313 /* note that 4-tap width=16 functions are missing because w=16
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
diff changeset
314 * is only used for luma, and luma is always a copy or sixtap. */
11993
c15e87b9767b Change MMXEXT to MMX2, MMXEXT is deprecated
bcoudurier
parents: 11992
diff changeset
315 if (mm_flags & FF_MM_MMX2) {
11991
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
316 VP8_LUMA_MC_FUNC(0, 16, mmxext);
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
317 VP8_MC_FUNC(1, 8, mmxext);
12042
dc4feabd4dab Fix 100L in vp8dsp asm init
darkshikari
parents: 12013
diff changeset
318 VP8_MC_FUNC(2, 4, mmxext);
11991
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
319 VP8_BILINEAR_MC_FUNC(0, 16, mmxext);
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
320 VP8_BILINEAR_MC_FUNC(1, 8, mmxext);
12042
dc4feabd4dab Fix 100L in vp8dsp asm init
darkshikari
parents: 12013
diff changeset
321 VP8_BILINEAR_MC_FUNC(2, 4, mmxext);
12086
d780ae746855 Simple H/V loopfilter for VP8 in MMX, MMX2 and SSE2 (yay for yasm macros).
rbultje
parents: 12082
diff changeset
322
d780ae746855 Simple H/V loopfilter for VP8 in MMX, MMX2 and SSE2 (yay for yasm macros).
rbultje
parents: 12082
diff changeset
323 c->vp8_v_loop_filter_simple = ff_vp8_v_loop_filter_simple_mmxext;
d780ae746855 Simple H/V loopfilter for VP8 in MMX, MMX2 and SSE2 (yay for yasm macros).
rbultje
parents: 12082
diff changeset
324 c->vp8_h_loop_filter_simple = ff_vp8_h_loop_filter_simple_mmxext;
12168
b246b214c2e9 VP8 H/V inner loopfilter MMX/MMXEXT/SSE2 optimizations.
rbultje
parents: 12086
diff changeset
325
12194
80b142c2e9f7 Change function prototypes for width=8 inner and mbedge loopfilter functions
rbultje
parents: 12168
diff changeset
326 c->vp8_v_loop_filter16y_inner = ff_vp8_v_loop_filter16y_inner_mmxext;
80b142c2e9f7 Change function prototypes for width=8 inner and mbedge loopfilter functions
rbultje
parents: 12168
diff changeset
327 c->vp8_h_loop_filter16y_inner = ff_vp8_h_loop_filter16y_inner_mmxext;
12204
563339ea87aa Chroma (width=8) inner loopfilter MMX/MMX2/SSE2 for VP8 decoder.
rbultje
parents: 12198
diff changeset
328 c->vp8_v_loop_filter8uv_inner = ff_vp8_v_loop_filter8uv_inner_mmxext;
563339ea87aa Chroma (width=8) inner loopfilter MMX/MMX2/SSE2 for VP8 decoder.
rbultje
parents: 12198
diff changeset
329 c->vp8_h_loop_filter8uv_inner = ff_vp8_h_loop_filter8uv_inner_mmxext;
12205
d38e8565ba05 VP8 MBedge loopfilter MMX/MMX2/SSE2 functions for both luma (width=16)
rbultje
parents: 12204
diff changeset
330
d38e8565ba05 VP8 MBedge loopfilter MMX/MMX2/SSE2 functions for both luma (width=16)
rbultje
parents: 12204
diff changeset
331 c->vp8_v_loop_filter16y = ff_vp8_v_loop_filter16y_mbedge_mmxext;
d38e8565ba05 VP8 MBedge loopfilter MMX/MMX2/SSE2 functions for both luma (width=16)
rbultje
parents: 12204
diff changeset
332 c->vp8_h_loop_filter16y = ff_vp8_h_loop_filter16y_mbedge_mmxext;
d38e8565ba05 VP8 MBedge loopfilter MMX/MMX2/SSE2 functions for both luma (width=16)
rbultje
parents: 12204
diff changeset
333 c->vp8_v_loop_filter8uv = ff_vp8_v_loop_filter8uv_mbedge_mmxext;
d38e8565ba05 VP8 MBedge loopfilter MMX/MMX2/SSE2 functions for both luma (width=16)
rbultje
parents: 12204
diff changeset
334 c->vp8_h_loop_filter8uv = ff_vp8_h_loop_filter8uv_mbedge_mmxext;
11975
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
diff changeset
335 }
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
diff changeset
336
11992
da388061b227 Add x86 asm functions for VP8 put_pixels
darkshikari
parents: 11991
diff changeset
337 if (mm_flags & FF_MM_SSE) {
12235
e08d65897115 VP8: clear DCT blocks in iDCT instead of using clear_blocks.
darkshikari
parents: 12227
diff changeset
338 c->vp8_idct_add = ff_vp8_idct_add_sse;
12340
2d15f62f4f8a VP8: move zeroing of luma DC block into the WHT
darkshikari
parents: 12334
diff changeset
339 c->vp8_luma_dc_wht = ff_vp8_luma_dc_wht_sse;
11992
da388061b227 Add x86 asm functions for VP8 put_pixels
darkshikari
parents: 11991
diff changeset
340 c->put_vp8_epel_pixels_tab[0][0][0] =
da388061b227 Add x86 asm functions for VP8 put_pixels
darkshikari
parents: 11991
diff changeset
341 c->put_vp8_bilinear_pixels_tab[0][0][0] = ff_put_vp8_pixels16_sse;
da388061b227 Add x86 asm functions for VP8 put_pixels
darkshikari
parents: 11991
diff changeset
342 }
da388061b227 Add x86 asm functions for VP8 put_pixels
darkshikari
parents: 11991
diff changeset
343
12197
fbf4d5b1b664 Remove FF_MM_SSE2/3 flags for CPUs where this is generally not faster than
rbultje
parents: 12196
diff changeset
344 if (mm_flags & (FF_MM_SSE2|FF_MM_SSE2SLOW)) {
11991
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
345 VP8_LUMA_MC_FUNC(0, 16, sse2);
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
346 VP8_MC_FUNC(1, 8, sse2);
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
347 VP8_BILINEAR_MC_FUNC(0, 16, sse2);
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
348 VP8_BILINEAR_MC_FUNC(1, 8, sse2);
12086
d780ae746855 Simple H/V loopfilter for VP8 in MMX, MMX2 and SSE2 (yay for yasm macros).
rbultje
parents: 12082
diff changeset
349
d780ae746855 Simple H/V loopfilter for VP8 in MMX, MMX2 and SSE2 (yay for yasm macros).
rbultje
parents: 12082
diff changeset
350 c->vp8_v_loop_filter_simple = ff_vp8_v_loop_filter_simple_sse2;
12168
b246b214c2e9 VP8 H/V inner loopfilter MMX/MMXEXT/SSE2 optimizations.
rbultje
parents: 12086
diff changeset
351
12194
80b142c2e9f7 Change function prototypes for width=8 inner and mbedge loopfilter functions
rbultje
parents: 12168
diff changeset
352 c->vp8_v_loop_filter16y_inner = ff_vp8_v_loop_filter16y_inner_sse2;
12204
563339ea87aa Chroma (width=8) inner loopfilter MMX/MMX2/SSE2 for VP8 decoder.
rbultje
parents: 12198
diff changeset
353 c->vp8_v_loop_filter8uv_inner = ff_vp8_v_loop_filter8uv_inner_sse2;
12205
d38e8565ba05 VP8 MBedge loopfilter MMX/MMX2/SSE2 functions for both luma (width=16)
rbultje
parents: 12204
diff changeset
354
12214
657d353cd515 Fix and enable horizontal >=SSE2 mbedge loopfilter.
rbultje
parents: 12210
diff changeset
355 c->vp8_v_loop_filter16y = ff_vp8_v_loop_filter16y_mbedge_sse2;
657d353cd515 Fix and enable horizontal >=SSE2 mbedge loopfilter.
rbultje
parents: 12210
diff changeset
356 c->vp8_v_loop_filter8uv = ff_vp8_v_loop_filter8uv_mbedge_sse2;
12197
fbf4d5b1b664 Remove FF_MM_SSE2/3 flags for CPUs where this is generally not faster than
rbultje
parents: 12196
diff changeset
357 }
fbf4d5b1b664 Remove FF_MM_SSE2/3 flags for CPUs where this is generally not faster than
rbultje
parents: 12196
diff changeset
358
fbf4d5b1b664 Remove FF_MM_SSE2/3 flags for CPUs where this is generally not faster than
rbultje
parents: 12196
diff changeset
359 if (mm_flags & FF_MM_SSE2) {
12241
c7f6ddcc5c01 VP8: optimize DC-only chroma case in the same way as luma.
darkshikari
parents: 12238
diff changeset
360 c->vp8_idct_dc_add4y = ff_vp8_idct_dc_add4y_sse2;
12238
1a7903913e9b VP8: 30% faster idct_mb
darkshikari
parents: 12235
diff changeset
361
12334
435319d67bd8 Use word-writing instead of dword-writing (with two cached but otherwise
rbultje
parents: 12241
diff changeset
362 c->vp8_h_loop_filter_simple = ff_vp8_h_loop_filter_simple_sse2;
435319d67bd8 Use word-writing instead of dword-writing (with two cached but otherwise
rbultje
parents: 12241
diff changeset
363
12194
80b142c2e9f7 Change function prototypes for width=8 inner and mbedge loopfilter functions
rbultje
parents: 12168
diff changeset
364 c->vp8_h_loop_filter16y_inner = ff_vp8_h_loop_filter16y_inner_sse2;
12204
563339ea87aa Chroma (width=8) inner loopfilter MMX/MMX2/SSE2 for VP8 decoder.
rbultje
parents: 12198
diff changeset
365 c->vp8_h_loop_filter8uv_inner = ff_vp8_h_loop_filter8uv_inner_sse2;
12205
d38e8565ba05 VP8 MBedge loopfilter MMX/MMX2/SSE2 functions for both luma (width=16)
rbultje
parents: 12204
diff changeset
366
12214
657d353cd515 Fix and enable horizontal >=SSE2 mbedge loopfilter.
rbultje
parents: 12210
diff changeset
367 c->vp8_h_loop_filter16y = ff_vp8_h_loop_filter16y_mbedge_sse2;
657d353cd515 Fix and enable horizontal >=SSE2 mbedge loopfilter.
rbultje
parents: 12210
diff changeset
368 c->vp8_h_loop_filter8uv = ff_vp8_h_loop_filter8uv_mbedge_sse2;
11975
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
diff changeset
369 }
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
diff changeset
370
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
diff changeset
371 if (mm_flags & FF_MM_SSSE3) {
11991
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
372 VP8_LUMA_MC_FUNC(0, 16, ssse3);
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
373 VP8_MC_FUNC(1, 8, ssse3);
12054
b8f80fe02861 SSSE3 versions of width4 VP8 6-tap MC functions
darkshikari
parents: 12042
diff changeset
374 VP8_MC_FUNC(2, 4, ssse3);
11991
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
375 VP8_BILINEAR_MC_FUNC(0, 16, ssse3);
a6d24fc1deb7 Add MMX, SSE2, SSSE3 asm for VP8 bilinear MC
darkshikari
parents: 11976
diff changeset
376 VP8_BILINEAR_MC_FUNC(1, 8, ssse3);
12082
8527154f6e81 SSSE3 versions of vp8 width4 bilinear MC functions
darkshikari
parents: 12054
diff changeset
377 VP8_BILINEAR_MC_FUNC(2, 4, ssse3);
12210
baf13deed97e Various VP8 x86 deblocking speedups
darkshikari
parents: 12209
diff changeset
378
baf13deed97e Various VP8 x86 deblocking speedups
darkshikari
parents: 12209
diff changeset
379 c->vp8_v_loop_filter_simple = ff_vp8_v_loop_filter_simple_ssse3;
baf13deed97e Various VP8 x86 deblocking speedups
darkshikari
parents: 12209
diff changeset
380 c->vp8_h_loop_filter_simple = ff_vp8_h_loop_filter_simple_ssse3;
baf13deed97e Various VP8 x86 deblocking speedups
darkshikari
parents: 12209
diff changeset
381
baf13deed97e Various VP8 x86 deblocking speedups
darkshikari
parents: 12209
diff changeset
382 c->vp8_v_loop_filter16y_inner = ff_vp8_v_loop_filter16y_inner_ssse3;
baf13deed97e Various VP8 x86 deblocking speedups
darkshikari
parents: 12209
diff changeset
383 c->vp8_h_loop_filter16y_inner = ff_vp8_h_loop_filter16y_inner_ssse3;
baf13deed97e Various VP8 x86 deblocking speedups
darkshikari
parents: 12209
diff changeset
384 c->vp8_v_loop_filter8uv_inner = ff_vp8_v_loop_filter8uv_inner_ssse3;
baf13deed97e Various VP8 x86 deblocking speedups
darkshikari
parents: 12209
diff changeset
385 c->vp8_h_loop_filter8uv_inner = ff_vp8_h_loop_filter8uv_inner_ssse3;
baf13deed97e Various VP8 x86 deblocking speedups
darkshikari
parents: 12209
diff changeset
386
baf13deed97e Various VP8 x86 deblocking speedups
darkshikari
parents: 12209
diff changeset
387 c->vp8_v_loop_filter16y = ff_vp8_v_loop_filter16y_mbedge_ssse3;
12214
657d353cd515 Fix and enable horizontal >=SSE2 mbedge loopfilter.
rbultje
parents: 12210
diff changeset
388 c->vp8_h_loop_filter16y = ff_vp8_h_loop_filter16y_mbedge_ssse3;
12210
baf13deed97e Various VP8 x86 deblocking speedups
darkshikari
parents: 12209
diff changeset
389 c->vp8_v_loop_filter8uv = ff_vp8_v_loop_filter8uv_mbedge_ssse3;
12214
657d353cd515 Fix and enable horizontal >=SSE2 mbedge loopfilter.
rbultje
parents: 12210
diff changeset
390 c->vp8_h_loop_filter8uv = ff_vp8_h_loop_filter8uv_mbedge_ssse3;
11975
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
diff changeset
391 }
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
diff changeset
392
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
diff changeset
393 if (mm_flags & FF_MM_SSE4) {
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
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394 c->vp8_idct_dc_add = ff_vp8_idct_dc_add_sse4;
12227
d07e6037846d Use pextrw for SSE4 mbedge filter result writing, speedup 5-10cycles on
rbultje
parents: 12214
diff changeset
395
12334
435319d67bd8 Use word-writing instead of dword-writing (with two cached but otherwise
rbultje
parents: 12241
diff changeset
396 c->vp8_h_loop_filter_simple = ff_vp8_h_loop_filter_simple_sse4;
12227
d07e6037846d Use pextrw for SSE4 mbedge filter result writing, speedup 5-10cycles on
rbultje
parents: 12214
diff changeset
397 c->vp8_h_loop_filter16y = ff_vp8_h_loop_filter16y_mbedge_sse4;
d07e6037846d Use pextrw for SSE4 mbedge filter result writing, speedup 5-10cycles on
rbultje
parents: 12214
diff changeset
398 c->vp8_h_loop_filter8uv = ff_vp8_h_loop_filter8uv_mbedge_sse4;
11975
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
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399 }
11976
19374f2992bf Fix build without yasm
conrad
parents: 11975
diff changeset
400 #endif
11975
c3afb5be0d9b First shot at VP8 optimizations:
rbultje
parents:
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401 }