annotate alpha/dsputil_alpha.c @ 744:2f7da29ede37 libavcodec

Move Alpha optimized IDCT to own file. Based on a patch by Mns Rullgrd <mru@users.sourceforge.net>. I've left out the idctCol2 part, because W4 has recently been decreed to be 16383, and also I doubt it will give a noticeable speedup.
author mellum
date Fri, 11 Oct 2002 23:01:16 +0000
parents 107a56aa74f5
children 3c6df37177dd
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1 /*
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2 * Alpha optimized DSP utils
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3 * Copyright (c) 2002 Falk Hueffner <falk@debian.org>
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4 *
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5 * This library is free software; you can redistribute it and/or
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6 * modify it under the terms of the GNU Lesser General Public
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7 * License as published by the Free Software Foundation; either
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8 * version 2 of the License, or (at your option) any later version.
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9 *
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10 * This library is distributed in the hope that it will be useful,
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11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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13 * Lesser General Public License for more details.
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14 *
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15 * You should have received a copy of the GNU Lesser General Public
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16 * License along with this library; if not, write to the Free Software
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17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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18 */
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19
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20 #include "asm.h"
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21 #include "../dsputil.h"
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22
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23 void put_pixels_axp_asm(uint8_t *block, const uint8_t *pixels,
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24 int line_size, int h);
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25 void put_pixels_clamped_mvi_asm(const DCTELEM *block, uint8_t *pixels,
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26 int line_size);
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27 void add_pixels_clamped_mvi_asm(const DCTELEM *block, uint8_t *pixels,
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28 int line_size);
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29
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30 void get_pixels_mvi(DCTELEM *restrict block,
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31 const uint8_t *restrict pixels, int line_size);
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32 void diff_pixels_mvi(DCTELEM *block, const uint8_t *s1, const uint8_t *s2,
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33 int stride);
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34 int pix_abs8x8_mvi(uint8_t *pix1, uint8_t *pix2, int line_size);
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35 int pix_abs16x16_mvi_asm(uint8_t *pix1, uint8_t *pix2, int line_size);
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36 int pix_abs16x16_x2_mvi(uint8_t *pix1, uint8_t *pix2, int line_size);
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37 int pix_abs16x16_y2_mvi(uint8_t *pix1, uint8_t *pix2, int line_size);
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38 int pix_abs16x16_xy2_mvi(uint8_t *pix1, uint8_t *pix2, int line_size);
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39
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40 #if 0
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41 /* These functions were the base for the optimized assembler routines,
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42 and remain here for documentation purposes. */
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43 static void put_pixels_clamped_mvi(const DCTELEM *block, uint8_t *pixels,
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44 int line_size)
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45 {
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46 int i = 8;
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47 uint64_t clampmask = zap(-1, 0xaa); /* 0x00ff00ff00ff00ff */
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48
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49 ASM_ACCEPT_MVI;
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50
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51 do {
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52 uint64_t shorts0, shorts1;
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53
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54 shorts0 = ldq(block);
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55 shorts0 = maxsw4(shorts0, 0);
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56 shorts0 = minsw4(shorts0, clampmask);
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57 stl(pkwb(shorts0), pixels);
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58
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59 shorts1 = ldq(block + 4);
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60 shorts1 = maxsw4(shorts1, 0);
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61 shorts1 = minsw4(shorts1, clampmask);
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62 stl(pkwb(shorts1), pixels + 4);
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63
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64 pixels += line_size;
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65 block += 8;
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66 } while (--i);
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67 }
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68
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69 void add_pixels_clamped_mvi(const DCTELEM *block, uint8_t *pixels,
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70 int line_size)
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71 {
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72 int h = 8;
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73 /* Keep this function a leaf function by generating the constants
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74 manually (mainly for the hack value ;-). */
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75 uint64_t clampmask = zap(-1, 0xaa); /* 0x00ff00ff00ff00ff */
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76 uint64_t signmask = zap(-1, 0x33);
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77 signmask ^= signmask >> 1; /* 0x8000800080008000 */
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78
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79 ASM_ACCEPT_MVI;
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80
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81 do {
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82 uint64_t shorts0, pix0, signs0;
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83 uint64_t shorts1, pix1, signs1;
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84
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85 shorts0 = ldq(block);
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86 shorts1 = ldq(block + 4);
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87
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88 pix0 = unpkbw(ldl(pixels));
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89 /* Signed subword add (MMX paddw). */
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90 signs0 = shorts0 & signmask;
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91 shorts0 &= ~signmask;
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92 shorts0 += pix0;
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93 shorts0 ^= signs0;
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94 /* Clamp. */
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95 shorts0 = maxsw4(shorts0, 0);
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96 shorts0 = minsw4(shorts0, clampmask);
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97
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98 /* Next 4. */
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99 pix1 = unpkbw(ldl(pixels + 4));
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100 signs1 = shorts1 & signmask;
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101 shorts1 &= ~signmask;
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102 shorts1 += pix1;
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103 shorts1 ^= signs1;
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104 shorts1 = maxsw4(shorts1, 0);
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105 shorts1 = minsw4(shorts1, clampmask);
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106
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107 stl(pkwb(shorts0), pixels);
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108 stl(pkwb(shorts1), pixels + 4);
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109
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110 pixels += line_size;
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111 block += 8;
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112 } while (--h);
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113 }
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114 #endif
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115
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116 static void clear_blocks_axp(DCTELEM *blocks) {
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117 uint64_t *p = (uint64_t *) blocks;
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118 int n = sizeof(DCTELEM) * 6 * 64;
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119
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120 do {
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121 p[0] = 0;
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122 p[1] = 0;
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123 p[2] = 0;
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124 p[3] = 0;
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125 p[4] = 0;
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126 p[5] = 0;
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127 p[6] = 0;
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128 p[7] = 0;
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129 p += 8;
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130 n -= 8 * 8;
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131 } while (n);
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132 }
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133
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134 static inline uint64_t avg2_no_rnd(uint64_t a, uint64_t b)
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135 {
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136 return (a & b) + (((a ^ b) & BYTE_VEC(0xfe)) >> 1);
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137 }
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138
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139 static inline uint64_t avg2(uint64_t a, uint64_t b)
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140 {
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141 return (a | b) - (((a ^ b) & BYTE_VEC(0xfe)) >> 1);
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142 }
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143
546
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diff changeset
144 #if 0
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diff changeset
145 /* The XY2 routines basically utilize this scheme, but reuse parts in
8cefba09f2e8 * Improve xy2 routines slightly
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diff changeset
146 each iteration. */
513
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diff changeset
147 static inline uint64_t avg4(uint64_t l1, uint64_t l2, uint64_t l3, uint64_t l4)
214
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148 {
513
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diff changeset
149 uint64_t r1 = ((l1 & ~BYTE_VEC(0x03)) >> 2)
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150 + ((l2 & ~BYTE_VEC(0x03)) >> 2)
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151 + ((l3 & ~BYTE_VEC(0x03)) >> 2)
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diff changeset
152 + ((l4 & ~BYTE_VEC(0x03)) >> 2);
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153 uint64_t r2 = (( (l1 & BYTE_VEC(0x03))
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154 + (l2 & BYTE_VEC(0x03))
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diff changeset
155 + (l3 & BYTE_VEC(0x03))
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diff changeset
156 + (l4 & BYTE_VEC(0x03))
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diff changeset
157 + BYTE_VEC(0x02)) >> 2) & BYTE_VEC(0x03);
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158 return r1 + r2;
214
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159 }
546
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diff changeset
160 #endif
214
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161
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diff changeset
162 #define OP(LOAD, STORE) \
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diff changeset
163 do { \
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diff changeset
164 STORE(LOAD(pixels), block); \
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165 pixels += line_size; \
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166 block += line_size; \
513
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167 } while (--h)
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168
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169 #define OP_X2(LOAD, STORE) \
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170 do { \
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171 uint64_t pix1, pix2; \
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172 \
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173 pix1 = LOAD(pixels); \
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174 pix2 = pix1 >> 8 | ((uint64_t) pixels[8] << 56); \
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175 STORE(AVG2(pix1, pix2), block); \
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176 pixels += line_size; \
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177 block += line_size; \
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178 } while (--h)
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179
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180 #define OP_Y2(LOAD, STORE) \
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181 do { \
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182 uint64_t pix = LOAD(pixels); \
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183 do { \
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184 uint64_t next_pix; \
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185 \
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186 pixels += line_size; \
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187 next_pix = LOAD(pixels); \
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188 STORE(AVG2(pix, next_pix), block); \
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189 block += line_size; \
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190 pix = next_pix; \
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191 } while (--h); \
513
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192 } while (0)
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193
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194 #define OP_XY2(LOAD, STORE) \
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195 do { \
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196 uint64_t pix1 = LOAD(pixels); \
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197 uint64_t pix2 = pix1 >> 8 | ((uint64_t) pixels[8] << 56); \
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198 uint64_t pix_l = (pix1 & BYTE_VEC(0x03)) \
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199 + (pix2 & BYTE_VEC(0x03)); \
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200 uint64_t pix_h = ((pix1 & ~BYTE_VEC(0x03)) >> 2) \
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201 + ((pix2 & ~BYTE_VEC(0x03)) >> 2); \
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202 \
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203 do { \
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204 uint64_t npix1, npix2; \
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205 uint64_t npix_l, npix_h; \
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206 uint64_t avg; \
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207 \
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diff changeset
208 pixels += line_size; \
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209 npix1 = LOAD(pixels); \
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210 npix2 = npix1 >> 8 | ((uint64_t) pixels[8] << 56); \
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211 npix_l = (npix1 & BYTE_VEC(0x03)) \
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212 + (npix2 & BYTE_VEC(0x03)); \
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213 npix_h = ((npix1 & ~BYTE_VEC(0x03)) >> 2) \
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214 + ((npix2 & ~BYTE_VEC(0x03)) >> 2); \
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215 avg = (((pix_l + npix_l + AVG4_ROUNDER) >> 2) & BYTE_VEC(0x03)) \
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216 + pix_h + npix_h; \
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217 STORE(avg, block); \
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218 \
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219 block += line_size; \
546
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220 pix_l = npix_l; \
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221 pix_h = npix_h; \
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222 } while (--h); \
513
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diff changeset
223 } while (0)
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224
670
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225 #define MAKE_OP(OPNAME, SUFF, OPKIND, STORE) \
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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226 static void OPNAME ## _pixels ## SUFF ## _axp \
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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227 (uint8_t *restrict block, const uint8_t *restrict pixels, \
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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228 int line_size, int h) \
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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229 { \
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
230 if ((size_t) pixels & 0x7) { \
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
231 OPKIND(uldq, STORE); \
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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232 } else { \
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
233 OPKIND(ldq, STORE); \
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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234 } \
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
235 } \
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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236 \
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
237 static void OPNAME ## _pixels16 ## SUFF ## _axp \
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
238 (uint8_t *restrict block, const uint8_t *restrict pixels, \
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
239 int line_size, int h) \
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
240 { \
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
241 OPNAME ## _pixels ## SUFF ## _axp(block, pixels, line_size, h); \
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
242 OPNAME ## _pixels ## SUFF ## _axp(block + 8, pixels + 8, line_size, h); \
214
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243 }
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244
548
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diff changeset
245 #define PIXOP(OPNAME, STORE) \
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diff changeset
246 MAKE_OP(OPNAME, , OP, STORE) \
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diff changeset
247 MAKE_OP(OPNAME, _x2, OP_X2, STORE) \
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diff changeset
248 MAKE_OP(OPNAME, _y2, OP_Y2, STORE) \
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diff changeset
249 MAKE_OP(OPNAME, _xy2, OP_XY2, STORE)
513
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diff changeset
250
fb670ca9f8eb Use updated motion compensation routines.
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diff changeset
251 /* Rounding primitives. */
214
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252 #define AVG2 avg2
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diff changeset
253 #define AVG4 avg4
546
8cefba09f2e8 * Improve xy2 routines slightly
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diff changeset
254 #define AVG4_ROUNDER BYTE_VEC(0x02)
214
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diff changeset
255 #define STORE(l, b) stq(l, b)
548
3f05be811b5a Remove support for variable BSIZE and INCR, as sub_pixels_* is no
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diff changeset
256 PIXOP(put, STORE);
513
fb670ca9f8eb Use updated motion compensation routines.
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diff changeset
257
fb670ca9f8eb Use updated motion compensation routines.
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diff changeset
258 #undef STORE
fb670ca9f8eb Use updated motion compensation routines.
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diff changeset
259 #define STORE(l, b) stq(AVG2(l, ldq(b)), b);
548
3f05be811b5a Remove support for variable BSIZE and INCR, as sub_pixels_* is no
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diff changeset
260 PIXOP(avg, STORE);
513
fb670ca9f8eb Use updated motion compensation routines.
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diff changeset
261
fb670ca9f8eb Use updated motion compensation routines.
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diff changeset
262 /* Not rounding primitives. */
214
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diff changeset
263 #undef AVG2
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diff changeset
264 #undef AVG4
546
8cefba09f2e8 * Improve xy2 routines slightly
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diff changeset
265 #undef AVG4_ROUNDER
214
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266 #undef STORE
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diff changeset
267 #define AVG2 avg2_no_rnd
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diff changeset
268 #define AVG4 avg4_no_rnd
546
8cefba09f2e8 * Improve xy2 routines slightly
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diff changeset
269 #define AVG4_ROUNDER BYTE_VEC(0x01)
214
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270 #define STORE(l, b) stq(l, b)
548
3f05be811b5a Remove support for variable BSIZE and INCR, as sub_pixels_* is no
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diff changeset
271 PIXOP(put_no_rnd, STORE);
214
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272
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273 #undef STORE
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274 #define STORE(l, b) stq(AVG2(l, ldq(b)), b);
548
3f05be811b5a Remove support for variable BSIZE and INCR, as sub_pixels_* is no
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diff changeset
275 PIXOP(avg_no_rnd, STORE);
214
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276
670
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diff changeset
277 void put_pixels16_axp_asm(uint8_t *block, const uint8_t *pixels,
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
278 int line_size, int h)
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
279 {
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
280 put_pixels_axp_asm(block, pixels, line_size, h);
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
281 put_pixels_axp_asm(block + 8, pixels + 8, line_size, h);
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
282 }
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
283
214
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parents:
diff changeset
284 void dsputil_init_alpha(void)
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diff changeset
285 {
670
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
286 put_pixels_tab[0][0] = put_pixels16_axp_asm;
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
287 put_pixels_tab[0][1] = put_pixels16_x2_axp;
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
288 put_pixels_tab[0][2] = put_pixels16_y2_axp;
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
289 put_pixels_tab[0][3] = put_pixels16_xy2_axp;
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
290
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
291 put_no_rnd_pixels_tab[0][0] = put_pixels16_axp_asm;
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
292 put_no_rnd_pixels_tab[0][1] = put_no_rnd_pixels16_x2_axp;
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
293 put_no_rnd_pixels_tab[0][2] = put_no_rnd_pixels16_y2_axp;
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
294 put_no_rnd_pixels_tab[0][3] = put_no_rnd_pixels16_xy2_axp;
340e3ba84119 Synthesize pixels16 functions from pixels functions.
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diff changeset
295
340e3ba84119 Synthesize pixels16 functions from pixels functions.
mellum
parents: 663
diff changeset
296 avg_pixels_tab[0][0] = avg_pixels16_axp;
340e3ba84119 Synthesize pixels16 functions from pixels functions.
mellum
parents: 663
diff changeset
297 avg_pixels_tab[0][1] = avg_pixels16_x2_axp;
340e3ba84119 Synthesize pixels16 functions from pixels functions.
mellum
parents: 663
diff changeset
298 avg_pixels_tab[0][2] = avg_pixels16_y2_axp;
340e3ba84119 Synthesize pixels16 functions from pixels functions.
mellum
parents: 663
diff changeset
299 avg_pixels_tab[0][3] = avg_pixels16_xy2_axp;
340e3ba84119 Synthesize pixels16 functions from pixels functions.
mellum
parents: 663
diff changeset
300
340e3ba84119 Synthesize pixels16 functions from pixels functions.
mellum
parents: 663
diff changeset
301 avg_no_rnd_pixels_tab[0][0] = avg_no_rnd_pixels16_axp;
340e3ba84119 Synthesize pixels16 functions from pixels functions.
mellum
parents: 663
diff changeset
302 avg_no_rnd_pixels_tab[0][1] = avg_no_rnd_pixels16_x2_axp;
340e3ba84119 Synthesize pixels16 functions from pixels functions.
mellum
parents: 663
diff changeset
303 avg_no_rnd_pixels_tab[0][2] = avg_no_rnd_pixels16_y2_axp;
340e3ba84119 Synthesize pixels16 functions from pixels functions.
mellum
parents: 663
diff changeset
304 avg_no_rnd_pixels_tab[0][3] = avg_no_rnd_pixels16_xy2_axp;
340e3ba84119 Synthesize pixels16 functions from pixels functions.
mellum
parents: 663
diff changeset
305
663
76fef3b11680 Adapt to new 8/16 table scheme.
mellum
parents: 586
diff changeset
306 put_pixels_tab[1][0] = put_pixels_axp_asm;
76fef3b11680 Adapt to new 8/16 table scheme.
mellum
parents: 586
diff changeset
307 put_pixels_tab[1][1] = put_pixels_x2_axp;
76fef3b11680 Adapt to new 8/16 table scheme.
mellum
parents: 586
diff changeset
308 put_pixels_tab[1][2] = put_pixels_y2_axp;
76fef3b11680 Adapt to new 8/16 table scheme.
mellum
parents: 586
diff changeset
309 put_pixels_tab[1][3] = put_pixels_xy2_axp;
214
73df666cacc7 Alpha optimizations by Falk Hueffner <falk.hueffner@student.uni-tuebingen.de>
nickols_k
parents:
diff changeset
310
663
76fef3b11680 Adapt to new 8/16 table scheme.
mellum
parents: 586
diff changeset
311 put_no_rnd_pixels_tab[1][0] = put_pixels_axp_asm;
76fef3b11680 Adapt to new 8/16 table scheme.
mellum
parents: 586
diff changeset
312 put_no_rnd_pixels_tab[1][1] = put_no_rnd_pixels_x2_axp;
76fef3b11680 Adapt to new 8/16 table scheme.
mellum
parents: 586
diff changeset
313 put_no_rnd_pixels_tab[1][2] = put_no_rnd_pixels_y2_axp;
76fef3b11680 Adapt to new 8/16 table scheme.
mellum
parents: 586
diff changeset
314 put_no_rnd_pixels_tab[1][3] = put_no_rnd_pixels_xy2_axp;
214
73df666cacc7 Alpha optimizations by Falk Hueffner <falk.hueffner@student.uni-tuebingen.de>
nickols_k
parents:
diff changeset
315
663
76fef3b11680 Adapt to new 8/16 table scheme.
mellum
parents: 586
diff changeset
316 avg_pixels_tab[1][0] = avg_pixels_axp;
76fef3b11680 Adapt to new 8/16 table scheme.
mellum
parents: 586
diff changeset
317 avg_pixels_tab[1][1] = avg_pixels_x2_axp;
76fef3b11680 Adapt to new 8/16 table scheme.
mellum
parents: 586
diff changeset
318 avg_pixels_tab[1][2] = avg_pixels_y2_axp;
76fef3b11680 Adapt to new 8/16 table scheme.
mellum
parents: 586
diff changeset
319 avg_pixels_tab[1][3] = avg_pixels_xy2_axp;
513
fb670ca9f8eb Use updated motion compensation routines.
mellum
parents: 511
diff changeset
320
663
76fef3b11680 Adapt to new 8/16 table scheme.
mellum
parents: 586
diff changeset
321 avg_no_rnd_pixels_tab[1][0] = avg_no_rnd_pixels_axp;
76fef3b11680 Adapt to new 8/16 table scheme.
mellum
parents: 586
diff changeset
322 avg_no_rnd_pixels_tab[1][1] = avg_no_rnd_pixels_x2_axp;
76fef3b11680 Adapt to new 8/16 table scheme.
mellum
parents: 586
diff changeset
323 avg_no_rnd_pixels_tab[1][2] = avg_no_rnd_pixels_y2_axp;
76fef3b11680 Adapt to new 8/16 table scheme.
mellum
parents: 586
diff changeset
324 avg_no_rnd_pixels_tab[1][3] = avg_no_rnd_pixels_xy2_axp;
513
fb670ca9f8eb Use updated motion compensation routines.
mellum
parents: 511
diff changeset
325
518
70113647b50d Implement clear_blocks_axp.
mellum
parents: 513
diff changeset
326 clear_blocks = clear_blocks_axp;
70113647b50d Implement clear_blocks_axp.
mellum
parents: 513
diff changeset
327
214
73df666cacc7 Alpha optimizations by Falk Hueffner <falk.hueffner@student.uni-tuebingen.de>
nickols_k
parents:
diff changeset
328 /* amask clears all bits that correspond to present features. */
73df666cacc7 Alpha optimizations by Falk Hueffner <falk.hueffner@student.uni-tuebingen.de>
nickols_k
parents:
diff changeset
329 if (amask(AMASK_MVI) == 0) {
509
cab79946302f Implement put_pixels_clamped and add_pixels_clamped in Assembler. This
mellum
parents: 505
diff changeset
330 put_pixels_clamped = put_pixels_clamped_mvi_asm;
cab79946302f Implement put_pixels_clamped and add_pixels_clamped in Assembler. This
mellum
parents: 505
diff changeset
331 add_pixels_clamped = add_pixels_clamped_mvi_asm;
586
54b1c94977d5 MVI optimizations for motion estimation.
mellum
parents: 548
diff changeset
332
54b1c94977d5 MVI optimizations for motion estimation.
mellum
parents: 548
diff changeset
333 get_pixels = get_pixels_mvi;
54b1c94977d5 MVI optimizations for motion estimation.
mellum
parents: 548
diff changeset
334 diff_pixels = diff_pixels_mvi;
54b1c94977d5 MVI optimizations for motion estimation.
mellum
parents: 548
diff changeset
335 pix_abs8x8 = pix_abs8x8_mvi;
705
107a56aa74f5 Add Alpha assembly for pix_abs16x16. Optimized for pca56, no large win
mellum
parents: 670
diff changeset
336 pix_abs16x16 = pix_abs16x16_mvi_asm;
586
54b1c94977d5 MVI optimizations for motion estimation.
mellum
parents: 548
diff changeset
337 pix_abs16x16_x2 = pix_abs16x16_x2_mvi;
54b1c94977d5 MVI optimizations for motion estimation.
mellum
parents: 548
diff changeset
338 pix_abs16x16_y2 = pix_abs16x16_y2_mvi;
54b1c94977d5 MVI optimizations for motion estimation.
mellum
parents: 548
diff changeset
339 pix_abs16x16_xy2 = pix_abs16x16_xy2_mvi;
214
73df666cacc7 Alpha optimizations by Falk Hueffner <falk.hueffner@student.uni-tuebingen.de>
nickols_k
parents:
diff changeset
340 }
73df666cacc7 Alpha optimizations by Falk Hueffner <falk.hueffner@student.uni-tuebingen.de>
nickols_k
parents:
diff changeset
341 }