annotate alpha/dsputil_alpha.c @ 513:fb670ca9f8eb libavcodec

Use updated motion compensation routines.
author mellum
date Wed, 03 Jul 2002 01:09:44 +0000
parents fa4425cf6b31
children 70113647b50d
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1 /*
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2 * Alpha optimized DSP utils
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3 * Copyright (c) 2002 Falk Hueffner <falk@debian.org>
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4 *
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5 * This library is free software; you can redistribute it and/or
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6 * modify it under the terms of the GNU Lesser General Public
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7 * License as published by the Free Software Foundation; either
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8 * version 2 of the License, or (at your option) any later version.
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9 *
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10 * This library is distributed in the hope that it will be useful,
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11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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13 * Lesser General Public License for more details.
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14 *
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15 * You should have received a copy of the GNU Lesser General Public
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16 * License along with this library; if not, write to the Free Software
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17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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18 */
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19
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20 #include "asm.h"
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21 #include "../dsputil.h"
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22
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23 void simple_idct_axp(DCTELEM *block);
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24
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25 void put_pixels_axp_asm(uint8_t *block, const uint8_t *pixels,
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26 int line_size, int h);
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27 void put_pixels_clamped_mvi_asm(const DCTELEM *block, uint8_t *pixels,
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28 int line_size);
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29 void add_pixels_clamped_mvi_asm(const DCTELEM *block, uint8_t *pixels,
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30 int line_size);
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31
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32 #if 0
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33 /* These functions were the base for the optimized assembler routines,
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34 and remain here for documentation purposes. */
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35 static void put_pixels_clamped_mvi(const DCTELEM *block, uint8_t *pixels,
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36 int line_size)
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37 {
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38 int i = 8;
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39 uint64_t clampmask = zap(-1, 0xaa); /* 0x00ff00ff00ff00ff */
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40
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41 ASM_ACCEPT_MVI;
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42
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43 do {
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44 uint64_t shorts0, shorts1;
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45
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46 shorts0 = ldq(block);
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47 shorts0 = maxsw4(shorts0, 0);
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48 shorts0 = minsw4(shorts0, clampmask);
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49 stl(pkwb(shorts0), pixels);
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50
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51 shorts1 = ldq(block + 4);
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52 shorts1 = maxsw4(shorts1, 0);
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53 shorts1 = minsw4(shorts1, clampmask);
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54 stl(pkwb(shorts1), pixels + 4);
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55
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56 pixels += line_size;
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57 block += 8;
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58 } while (--i);
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59 }
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60
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61 void add_pixels_clamped_mvi(const DCTELEM *block, uint8_t *pixels,
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62 int line_size)
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63 {
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64 int h = 8;
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65 /* Keep this function a leaf function by generating the constants
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66 manually (mainly for the hack value ;-). */
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67 uint64_t clampmask = zap(-1, 0xaa); /* 0x00ff00ff00ff00ff */
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68 uint64_t signmask = zap(-1, 0x33);
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69 signmask ^= signmask >> 1; /* 0x8000800080008000 */
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70
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71 ASM_ACCEPT_MVI;
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72
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73 do {
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74 uint64_t shorts0, pix0, signs0;
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75 uint64_t shorts1, pix1, signs1;
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76
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77 shorts0 = ldq(block);
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78 shorts1 = ldq(block + 4);
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79
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80 pix0 = unpkbw(ldl(pixels));
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81 /* Signed subword add (MMX paddw). */
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82 signs0 = shorts0 & signmask;
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83 shorts0 &= ~signmask;
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84 shorts0 += pix0;
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85 shorts0 ^= signs0;
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86 /* Clamp. */
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87 shorts0 = maxsw4(shorts0, 0);
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88 shorts0 = minsw4(shorts0, clampmask);
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89
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90 /* Next 4. */
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91 pix1 = unpkbw(ldl(pixels + 4));
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92 signs1 = shorts1 & signmask;
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93 shorts1 &= ~signmask;
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94 shorts1 += pix1;
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95 shorts1 ^= signs1;
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96 shorts1 = maxsw4(shorts1, 0);
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97 shorts1 = minsw4(shorts1, clampmask);
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98
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99 stl(pkwb(shorts0), pixels);
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100 stl(pkwb(shorts1), pixels + 4);
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101
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102 pixels += line_size;
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103 block += 8;
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104 } while (--h);
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105 }
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106 #endif
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107
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108 static inline uint64_t avg2_no_rnd(uint64_t a, uint64_t b)
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109 {
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110 return (a & b) + (((a ^ b) & BYTE_VEC(0xfe)) >> 1);
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111 }
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112
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113 static inline uint64_t avg2(uint64_t a, uint64_t b)
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114 {
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115 return (a | b) - (((a ^ b) & BYTE_VEC(0xfe)) >> 1);
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116 }
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117
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118 static inline uint64_t avg4(uint64_t l1, uint64_t l2, uint64_t l3, uint64_t l4)
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119 {
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120 uint64_t r1 = ((l1 & ~BYTE_VEC(0x03)) >> 2)
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121 + ((l2 & ~BYTE_VEC(0x03)) >> 2)
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122 + ((l3 & ~BYTE_VEC(0x03)) >> 2)
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123 + ((l4 & ~BYTE_VEC(0x03)) >> 2);
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124 uint64_t r2 = (( (l1 & BYTE_VEC(0x03))
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125 + (l2 & BYTE_VEC(0x03))
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126 + (l3 & BYTE_VEC(0x03))
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127 + (l4 & BYTE_VEC(0x03))
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128 + BYTE_VEC(0x02)) >> 2) & BYTE_VEC(0x03);
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129 return r1 + r2;
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130 }
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131
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132 static inline uint64_t avg4_no_rnd(uint64_t l1, uint64_t l2,
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133 uint64_t l3, uint64_t l4)
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134 {
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135 uint64_t r1 = ((l1 & ~BYTE_VEC(0x03)) >> 2)
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136 + ((l2 & ~BYTE_VEC(0x03)) >> 2)
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137 + ((l3 & ~BYTE_VEC(0x03)) >> 2)
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138 + ((l4 & ~BYTE_VEC(0x03)) >> 2);
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139 uint64_t r2 = (( (l1 & BYTE_VEC(0x03))
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140 + (l2 & BYTE_VEC(0x03))
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141 + (l3 & BYTE_VEC(0x03))
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142 + (l4 & BYTE_VEC(0x03))
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143 + BYTE_VEC(0x01)) >> 2) & BYTE_VEC(0x03);
214
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144 return r1 + r2;
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145 }
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146
513
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147 #define OP(LOAD, STORE, INCR) \
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148 do { \
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149 STORE(LOAD(pixels), block); \
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150 pixels += line_size; \
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151 block += INCR; \
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152 } while (--h)
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153
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154 #define OP_X2(LOAD, STORE, INCR) \
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155 do { \
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156 uint64_t pix1, pix2; \
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157 \
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158 pix1 = LOAD(pixels); \
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159 pix2 = pix1 >> 8 | ((uint64_t) pixels[8] << 56); \
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160 STORE(AVG2(pix1, pix2), block); \
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161 pixels += line_size; \
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162 block += INCR; \
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163 } while (--h)
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164
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165 #define OP_Y2(LOAD, STORE, INCR) \
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166 do { \
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167 uint64_t pix = LOAD(pixels); \
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168 do { \
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169 uint64_t next_pix; \
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170 \
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171 pixels += line_size; \
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172 next_pix = LOAD(pixels); \
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173 STORE(AVG2(pix, next_pix), block); \
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174 block += INCR; \
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175 pix = next_pix; \
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176 } while (--h); \
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177 } while (0)
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178
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179 #define OP_XY2(LOAD, STORE, INCR) \
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180 do { \
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181 uint64_t pix1 = LOAD(pixels); \
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182 uint64_t pix2 = pix1 >> 8 | ((uint64_t) pixels[8] << 56); \
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183 \
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184 do { \
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185 uint64_t next_pix1, next_pix2; \
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186 \
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187 pixels += line_size; \
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188 next_pix1 = LOAD(pixels); \
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189 next_pix2 = next_pix1 >> 8 | ((uint64_t) pixels[8] << 56); \
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190 \
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191 STORE(AVG4(pix1, pix2, next_pix1, next_pix2), block); \
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192 \
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193 block += INCR; \
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194 pix1 = next_pix1; \
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195 pix2 = next_pix2; \
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196 } while (--h); \
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197 } while (0)
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198
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199 #define MAKE_OP(BTYPE, OPNAME, SUFF, OPKIND, STORE, INCR) \
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200 static void OPNAME ## _pixels ## SUFF ## _axp(BTYPE *block, \
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201 const uint8_t *pixels, \
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202 int line_size, int h) \
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203 { \
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204 if ((size_t) pixels & 0x7) { \
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205 OPKIND(uldq, STORE, INCR); \
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206 } else { \
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207 OPKIND(ldq, STORE, INCR); \
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208 } \
214
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209 }
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210
513
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211 #define PIXOP(BTYPE, OPNAME, STORE, INCR) \
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212 MAKE_OP(BTYPE, OPNAME, , OP, STORE, INCR); \
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213 MAKE_OP(BTYPE, OPNAME, _x2, OP_X2, STORE, INCR); \
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214 MAKE_OP(BTYPE, OPNAME, _y2, OP_Y2, STORE, INCR); \
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215 MAKE_OP(BTYPE, OPNAME, _xy2, OP_XY2, STORE, INCR);
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216
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217 /* Rounding primitives. */
214
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218 #define AVG2 avg2
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219 #define AVG4 avg4
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220 #define STORE(l, b) stq(l, b)
513
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221 PIXOP(uint8_t, put, STORE, line_size);
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222
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223 #undef STORE
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224 #define STORE(l, b) stq(AVG2(l, ldq(b)), b);
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225 PIXOP(uint8_t, avg, STORE, line_size);
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226
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227 /* Not rounding primitives. */
214
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228 #undef AVG2
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229 #undef AVG4
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230 #undef STORE
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231 #define AVG2 avg2_no_rnd
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232 #define AVG4 avg4_no_rnd
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233 #define STORE(l, b) stq(l, b)
513
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234 PIXOP(uint8_t, put_no_rnd, STORE, line_size);
214
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235
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236 #undef STORE
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237 #define STORE(l, b) stq(AVG2(l, ldq(b)), b);
513
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diff changeset
238 PIXOP(uint8_t, avg_no_rnd, STORE, line_size);
214
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239
73df666cacc7 Alpha optimizations by Falk Hueffner <falk.hueffner@student.uni-tuebingen.de>
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diff changeset
240 void dsputil_init_alpha(void)
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241 {
511
fa4425cf6b31 Assembly version of put_pixels. This is currently the function that
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diff changeset
242 put_pixels_tab[0] = put_pixels_axp_asm;
214
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243 put_pixels_tab[1] = put_pixels_x2_axp;
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244 put_pixels_tab[2] = put_pixels_y2_axp;
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diff changeset
245 put_pixels_tab[3] = put_pixels_xy2_axp;
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diff changeset
246
511
fa4425cf6b31 Assembly version of put_pixels. This is currently the function that
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diff changeset
247 put_no_rnd_pixels_tab[0] = put_pixels_axp_asm;
214
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parents:
diff changeset
248 put_no_rnd_pixels_tab[1] = put_no_rnd_pixels_x2_axp;
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parents:
diff changeset
249 put_no_rnd_pixels_tab[2] = put_no_rnd_pixels_y2_axp;
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parents:
diff changeset
250 put_no_rnd_pixels_tab[3] = put_no_rnd_pixels_xy2_axp;
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diff changeset
251
513
fb670ca9f8eb Use updated motion compensation routines.
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diff changeset
252 avg_pixels_tab[0] = avg_pixels_axp;
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diff changeset
253 avg_pixels_tab[1] = avg_pixels_x2_axp;
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diff changeset
254 avg_pixels_tab[2] = avg_pixels_y2_axp;
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diff changeset
255 avg_pixels_tab[3] = avg_pixels_xy2_axp;
fb670ca9f8eb Use updated motion compensation routines.
mellum
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diff changeset
256
fb670ca9f8eb Use updated motion compensation routines.
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diff changeset
257 avg_no_rnd_pixels_tab[0] = avg_no_rnd_pixels_axp;
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diff changeset
258 avg_no_rnd_pixels_tab[1] = avg_no_rnd_pixels_x2_axp;
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diff changeset
259 avg_no_rnd_pixels_tab[2] = avg_no_rnd_pixels_y2_axp;
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diff changeset
260 avg_no_rnd_pixels_tab[3] = avg_no_rnd_pixels_xy2_axp;
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diff changeset
261
214
73df666cacc7 Alpha optimizations by Falk Hueffner <falk.hueffner@student.uni-tuebingen.de>
nickols_k
parents:
diff changeset
262 /* amask clears all bits that correspond to present features. */
73df666cacc7 Alpha optimizations by Falk Hueffner <falk.hueffner@student.uni-tuebingen.de>
nickols_k
parents:
diff changeset
263 if (amask(AMASK_MVI) == 0) {
509
cab79946302f Implement put_pixels_clamped and add_pixels_clamped in Assembler. This
mellum
parents: 505
diff changeset
264 put_pixels_clamped = put_pixels_clamped_mvi_asm;
cab79946302f Implement put_pixels_clamped and add_pixels_clamped in Assembler. This
mellum
parents: 505
diff changeset
265 add_pixels_clamped = add_pixels_clamped_mvi_asm;
214
73df666cacc7 Alpha optimizations by Falk Hueffner <falk.hueffner@student.uni-tuebingen.de>
nickols_k
parents:
diff changeset
266 }
73df666cacc7 Alpha optimizations by Falk Hueffner <falk.hueffner@student.uni-tuebingen.de>
nickols_k
parents:
diff changeset
267 }