Mercurial > libavcodec.hg
annotate i386/snowdsp_mmx.c @ 8177:484c83d8e9a8 libavcodec
SH4: add macros for setting and restoring FPSCR.PR bit
author | mru |
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date | Thu, 20 Nov 2008 09:21:50 +0000 |
parents | eebc7209c47f |
children |
rev | line source |
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1 /* |
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2 * MMX and SSE2 optimized snow DSP utils |
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3 * Copyright (c) 2005-2006 Robert Edele <yartrebo@earthlink.net> |
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4 * |
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5 * This file is part of FFmpeg. |
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6 * |
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7 * FFmpeg is free software; you can redistribute it and/or |
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8 * modify it under the terms of the GNU Lesser General Public |
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9 * License as published by the Free Software Foundation; either |
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10 * version 2.1 of the License, or (at your option) any later version. |
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11 * |
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12 * FFmpeg is distributed in the hope that it will be useful, |
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13 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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15 * Lesser General Public License for more details. |
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16 * |
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17 * You should have received a copy of the GNU Lesser General Public |
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18 * License along with FFmpeg; if not, write to the Free Software |
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19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
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20 */ |
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21 |
6763 | 22 #include "libavutil/x86_cpu.h" |
23 #include "libavcodec/avcodec.h" | |
24 #include "libavcodec/snow.h" | |
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25 |
5591 | 26 void ff_snow_horizontal_compose97i_sse2(IDWTELEM *b, int width){ |
3210 | 27 const int w2= (width+1)>>1; |
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28 DECLARE_ALIGNED_16(IDWTELEM, temp[width>>1]); |
3210 | 29 const int w_l= (width>>1); |
30 const int w_r= w2 - 1; | |
31 int i; | |
32 | |
33 { // Lift 0 | |
5591 | 34 IDWTELEM * const ref = b + w2 - 1; |
35 IDWTELEM b_0 = b[0]; //By allowing the first entry in b[0] to be calculated twice | |
3210 | 36 // (the first time erroneously), we allow the SSE2 code to run an extra pass. |
37 // The savings in code and time are well worth having to store this value and | |
38 // calculate b[0] correctly afterwards. | |
39 | |
40 i = 0; | |
8031 | 41 __asm__ volatile( |
3210 | 42 "pcmpeqd %%xmm7, %%xmm7 \n\t" |
5599 | 43 "pcmpeqd %%xmm3, %%xmm3 \n\t" |
44 "psllw $1, %%xmm3 \n\t" | |
45 "paddw %%xmm7, %%xmm3 \n\t" | |
5610 | 46 "psllw $13, %%xmm3 \n\t" |
3210 | 47 ::); |
5591 | 48 for(; i<w_l-15; i+=16){ |
8031 | 49 __asm__ volatile( |
3210 | 50 "movdqu (%1), %%xmm1 \n\t" |
51 "movdqu 16(%1), %%xmm5 \n\t" | |
5591 | 52 "movdqu 2(%1), %%xmm2 \n\t" |
53 "movdqu 18(%1), %%xmm6 \n\t" | |
54 "paddw %%xmm1, %%xmm2 \n\t" | |
55 "paddw %%xmm5, %%xmm6 \n\t" | |
56 "paddw %%xmm7, %%xmm2 \n\t" | |
57 "paddw %%xmm7, %%xmm6 \n\t" | |
5599 | 58 "pmulhw %%xmm3, %%xmm2 \n\t" |
59 "pmulhw %%xmm3, %%xmm6 \n\t" | |
60 "paddw (%0), %%xmm2 \n\t" | |
61 "paddw 16(%0), %%xmm6 \n\t" | |
62 "movdqa %%xmm2, (%0) \n\t" | |
63 "movdqa %%xmm6, 16(%0) \n\t" | |
3210 | 64 :: "r"(&b[i]), "r"(&ref[i]) |
65 : "memory" | |
66 ); | |
67 } | |
68 snow_horizontal_compose_lift_lead_out(i, b, b, ref, width, w_l, 0, W_DM, W_DO, W_DS); | |
69 b[0] = b_0 - ((W_DM * 2 * ref[1]+W_DO)>>W_DS); | |
70 } | |
71 | |
72 { // Lift 1 | |
5591 | 73 IDWTELEM * const dst = b+w2; |
3210 | 74 |
75 i = 0; | |
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76 for(; (((x86_reg)&dst[i]) & 0x1F) && i<w_r; i++){ |
3210 | 77 dst[i] = dst[i] - (b[i] + b[i + 1]); |
78 } | |
5591 | 79 for(; i<w_r-15; i+=16){ |
8031 | 80 __asm__ volatile( |
3210 | 81 "movdqu (%1), %%xmm1 \n\t" |
82 "movdqu 16(%1), %%xmm5 \n\t" | |
5591 | 83 "movdqu 2(%1), %%xmm2 \n\t" |
84 "movdqu 18(%1), %%xmm6 \n\t" | |
85 "paddw %%xmm1, %%xmm2 \n\t" | |
86 "paddw %%xmm5, %%xmm6 \n\t" | |
3210 | 87 "movdqa (%0), %%xmm0 \n\t" |
88 "movdqa 16(%0), %%xmm4 \n\t" | |
5591 | 89 "psubw %%xmm2, %%xmm0 \n\t" |
90 "psubw %%xmm6, %%xmm4 \n\t" | |
3210 | 91 "movdqa %%xmm0, (%0) \n\t" |
92 "movdqa %%xmm4, 16(%0) \n\t" | |
93 :: "r"(&dst[i]), "r"(&b[i]) | |
94 : "memory" | |
95 ); | |
96 } | |
97 snow_horizontal_compose_lift_lead_out(i, dst, dst, b, width, w_r, 1, W_CM, W_CO, W_CS); | |
98 } | |
99 | |
100 { // Lift 2 | |
5591 | 101 IDWTELEM * const ref = b+w2 - 1; |
102 IDWTELEM b_0 = b[0]; | |
3210 | 103 |
104 i = 0; | |
8031 | 105 __asm__ volatile( |
5599 | 106 "psllw $15, %%xmm7 \n\t" |
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107 "pcmpeqw %%xmm6, %%xmm6 \n\t" |
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108 "psrlw $13, %%xmm6 \n\t" |
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109 "paddw %%xmm7, %%xmm6 \n\t" |
3210 | 110 ::); |
5591 | 111 for(; i<w_l-15; i+=16){ |
8031 | 112 __asm__ volatile( |
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113 "movdqu (%1), %%xmm0 \n\t" |
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114 "movdqu 16(%1), %%xmm4 \n\t" |
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115 "movdqu 2(%1), %%xmm1 \n\t" |
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116 "movdqu 18(%1), %%xmm5 \n\t" //FIXME try aligned reads and shifts |
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117 "paddw %%xmm6, %%xmm0 \n\t" |
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118 "paddw %%xmm6, %%xmm4 \n\t" |
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119 "paddw %%xmm7, %%xmm1 \n\t" |
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120 "paddw %%xmm7, %%xmm5 \n\t" |
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121 "pavgw %%xmm1, %%xmm0 \n\t" |
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122 "pavgw %%xmm5, %%xmm4 \n\t" |
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123 "psubw %%xmm7, %%xmm0 \n\t" |
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124 "psubw %%xmm7, %%xmm4 \n\t" |
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125 "psraw $1, %%xmm0 \n\t" |
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126 "psraw $1, %%xmm4 \n\t" |
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127 "movdqa (%0), %%xmm1 \n\t" |
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128 "movdqa 16(%0), %%xmm5 \n\t" |
5591 | 129 "paddw %%xmm1, %%xmm0 \n\t" |
130 "paddw %%xmm5, %%xmm4 \n\t" | |
131 "psraw $2, %%xmm0 \n\t" | |
132 "psraw $2, %%xmm4 \n\t" | |
133 "paddw %%xmm1, %%xmm0 \n\t" | |
134 "paddw %%xmm5, %%xmm4 \n\t" | |
3210 | 135 "movdqa %%xmm0, (%0) \n\t" |
136 "movdqa %%xmm4, 16(%0) \n\t" | |
137 :: "r"(&b[i]), "r"(&ref[i]) | |
138 : "memory" | |
139 ); | |
140 } | |
141 snow_horizontal_compose_liftS_lead_out(i, b, b, ref, width, w_l); | |
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142 b[0] = b_0 + ((2 * ref[1] + W_BO-1 + 4 * b_0) >> W_BS); |
3210 | 143 } |
144 | |
145 { // Lift 3 | |
5591 | 146 IDWTELEM * const src = b+w2; |
3210 | 147 |
148 i = 0; | |
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149 for(; (((x86_reg)&temp[i]) & 0x1F) && i<w_r; i++){ |
3210 | 150 temp[i] = src[i] - ((-W_AM*(b[i] + b[i+1]))>>W_AS); |
151 } | |
152 for(; i<w_r-7; i+=8){ | |
8031 | 153 __asm__ volatile( |
5591 | 154 "movdqu 2(%1), %%xmm2 \n\t" |
155 "movdqu 18(%1), %%xmm6 \n\t" | |
156 "paddw (%1), %%xmm2 \n\t" | |
157 "paddw 16(%1), %%xmm6 \n\t" | |
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158 "movdqu (%0), %%xmm0 \n\t" |
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159 "movdqu 16(%0), %%xmm4 \n\t" |
5591 | 160 "paddw %%xmm2, %%xmm0 \n\t" |
161 "paddw %%xmm6, %%xmm4 \n\t" | |
162 "psraw $1, %%xmm2 \n\t" | |
163 "psraw $1, %%xmm6 \n\t" | |
164 "paddw %%xmm0, %%xmm2 \n\t" | |
165 "paddw %%xmm4, %%xmm6 \n\t" | |
3210 | 166 "movdqa %%xmm2, (%2) \n\t" |
167 "movdqa %%xmm6, 16(%2) \n\t" | |
168 :: "r"(&src[i]), "r"(&b[i]), "r"(&temp[i]) | |
169 : "memory" | |
170 ); | |
171 } | |
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172 snow_horizontal_compose_lift_lead_out(i, temp, src, b, width, w_r, 1, -W_AM, W_AO+1, W_AS); |
3210 | 173 } |
174 | |
175 { | |
176 snow_interleave_line_header(&i, width, b, temp); | |
177 | |
5591 | 178 for (; (i & 0x3E) != 0x3E; i-=2){ |
179 b[i+1] = temp[i>>1]; | |
180 b[i] = b[i>>1]; | |
181 } | |
182 for (i-=62; i>=0; i-=64){ | |
8031 | 183 __asm__ volatile( |
5591 | 184 "movdqa (%1), %%xmm0 \n\t" |
185 "movdqa 16(%1), %%xmm2 \n\t" | |
186 "movdqa 32(%1), %%xmm4 \n\t" | |
187 "movdqa 48(%1), %%xmm6 \n\t" | |
188 "movdqa (%1), %%xmm1 \n\t" | |
189 "movdqa 16(%1), %%xmm3 \n\t" | |
190 "movdqa 32(%1), %%xmm5 \n\t" | |
191 "movdqa 48(%1), %%xmm7 \n\t" | |
192 "punpcklwd (%2), %%xmm0 \n\t" | |
193 "punpcklwd 16(%2), %%xmm2 \n\t" | |
194 "punpcklwd 32(%2), %%xmm4 \n\t" | |
195 "punpcklwd 48(%2), %%xmm6 \n\t" | |
196 "movdqa %%xmm0, (%0) \n\t" | |
197 "movdqa %%xmm2, 32(%0) \n\t" | |
198 "movdqa %%xmm4, 64(%0) \n\t" | |
199 "movdqa %%xmm6, 96(%0) \n\t" | |
200 "punpckhwd (%2), %%xmm1 \n\t" | |
201 "punpckhwd 16(%2), %%xmm3 \n\t" | |
202 "punpckhwd 32(%2), %%xmm5 \n\t" | |
203 "punpckhwd 48(%2), %%xmm7 \n\t" | |
204 "movdqa %%xmm1, 16(%0) \n\t" | |
205 "movdqa %%xmm3, 48(%0) \n\t" | |
206 "movdqa %%xmm5, 80(%0) \n\t" | |
207 "movdqa %%xmm7, 112(%0) \n\t" | |
208 :: "r"(&(b)[i]), "r"(&(b)[i>>1]), "r"(&(temp)[i>>1]) | |
209 : "memory" | |
210 ); | |
211 } | |
212 } | |
213 } | |
214 | |
215 void ff_snow_horizontal_compose97i_mmx(IDWTELEM *b, int width){ | |
216 const int w2= (width+1)>>1; | |
217 IDWTELEM temp[width >> 1]; | |
218 const int w_l= (width>>1); | |
219 const int w_r= w2 - 1; | |
220 int i; | |
221 | |
222 { // Lift 0 | |
223 IDWTELEM * const ref = b + w2 - 1; | |
224 | |
225 i = 1; | |
226 b[0] = b[0] - ((W_DM * 2 * ref[1]+W_DO)>>W_DS); | |
8031 | 227 __asm__ volatile( |
5591 | 228 "pcmpeqw %%mm7, %%mm7 \n\t" |
5599 | 229 "pcmpeqw %%mm3, %%mm3 \n\t" |
230 "psllw $1, %%mm3 \n\t" | |
231 "paddw %%mm7, %%mm3 \n\t" | |
232 "psllw $13, %%mm3 \n\t" | |
5591 | 233 ::); |
234 for(; i<w_l-7; i+=8){ | |
8031 | 235 __asm__ volatile( |
5591 | 236 "movq (%1), %%mm2 \n\t" |
237 "movq 8(%1), %%mm6 \n\t" | |
238 "paddw 2(%1), %%mm2 \n\t" | |
239 "paddw 10(%1), %%mm6 \n\t" | |
240 "paddw %%mm7, %%mm2 \n\t" | |
241 "paddw %%mm7, %%mm6 \n\t" | |
5599 | 242 "pmulhw %%mm3, %%mm2 \n\t" |
243 "pmulhw %%mm3, %%mm6 \n\t" | |
244 "paddw (%0), %%mm2 \n\t" | |
245 "paddw 8(%0), %%mm6 \n\t" | |
246 "movq %%mm2, (%0) \n\t" | |
247 "movq %%mm6, 8(%0) \n\t" | |
5591 | 248 :: "r"(&b[i]), "r"(&ref[i]) |
249 : "memory" | |
250 ); | |
251 } | |
252 snow_horizontal_compose_lift_lead_out(i, b, b, ref, width, w_l, 0, W_DM, W_DO, W_DS); | |
253 } | |
254 | |
255 { // Lift 1 | |
256 IDWTELEM * const dst = b+w2; | |
257 | |
258 i = 0; | |
259 for(; i<w_r-7; i+=8){ | |
8031 | 260 __asm__ volatile( |
5591 | 261 "movq (%1), %%mm2 \n\t" |
262 "movq 8(%1), %%mm6 \n\t" | |
263 "paddw 2(%1), %%mm2 \n\t" | |
264 "paddw 10(%1), %%mm6 \n\t" | |
265 "movq (%0), %%mm0 \n\t" | |
266 "movq 8(%0), %%mm4 \n\t" | |
267 "psubw %%mm2, %%mm0 \n\t" | |
268 "psubw %%mm6, %%mm4 \n\t" | |
269 "movq %%mm0, (%0) \n\t" | |
270 "movq %%mm4, 8(%0) \n\t" | |
271 :: "r"(&dst[i]), "r"(&b[i]) | |
272 : "memory" | |
273 ); | |
274 } | |
275 snow_horizontal_compose_lift_lead_out(i, dst, dst, b, width, w_r, 1, W_CM, W_CO, W_CS); | |
276 } | |
277 | |
278 { // Lift 2 | |
279 IDWTELEM * const ref = b+w2 - 1; | |
280 | |
281 i = 1; | |
282 b[0] = b[0] + (((2 * ref[1] + W_BO) + 4 * b[0]) >> W_BS); | |
8031 | 283 __asm__ volatile( |
5599 | 284 "psllw $15, %%mm7 \n\t" |
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285 "pcmpeqw %%mm6, %%mm6 \n\t" |
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286 "psrlw $13, %%mm6 \n\t" |
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287 "paddw %%mm7, %%mm6 \n\t" |
5591 | 288 ::); |
289 for(; i<w_l-7; i+=8){ | |
8031 | 290 __asm__ volatile( |
5591 | 291 "movq (%1), %%mm0 \n\t" |
292 "movq 8(%1), %%mm4 \n\t" | |
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293 "movq 2(%1), %%mm1 \n\t" |
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294 "movq 10(%1), %%mm5 \n\t" |
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295 "paddw %%mm6, %%mm0 \n\t" |
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296 "paddw %%mm6, %%mm4 \n\t" |
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297 "paddw %%mm7, %%mm1 \n\t" |
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298 "paddw %%mm7, %%mm5 \n\t" |
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299 "pavgw %%mm1, %%mm0 \n\t" |
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300 "pavgw %%mm5, %%mm4 \n\t" |
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301 "psubw %%mm7, %%mm0 \n\t" |
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302 "psubw %%mm7, %%mm4 \n\t" |
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303 "psraw $1, %%mm0 \n\t" |
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304 "psraw $1, %%mm4 \n\t" |
5591 | 305 "movq (%0), %%mm1 \n\t" |
306 "movq 8(%0), %%mm5 \n\t" | |
307 "paddw %%mm1, %%mm0 \n\t" | |
308 "paddw %%mm5, %%mm4 \n\t" | |
309 "psraw $2, %%mm0 \n\t" | |
310 "psraw $2, %%mm4 \n\t" | |
311 "paddw %%mm1, %%mm0 \n\t" | |
312 "paddw %%mm5, %%mm4 \n\t" | |
313 "movq %%mm0, (%0) \n\t" | |
314 "movq %%mm4, 8(%0) \n\t" | |
315 :: "r"(&b[i]), "r"(&ref[i]) | |
316 : "memory" | |
317 ); | |
318 } | |
319 snow_horizontal_compose_liftS_lead_out(i, b, b, ref, width, w_l); | |
320 } | |
321 | |
322 { // Lift 3 | |
323 IDWTELEM * const src = b+w2; | |
324 i = 0; | |
325 | |
326 for(; i<w_r-7; i+=8){ | |
8031 | 327 __asm__ volatile( |
5591 | 328 "movq 2(%1), %%mm2 \n\t" |
329 "movq 10(%1), %%mm6 \n\t" | |
330 "paddw (%1), %%mm2 \n\t" | |
331 "paddw 8(%1), %%mm6 \n\t" | |
332 "movq (%0), %%mm0 \n\t" | |
333 "movq 8(%0), %%mm4 \n\t" | |
334 "paddw %%mm2, %%mm0 \n\t" | |
335 "paddw %%mm6, %%mm4 \n\t" | |
336 "psraw $1, %%mm2 \n\t" | |
337 "psraw $1, %%mm6 \n\t" | |
338 "paddw %%mm0, %%mm2 \n\t" | |
339 "paddw %%mm4, %%mm6 \n\t" | |
340 "movq %%mm2, (%2) \n\t" | |
341 "movq %%mm6, 8(%2) \n\t" | |
342 :: "r"(&src[i]), "r"(&b[i]), "r"(&temp[i]) | |
343 : "memory" | |
344 ); | |
345 } | |
346 snow_horizontal_compose_lift_lead_out(i, temp, src, b, width, w_r, 1, -W_AM, W_AO+1, W_AS); | |
347 } | |
348 | |
349 { | |
350 snow_interleave_line_header(&i, width, b, temp); | |
351 | |
3210 | 352 for (; (i & 0x1E) != 0x1E; i-=2){ |
353 b[i+1] = temp[i>>1]; | |
354 b[i] = b[i>>1]; | |
355 } | |
356 for (i-=30; i>=0; i-=32){ | |
8031 | 357 __asm__ volatile( |
3210 | 358 "movq (%1), %%mm0 \n\t" |
359 "movq 8(%1), %%mm2 \n\t" | |
360 "movq 16(%1), %%mm4 \n\t" | |
361 "movq 24(%1), %%mm6 \n\t" | |
362 "movq (%1), %%mm1 \n\t" | |
363 "movq 8(%1), %%mm3 \n\t" | |
364 "movq 16(%1), %%mm5 \n\t" | |
365 "movq 24(%1), %%mm7 \n\t" | |
5591 | 366 "punpcklwd (%2), %%mm0 \n\t" |
367 "punpcklwd 8(%2), %%mm2 \n\t" | |
368 "punpcklwd 16(%2), %%mm4 \n\t" | |
369 "punpcklwd 24(%2), %%mm6 \n\t" | |
3210 | 370 "movq %%mm0, (%0) \n\t" |
371 "movq %%mm2, 16(%0) \n\t" | |
372 "movq %%mm4, 32(%0) \n\t" | |
373 "movq %%mm6, 48(%0) \n\t" | |
5591 | 374 "punpckhwd (%2), %%mm1 \n\t" |
375 "punpckhwd 8(%2), %%mm3 \n\t" | |
376 "punpckhwd 16(%2), %%mm5 \n\t" | |
377 "punpckhwd 24(%2), %%mm7 \n\t" | |
3210 | 378 "movq %%mm1, 8(%0) \n\t" |
379 "movq %%mm3, 24(%0) \n\t" | |
380 "movq %%mm5, 40(%0) \n\t" | |
381 "movq %%mm7, 56(%0) \n\t" | |
382 :: "r"(&b[i]), "r"(&b[i>>1]), "r"(&temp[i>>1]) | |
383 : "memory" | |
384 ); | |
385 } | |
386 } | |
387 } | |
388 | |
5602 | 389 #ifdef HAVE_7REGS |
3207
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390 #define snow_vertical_compose_sse2_load_add(op,r,t0,t1,t2,t3)\ |
5597
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391 ""op" ("r",%%"REG_d"), %%"t0" \n\t"\ |
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392 ""op" 16("r",%%"REG_d"), %%"t1" \n\t"\ |
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get rid of totally senseless "m" + read in register we have enough
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|
393 ""op" 32("r",%%"REG_d"), %%"t2" \n\t"\ |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
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|
394 ""op" 48("r",%%"REG_d"), %%"t3" \n\t" |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
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diff
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|
395 |
33110c1008a4
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396 #define snow_vertical_compose_sse2_load(r,t0,t1,t2,t3)\ |
33110c1008a4
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397 snow_vertical_compose_sse2_load_add("movdqa",r,t0,t1,t2,t3) |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
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|
398 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
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|
399 #define snow_vertical_compose_sse2_add(r,t0,t1,t2,t3)\ |
5591 | 400 snow_vertical_compose_sse2_load_add("paddw",r,t0,t1,t2,t3) |
3207
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Add the mmx and sse2 implementations of ff_snow_vertical_compose().
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|
401 |
5595 | 402 #define snow_vertical_compose_r2r_sub(s0,s1,s2,s3,t0,t1,t2,t3)\ |
5591 | 403 "psubw %%"s0", %%"t0" \n\t"\ |
404 "psubw %%"s1", %%"t1" \n\t"\ | |
405 "psubw %%"s2", %%"t2" \n\t"\ | |
406 "psubw %%"s3", %%"t3" \n\t" | |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
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|
407 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
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diff
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408 #define snow_vertical_compose_sse2_store(w,s0,s1,s2,s3)\ |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
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|
409 "movdqa %%"s0", ("w",%%"REG_d") \n\t"\ |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
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5596
diff
changeset
|
410 "movdqa %%"s1", 16("w",%%"REG_d") \n\t"\ |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
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5596
diff
changeset
|
411 "movdqa %%"s2", 32("w",%%"REG_d") \n\t"\ |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
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5596
diff
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|
412 "movdqa %%"s3", 48("w",%%"REG_d") \n\t" |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
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413 |
5595 | 414 #define snow_vertical_compose_sra(n,t0,t1,t2,t3)\ |
5591 | 415 "psraw $"n", %%"t0" \n\t"\ |
416 "psraw $"n", %%"t1" \n\t"\ | |
417 "psraw $"n", %%"t2" \n\t"\ | |
418 "psraw $"n", %%"t3" \n\t" | |
3207
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Add the mmx and sse2 implementations of ff_snow_vertical_compose().
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419 |
5595 | 420 #define snow_vertical_compose_r2r_add(s0,s1,s2,s3,t0,t1,t2,t3)\ |
5591 | 421 "paddw %%"s0", %%"t0" \n\t"\ |
422 "paddw %%"s1", %%"t1" \n\t"\ | |
423 "paddw %%"s2", %%"t2" \n\t"\ | |
424 "paddw %%"s3", %%"t3" \n\t" | |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
425 |
5600
f302e395f552
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michael
parents:
5599
diff
changeset
|
426 #define snow_vertical_compose_r2r_pmulhw(s0,s1,s2,s3,t0,t1,t2,t3)\ |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
427 "pmulhw %%"s0", %%"t0" \n\t"\ |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
428 "pmulhw %%"s1", %%"t1" \n\t"\ |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
429 "pmulhw %%"s2", %%"t2" \n\t"\ |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
430 "pmulhw %%"s3", %%"t3" \n\t" |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
431 |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
432 #define snow_vertical_compose_sse2_move(s0,s1,s2,s3,t0,t1,t2,t3)\ |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
433 "movdqa %%"s0", %%"t0" \n\t"\ |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
434 "movdqa %%"s1", %%"t1" \n\t"\ |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
435 "movdqa %%"s2", %%"t2" \n\t"\ |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
436 "movdqa %%"s3", %%"t3" \n\t" |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
437 |
5591 | 438 void ff_snow_vertical_compose97i_sse2(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, IDWTELEM *b3, IDWTELEM *b4, IDWTELEM *b5, int width){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
5613
diff
changeset
|
439 x86_reg i = width; |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
440 |
5591 | 441 while(i & 0x1F) |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
442 { |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
443 i--; |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
444 b4[i] -= (W_DM*(b3[i] + b5[i])+W_DO)>>W_DS; |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
445 b3[i] -= (W_CM*(b2[i] + b4[i])+W_CO)>>W_CS; |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
446 b2[i] += (W_BM*(b1[i] + b3[i])+4*b2[i]+W_BO)>>W_BS; |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
447 b1[i] += (W_AM*(b0[i] + b2[i])+W_AO)>>W_AS; |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
448 } |
5596 | 449 i+=i; |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
450 |
8031 | 451 __asm__ volatile ( |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
452 "jmp 2f \n\t" |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
453 "1: \n\t" |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
454 snow_vertical_compose_sse2_load("%4","xmm0","xmm2","xmm4","xmm6") |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
455 snow_vertical_compose_sse2_add("%6","xmm0","xmm2","xmm4","xmm6") |
5600
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
456 |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
457 |
5600
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
458 "pcmpeqw %%xmm0, %%xmm0 \n\t" |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
459 "pcmpeqw %%xmm2, %%xmm2 \n\t" |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
460 "paddw %%xmm2, %%xmm2 \n\t" |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
461 "paddw %%xmm0, %%xmm2 \n\t" |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
462 "psllw $13, %%xmm2 \n\t" |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
463 snow_vertical_compose_r2r_add("xmm0","xmm0","xmm0","xmm0","xmm1","xmm3","xmm5","xmm7") |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
464 snow_vertical_compose_r2r_pmulhw("xmm2","xmm2","xmm2","xmm2","xmm1","xmm3","xmm5","xmm7") |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
465 snow_vertical_compose_sse2_add("%5","xmm1","xmm3","xmm5","xmm7") |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
466 snow_vertical_compose_sse2_store("%5","xmm1","xmm3","xmm5","xmm7") |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
467 snow_vertical_compose_sse2_load("%4","xmm0","xmm2","xmm4","xmm6") |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
468 snow_vertical_compose_sse2_add("%3","xmm1","xmm3","xmm5","xmm7") |
5595 | 469 snow_vertical_compose_r2r_sub("xmm1","xmm3","xmm5","xmm7","xmm0","xmm2","xmm4","xmm6") |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
470 snow_vertical_compose_sse2_store("%4","xmm0","xmm2","xmm4","xmm6") |
5594
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
471 |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
472 "pcmpeqw %%xmm7, %%xmm7 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
473 "pcmpeqw %%xmm5, %%xmm5 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
474 "psllw $15, %%xmm7 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
475 "psrlw $13, %%xmm5 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
476 "paddw %%xmm7, %%xmm5 \n\t" |
5595 | 477 snow_vertical_compose_r2r_add("xmm5","xmm5","xmm5","xmm5","xmm0","xmm2","xmm4","xmm6") |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
478 "movq (%2,%%"REG_d"), %%xmm1 \n\t" |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
479 "movq 8(%2,%%"REG_d"), %%xmm3 \n\t" |
5594
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
480 "paddw %%xmm7, %%xmm1 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
481 "paddw %%xmm7, %%xmm3 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
482 "pavgw %%xmm1, %%xmm0 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
483 "pavgw %%xmm3, %%xmm2 \n\t" |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
484 "movq 16(%2,%%"REG_d"), %%xmm1 \n\t" |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
485 "movq 24(%2,%%"REG_d"), %%xmm3 \n\t" |
5594
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
486 "paddw %%xmm7, %%xmm1 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
487 "paddw %%xmm7, %%xmm3 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
488 "pavgw %%xmm1, %%xmm4 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
489 "pavgw %%xmm3, %%xmm6 \n\t" |
5595 | 490 snow_vertical_compose_r2r_sub("xmm7","xmm7","xmm7","xmm7","xmm0","xmm2","xmm4","xmm6") |
491 snow_vertical_compose_sra("1","xmm0","xmm2","xmm4","xmm6") | |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
492 snow_vertical_compose_sse2_add("%3","xmm0","xmm2","xmm4","xmm6") |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
493 |
5595 | 494 snow_vertical_compose_sra("2","xmm0","xmm2","xmm4","xmm6") |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
495 snow_vertical_compose_sse2_add("%3","xmm0","xmm2","xmm4","xmm6") |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
496 snow_vertical_compose_sse2_store("%3","xmm0","xmm2","xmm4","xmm6") |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
497 snow_vertical_compose_sse2_add("%1","xmm0","xmm2","xmm4","xmm6") |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
498 snow_vertical_compose_sse2_move("xmm0","xmm2","xmm4","xmm6","xmm1","xmm3","xmm5","xmm7") |
5595 | 499 snow_vertical_compose_sra("1","xmm0","xmm2","xmm4","xmm6") |
500 snow_vertical_compose_r2r_add("xmm1","xmm3","xmm5","xmm7","xmm0","xmm2","xmm4","xmm6") | |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
501 snow_vertical_compose_sse2_add("%2","xmm0","xmm2","xmm4","xmm6") |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
502 snow_vertical_compose_sse2_store("%2","xmm0","xmm2","xmm4","xmm6") |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
503 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
504 "2: \n\t" |
5596 | 505 "sub $64, %%"REG_d" \n\t" |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
506 "jge 1b \n\t" |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
507 :"+d"(i) |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
508 :"r"(b0),"r"(b1),"r"(b2),"r"(b3),"r"(b4),"r"(b5)); |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
509 } |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
510 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
511 #define snow_vertical_compose_mmx_load_add(op,r,t0,t1,t2,t3)\ |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
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diff
changeset
|
512 ""op" ("r",%%"REG_d"), %%"t0" \n\t"\ |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
513 ""op" 8("r",%%"REG_d"), %%"t1" \n\t"\ |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
514 ""op" 16("r",%%"REG_d"), %%"t2" \n\t"\ |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
515 ""op" 24("r",%%"REG_d"), %%"t3" \n\t" |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
516 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
517 #define snow_vertical_compose_mmx_load(r,t0,t1,t2,t3)\ |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
518 snow_vertical_compose_mmx_load_add("movq",r,t0,t1,t2,t3) |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
519 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
520 #define snow_vertical_compose_mmx_add(r,t0,t1,t2,t3)\ |
5591 | 521 snow_vertical_compose_mmx_load_add("paddw",r,t0,t1,t2,t3) |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
522 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
523 #define snow_vertical_compose_mmx_store(w,s0,s1,s2,s3)\ |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
524 "movq %%"s0", ("w",%%"REG_d") \n\t"\ |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
525 "movq %%"s1", 8("w",%%"REG_d") \n\t"\ |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
526 "movq %%"s2", 16("w",%%"REG_d") \n\t"\ |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
527 "movq %%"s3", 24("w",%%"REG_d") \n\t" |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
528 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
529 #define snow_vertical_compose_mmx_move(s0,s1,s2,s3,t0,t1,t2,t3)\ |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
530 "movq %%"s0", %%"t0" \n\t"\ |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
531 "movq %%"s1", %%"t1" \n\t"\ |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
532 "movq %%"s2", %%"t2" \n\t"\ |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
533 "movq %%"s3", %%"t3" \n\t" |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
534 |
5600
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
535 |
5591 | 536 void ff_snow_vertical_compose97i_mmx(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, IDWTELEM *b3, IDWTELEM *b4, IDWTELEM *b5, int width){ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
5613
diff
changeset
|
537 x86_reg i = width; |
5591 | 538 while(i & 15) |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
539 { |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
540 i--; |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
541 b4[i] -= (W_DM*(b3[i] + b5[i])+W_DO)>>W_DS; |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
542 b3[i] -= (W_CM*(b2[i] + b4[i])+W_CO)>>W_CS; |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
543 b2[i] += (W_BM*(b1[i] + b3[i])+4*b2[i]+W_BO)>>W_BS; |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
544 b1[i] += (W_AM*(b0[i] + b2[i])+W_AO)>>W_AS; |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
545 } |
5596 | 546 i+=i; |
8031 | 547 __asm__ volatile( |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
548 "jmp 2f \n\t" |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
549 "1: \n\t" |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
550 |
5600
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
551 snow_vertical_compose_mmx_load("%4","mm1","mm3","mm5","mm7") |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
552 snow_vertical_compose_mmx_add("%6","mm1","mm3","mm5","mm7") |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
553 "pcmpeqw %%mm0, %%mm0 \n\t" |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
554 "pcmpeqw %%mm2, %%mm2 \n\t" |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
555 "paddw %%mm2, %%mm2 \n\t" |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
556 "paddw %%mm0, %%mm2 \n\t" |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
557 "psllw $13, %%mm2 \n\t" |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
558 snow_vertical_compose_r2r_add("mm0","mm0","mm0","mm0","mm1","mm3","mm5","mm7") |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
559 snow_vertical_compose_r2r_pmulhw("mm2","mm2","mm2","mm2","mm1","mm3","mm5","mm7") |
f302e395f552
optimize the first vertical lifting step, this also prevents another
michael
parents:
5599
diff
changeset
|
560 snow_vertical_compose_mmx_add("%5","mm1","mm3","mm5","mm7") |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
561 snow_vertical_compose_mmx_store("%5","mm1","mm3","mm5","mm7") |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
562 snow_vertical_compose_mmx_load("%4","mm0","mm2","mm4","mm6") |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
563 snow_vertical_compose_mmx_add("%3","mm1","mm3","mm5","mm7") |
5595 | 564 snow_vertical_compose_r2r_sub("mm1","mm3","mm5","mm7","mm0","mm2","mm4","mm6") |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
565 snow_vertical_compose_mmx_store("%4","mm0","mm2","mm4","mm6") |
5594
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
566 "pcmpeqw %%mm7, %%mm7 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
567 "pcmpeqw %%mm5, %%mm5 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
568 "psllw $15, %%mm7 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
569 "psrlw $13, %%mm5 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
570 "paddw %%mm7, %%mm5 \n\t" |
5595 | 571 snow_vertical_compose_r2r_add("mm5","mm5","mm5","mm5","mm0","mm2","mm4","mm6") |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
572 "movq (%2,%%"REG_d"), %%mm1 \n\t" |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
573 "movq 8(%2,%%"REG_d"), %%mm3 \n\t" |
5594
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
574 "paddw %%mm7, %%mm1 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
575 "paddw %%mm7, %%mm3 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
576 "pavgw %%mm1, %%mm0 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
577 "pavgw %%mm3, %%mm2 \n\t" |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
578 "movq 16(%2,%%"REG_d"), %%mm1 \n\t" |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
579 "movq 24(%2,%%"REG_d"), %%mm3 \n\t" |
5594
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
580 "paddw %%mm7, %%mm1 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
581 "paddw %%mm7, %%mm3 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
582 "pavgw %%mm1, %%mm4 \n\t" |
384629ebcb93
avoid overflow in the 3rd lifting step, this now needs mmx2 at minimum
michael
parents:
5593
diff
changeset
|
583 "pavgw %%mm3, %%mm6 \n\t" |
5595 | 584 snow_vertical_compose_r2r_sub("mm7","mm7","mm7","mm7","mm0","mm2","mm4","mm6") |
585 snow_vertical_compose_sra("1","mm0","mm2","mm4","mm6") | |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
586 snow_vertical_compose_mmx_add("%3","mm0","mm2","mm4","mm6") |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
587 |
5595 | 588 snow_vertical_compose_sra("2","mm0","mm2","mm4","mm6") |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
589 snow_vertical_compose_mmx_add("%3","mm0","mm2","mm4","mm6") |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
590 snow_vertical_compose_mmx_store("%3","mm0","mm2","mm4","mm6") |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
591 snow_vertical_compose_mmx_add("%1","mm0","mm2","mm4","mm6") |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
592 snow_vertical_compose_mmx_move("mm0","mm2","mm4","mm6","mm1","mm3","mm5","mm7") |
5595 | 593 snow_vertical_compose_sra("1","mm0","mm2","mm4","mm6") |
594 snow_vertical_compose_r2r_add("mm1","mm3","mm5","mm7","mm0","mm2","mm4","mm6") | |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
595 snow_vertical_compose_mmx_add("%2","mm0","mm2","mm4","mm6") |
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
596 snow_vertical_compose_mmx_store("%2","mm0","mm2","mm4","mm6") |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
597 |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
598 "2: \n\t" |
5596 | 599 "sub $32, %%"REG_d" \n\t" |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
600 "jge 1b \n\t" |
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
601 :"+d"(i) |
5597
d350b388a6ae
get rid of totally senseless "m" + read in register we have enough
michael
parents:
5596
diff
changeset
|
602 :"r"(b0),"r"(b1),"r"(b2),"r"(b3),"r"(b4),"r"(b5)); |
3207
33110c1008a4
Add the mmx and sse2 implementations of ff_snow_vertical_compose().
gpoirier
parents:
diff
changeset
|
603 } |
5602 | 604 #endif //HAVE_7REGS |
3211
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents:
3210
diff
changeset
|
605 |
b77b5e7072d6
add MMX and SSE versions of ff_snow_inner_add_yblock
gpoirier
parents:
3210
diff
changeset
|
606 #define snow_inner_add_yblock_sse2_header \ |
5591 | 607 IDWTELEM * * dst_array = sb->line + src_y;\ |
6755
33896780c612
Do not misuse long as the size of a register in x86.
ramiro
parents:
5613
diff
changeset
|
608 x86_reg tmp;\ |
8031 | 609 __asm__ volatile(\ |
3566
b63ef6fcbc70
Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents:
3398
diff
changeset
|
610 "mov %7, %%"REG_c" \n\t"\ |
b63ef6fcbc70
Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents:
3398
diff
changeset
|
611 "mov %6, %2 \n\t"\ |
b63ef6fcbc70
Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
lu_zero
parents:
3398
diff
changeset
|
612 "mov %4, %%"REG_S" \n\t"\ |
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613 "pxor %%xmm7, %%xmm7 \n\t" /* 0 */\ |
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614 "pcmpeqd %%xmm3, %%xmm3 \n\t"\ |
5591 | 615 "psllw $15, %%xmm3 \n\t"\ |
616 "psrlw $12, %%xmm3 \n\t" /* FRAC_BITS >> 1 */\ | |
3211
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617 "1: \n\t"\ |
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618 "mov %1, %%"REG_D" \n\t"\ |
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619 "mov (%%"REG_D"), %%"REG_D" \n\t"\ |
3566
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Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
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620 "add %3, %%"REG_D" \n\t" |
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621 |
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622 #define snow_inner_add_yblock_sse2_start_8(out_reg1, out_reg2, ptr_offset, s_offset)\ |
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623 "mov "PTR_SIZE"*"ptr_offset"(%%"REG_a"), %%"REG_d"; \n\t"\ |
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624 "movq (%%"REG_d"), %%"out_reg1" \n\t"\ |
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625 "movq (%%"REG_d", %%"REG_c"), %%"out_reg2" \n\t"\ |
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626 "punpcklbw %%xmm7, %%"out_reg1" \n\t"\ |
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627 "punpcklbw %%xmm7, %%"out_reg2" \n\t"\ |
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628 "movq "s_offset"(%%"REG_S"), %%xmm0 \n\t"\ |
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629 "movq "s_offset"+16(%%"REG_S"), %%xmm4 \n\t"\ |
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630 "punpcklbw %%xmm7, %%xmm0 \n\t"\ |
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631 "punpcklbw %%xmm7, %%xmm4 \n\t"\ |
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632 "pmullw %%xmm0, %%"out_reg1" \n\t"\ |
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633 "pmullw %%xmm4, %%"out_reg2" \n\t" |
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634 |
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635 #define snow_inner_add_yblock_sse2_start_16(out_reg1, out_reg2, ptr_offset, s_offset)\ |
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636 "mov "PTR_SIZE"*"ptr_offset"(%%"REG_a"), %%"REG_d"; \n\t"\ |
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637 "movq (%%"REG_d"), %%"out_reg1" \n\t"\ |
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638 "movq 8(%%"REG_d"), %%"out_reg2" \n\t"\ |
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639 "punpcklbw %%xmm7, %%"out_reg1" \n\t"\ |
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640 "punpcklbw %%xmm7, %%"out_reg2" \n\t"\ |
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641 "movq "s_offset"(%%"REG_S"), %%xmm0 \n\t"\ |
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642 "movq "s_offset"+8(%%"REG_S"), %%xmm4 \n\t"\ |
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643 "punpcklbw %%xmm7, %%xmm0 \n\t"\ |
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644 "punpcklbw %%xmm7, %%xmm4 \n\t"\ |
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645 "pmullw %%xmm0, %%"out_reg1" \n\t"\ |
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646 "pmullw %%xmm4, %%"out_reg2" \n\t" |
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647 |
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648 #define snow_inner_add_yblock_sse2_accum_8(ptr_offset, s_offset) \ |
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649 snow_inner_add_yblock_sse2_start_8("xmm2", "xmm6", ptr_offset, s_offset)\ |
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650 "paddusw %%xmm2, %%xmm1 \n\t"\ |
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651 "paddusw %%xmm6, %%xmm5 \n\t" |
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652 |
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653 #define snow_inner_add_yblock_sse2_accum_16(ptr_offset, s_offset) \ |
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654 snow_inner_add_yblock_sse2_start_16("xmm2", "xmm6", ptr_offset, s_offset)\ |
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655 "paddusw %%xmm2, %%xmm1 \n\t"\ |
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656 "paddusw %%xmm6, %%xmm5 \n\t" |
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657 |
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658 #define snow_inner_add_yblock_sse2_end_common1\ |
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659 "add $32, %%"REG_S" \n\t"\ |
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660 "add %%"REG_c", %0 \n\t"\ |
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661 "add %%"REG_c", "PTR_SIZE"*3(%%"REG_a");\n\t"\ |
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662 "add %%"REG_c", "PTR_SIZE"*2(%%"REG_a");\n\t"\ |
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663 "add %%"REG_c", "PTR_SIZE"*1(%%"REG_a");\n\t"\ |
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664 "add %%"REG_c", (%%"REG_a") \n\t" |
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665 |
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666 #define snow_inner_add_yblock_sse2_end_common2\ |
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667 "jnz 1b \n\t"\ |
3566
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668 :"+m"(dst8),"+m"(dst_array),"=&r"(tmp)\ |
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669 :\ |
6755
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670 "rm"((x86_reg)(src_x<<1)),"m"(obmc),"a"(block),"m"((x86_reg)b_h),"m"((x86_reg)src_stride):\ |
3566
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671 "%"REG_c"","%"REG_S"","%"REG_D"","%"REG_d""); |
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672 |
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673 #define snow_inner_add_yblock_sse2_end_8\ |
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674 "sal $1, %%"REG_c" \n\t"\ |
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675 "add $"PTR_SIZE"*2, %1 \n\t"\ |
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676 snow_inner_add_yblock_sse2_end_common1\ |
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677 "sar $1, %%"REG_c" \n\t"\ |
3566
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678 "sub $2, %2 \n\t"\ |
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679 snow_inner_add_yblock_sse2_end_common2 |
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680 |
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681 #define snow_inner_add_yblock_sse2_end_16\ |
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682 "add $"PTR_SIZE"*1, %1 \n\t"\ |
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683 snow_inner_add_yblock_sse2_end_common1\ |
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|
684 "dec %2 \n\t"\ |
3211
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685 snow_inner_add_yblock_sse2_end_common2 |
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686 |
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687 static void inner_add_yblock_bw_8_obmc_16_bh_even_sse2(const uint8_t *obmc, const x86_reg obmc_stride, uint8_t * * block, int b_w, x86_reg b_h, |
33896780c612
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688 int src_x, int src_y, x86_reg src_stride, slice_buffer * sb, int add, uint8_t * dst8){ |
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689 snow_inner_add_yblock_sse2_header |
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690 snow_inner_add_yblock_sse2_start_8("xmm1", "xmm5", "3", "0") |
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691 snow_inner_add_yblock_sse2_accum_8("2", "8") |
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692 snow_inner_add_yblock_sse2_accum_8("1", "128") |
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693 snow_inner_add_yblock_sse2_accum_8("0", "136") |
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694 |
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695 "mov %0, %%"REG_d" \n\t" |
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696 "movdqa (%%"REG_D"), %%xmm0 \n\t" |
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697 "movdqa %%xmm1, %%xmm2 \n\t" |
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698 |
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699 "punpckhwd %%xmm7, %%xmm1 \n\t" |
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700 "punpcklwd %%xmm7, %%xmm2 \n\t" |
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701 "paddd %%xmm2, %%xmm0 \n\t" |
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702 "movdqa 16(%%"REG_D"), %%xmm2 \n\t" |
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703 "paddd %%xmm1, %%xmm2 \n\t" |
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704 "paddd %%xmm3, %%xmm0 \n\t" |
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705 "paddd %%xmm3, %%xmm2 \n\t" |
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|
706 |
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707 "mov %1, %%"REG_D" \n\t" |
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708 "mov "PTR_SIZE"(%%"REG_D"), %%"REG_D";\n\t" |
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709 "add %3, %%"REG_D" \n\t" |
3211
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710 |
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711 "movdqa (%%"REG_D"), %%xmm4 \n\t" |
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712 "movdqa %%xmm5, %%xmm6 \n\t" |
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713 "punpckhwd %%xmm7, %%xmm5 \n\t" |
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714 "punpcklwd %%xmm7, %%xmm6 \n\t" |
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715 "paddd %%xmm6, %%xmm4 \n\t" |
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716 "movdqa 16(%%"REG_D"), %%xmm6 \n\t" |
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717 "paddd %%xmm5, %%xmm6 \n\t" |
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718 "paddd %%xmm3, %%xmm4 \n\t" |
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719 "paddd %%xmm3, %%xmm6 \n\t" |
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720 |
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721 "psrad $8, %%xmm0 \n\t" /* FRAC_BITS. */ |
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722 "psrad $8, %%xmm2 \n\t" /* FRAC_BITS. */ |
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723 "packssdw %%xmm2, %%xmm0 \n\t" |
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724 "packuswb %%xmm7, %%xmm0 \n\t" |
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725 "movq %%xmm0, (%%"REG_d") \n\t" |
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726 |
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727 "psrad $8, %%xmm4 \n\t" /* FRAC_BITS. */ |
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728 "psrad $8, %%xmm6 \n\t" /* FRAC_BITS. */ |
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729 "packssdw %%xmm6, %%xmm4 \n\t" |
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730 "packuswb %%xmm7, %%xmm4 \n\t" |
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731 "movq %%xmm4, (%%"REG_d",%%"REG_c");\n\t" |
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732 snow_inner_add_yblock_sse2_end_8 |
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733 } |
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734 |
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735 static void inner_add_yblock_bw_16_obmc_32_sse2(const uint8_t *obmc, const x86_reg obmc_stride, uint8_t * * block, int b_w, x86_reg b_h, |
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736 int src_x, int src_y, x86_reg src_stride, slice_buffer * sb, int add, uint8_t * dst8){ |
3211
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737 snow_inner_add_yblock_sse2_header |
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738 snow_inner_add_yblock_sse2_start_16("xmm1", "xmm5", "3", "0") |
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739 snow_inner_add_yblock_sse2_accum_16("2", "16") |
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740 snow_inner_add_yblock_sse2_accum_16("1", "512") |
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741 snow_inner_add_yblock_sse2_accum_16("0", "528") |
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742 |
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743 "mov %0, %%"REG_d" \n\t" |
5591 | 744 "psrlw $4, %%xmm1 \n\t" |
745 "psrlw $4, %%xmm5 \n\t" | |
746 "paddw (%%"REG_D"), %%xmm1 \n\t" | |
747 "paddw 16(%%"REG_D"), %%xmm5 \n\t" | |
748 "paddw %%xmm3, %%xmm1 \n\t" | |
749 "paddw %%xmm3, %%xmm5 \n\t" | |
750 "psraw $4, %%xmm1 \n\t" /* FRAC_BITS. */ | |
751 "psraw $4, %%xmm5 \n\t" /* FRAC_BITS. */ | |
752 "packuswb %%xmm5, %%xmm1 \n\t" | |
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753 |
5591 | 754 "movdqu %%xmm1, (%%"REG_d") \n\t" |
3211
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755 |
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756 snow_inner_add_yblock_sse2_end_16 |
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757 } |
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|
758 |
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759 #define snow_inner_add_yblock_mmx_header \ |
5591 | 760 IDWTELEM * * dst_array = sb->line + src_y;\ |
6755
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761 x86_reg tmp;\ |
8031 | 762 __asm__ volatile(\ |
3566
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763 "mov %7, %%"REG_c" \n\t"\ |
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764 "mov %6, %2 \n\t"\ |
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Fix x86 SIMD asm and pic, patch from Martin von Gagern <Martin.vGagern@gmx.net>
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765 "mov %4, %%"REG_S" \n\t"\ |
3211
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766 "pxor %%mm7, %%mm7 \n\t" /* 0 */\ |
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767 "pcmpeqd %%mm3, %%mm3 \n\t"\ |
5591 | 768 "psllw $15, %%mm3 \n\t"\ |
769 "psrlw $12, %%mm3 \n\t" /* FRAC_BITS >> 1 */\ | |
3211
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770 "1: \n\t"\ |
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771 "mov %1, %%"REG_D" \n\t"\ |
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772 "mov (%%"REG_D"), %%"REG_D" \n\t"\ |
3566
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773 "add %3, %%"REG_D" \n\t" |
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774 |
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775 #define snow_inner_add_yblock_mmx_start(out_reg1, out_reg2, ptr_offset, s_offset, d_offset)\ |
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776 "mov "PTR_SIZE"*"ptr_offset"(%%"REG_a"), %%"REG_d"; \n\t"\ |
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777 "movd "d_offset"(%%"REG_d"), %%"out_reg1" \n\t"\ |
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778 "movd "d_offset"+4(%%"REG_d"), %%"out_reg2" \n\t"\ |
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779 "punpcklbw %%mm7, %%"out_reg1" \n\t"\ |
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780 "punpcklbw %%mm7, %%"out_reg2" \n\t"\ |
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781 "movd "s_offset"(%%"REG_S"), %%mm0 \n\t"\ |
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782 "movd "s_offset"+4(%%"REG_S"), %%mm4 \n\t"\ |
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783 "punpcklbw %%mm7, %%mm0 \n\t"\ |
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784 "punpcklbw %%mm7, %%mm4 \n\t"\ |
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785 "pmullw %%mm0, %%"out_reg1" \n\t"\ |
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786 "pmullw %%mm4, %%"out_reg2" \n\t" |
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787 |
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788 #define snow_inner_add_yblock_mmx_accum(ptr_offset, s_offset, d_offset) \ |
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789 snow_inner_add_yblock_mmx_start("mm2", "mm6", ptr_offset, s_offset, d_offset)\ |
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790 "paddusw %%mm2, %%mm1 \n\t"\ |
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791 "paddusw %%mm6, %%mm5 \n\t" |
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|
792 |
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793 #define snow_inner_add_yblock_mmx_mix(read_offset, write_offset)\ |
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794 "mov %0, %%"REG_d" \n\t"\ |
5591 | 795 "psrlw $4, %%mm1 \n\t"\ |
796 "psrlw $4, %%mm5 \n\t"\ | |
797 "paddw "read_offset"(%%"REG_D"), %%mm1 \n\t"\ | |
798 "paddw "read_offset"+8(%%"REG_D"), %%mm5 \n\t"\ | |
799 "paddw %%mm3, %%mm1 \n\t"\ | |
800 "paddw %%mm3, %%mm5 \n\t"\ | |
801 "psraw $4, %%mm1 \n\t"\ | |
802 "psraw $4, %%mm5 \n\t"\ | |
803 "packuswb %%mm5, %%mm1 \n\t"\ | |
804 "movq %%mm1, "write_offset"(%%"REG_d") \n\t" | |
3211
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805 |
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806 #define snow_inner_add_yblock_mmx_end(s_step)\ |
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807 "add $"s_step", %%"REG_S" \n\t"\ |
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808 "add %%"REG_c", "PTR_SIZE"*3(%%"REG_a");\n\t"\ |
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|
809 "add %%"REG_c", "PTR_SIZE"*2(%%"REG_a");\n\t"\ |
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|
810 "add %%"REG_c", "PTR_SIZE"*1(%%"REG_a");\n\t"\ |
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|
811 "add %%"REG_c", (%%"REG_a") \n\t"\ |
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812 "add $"PTR_SIZE"*1, %1 \n\t"\ |
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813 "add %%"REG_c", %0 \n\t"\ |
3566
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814 "dec %2 \n\t"\ |
3211
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|
815 "jnz 1b \n\t"\ |
3566
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816 :"+m"(dst8),"+m"(dst_array),"=&r"(tmp)\ |
3211
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817 :\ |
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818 "rm"((x86_reg)(src_x<<1)),"m"(obmc),"a"(block),"m"((x86_reg)b_h),"m"((x86_reg)src_stride):\ |
3566
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819 "%"REG_c"","%"REG_S"","%"REG_D"","%"REG_d""); |
3211
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820 |
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821 static void inner_add_yblock_bw_8_obmc_16_mmx(const uint8_t *obmc, const x86_reg obmc_stride, uint8_t * * block, int b_w, x86_reg b_h, |
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822 int src_x, int src_y, x86_reg src_stride, slice_buffer * sb, int add, uint8_t * dst8){ |
3211
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823 snow_inner_add_yblock_mmx_header |
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824 snow_inner_add_yblock_mmx_start("mm1", "mm5", "3", "0", "0") |
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825 snow_inner_add_yblock_mmx_accum("2", "8", "0") |
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826 snow_inner_add_yblock_mmx_accum("1", "128", "0") |
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827 snow_inner_add_yblock_mmx_accum("0", "136", "0") |
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828 snow_inner_add_yblock_mmx_mix("0", "0") |
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829 snow_inner_add_yblock_mmx_end("16") |
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830 } |
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831 |
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832 static void inner_add_yblock_bw_16_obmc_32_mmx(const uint8_t *obmc, const x86_reg obmc_stride, uint8_t * * block, int b_w, x86_reg b_h, |
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833 int src_x, int src_y, x86_reg src_stride, slice_buffer * sb, int add, uint8_t * dst8){ |
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834 snow_inner_add_yblock_mmx_header |
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835 snow_inner_add_yblock_mmx_start("mm1", "mm5", "3", "0", "0") |
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836 snow_inner_add_yblock_mmx_accum("2", "16", "0") |
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837 snow_inner_add_yblock_mmx_accum("1", "512", "0") |
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838 snow_inner_add_yblock_mmx_accum("0", "528", "0") |
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839 snow_inner_add_yblock_mmx_mix("0", "0") |
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840 |
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841 snow_inner_add_yblock_mmx_start("mm1", "mm5", "3", "8", "8") |
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842 snow_inner_add_yblock_mmx_accum("2", "24", "8") |
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843 snow_inner_add_yblock_mmx_accum("1", "520", "8") |
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844 snow_inner_add_yblock_mmx_accum("0", "536", "8") |
5591 | 845 snow_inner_add_yblock_mmx_mix("16", "8") |
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846 snow_inner_add_yblock_mmx_end("32") |
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847 } |
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848 |
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849 void ff_snow_inner_add_yblock_sse2(const uint8_t *obmc, const int obmc_stride, uint8_t * * block, int b_w, int b_h, |
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850 int src_x, int src_y, int src_stride, slice_buffer * sb, int add, uint8_t * dst8){ |
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851 |
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852 if (b_w == 16) |
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853 inner_add_yblock_bw_16_obmc_32_sse2(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8); |
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854 else if (b_w == 8 && obmc_stride == 16) { |
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855 if (!(b_h & 1)) |
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856 inner_add_yblock_bw_8_obmc_16_bh_even_sse2(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8); |
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857 else |
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858 inner_add_yblock_bw_8_obmc_16_mmx(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8); |
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859 } else |
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860 ff_snow_inner_add_yblock(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8); |
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861 } |
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862 |
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863 void ff_snow_inner_add_yblock_mmx(const uint8_t *obmc, const int obmc_stride, uint8_t * * block, int b_w, int b_h, |
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864 int src_x, int src_y, int src_stride, slice_buffer * sb, int add, uint8_t * dst8){ |
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865 if (b_w == 16) |
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866 inner_add_yblock_bw_16_obmc_32_mmx(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8); |
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867 else if (b_w == 8 && obmc_stride == 16) |
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868 inner_add_yblock_bw_8_obmc_16_mmx(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8); |
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869 else |
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870 ff_snow_inner_add_yblock(obmc, obmc_stride, block, b_w, b_h, src_x,src_y, src_stride, sb, add, dst8); |
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871 } |