annotate arm/simple_idct_neon.S @ 12512:58bd8cb86f5d libavcodec

Remove unused variable.
author rbultje
date Fri, 24 Sep 2010 15:31:46 +0000
parents 17a110bfdeb6
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
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1 /*
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2 * ARM NEON IDCT
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3 *
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4 * Copyright (c) 2008 Mans Rullgard <mans@mansr.com>
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5 *
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6 * Based on Simple IDCT
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7 * Copyright (c) 2001 Michael Niedermayer <michaelni@gmx.at>
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8 *
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9 * This file is part of FFmpeg.
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10 *
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11 * FFmpeg is free software; you can redistribute it and/or
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12 * modify it under the terms of the GNU Lesser General Public
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13 * License as published by the Free Software Foundation; either
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14 * version 2.1 of the License, or (at your option) any later version.
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15 *
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16 * FFmpeg is distributed in the hope that it will be useful,
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17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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19 * Lesser General Public License for more details.
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20 *
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21 * You should have received a copy of the GNU Lesser General Public
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22 * License along with FFmpeg; if not, write to the Free Software
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23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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24 */
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25
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26 #include "asm.S"
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27
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28 #define W1 22725 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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29 #define W2 21407 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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30 #define W3 19266 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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31 #define W4 16383 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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32 #define W5 12873 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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33 #define W6 8867 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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34 #define W7 4520 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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35 #define W4c ((1<<(COL_SHIFT-1))/W4)
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36 #define ROW_SHIFT 11
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37 #define COL_SHIFT 20
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38
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39 #define w1 d0[0]
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40 #define w2 d0[1]
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41 #define w3 d0[2]
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42 #define w4 d0[3]
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43 #define w5 d1[0]
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44 #define w6 d1[1]
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45 #define w7 d1[2]
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46 #define w4c d1[3]
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47
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48 .macro idct_col4_top
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49 vmull.s16 q7, d6, w2 /* q9 = W2 * col[2] */
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50 vmull.s16 q8, d6, w6 /* q10 = W6 * col[2] */
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51 vmull.s16 q9, d4, w1 /* q9 = W1 * col[1] */
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52 vadd.i32 q11, q15, q7
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53 vmull.s16 q10, d4, w3 /* q10 = W3 * col[1] */
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54 vadd.i32 q12, q15, q8
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55 vmull.s16 q5, d4, w5 /* q5 = W5 * col[1] */
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56 vsub.i32 q13, q15, q8
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57 vmull.s16 q6, d4, w7 /* q6 = W7 * col[1] */
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58 vsub.i32 q14, q15, q7
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59
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60 vmlal.s16 q9, d8, w3 /* q9 += W3 * col[3] */
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61 vmlsl.s16 q10, d8, w7 /* q10 -= W7 * col[3] */
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62 vmlsl.s16 q5, d8, w1 /* q5 -= W1 * col[3] */
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63 vmlsl.s16 q6, d8, w5 /* q6 -= W5 * col[3] */
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64 .endm
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65
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66 .text
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67 .align 6
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68
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69 function idct_row4_pld_neon
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70 pld [r0]
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71 add r3, r0, r1, lsl #2
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72 pld [r0, r1]
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73 pld [r0, r1, lsl #1]
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74 pld [r3, -r1]
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75 pld [r3]
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76 pld [r3, r1]
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77 add r3, r3, r1, lsl #1
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78 pld [r3]
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79 pld [r3, r1]
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80 endfunc
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81
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82 function idct_row4_neon
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83 vmov.i32 q15, #(1<<(ROW_SHIFT-1))
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84 vld1.64 {d2-d5}, [r2,:128]!
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85 vmlal.s16 q15, d2, w4 /* q15 += W4 * col[0] */
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86 vld1.64 {d6,d7}, [r2,:128]!
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87 vorr d10, d3, d5
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88 vld1.64 {d8,d9}, [r2,:128]!
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89 add r2, r2, #-64
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90
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91 vorr d11, d7, d9
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92 vorr d10, d10, d11
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93 vmov r3, r4, d10
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94
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95 idct_col4_top
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96
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97 orrs r3, r3, r4
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98 beq 1f
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99
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100 vmull.s16 q7, d3, w4 /* q7 = W4 * col[4] */
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101 vmlal.s16 q9, d5, w5 /* q9 += W5 * col[5] */
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102 vmlsl.s16 q10, d5, w1 /* q10 -= W1 * col[5] */
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103 vmull.s16 q8, d7, w2 /* q8 = W2 * col[6] */
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104 vmlal.s16 q5, d5, w7 /* q5 += W7 * col[5] */
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105 vadd.i32 q11, q11, q7
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106 vsub.i32 q12, q12, q7
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107 vsub.i32 q13, q13, q7
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108 vadd.i32 q14, q14, q7
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109 vmlal.s16 q6, d5, w3 /* q6 += W3 * col[5] */
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110 vmull.s16 q7, d7, w6 /* q7 = W6 * col[6] */
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111 vmlal.s16 q9, d9, w7
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112 vmlsl.s16 q10, d9, w5
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113 vmlal.s16 q5, d9, w3
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114 vmlsl.s16 q6, d9, w1
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115 vadd.i32 q11, q11, q7
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116 vsub.i32 q12, q12, q8
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117 vadd.i32 q13, q13, q8
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118 vsub.i32 q14, q14, q7
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119
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120 1: vadd.i32 q3, q11, q9
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121 vadd.i32 q4, q12, q10
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122 vshrn.i32 d2, q3, #ROW_SHIFT
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123 vshrn.i32 d4, q4, #ROW_SHIFT
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124 vadd.i32 q7, q13, q5
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125 vadd.i32 q8, q14, q6
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126 vtrn.16 d2, d4
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127 vshrn.i32 d6, q7, #ROW_SHIFT
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128 vshrn.i32 d8, q8, #ROW_SHIFT
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129 vsub.i32 q14, q14, q6
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130 vsub.i32 q11, q11, q9
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131 vtrn.16 d6, d8
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132 vsub.i32 q13, q13, q5
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133 vshrn.i32 d3, q14, #ROW_SHIFT
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134 vtrn.32 d2, d6
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135 vsub.i32 q12, q12, q10
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136 vtrn.32 d4, d8
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137 vshrn.i32 d5, q13, #ROW_SHIFT
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138 vshrn.i32 d7, q12, #ROW_SHIFT
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139 vshrn.i32 d9, q11, #ROW_SHIFT
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140
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141 vtrn.16 d3, d5
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142 vtrn.16 d7, d9
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143 vtrn.32 d3, d7
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144 vtrn.32 d5, d9
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145
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146 vst1.64 {d2-d5}, [r2,:128]!
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147 vst1.64 {d6-d9}, [r2,:128]!
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148
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149 bx lr
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150 endfunc
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151
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152 function idct_col4_neon
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153 mov ip, #16
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154 vld1.64 {d2}, [r2,:64], ip /* d2 = col[0] */
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155 vdup.16 d30, w4c
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156 vld1.64 {d4}, [r2,:64], ip /* d3 = col[1] */
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157 vadd.i16 d30, d30, d2
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158 vld1.64 {d6}, [r2,:64], ip /* d4 = col[2] */
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159 vmull.s16 q15, d30, w4 /* q15 = W4*(col[0]+(1<<COL_SHIFT-1)/W4)*/
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160 vld1.64 {d8}, [r2,:64], ip /* d5 = col[3] */
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161
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162 ldrd r4, [r2]
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163 ldrd r6, [r2, #16]
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164 orrs r4, r4, r5
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165
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166 idct_col4_top
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167 addeq r2, r2, #16
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168 beq 1f
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169
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
170 vld1.64 {d3}, [r2,:64], ip /* d6 = col[4] */
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
171 vmull.s16 q7, d3, w4 /* q7 = W4 * col[4] */
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
172 vadd.i32 q11, q11, q7
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
173 vsub.i32 q12, q12, q7
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
174 vsub.i32 q13, q13, q7
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
175 vadd.i32 q14, q14, q7
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
176
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
177 1: orrs r6, r6, r7
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
178 ldrd r4, [r2, #16]
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
179 addeq r2, r2, #16
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
180 beq 2f
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
181
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
182 vld1.64 {d5}, [r2,:64], ip /* d7 = col[5] */
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
183 vmlal.s16 q9, d5, w5 /* q9 += W5 * col[5] */
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
184 vmlsl.s16 q10, d5, w1 /* q10 -= W1 * col[5] */
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
185 vmlal.s16 q5, d5, w7 /* q5 += W7 * col[5] */
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
186 vmlal.s16 q6, d5, w3 /* q6 += W3 * col[5] */
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
187
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
188 2: orrs r4, r4, r5
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
189 ldrd r4, [r2, #16]
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
190 addeq r2, r2, #16
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
191 beq 3f
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
192
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
193 vld1.64 {d7}, [r2,:64], ip /* d8 = col[6] */
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
194 vmull.s16 q7, d7, w6 /* q7 = W6 * col[6] */
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
195 vmull.s16 q8, d7, w2 /* q8 = W2 * col[6] */
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
196 vadd.i32 q11, q11, q7
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
197 vsub.i32 q14, q14, q7
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
198 vsub.i32 q12, q12, q8
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
199 vadd.i32 q13, q13, q8
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
200
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
201 3: orrs r4, r4, r5
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
202 addeq r2, r2, #16
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
203 beq 4f
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
204
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
205 vld1.64 {d9}, [r2,:64], ip /* d9 = col[7] */
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
206 vmlal.s16 q9, d9, w7
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
207 vmlsl.s16 q10, d9, w5
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
208 vmlal.s16 q5, d9, w3
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
209 vmlsl.s16 q6, d9, w1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
210
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
211 4: vaddhn.i32 d2, q11, q9
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
212 vaddhn.i32 d3, q12, q10
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
213 vaddhn.i32 d4, q13, q5
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
214 vaddhn.i32 d5, q14, q6
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
215 vsubhn.i32 d9, q11, q9
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
216 vsubhn.i32 d8, q12, q10
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
217 vsubhn.i32 d7, q13, q5
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
218 vsubhn.i32 d6, q14, q6
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
219
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
220 bx lr
11443
361a5fcb4393 ARM: set size of asm functions in object files
mru
parents: 10349
diff changeset
221 endfunc
8335
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
222
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
223 .align 6
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
224
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
225 function idct_col4_st8_neon
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
226 vqshrun.s16 d2, q1, #COL_SHIFT-16
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
227 vqshrun.s16 d3, q2, #COL_SHIFT-16
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
228 vqshrun.s16 d4, q3, #COL_SHIFT-16
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
229 vqshrun.s16 d5, q4, #COL_SHIFT-16
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
230 vst1.32 {d2[0]}, [r0,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
231 vst1.32 {d2[1]}, [r0,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
232 vst1.32 {d3[0]}, [r0,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
233 vst1.32 {d3[1]}, [r0,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
234 vst1.32 {d4[0]}, [r0,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
235 vst1.32 {d4[1]}, [r0,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
236 vst1.32 {d5[0]}, [r0,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
237 vst1.32 {d5[1]}, [r0,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
238
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
239 bx lr
11443
361a5fcb4393 ARM: set size of asm functions in object files
mru
parents: 10349
diff changeset
240 endfunc
8335
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
241
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
242 .section .rodata
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
243 .align 4
8506
1a629032b24a ARM: rename coefficient table in NEON IDCT
mru
parents: 8359
diff changeset
244 idct_coeff_neon:
1a629032b24a ARM: rename coefficient table in NEON IDCT
mru
parents: 8359
diff changeset
245 .short W1, W2, W3, W4, W5, W6, W7, W4c
8335
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
246
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
247 .macro idct_start data
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
248 push {r4-r7, lr}
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
249 pld [\data]
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
250 pld [\data, #64]
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
251 vpush {d8-d15}
8507
779a9c93bf61 ARM: work around linker bug with movw/movt relocations in shared libs
mru
parents: 8506
diff changeset
252 movrel r3, idct_coeff_neon
8335
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
253 vld1.64 {d0,d1}, [r3,:128]
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
254 .endm
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
255
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
256 .macro idct_end
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
257 vpop {d8-d15}
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
258 pop {r4-r7, pc}
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
259 .endm
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
260
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
261 /* void ff_simple_idct_put_neon(uint8_t *dst, int line_size, DCTELEM *data); */
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
262 function ff_simple_idct_put_neon, export=1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
263 idct_start r2
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
264
9724
c65cfd4ad000 ARM: add some PLD in NEON IDCT
mru
parents: 8507
diff changeset
265 bl idct_row4_pld_neon
8335
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
266 bl idct_row4_neon
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
267 add r2, r2, #-128
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
268 bl idct_col4_neon
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
269 bl idct_col4_st8_neon
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
270 sub r0, r0, r1, lsl #3
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
271 add r0, r0, #4
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
272 add r2, r2, #-120
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
273 bl idct_col4_neon
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
274 bl idct_col4_st8_neon
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
275
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
276 idct_end
11443
361a5fcb4393 ARM: set size of asm functions in object files
mru
parents: 10349
diff changeset
277 endfunc
8335
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
278
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
279 .align 6
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
280
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
281 function idct_col4_add8_neon
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
282 mov ip, r0
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
283
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
284 vld1.32 {d10[0]}, [r0,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
285 vshr.s16 q1, q1, #COL_SHIFT-16
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
286 vld1.32 {d10[1]}, [r0,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
287 vshr.s16 q2, q2, #COL_SHIFT-16
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
288 vld1.32 {d11[0]}, [r0,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
289 vshr.s16 q3, q3, #COL_SHIFT-16
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
290 vld1.32 {d11[1]}, [r0,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
291 vshr.s16 q4, q4, #COL_SHIFT-16
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
292 vld1.32 {d12[0]}, [r0,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
293 vaddw.u8 q1, q1, d10
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
294 vld1.32 {d12[1]}, [r0,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
295 vaddw.u8 q2, q2, d11
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
296 vld1.32 {d13[0]}, [r0,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
297 vqmovun.s16 d2, q1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
298 vld1.32 {d13[1]}, [r0,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
299 vaddw.u8 q3, q3, d12
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
300 vst1.32 {d2[0]}, [ip,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
301 vqmovun.s16 d3, q2
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
302 vst1.32 {d2[1]}, [ip,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
303 vaddw.u8 q4, q4, d13
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
304 vst1.32 {d3[0]}, [ip,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
305 vqmovun.s16 d4, q3
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
306 vst1.32 {d3[1]}, [ip,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
307 vqmovun.s16 d5, q4
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
308 vst1.32 {d4[0]}, [ip,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
309 vst1.32 {d4[1]}, [ip,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
310 vst1.32 {d5[0]}, [ip,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
311 vst1.32 {d5[1]}, [ip,:32], r1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
312
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
313 bx lr
11443
361a5fcb4393 ARM: set size of asm functions in object files
mru
parents: 10349
diff changeset
314 endfunc
8335
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
315
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
316 /* void ff_simple_idct_add_neon(uint8_t *dst, int line_size, DCTELEM *data); */
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
317 function ff_simple_idct_add_neon, export=1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
318 idct_start r2
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
319
9724
c65cfd4ad000 ARM: add some PLD in NEON IDCT
mru
parents: 8507
diff changeset
320 bl idct_row4_pld_neon
8335
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
321 bl idct_row4_neon
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
322 add r2, r2, #-128
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
323 bl idct_col4_neon
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
324 bl idct_col4_add8_neon
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
325 sub r0, r0, r1, lsl #3
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
326 add r0, r0, #4
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
327 add r2, r2, #-120
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
328 bl idct_col4_neon
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
329 bl idct_col4_add8_neon
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
330
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
331 idct_end
11443
361a5fcb4393 ARM: set size of asm functions in object files
mru
parents: 10349
diff changeset
332 endfunc
8335
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
333
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
334 .align 6
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
335
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
336 function idct_col4_st16_neon
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
337 mov ip, #16
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
338
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
339 vshr.s16 q1, q1, #COL_SHIFT-16
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
340 vshr.s16 q2, q2, #COL_SHIFT-16
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
341 vst1.64 {d2}, [r2,:64], ip
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
342 vshr.s16 q3, q3, #COL_SHIFT-16
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
343 vst1.64 {d3}, [r2,:64], ip
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
344 vshr.s16 q4, q4, #COL_SHIFT-16
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
345 vst1.64 {d4}, [r2,:64], ip
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
346 vst1.64 {d5}, [r2,:64], ip
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
347 vst1.64 {d6}, [r2,:64], ip
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
348 vst1.64 {d7}, [r2,:64], ip
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
349 vst1.64 {d8}, [r2,:64], ip
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
350 vst1.64 {d9}, [r2,:64], ip
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
351
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
352 bx lr
11443
361a5fcb4393 ARM: set size of asm functions in object files
mru
parents: 10349
diff changeset
353 endfunc
8335
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
354
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
355 /* void ff_simple_idct_neon(DCTELEM *data); */
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
356 function ff_simple_idct_neon, export=1
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
357 idct_start r0
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
358
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
359 mov r2, r0
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
360 bl idct_row4_neon
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
361 bl idct_row4_neon
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
362 add r2, r2, #-128
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
363 bl idct_col4_neon
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
364 add r2, r2, #-128
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
365 bl idct_col4_st16_neon
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
366 add r2, r2, #-120
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
367 bl idct_col4_neon
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
368 add r2, r2, #-128
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
369 bl idct_col4_st16_neon
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
370
f19fe0cade86 ARM: NEON optimised simple_idct
mru
parents:
diff changeset
371 idct_end
11443
361a5fcb4393 ARM: set size of asm functions in object files
mru
parents: 10349
diff changeset
372 endfunc