annotate common.h @ 234:5fc0c3af3fe4 libavcodec

alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
author michaelni
date Tue, 12 Feb 2002 15:43:16 +0000
parents e80ad397d30e
children 41f0ef2cd942
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1 #ifndef COMMON_H
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2 #define COMMON_H
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3
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4 #define FFMPEG_VERSION_INT 0x000406
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5 #define FFMPEG_VERSION "0.4.6"
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6
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7 #if defined(WIN32) && !defined(__MINGW32__) && !defined(__CYGWIN__)
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8 #define CONFIG_WIN32
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9 #endif
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10
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11 //#define ALT_BITSTREAM_WRITER
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12 //#define ALT_BITSTREAM_READER
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13 //#define ALIGNED_BITSTREAM
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14 #define FAST_GET_FIRST_VLC
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16 #ifdef HAVE_AV_CONFIG_H
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17 /* only include the following when compiling package */
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18 #include "../config.h"
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19
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20 #include <stdlib.h>
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21 #include <stdio.h>
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22 #include <string.h>
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23 #include <errno.h>
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24
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25 #ifndef ENODATA
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26 #define ENODATA 61
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27 #endif
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29 #endif
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30
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31 #ifdef CONFIG_WIN32
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32
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33 /* windows */
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34
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35 typedef unsigned short UINT16;
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36 typedef signed short INT16;
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37 typedef unsigned char UINT8;
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38 typedef unsigned int UINT32;
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39 typedef unsigned __int64 UINT64;
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40 typedef signed char INT8;
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41 typedef signed int INT32;
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42 typedef signed __int64 INT64;
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43
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44 typedef UINT8 uint8_t;
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45 typedef INT8 int8_t;
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46 typedef UINT16 uint16_t;
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47 typedef INT16 int16_t;
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48 typedef UINT32 uint32_t;
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49 typedef INT32 int32_t;
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50
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51 #ifndef __MINGW32__
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52 #define INT64_C(c) (c ## i64)
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53 #define UINT64_C(c) (c ## i64)
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54
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55 #define inline __inline
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56
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57 /*
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58 Disable warning messages:
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59 warning C4244: '=' : conversion from 'double' to 'float', possible loss of data
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60 warning C4305: 'argument' : truncation from 'const double' to 'float'
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61 */
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62 #pragma warning( disable : 4244 )
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63 #pragma warning( disable : 4305 )
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65 #else
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66 #define INT64_C(c) (c ## LL)
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67 #define UINT64_C(c) (c ## ULL)
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68 #endif /* __MINGW32__ */
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69
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70 #define M_PI 3.14159265358979323846
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71 #define M_SQRT2 1.41421356237309504880 /* sqrt(2) */
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72
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73 #ifdef _DEBUG
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74 #define DEBUG
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75 #endif
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76
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77 // code from bits/byteswap.h (C) 1997, 1998 Free Software Foundation, Inc.
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78 #define bswap_32(x) \
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79 ((((x) & 0xff000000) >> 24) | (((x) & 0x00ff0000) >> 8) | \
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80 (((x) & 0x0000ff00) << 8) | (((x) & 0x000000ff) << 24))
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81 #define be2me_32(x) bswap_32(x)
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82
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83 #define snprintf _snprintf
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84
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85 #ifndef __MINGW32__
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86 /* no config.h with VC */
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87 #define CONFIG_ENCODERS 1
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88 #define CONFIG_DECODERS 1
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89 #define CONFIG_AC3 1
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90 #endif
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91
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92 #else
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93
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94 /* unix */
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95
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96 #include <inttypes.h>
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98 #ifndef __WINE_WINDEF16_H
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99 /* workaround for typedef conflict in MPlayer (wine typedefs) */
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100 typedef unsigned short UINT16;
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101 typedef signed short INT16;
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102 #endif
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103
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104 typedef unsigned char UINT8;
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105 typedef unsigned int UINT32;
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106 typedef unsigned long long UINT64;
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107 typedef signed char INT8;
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108 typedef signed int INT32;
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109 typedef signed long long INT64;
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110
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111 #ifdef HAVE_AV_CONFIG_H
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112
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113 #ifdef __FreeBSD__
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114 #include <sys/param.h>
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115 #endif
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116
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117 #ifndef INT64_C
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118 #define INT64_C(c) (c ## LL)
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119 #define UINT64_C(c) (c ## ULL)
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120 #endif
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121
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122 #include "../bswap.h"
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123
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124 #ifdef USE_FASTMEMCPY
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125 #include "fastmemcpy.h"
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126 #endif
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127
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128 #endif /* HAVE_AV_CONFIG_H */
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129
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130 #endif /* !CONFIG_WIN32 */
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131
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132
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133 /* debug stuff */
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134 #ifdef HAVE_AV_CONFIG_H
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135
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136 #ifndef DEBUG
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137 #define NDEBUG
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138 #endif
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139 #include <assert.h>
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140
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141 /* dprintf macros */
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142 #if defined(CONFIG_WIN32) && !defined(__MINGW32__)
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143
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144 inline void dprintf(const char* fmt,...) {}
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145
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146 #else
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147
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148 #ifdef DEBUG
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149 #define dprintf(fmt,args...) printf(fmt, ## args)
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150 #else
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151 #define dprintf(fmt,args...)
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152 #endif
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153
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154 #endif /* !CONFIG_WIN32 */
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155
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156 #endif /* HAVE_AV_CONFIG_H */
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157
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158 /* bit output */
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159
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160 struct PutBitContext;
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161
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162 typedef void (*WriteDataFunc)(void *, UINT8 *, int);
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163
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164 typedef struct PutBitContext {
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165 #ifdef ALT_BITSTREAM_WRITER
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166 UINT8 *buf, *buf_end;
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167 int index;
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168 #else
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169 UINT32 bit_buf;
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170 int bit_cnt;
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171 UINT8 *buf, *buf_ptr, *buf_end;
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172 void *opaque;
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173 WriteDataFunc write_data;
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174 #endif
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175 INT64 data_out_size; /* in bytes */
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176 } PutBitContext;
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177
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178 void init_put_bits(PutBitContext *s,
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179 UINT8 *buffer, int buffer_size,
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180 void *opaque,
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181 void (*write_data)(void *, UINT8 *, int));
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182
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183 #ifndef ALT_BITSTREAM_WRITER
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184 void put_bits(PutBitContext *s, int n, unsigned int value);
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185 #endif
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186
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187 INT64 get_bit_count(PutBitContext *s); /* XXX: change function name */
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188 void align_put_bits(PutBitContext *s);
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189 void flush_put_bits(PutBitContext *s);
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190
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191 /* jpeg specific put_bits */
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192 #ifndef ALT_BITSTREAM_WRITER
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193 void jput_bits(PutBitContext *s, int n, unsigned int value);
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194 #endif
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195 void jflush_put_bits(PutBitContext *s);
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196
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197 /* bit input */
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198
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199 typedef struct GetBitContext {
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200 #ifdef ALT_BITSTREAM_READER
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201 int index;
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202 UINT8 *buffer;
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203 #else
20
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204 UINT32 bit_buf;
0
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205 int bit_cnt;
20
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206 UINT8 *buf, *buf_ptr, *buf_end;
192
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207 #endif
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208 } GetBitContext;
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209
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210 typedef struct VLC {
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211 int bits;
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212 INT16 *table_codes;
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213 INT8 *table_bits;
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214 int table_size, table_allocated;
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215 } VLC;
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216
193
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217 /* used to avoid missaligned exceptions on some archs (alpha, ...) */
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218 #ifdef ARCH_X86
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219 #define unaligned32(a) (*(UINT32*)(a))
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220 #else
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221 #ifdef __GNUC__
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222 static inline uint32_t unaligned32(const void *v) {
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223 struct Unaligned {
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224 uint32_t i;
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225 } __attribute__((packed));
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226
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227 return ((const struct Unaligned *) v)->i;
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228 }
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229 #elif defined(__DECC)
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230 static inline uint32_t unaligned32(const void *v) {
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231 return *(const __unaligned uint32_t *) v;
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232 }
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233 #else
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234 static inline uint32_t unaligned32(const void *v) {
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235 return *(const uint32_t *) v;
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236 }
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237 #endif
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238 #endif //!ARCH_X86
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239
234
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240 #ifdef ALT_BITSTREAM_WRITER
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241 static inline void put_bits(PutBitContext *s, int n, int value)
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242 {
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243 #ifdef ARCH_X86
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244 asm volatile(
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245 "movl $7, %%ecx \n\t"
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246 "andl %0, %%ecx \n\t"
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247 "addl %3, %%ecx \n\t"
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248 "negl %%ecx \n\t"
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249 "shll %%cl, %1 \n\t"
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250 "bswapl %1 \n\t"
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251 "movl %0, %%ecx \n\t"
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252 "shrl $3, %%ecx \n\t"
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253 "orl %1, (%%ecx, %2) \n\t"
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254 "addl %3, %0 \n\t"
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255 "movl $0, 4(%%ecx, %2) \n\t"
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256 : "=&r" (s->index), "=&r" (value)
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257 : "r" (s->buf), "r" (n), "0" (s->index), "1" (value)
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258 : "%ecx"
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259 );
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260 #else
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261 int index= s->index;
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262 uint32_t *ptr= (uint32_t*)(((uint8_t *)s->buf)+(index>>3));
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263
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264 ptr[0] |= be2me_32(value<<(32-n-(index&7) ));
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265 ptr[1] = 0;
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266 //if(n>24) printf("%d %d\n", n, value);
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267 index+= n;
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268 s->index= index;
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269 #endif
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270 }
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271 #endif
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272
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273 #ifdef ALT_BITSTREAM_WRITER
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274 static inline void jput_bits(PutBitContext *s, int n, int value)
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275 {
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276 int index= s->index;
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277 uint32_t *ptr= (uint32_t*)(((uint8_t *)s->buf)+(index>>3));
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278 int v= ptr[0];
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279 //if(n>24) printf("%d %d\n", n, value);
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280
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281 v |= be2me_32(value<<(32-n-(index&7) ));
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282 if(((v+0x01010101)^0xFFFFFFFF)&v&0x80808080)
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283 {
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284 /* handle idiotic (m)jpeg escapes */
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285 uint8_t *bPtr= (uint8_t*)ptr;
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286 int numChecked= ((index+n)>>3) - (index>>3);
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287
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288 v= be2me_32(v);
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289
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290 *(bPtr++)= v>>24;
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291 if((v&0xFF000000)==0xFF000000 && numChecked>0){
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292 *(bPtr++)= 0x00;
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293 index+=8;
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294 }
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295 *(bPtr++)= (v>>16)&0xFF;
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296 if((v&0x00FF0000)==0x00FF0000 && numChecked>1){
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297 *(bPtr++)= 0x00;
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298 index+=8;
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299 }
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300 *(bPtr++)= (v>>8)&0xFF;
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301 if((v&0x0000FF00)==0x0000FF00 && numChecked>2){
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302 *(bPtr++)= 0x00;
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303 index+=8;
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304 }
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305 *(bPtr++)= v&0xFF;
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306 if((v&0x000000FF)==0x000000FF && numChecked>3){
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307 *(bPtr++)= 0x00;
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308 index+=8;
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309 }
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310 *((uint32_t*)bPtr)= 0;
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311 }
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312 else
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313 {
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314 ptr[0] = v;
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315 ptr[1] = 0;
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316 }
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317
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318 index+= n;
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319 s->index= index;
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320 }
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321 #endif
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322
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
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323
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
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324 static inline uint8_t* pbBufPtr(PutBitContext *s)
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325 {
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326 #ifdef ALT_BITSTREAM_WRITER
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327 return s->buf + (s->index>>3);
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328 #else
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
329 return s->buf_ptr;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
330 #endif
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
331 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
332
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
333 void init_get_bits(GetBitContext *s,
986e461dc072 Initial revision
glantau
parents:
diff changeset
334 UINT8 *buffer, int buffer_size);
986e461dc072 Initial revision
glantau
parents:
diff changeset
335
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
336 #ifndef ALT_BITSTREAM_READER
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
337 unsigned int get_bits_long(GetBitContext *s, int n);
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
338 unsigned int show_bits_long(GetBitContext *s, int n);
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
339 #endif
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
340
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
341 static inline unsigned int get_bits(GetBitContext *s, int n){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
342 #ifdef ALT_BITSTREAM_READER
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
343 #ifdef ALIGNED_BITSTREAM
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
344 int index= s->index;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
345 uint32_t result1= be2me_32( ((uint32_t *)s->buffer)[index>>5] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
346 uint32_t result2= be2me_32( ((uint32_t *)s->buffer)[(index>>5) + 1] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
347 #ifdef ARCH_X86
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
348 asm ("shldl %%cl, %2, %0\n\t"
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
349 : "=r" (result1)
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
350 : "0" (result1), "r" (result2), "c" (index));
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
351 #else
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
352 result1<<= (index&0x1F);
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
353 result2= (result2>>1) >> (31-(index&0x1F));
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
354 result1|= result2;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
355 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
356 result1>>= 32 - n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
357 index+= n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
358 s->index= index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
359
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
360 return result1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
361 #else //ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
362 int index= s->index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
363 uint32_t result= be2me_32( unaligned32( ((uint8_t *)s->buffer)+(index>>3) ) );
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
364
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
365 result<<= (index&0x07);
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
366 result>>= 32 - n;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
367 index+= n;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
368 s->index= index;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
369
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
370 return result;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
371 #endif //!ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
372 #else //ALT_BITSTREAM_READER
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
373 if(s->bit_cnt>=n){
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
374 /* most common case here */
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
375 unsigned int val = s->bit_buf >> (32 - n);
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
376 s->bit_buf <<= n;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
377 s->bit_cnt -= n;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
378 #ifdef STATS
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
379 st_bit_counts[st_current_index] += n;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
380 #endif
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
381 return val;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
382 }
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
383 return get_bits_long(s,n);
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
384 #endif //!ALT_BITSTREAM_READER
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
385 }
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
386
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
387 static inline unsigned int get_bits1(GetBitContext *s){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
388 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
389 int index= s->index;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
390 uint8_t result= s->buffer[ index>>3 ];
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
391 result<<= (index&0x07);
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
392 result>>= 8 - 1;
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
393 index++;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
394 s->index= index;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
395
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
396 return result;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
397 #else
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
398 if(s->bit_cnt>0){
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
399 /* most common case here */
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
400 unsigned int val = s->bit_buf >> 31;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
401 s->bit_buf <<= 1;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
402 s->bit_cnt--;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
403 #ifdef STATS
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
404 st_bit_counts[st_current_index]++;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
405 #endif
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
406 return val;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
407 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
408 return get_bits_long(s,1);
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
409 #endif
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
410 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
411
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
412 /* This function is identical to get_bits(), the only */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
413 /* diference is that it doesn't touch the buffer */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
414 /* it is usefull to see the buffer. */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
415 static inline unsigned int show_bits(GetBitContext *s, int n)
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
416 {
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
417 #ifdef ALT_BITSTREAM_READER
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
418 #ifdef ALIGNED_BITSTREAM
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
419 int index= s->index;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
420 uint32_t result1= be2me_32( ((uint32_t *)s->buffer)[index>>5] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
421 uint32_t result2= be2me_32( ((uint32_t *)s->buffer)[(index>>5) + 1] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
422 #ifdef ARCH_X86
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
423 asm ("shldl %%cl, %2, %0\n\t"
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
424 : "=r" (result1)
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
425 : "0" (result1), "r" (result2), "c" (index));
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
426 #else
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
427 result1<<= (index&0x1F);
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
428 result2= (result2>>1) >> (31-(index&0x1F));
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
429 result1|= result2;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
430 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
431 result1>>= 32 - n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
432
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
433 return result1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
434 #else //ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
435 int index= s->index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
436 uint32_t result= be2me_32( unaligned32( ((uint8_t *)s->buffer)+(index>>3) ) );
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
437
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
438 result<<= (index&0x07);
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
439 result>>= 32 - n;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
440
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
441 return result;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
442 #endif //!ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
443 #else //ALT_BITSTREAM_READER
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
444 if(s->bit_cnt>=n) {
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
445 /* most common case here */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
446 unsigned int val = s->bit_buf >> (32 - n);
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
447 return val;
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
448 }
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
449 return show_bits_long(s,n);
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
450 #endif //!ALT_BITSTREAM_READER
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
451 }
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
452
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
453 static inline void skip_bits(GetBitContext *s, int n){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
454 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
455 s->index+= n;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
456 #else
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
457 if(s->bit_cnt>=n){
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
458 /* most common case here */
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
459 s->bit_buf <<= n;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
460 s->bit_cnt -= n;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
461 #ifdef STATS
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
462 st_bit_counts[st_current_index] += n;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
463 #endif
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
464 } else {
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
465 get_bits_long(s,n);
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
466 }
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
467 #endif
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
468 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
469
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
470 static inline void skip_bits1(GetBitContext *s){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
471 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
472 s->index++;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
473 #else
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
474 if(s->bit_cnt>0){
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
475 /* most common case here */
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
476 s->bit_buf <<= 1;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
477 s->bit_cnt--;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
478 #ifdef STATS
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
479 st_bit_counts[st_current_index]++;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
480 #endif
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
481 } else {
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
482 get_bits_long(s,1);
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
483 }
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
484 #endif
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
485 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
486
85
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
487 static inline int get_bits_count(GetBitContext *s)
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
488 {
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
489 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
490 return s->index;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
491 #else
85
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
492 return (s->buf_ptr - s->buf) * 8 - s->bit_cnt;
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
493 #endif
85
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
494 }
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
495
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
496 void align_get_bits(GetBitContext *s);
986e461dc072 Initial revision
glantau
parents:
diff changeset
497 int init_vlc(VLC *vlc, int nb_bits, int nb_codes,
986e461dc072 Initial revision
glantau
parents:
diff changeset
498 const void *bits, int bits_wrap, int bits_size,
986e461dc072 Initial revision
glantau
parents:
diff changeset
499 const void *codes, int codes_wrap, int codes_size);
986e461dc072 Initial revision
glantau
parents:
diff changeset
500 void free_vlc(VLC *vlc);
986e461dc072 Initial revision
glantau
parents:
diff changeset
501
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
502 #ifdef ALT_BITSTREAM_READER
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
503 #ifdef ALIGNED_BITSTREAM
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
504 #ifdef ARCH_X86
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
505 #define SHOW_BITS(s, val, n) \
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
506 val= be2me_32( ((uint32_t *)(s)->buffer)[bit_cnt>>5] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
507 {uint32_t result2= be2me_32( ((uint32_t *)(s)->buffer)[(bit_cnt>>5) + 1] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
508 asm ("shldl %%cl, %2, %0\n\t"\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
509 : "=r" (val)\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
510 : "0" (val), "r" (result2), "c" (bit_cnt));\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
511 ((uint32_t)val)>>= 32 - n;}
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
512 #else //ARCH_X86
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
513 #define SHOW_BITS(s, val, n) \
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
514 val= be2me_32( ((uint32_t *)(s)->buffer)[bit_cnt>>5] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
515 {uint32_t result2= be2me_32( ((uint32_t *)(s)->buffer)[(bit_cnt>>5) + 1] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
516 val<<= (bit_cnt&0x1F);\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
517 result2= (result2>>1) >> (31-(bit_cnt&0x1F));\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
518 val|= result2;\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
519 ((uint32_t)val)>>= 32 - n;}
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
520 #endif //!ARCH_X86
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
521 #else //ALIGNED_BITSTREAM
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
522 #define SHOW_BITS(s, val, n) \
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
523 val= be2me_32( unaligned32( ((uint8_t *)(s)->buffer)+(bit_cnt>>3) ) );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
524 val<<= (bit_cnt&0x07);\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
525 ((uint32_t)val)>>= 32 - n;
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
526 #endif // !ALIGNED_BITSTREAM
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
527 #define FLUSH_BITS(n) bit_cnt+=n;
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
528 #define SAVE_BITS(s) bit_cnt= (s)->index;
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
529 #define RESTORE_BITS(s) (s)->index= bit_cnt;
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
530 #else
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
531
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
532 /* macro to go faster */
986e461dc072 Initial revision
glantau
parents:
diff changeset
533 /* n must be <= 24 */
986e461dc072 Initial revision
glantau
parents:
diff changeset
534 /* XXX: optimize buffer end test */
986e461dc072 Initial revision
glantau
parents:
diff changeset
535 #define SHOW_BITS(s, val, n)\
986e461dc072 Initial revision
glantau
parents:
diff changeset
536 {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
537 if (bit_cnt < n && buf_ptr < (s)->buf_end) {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
538 bit_buf |= *buf_ptr++ << (24 - bit_cnt);\
986e461dc072 Initial revision
glantau
parents:
diff changeset
539 bit_cnt += 8;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
540 if (bit_cnt < n && buf_ptr < (s)->buf_end) {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
541 bit_buf |= *buf_ptr++ << (24 - bit_cnt);\
986e461dc072 Initial revision
glantau
parents:
diff changeset
542 bit_cnt += 8;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
543 if (bit_cnt < n && buf_ptr < (s)->buf_end) {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
544 bit_buf |= *buf_ptr++ << (24 - bit_cnt);\
986e461dc072 Initial revision
glantau
parents:
diff changeset
545 bit_cnt += 8;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
546 }\
986e461dc072 Initial revision
glantau
parents:
diff changeset
547 }\
986e461dc072 Initial revision
glantau
parents:
diff changeset
548 }\
986e461dc072 Initial revision
glantau
parents:
diff changeset
549 val = bit_buf >> (32 - n);\
986e461dc072 Initial revision
glantau
parents:
diff changeset
550 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
551
986e461dc072 Initial revision
glantau
parents:
diff changeset
552 /* SHOW_BITS with n1 >= n must be been done before */
986e461dc072 Initial revision
glantau
parents:
diff changeset
553 #define FLUSH_BITS(n)\
986e461dc072 Initial revision
glantau
parents:
diff changeset
554 {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
555 bit_buf <<= n;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
556 bit_cnt -= n;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
557 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
558
986e461dc072 Initial revision
glantau
parents:
diff changeset
559 #define SAVE_BITS(s) \
986e461dc072 Initial revision
glantau
parents:
diff changeset
560 {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
561 bit_cnt = (s)->bit_cnt;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
562 bit_buf = (s)->bit_buf;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
563 buf_ptr = (s)->buf_ptr;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
564 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
565
986e461dc072 Initial revision
glantau
parents:
diff changeset
566 #define RESTORE_BITS(s) \
986e461dc072 Initial revision
glantau
parents:
diff changeset
567 {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
568 (s)->buf_ptr = buf_ptr;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
569 (s)->bit_buf = bit_buf;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
570 (s)->bit_cnt = bit_cnt;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
571 }
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
572 #endif // !ALT_BITSTREAM_READER
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
573
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
574 static inline int get_vlc(GetBitContext *s, VLC *vlc)
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
575 {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
576 int code, n, nb_bits, index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
577 INT16 *table_codes;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
578 INT8 *table_bits;
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
579 int bit_cnt;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
580 #ifndef ALT_BITSTREAM_READER
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
581 UINT32 bit_buf;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
582 UINT8 *buf_ptr;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
583 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
584
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
585 SAVE_BITS(s);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
586 nb_bits = vlc->bits;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
587 table_codes = vlc->table_codes;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
588 table_bits = vlc->table_bits;
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
589
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
590 #ifdef FAST_GET_FIRST_VLC
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
591 SHOW_BITS(s, index, nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
592 code = table_codes[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
593 n = table_bits[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
594 if (n > 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
595 /* most common case (90%)*/
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
596 FLUSH_BITS(n);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
597 RESTORE_BITS(s);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
598 return code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
599 } else if (n == 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
600 return -1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
601 } else {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
602 FLUSH_BITS(nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
603 nb_bits = -n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
604 table_codes = vlc->table_codes + code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
605 table_bits = vlc->table_bits + code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
606 }
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
607 #endif
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
608 for(;;) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
609 SHOW_BITS(s, index, nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
610 code = table_codes[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
611 n = table_bits[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
612 if (n > 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
613 /* most common case */
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
614 FLUSH_BITS(n);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
615 #ifdef STATS
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
616 st_bit_counts[st_current_index] += n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
617 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
618 break;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
619 } else if (n == 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
620 return -1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
621 } else {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
622 FLUSH_BITS(nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
623 #ifdef STATS
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
624 st_bit_counts[st_current_index] += nb_bits;
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625 #endif
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626 nb_bits = -n;
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627 table_codes = vlc->table_codes + code;
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628 table_bits = vlc->table_bits + code;
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629 }
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630 }
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631 RESTORE_BITS(s);
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632 return code;
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633 }
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634
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635
0
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636 /* define it to include statistics code (useful only for optimizing
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637 codec efficiency */
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638 //#define STATS
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639
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640 #ifdef STATS
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641
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642 enum {
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643 ST_UNKNOWN,
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644 ST_DC,
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645 ST_INTRA_AC,
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646 ST_INTER_AC,
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647 ST_INTRA_MB,
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648 ST_INTER_MB,
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649 ST_MV,
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650 ST_NB,
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651 };
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652
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653 extern int st_current_index;
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654 extern unsigned int st_bit_counts[ST_NB];
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655 extern unsigned int st_out_bit_counts[ST_NB];
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656
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657 void print_stats(void);
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658 #endif
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659
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660 /* misc math functions */
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661
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662 static inline int av_log2(unsigned int v)
0
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663 {
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664 int n;
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665
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666 n = 0;
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667 if (v & 0xffff0000) {
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668 v >>= 16;
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669 n += 16;
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670 }
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671 if (v & 0xff00) {
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672 v >>= 8;
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673 n += 8;
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674 }
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675 if (v & 0xf0) {
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676 v >>= 4;
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677 n += 4;
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678 }
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679 if (v & 0xc) {
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680 v >>= 2;
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681 n += 2;
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682 }
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683 if (v & 0x2) {
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684 n++;
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685 }
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686 return n;
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687 }
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688
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689 /* memory */
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690 void *av_mallocz(int size);
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691
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692 #endif