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8334
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1 /*
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2 * ARM NEON optimised DSP functions
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3 * Copyright (c) 2008 Mans Rullgard <mans@mansr.com>
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4 *
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5 * This file is part of FFmpeg.
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6 *
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7 * FFmpeg is free software; you can redistribute it and/or
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8 * modify it under the terms of the GNU Lesser General Public
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9 * License as published by the Free Software Foundation; either
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10 * version 2.1 of the License, or (at your option) any later version.
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11 *
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12 * FFmpeg is distributed in the hope that it will be useful,
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13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 * Lesser General Public License for more details.
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16 *
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17 * You should have received a copy of the GNU Lesser General Public
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18 * License along with FFmpeg; if not, write to the Free Software
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19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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20 */
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21
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22 #include "asm.S"
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23
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24 preserve8
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25 .fpu neon
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26 .text
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27
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28 .macro pixels16 avg=0
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29 .if \avg
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30 mov ip, r0
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31 .endif
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32 1: vld1.64 {d0, d1}, [r1], r2
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33 vld1.64 {d2, d3}, [r1], r2
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34 vld1.64 {d4, d5}, [r1], r2
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35 pld [r1, r2, lsl #2]
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36 vld1.64 {d6, d7}, [r1], r2
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37 pld [r1]
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38 pld [r1, r2]
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39 pld [r1, r2, lsl #1]
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40 .if \avg
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41 vld1.64 {d16,d17}, [ip], r2
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42 vrhadd.u8 q0, q0, q8
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43 vld1.64 {d18,d19}, [ip], r2
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44 vrhadd.u8 q1, q1, q9
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45 vld1.64 {d20,d21}, [ip], r2
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46 vrhadd.u8 q2, q2, q10
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47 vld1.64 {d22,d23}, [ip], r2
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48 vrhadd.u8 q3, q3, q11
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49 .endif
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50 subs r3, r3, #4
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51 vst1.64 {d0, d1}, [r0,:128], r2
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52 vst1.64 {d2, d3}, [r0,:128], r2
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53 vst1.64 {d4, d5}, [r0,:128], r2
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54 vst1.64 {d6, d7}, [r0,:128], r2
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55 bne 1b
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56 bx lr
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57 .endm
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58
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59 .macro pixels16_x2 vhadd=vrhadd.u8
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60 1: vld1.64 {d0-d2}, [r1], r2
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61 vld1.64 {d4-d6}, [r1], r2
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62 pld [r1]
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63 pld [r1, r2]
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64 subs r3, r3, #2
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65 vext.8 q1, q0, q1, #1
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66 \vhadd q0, q0, q1
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67 vext.8 q3, q2, q3, #1
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68 \vhadd q2, q2, q3
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69 vst1.64 {d0, d1}, [r0,:128], r2
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70 vst1.64 {d4, d5}, [r0,:128], r2
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71 bne 1b
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72 bx lr
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73 .endm
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74
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75 .macro pixels16_y2 vhadd=vrhadd.u8
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76 push {lr}
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77 add ip, r1, r2
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78 lsl lr, r2, #1
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79 vld1.64 {d0, d1}, [r1], lr
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80 vld1.64 {d2, d3}, [ip], lr
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81 1: subs r3, r3, #2
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82 \vhadd q2, q0, q1
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83 vld1.64 {d0, d1}, [r1], lr
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84 \vhadd q3, q0, q1
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85 vld1.64 {d2, d3}, [ip], lr
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86 pld [r1]
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87 pld [ip]
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88 vst1.64 {d4, d5}, [r0,:128], r2
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89 vst1.64 {d6, d7}, [r0,:128], r2
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90 bne 1b
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91 pop {pc}
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92 .endm
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93
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94 .macro pixels16_xy2 vshrn=vrshrn.u16 no_rnd=0
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95 push {lr}
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96 lsl lr, r2, #1
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97 add ip, r1, r2
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98 vld1.64 {d0-d2}, [r1], lr
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99 vld1.64 {d4-d6}, [ip], lr
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100 .if \no_rnd
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101 vmov.i16 q13, #1
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102 .endif
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103 pld [r1]
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104 pld [ip]
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105 vext.8 q1, q0, q1, #1
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106 vext.8 q3, q2, q3, #1
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107 vaddl.u8 q8, d0, d2
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108 vaddl.u8 q10, d1, d3
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109 vaddl.u8 q9, d4, d6
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110 vaddl.u8 q11, d5, d7
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111 1: subs r3, r3, #2
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112 vld1.64 {d0-d2}, [r1], lr
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113 vadd.u16 q12, q8, q9
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114 pld [r1]
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115 .if \no_rnd
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116 vadd.u16 q12, q12, q13
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117 .endif
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118 vext.8 q15, q0, q1, #1
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119 vadd.u16 q1 , q10, q11
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120 \vshrn d28, q12, #2
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121 .if \no_rnd
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122 vadd.u16 q1, q1, q13
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123 .endif
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124 \vshrn d29, q1, #2
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125 vaddl.u8 q8, d0, d30
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126 vld1.64 {d2-d4}, [ip], lr
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127 vaddl.u8 q10, d1, d31
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128 vst1.64 {d28,d29}, [r0,:128], r2
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129 vadd.u16 q12, q8, q9
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130 pld [ip]
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131 .if \no_rnd
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132 vadd.u16 q12, q12, q13
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133 .endif
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134 vext.8 q2, q1, q2, #1
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135 vadd.u16 q0, q10, q11
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136 \vshrn d30, q12, #2
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137 .if \no_rnd
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138 vadd.u16 q0, q0, q13
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139 .endif
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140 \vshrn d31, q0, #2
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141 vaddl.u8 q9, d2, d4
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142 vaddl.u8 q11, d3, d5
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143 vst1.64 {d30,d31}, [r0,:128], r2
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144 bgt 1b
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145 pop {pc}
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146 .endm
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147
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148 .macro pixels8
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149 1: vld1.64 {d0}, [r1], r2
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150 vld1.64 {d1}, [r1], r2
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151 vld1.64 {d2}, [r1], r2
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152 pld [r1, r2, lsl #2]
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153 vld1.64 {d3}, [r1], r2
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154 pld [r1]
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155 pld [r1, r2]
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156 pld [r1, r2, lsl #1]
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157 subs r3, r3, #4
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158 vst1.64 {d0}, [r0,:64], r2
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159 vst1.64 {d1}, [r0,:64], r2
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160 vst1.64 {d2}, [r0,:64], r2
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161 vst1.64 {d3}, [r0,:64], r2
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162 bne 1b
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163 bx lr
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164 .endm
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165
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166 .macro pixels8_x2 vhadd=vrhadd.u8
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167 1: vld1.64 {d0, d1}, [r1], r2
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168 vext.8 d1, d0, d1, #1
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169 vld1.64 {d2, d3}, [r1], r2
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170 vext.8 d3, d2, d3, #1
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171 pld [r1]
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172 pld [r1, r2]
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173 subs r3, r3, #2
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174 vswp d1, d2
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175 \vhadd q0, q0, q1
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176 vst1.64 {d0}, [r0,:64], r2
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177 vst1.64 {d1}, [r0,:64], r2
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178 bne 1b
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179 bx lr
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180 .endm
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181
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182 .macro pixels8_y2 vhadd=vrhadd.u8
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183 push {lr}
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184 add ip, r1, r2
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185 lsl lr, r2, #1
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186 vld1.64 {d0}, [r1], lr
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187 vld1.64 {d1}, [ip], lr
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188 1: subs r3, r3, #2
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189 \vhadd d4, d0, d1
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190 vld1.64 {d0}, [r1], lr
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191 \vhadd d5, d0, d1
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192 vld1.64 {d1}, [ip], lr
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193 pld [r1]
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194 pld [ip]
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195 vst1.64 {d4}, [r0,:64], r2
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196 vst1.64 {d5}, [r0,:64], r2
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197 bne 1b
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198 pop {pc}
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199 .endm
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200
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201 .macro pixels8_xy2 vshrn=vrshrn.u16 no_rnd=0
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202 push {lr}
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203 lsl lr, r2, #1
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204 add ip, r1, r2
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205 vld1.64 {d0, d1}, [r1], lr
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206 vld1.64 {d2, d3}, [ip], lr
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207 .if \no_rnd
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208 vmov.i16 q11, #1
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209 .endif
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210 pld [r1]
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211 pld [ip]
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212 vext.8 d4, d0, d1, #1
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213 vext.8 d6, d2, d3, #1
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214 vaddl.u8 q8, d0, d4
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215 vaddl.u8 q9, d2, d6
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216 1: subs r3, r3, #2
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217 vld1.64 {d0, d1}, [r1], lr
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218 pld [r1]
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219 vadd.u16 q10, q8, q9
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220 vext.8 d4, d0, d1, #1
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221 .if \no_rnd
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222 vadd.u16 q10, q10, q11
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223 .endif
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224 vaddl.u8 q8, d0, d4
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225 \vshrn d5, q10, #2
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226 vld1.64 {d2, d3}, [ip], lr
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227 vadd.u16 q10, q8, q9
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228 pld [ip]
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229 .if \no_rnd
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230 vadd.u16 q10, q10, q11
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231 .endif
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232 vst1.64 {d5}, [r0,:64], r2
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233 \vshrn d7, q10, #2
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234 vext.8 d6, d2, d3, #1
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235 vaddl.u8 q9, d2, d6
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236 vst1.64 {d7}, [r0,:64], r2
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237 bgt 1b
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238 pop {pc}
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239 .endm
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240
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241 .macro pixfunc pfx name suf rnd_op args:vararg
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242 function ff_\pfx\name\suf\()_neon, export=1
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243 \name \rnd_op \args
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244 .endfunc
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245 .endm
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246
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247 .macro pixfunc2 pfx name args:vararg
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248 pixfunc \pfx \name
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249 pixfunc \pfx \name \args
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250 .endm
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251
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252 function ff_put_h264_qpel16_mc00_neon, export=1
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253 mov r3, #16
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254 .endfunc
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255
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256 pixfunc put_ pixels16
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257 pixfunc2 put_ pixels16_x2, _no_rnd, vhadd.u8
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258 pixfunc2 put_ pixels16_y2, _no_rnd, vhadd.u8
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259 pixfunc2 put_ pixels16_xy2, _no_rnd, vshrn.u16, 1
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260
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261 function ff_avg_h264_qpel16_mc00_neon, export=1
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262 mov r3, #16
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263 .endfunc
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264
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265 pixfunc avg_ pixels16,, 1
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266
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267 function ff_put_h264_qpel8_mc00_neon, export=1
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268 mov r3, #8
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269 .endfunc
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270
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271 pixfunc put_ pixels8
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272 pixfunc2 put_ pixels8_x2, _no_rnd, vhadd.u8
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273 pixfunc2 put_ pixels8_y2, _no_rnd, vhadd.u8
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274 pixfunc2 put_ pixels8_xy2, _no_rnd, vshrn.u16, 1
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