Mercurial > libavcodec.hg
annotate i386/mmx.h @ 3029:7a92269a3ccd libavcodec
tweak h264_biweight
author | lorenm |
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date | Mon, 09 Jan 2006 03:38:37 +0000 |
parents | bfabfdf9ce55 |
children | 6b9f0c4fbdbe |
rev | line source |
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31 | 1 /* |
2 * mmx.h | |
3 * Copyright (C) 1997-2001 H. Dietz and R. Fisher | |
4 */ | |
434 | 5 #ifndef AVCODEC_I386MMX_H |
6 #define AVCODEC_I386MMX_H | |
0 | 7 |
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8 #ifdef ARCH_X86_64 |
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9 # define REG_a "rax" |
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10 # define REG_b "rbx" |
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11 # define REG_c "rcx" |
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12 # define REG_d "rdx" |
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13 # define REG_D "rdi" |
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14 # define REG_S "rsi" |
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15 #else |
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16 # define REG_a "eax" |
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17 # define REG_b "ebx" |
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18 # define REG_c "ecx" |
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19 # define REG_d "edx" |
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20 # define REG_D "edi" |
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21 # define REG_S "esi" |
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22 #endif |
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23 |
31 | 24 /* |
25 * The type of an value that fits in an MMX register (note that long | |
26 * long constant values MUST be suffixed by LL and unsigned long long | |
27 * values by ULL, lest they be truncated by the compiler) | |
28 */ | |
0 | 29 |
2979 | 30 typedef union { |
31 long long q; /* Quadword (64-bit) value */ | |
32 unsigned long long uq; /* Unsigned Quadword */ | |
33 int d[2]; /* 2 Doubleword (32-bit) values */ | |
34 unsigned int ud[2]; /* 2 Unsigned Doubleword */ | |
35 short w[4]; /* 4 Word (16-bit) values */ | |
36 unsigned short uw[4]; /* 4 Unsigned Word */ | |
37 char b[8]; /* 8 Byte (8-bit) values */ | |
38 unsigned char ub[8]; /* 8 Unsigned Byte */ | |
39 float s[2]; /* Single-precision (32-bit) value */ | |
40 } mmx_t; /* On an 8-byte (64-bit) boundary */ | |
0 | 41 |
42 | |
2979 | 43 #define mmx_i2r(op,imm,reg) \ |
44 __asm__ __volatile__ (#op " %0, %%" #reg \ | |
45 : /* nothing */ \ | |
46 : "i" (imm) ) | |
0 | 47 |
2979 | 48 #define mmx_m2r(op,mem,reg) \ |
49 __asm__ __volatile__ (#op " %0, %%" #reg \ | |
50 : /* nothing */ \ | |
51 : "m" (mem)) | |
0 | 52 |
2979 | 53 #define mmx_r2m(op,reg,mem) \ |
54 __asm__ __volatile__ (#op " %%" #reg ", %0" \ | |
55 : "=m" (mem) \ | |
56 : /* nothing */ ) | |
0 | 57 |
2979 | 58 #define mmx_r2r(op,regs,regd) \ |
59 __asm__ __volatile__ (#op " %" #regs ", %" #regd) | |
0 | 60 |
61 | |
2979 | 62 #define emms() __asm__ __volatile__ ("emms") |
31 | 63 |
2979 | 64 #define movd_m2r(var,reg) mmx_m2r (movd, var, reg) |
65 #define movd_r2m(reg,var) mmx_r2m (movd, reg, var) | |
66 #define movd_r2r(regs,regd) mmx_r2r (movd, regs, regd) | |
0 | 67 |
2979 | 68 #define movq_m2r(var,reg) mmx_m2r (movq, var, reg) |
69 #define movq_r2m(reg,var) mmx_r2m (movq, reg, var) | |
70 #define movq_r2r(regs,regd) mmx_r2r (movq, regs, regd) | |
31 | 71 |
2979 | 72 #define packssdw_m2r(var,reg) mmx_m2r (packssdw, var, reg) |
73 #define packssdw_r2r(regs,regd) mmx_r2r (packssdw, regs, regd) | |
74 #define packsswb_m2r(var,reg) mmx_m2r (packsswb, var, reg) | |
75 #define packsswb_r2r(regs,regd) mmx_r2r (packsswb, regs, regd) | |
0 | 76 |
2979 | 77 #define packuswb_m2r(var,reg) mmx_m2r (packuswb, var, reg) |
78 #define packuswb_r2r(regs,regd) mmx_r2r (packuswb, regs, regd) | |
0 | 79 |
2979 | 80 #define paddb_m2r(var,reg) mmx_m2r (paddb, var, reg) |
81 #define paddb_r2r(regs,regd) mmx_r2r (paddb, regs, regd) | |
82 #define paddd_m2r(var,reg) mmx_m2r (paddd, var, reg) | |
83 #define paddd_r2r(regs,regd) mmx_r2r (paddd, regs, regd) | |
84 #define paddw_m2r(var,reg) mmx_m2r (paddw, var, reg) | |
85 #define paddw_r2r(regs,regd) mmx_r2r (paddw, regs, regd) | |
0 | 86 |
2979 | 87 #define paddsb_m2r(var,reg) mmx_m2r (paddsb, var, reg) |
88 #define paddsb_r2r(regs,regd) mmx_r2r (paddsb, regs, regd) | |
89 #define paddsw_m2r(var,reg) mmx_m2r (paddsw, var, reg) | |
90 #define paddsw_r2r(regs,regd) mmx_r2r (paddsw, regs, regd) | |
0 | 91 |
2979 | 92 #define paddusb_m2r(var,reg) mmx_m2r (paddusb, var, reg) |
93 #define paddusb_r2r(regs,regd) mmx_r2r (paddusb, regs, regd) | |
94 #define paddusw_m2r(var,reg) mmx_m2r (paddusw, var, reg) | |
95 #define paddusw_r2r(regs,regd) mmx_r2r (paddusw, regs, regd) | |
0 | 96 |
2979 | 97 #define pand_m2r(var,reg) mmx_m2r (pand, var, reg) |
98 #define pand_r2r(regs,regd) mmx_r2r (pand, regs, regd) | |
31 | 99 |
2979 | 100 #define pandn_m2r(var,reg) mmx_m2r (pandn, var, reg) |
101 #define pandn_r2r(regs,regd) mmx_r2r (pandn, regs, regd) | |
0 | 102 |
2979 | 103 #define pcmpeqb_m2r(var,reg) mmx_m2r (pcmpeqb, var, reg) |
104 #define pcmpeqb_r2r(regs,regd) mmx_r2r (pcmpeqb, regs, regd) | |
105 #define pcmpeqd_m2r(var,reg) mmx_m2r (pcmpeqd, var, reg) | |
106 #define pcmpeqd_r2r(regs,regd) mmx_r2r (pcmpeqd, regs, regd) | |
107 #define pcmpeqw_m2r(var,reg) mmx_m2r (pcmpeqw, var, reg) | |
108 #define pcmpeqw_r2r(regs,regd) mmx_r2r (pcmpeqw, regs, regd) | |
0 | 109 |
2979 | 110 #define pcmpgtb_m2r(var,reg) mmx_m2r (pcmpgtb, var, reg) |
111 #define pcmpgtb_r2r(regs,regd) mmx_r2r (pcmpgtb, regs, regd) | |
112 #define pcmpgtd_m2r(var,reg) mmx_m2r (pcmpgtd, var, reg) | |
113 #define pcmpgtd_r2r(regs,regd) mmx_r2r (pcmpgtd, regs, regd) | |
114 #define pcmpgtw_m2r(var,reg) mmx_m2r (pcmpgtw, var, reg) | |
115 #define pcmpgtw_r2r(regs,regd) mmx_r2r (pcmpgtw, regs, regd) | |
31 | 116 |
2979 | 117 #define pmaddwd_m2r(var,reg) mmx_m2r (pmaddwd, var, reg) |
118 #define pmaddwd_r2r(regs,regd) mmx_r2r (pmaddwd, regs, regd) | |
31 | 119 |
2979 | 120 #define pmulhw_m2r(var,reg) mmx_m2r (pmulhw, var, reg) |
121 #define pmulhw_r2r(regs,regd) mmx_r2r (pmulhw, regs, regd) | |
31 | 122 |
2979 | 123 #define pmullw_m2r(var,reg) mmx_m2r (pmullw, var, reg) |
124 #define pmullw_r2r(regs,regd) mmx_r2r (pmullw, regs, regd) | |
0 | 125 |
2979 | 126 #define por_m2r(var,reg) mmx_m2r (por, var, reg) |
127 #define por_r2r(regs,regd) mmx_r2r (por, regs, regd) | |
0 | 128 |
2979 | 129 #define pslld_i2r(imm,reg) mmx_i2r (pslld, imm, reg) |
130 #define pslld_m2r(var,reg) mmx_m2r (pslld, var, reg) | |
131 #define pslld_r2r(regs,regd) mmx_r2r (pslld, regs, regd) | |
132 #define psllq_i2r(imm,reg) mmx_i2r (psllq, imm, reg) | |
133 #define psllq_m2r(var,reg) mmx_m2r (psllq, var, reg) | |
134 #define psllq_r2r(regs,regd) mmx_r2r (psllq, regs, regd) | |
135 #define psllw_i2r(imm,reg) mmx_i2r (psllw, imm, reg) | |
136 #define psllw_m2r(var,reg) mmx_m2r (psllw, var, reg) | |
137 #define psllw_r2r(regs,regd) mmx_r2r (psllw, regs, regd) | |
0 | 138 |
2979 | 139 #define psrad_i2r(imm,reg) mmx_i2r (psrad, imm, reg) |
140 #define psrad_m2r(var,reg) mmx_m2r (psrad, var, reg) | |
141 #define psrad_r2r(regs,regd) mmx_r2r (psrad, regs, regd) | |
142 #define psraw_i2r(imm,reg) mmx_i2r (psraw, imm, reg) | |
143 #define psraw_m2r(var,reg) mmx_m2r (psraw, var, reg) | |
144 #define psraw_r2r(regs,regd) mmx_r2r (psraw, regs, regd) | |
0 | 145 |
2979 | 146 #define psrld_i2r(imm,reg) mmx_i2r (psrld, imm, reg) |
147 #define psrld_m2r(var,reg) mmx_m2r (psrld, var, reg) | |
148 #define psrld_r2r(regs,regd) mmx_r2r (psrld, regs, regd) | |
149 #define psrlq_i2r(imm,reg) mmx_i2r (psrlq, imm, reg) | |
150 #define psrlq_m2r(var,reg) mmx_m2r (psrlq, var, reg) | |
151 #define psrlq_r2r(regs,regd) mmx_r2r (psrlq, regs, regd) | |
152 #define psrlw_i2r(imm,reg) mmx_i2r (psrlw, imm, reg) | |
153 #define psrlw_m2r(var,reg) mmx_m2r (psrlw, var, reg) | |
154 #define psrlw_r2r(regs,regd) mmx_r2r (psrlw, regs, regd) | |
0 | 155 |
2979 | 156 #define psubb_m2r(var,reg) mmx_m2r (psubb, var, reg) |
157 #define psubb_r2r(regs,regd) mmx_r2r (psubb, regs, regd) | |
158 #define psubd_m2r(var,reg) mmx_m2r (psubd, var, reg) | |
159 #define psubd_r2r(regs,regd) mmx_r2r (psubd, regs, regd) | |
160 #define psubw_m2r(var,reg) mmx_m2r (psubw, var, reg) | |
161 #define psubw_r2r(regs,regd) mmx_r2r (psubw, regs, regd) | |
0 | 162 |
2979 | 163 #define psubsb_m2r(var,reg) mmx_m2r (psubsb, var, reg) |
164 #define psubsb_r2r(regs,regd) mmx_r2r (psubsb, regs, regd) | |
165 #define psubsw_m2r(var,reg) mmx_m2r (psubsw, var, reg) | |
166 #define psubsw_r2r(regs,regd) mmx_r2r (psubsw, regs, regd) | |
31 | 167 |
2979 | 168 #define psubusb_m2r(var,reg) mmx_m2r (psubusb, var, reg) |
169 #define psubusb_r2r(regs,regd) mmx_r2r (psubusb, regs, regd) | |
170 #define psubusw_m2r(var,reg) mmx_m2r (psubusw, var, reg) | |
171 #define psubusw_r2r(regs,regd) mmx_r2r (psubusw, regs, regd) | |
0 | 172 |
2979 | 173 #define punpckhbw_m2r(var,reg) mmx_m2r (punpckhbw, var, reg) |
174 #define punpckhbw_r2r(regs,regd) mmx_r2r (punpckhbw, regs, regd) | |
175 #define punpckhdq_m2r(var,reg) mmx_m2r (punpckhdq, var, reg) | |
176 #define punpckhdq_r2r(regs,regd) mmx_r2r (punpckhdq, regs, regd) | |
177 #define punpckhwd_m2r(var,reg) mmx_m2r (punpckhwd, var, reg) | |
178 #define punpckhwd_r2r(regs,regd) mmx_r2r (punpckhwd, regs, regd) | |
0 | 179 |
2979 | 180 #define punpcklbw_m2r(var,reg) mmx_m2r (punpcklbw, var, reg) |
181 #define punpcklbw_r2r(regs,regd) mmx_r2r (punpcklbw, regs, regd) | |
182 #define punpckldq_m2r(var,reg) mmx_m2r (punpckldq, var, reg) | |
183 #define punpckldq_r2r(regs,regd) mmx_r2r (punpckldq, regs, regd) | |
184 #define punpcklwd_m2r(var,reg) mmx_m2r (punpcklwd, var, reg) | |
185 #define punpcklwd_r2r(regs,regd) mmx_r2r (punpcklwd, regs, regd) | |
0 | 186 |
2979 | 187 #define pxor_m2r(var,reg) mmx_m2r (pxor, var, reg) |
188 #define pxor_r2r(regs,regd) mmx_r2r (pxor, regs, regd) | |
0 | 189 |
190 | |
31 | 191 /* 3DNOW extensions */ |
0 | 192 |
2979 | 193 #define pavgusb_m2r(var,reg) mmx_m2r (pavgusb, var, reg) |
194 #define pavgusb_r2r(regs,regd) mmx_r2r (pavgusb, regs, regd) | |
31 | 195 |
196 | |
197 /* AMD MMX extensions - also available in intel SSE */ | |
0 | 198 |
199 | |
2979 | 200 #define mmx_m2ri(op,mem,reg,imm) \ |
31 | 201 __asm__ __volatile__ (#op " %1, %0, %%" #reg \ |
202 : /* nothing */ \ | |
203 : "X" (mem), "X" (imm)) | |
2979 | 204 #define mmx_r2ri(op,regs,regd,imm) \ |
31 | 205 __asm__ __volatile__ (#op " %0, %%" #regs ", %%" #regd \ |
206 : /* nothing */ \ | |
207 : "X" (imm) ) | |
0 | 208 |
2979 | 209 #define mmx_fetch(mem,hint) \ |
210 __asm__ __volatile__ ("prefetch" #hint " %0" \ | |
211 : /* nothing */ \ | |
212 : "X" (mem)) | |
0 | 213 |
214 | |
2979 | 215 #define maskmovq(regs,maskreg) mmx_r2ri (maskmovq, regs, maskreg) |
31 | 216 |
2979 | 217 #define movntq_r2m(mmreg,var) mmx_r2m (movntq, mmreg, var) |
0 | 218 |
2979 | 219 #define pavgb_m2r(var,reg) mmx_m2r (pavgb, var, reg) |
220 #define pavgb_r2r(regs,regd) mmx_r2r (pavgb, regs, regd) | |
221 #define pavgw_m2r(var,reg) mmx_m2r (pavgw, var, reg) | |
222 #define pavgw_r2r(regs,regd) mmx_r2r (pavgw, regs, regd) | |
31 | 223 |
2979 | 224 #define pextrw_r2r(mmreg,reg,imm) mmx_r2ri (pextrw, mmreg, reg, imm) |
0 | 225 |
2979 | 226 #define pinsrw_r2r(reg,mmreg,imm) mmx_r2ri (pinsrw, reg, mmreg, imm) |
0 | 227 |
2979 | 228 #define pmaxsw_m2r(var,reg) mmx_m2r (pmaxsw, var, reg) |
229 #define pmaxsw_r2r(regs,regd) mmx_r2r (pmaxsw, regs, regd) | |
0 | 230 |
2979 | 231 #define pmaxub_m2r(var,reg) mmx_m2r (pmaxub, var, reg) |
232 #define pmaxub_r2r(regs,regd) mmx_r2r (pmaxub, regs, regd) | |
31 | 233 |
2979 | 234 #define pminsw_m2r(var,reg) mmx_m2r (pminsw, var, reg) |
235 #define pminsw_r2r(regs,regd) mmx_r2r (pminsw, regs, regd) | |
0 | 236 |
2979 | 237 #define pminub_m2r(var,reg) mmx_m2r (pminub, var, reg) |
238 #define pminub_r2r(regs,regd) mmx_r2r (pminub, regs, regd) | |
0 | 239 |
2979 | 240 #define pmovmskb(mmreg,reg) \ |
241 __asm__ __volatile__ ("movmskps %" #mmreg ", %" #reg) | |
0 | 242 |
2979 | 243 #define pmulhuw_m2r(var,reg) mmx_m2r (pmulhuw, var, reg) |
244 #define pmulhuw_r2r(regs,regd) mmx_r2r (pmulhuw, regs, regd) | |
0 | 245 |
2979 | 246 #define prefetcht0(mem) mmx_fetch (mem, t0) |
247 #define prefetcht1(mem) mmx_fetch (mem, t1) | |
248 #define prefetcht2(mem) mmx_fetch (mem, t2) | |
249 #define prefetchnta(mem) mmx_fetch (mem, nta) | |
0 | 250 |
2979 | 251 #define psadbw_m2r(var,reg) mmx_m2r (psadbw, var, reg) |
252 #define psadbw_r2r(regs,regd) mmx_r2r (psadbw, regs, regd) | |
0 | 253 |
2979 | 254 #define pshufw_m2r(var,reg,imm) mmx_m2ri(pshufw, var, reg, imm) |
255 #define pshufw_r2r(regs,regd,imm) mmx_r2ri(pshufw, regs, regd, imm) | |
0 | 256 |
2979 | 257 #define sfence() __asm__ __volatile__ ("sfence\n\t") |
434 | 258 |
1971 | 259 /* SSE2 */ |
2979 | 260 #define pshufhw_m2r(var,reg,imm) mmx_m2ri(pshufhw, var, reg, imm) |
261 #define pshufhw_r2r(regs,regd,imm) mmx_r2ri(pshufhw, regs, regd, imm) | |
262 #define pshuflw_m2r(var,reg,imm) mmx_m2ri(pshuflw, var, reg, imm) | |
263 #define pshuflw_r2r(regs,regd,imm) mmx_r2ri(pshuflw, regs, regd, imm) | |
1971 | 264 |
2979 | 265 #define pshufd_r2r(regs,regd,imm) mmx_r2ri(pshufd, regs, regd, imm) |
1971 | 266 |
2979 | 267 #define movdqa_m2r(var,reg) mmx_m2r (movdqa, var, reg) |
268 #define movdqa_r2m(reg,var) mmx_r2m (movdqa, reg, var) | |
269 #define movdqa_r2r(regs,regd) mmx_r2r (movdqa, regs, regd) | |
270 #define movdqu_m2r(var,reg) mmx_m2r (movdqu, var, reg) | |
271 #define movdqu_r2m(reg,var) mmx_r2m (movdqu, reg, var) | |
272 #define movdqu_r2r(regs,regd) mmx_r2r (movdqu, regs, regd) | |
1971 | 273 |
2979 | 274 #define pmullw_r2m(reg,var) mmx_r2m (pmullw, reg, var) |
1971 | 275 |
2979 | 276 #define pslldq_i2r(imm,reg) mmx_i2r (pslldq, imm, reg) |
277 #define psrldq_i2r(imm,reg) mmx_i2r (psrldq, imm, reg) | |
1971 | 278 |
2979 | 279 #define punpcklqdq_r2r(regs,regd) mmx_r2r (punpcklqdq, regs, regd) |
280 #define punpckhqdq_r2r(regs,regd) mmx_r2r (punpckhqdq, regs, regd) | |
1971 | 281 |
282 | |
434 | 283 #endif /* AVCODEC_I386MMX_H */ |