Mercurial > libavcodec.hg
annotate ppc/dsputil_ppc.c @ 1105:b773f9d23236 libavcodec
doxy
author | michaelni |
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date | Thu, 06 Mar 2003 11:25:55 +0000 |
parents | f59c3f66363b |
children | 80c46c310a91 |
rev | line source |
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1 /* |
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2 * Copyright (c) 2002 Brian Foley |
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3 * Copyright (c) 2002 Dieter Shirley |
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4 * |
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5 * This library is free software; you can redistribute it and/or |
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6 * modify it under the terms of the GNU Lesser General Public |
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7 * License as published by the Free Software Foundation; either |
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8 * version 2 of the License, or (at your option) any later version. |
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9 * |
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10 * This library is distributed in the hope that it will be useful, |
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11 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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13 * Lesser General Public License for more details. |
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14 * |
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15 * You should have received a copy of the GNU Lesser General Public |
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16 * License along with this library; if not, write to the Free Software |
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17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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18 */ |
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19 |
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20 #include "../dsputil.h" |
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21 |
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22 #include "dsputil_ppc.h" |
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23 |
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24 #ifdef HAVE_ALTIVEC |
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25 #include "dsputil_altivec.h" |
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26 #endif |
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27 |
1092 | 28 extern void idct_put_altivec(uint8_t *dest, int line_size, int16_t *block); |
29 extern void idct_add_altivec(uint8_t *dest, int line_size, int16_t *block); | |
30 | |
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31 int mm_flags = 0; |
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32 |
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33 int mm_support(void) |
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34 { |
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35 int result = 0; |
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36 #if HAVE_ALTIVEC |
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37 if (has_altivec()) { |
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38 result |= MM_ALTIVEC; |
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39 } |
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40 #endif /* result */ |
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41 return result; |
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42 } |
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43 |
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44 #ifdef POWERPC_TBL_PERFORMANCE_REPORT |
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45 unsigned long long perfdata[powerpc_perf_total][powerpc_data_total]; |
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46 /* list below must match enum in dsputil_ppc.h */ |
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47 static unsigned char* perfname[] = { |
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48 "fft_calc_altivec", |
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49 "gmc1_altivec", |
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50 "dct_unquantize_h263_altivec", |
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51 "idct_add_altivec", |
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52 "idct_put_altivec", |
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53 "put_pixels16_altivec", |
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54 "avg_pixels16_altivec", |
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55 "avg_pixels8_altivec", |
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56 "put_pixels8_xy2_altivec", |
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57 "put_no_rnd_pixels8_xy2_altivec", |
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58 "put_pixels16_xy2_altivec", |
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59 "put_no_rnd_pixels16_xy2_altivec", |
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60 "clear_blocks_dcbz32_ppc" |
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61 }; |
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62 #ifdef POWERPC_PERF_USE_PMC |
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63 unsigned long long perfdata_miss[powerpc_perf_total][powerpc_data_total]; |
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64 #endif |
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65 #include <stdio.h> |
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66 #endif |
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67 |
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68 #ifdef POWERPC_TBL_PERFORMANCE_REPORT |
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69 void powerpc_display_perf_report(void) |
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70 { |
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71 int i; |
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72 #ifndef POWERPC_PERF_USE_PMC |
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73 fprintf(stderr, "PowerPC performance report\n Values are from the Time Base register, and represent 4 bus cycles.\n"); |
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74 #else /* POWERPC_PERF_USE_PMC */ |
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75 fprintf(stderr, "PowerPC performance report\n Values are from the PMC registers, and represent whatever the registers are set to record.\n"); |
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76 #endif /* POWERPC_PERF_USE_PMC */ |
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77 for(i = 0 ; i < powerpc_perf_total ; i++) |
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78 { |
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79 if (perfdata[i][powerpc_data_num] != (unsigned long long)0) |
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80 fprintf(stderr, " Function \"%s\" (pmc1):\n\tmin: %llu\n\tmax: %llu\n\tavg: %1.2lf (%llu)\n", |
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81 perfname[i], |
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82 perfdata[i][powerpc_data_min], |
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83 perfdata[i][powerpc_data_max], |
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84 (double)perfdata[i][powerpc_data_sum] / |
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85 (double)perfdata[i][powerpc_data_num], |
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86 perfdata[i][powerpc_data_num]); |
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87 #ifdef POWERPC_PERF_USE_PMC |
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88 if (perfdata_miss[i][powerpc_data_num] != (unsigned long long)0) |
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89 fprintf(stderr, " Function \"%s\" (pmc2):\n\tmin: %llu\n\tmax: %llu\n\tavg: %1.2lf (%llu)\n", |
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90 perfname[i], |
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91 perfdata_miss[i][powerpc_data_min], |
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92 perfdata_miss[i][powerpc_data_max], |
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93 (double)perfdata_miss[i][powerpc_data_sum] / |
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94 (double)perfdata_miss[i][powerpc_data_num], |
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95 perfdata_miss[i][powerpc_data_num]); |
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96 #endif |
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97 } |
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98 } |
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99 #endif /* POWERPC_TBL_PERFORMANCE_REPORT */ |
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100 |
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101 /* ***** WARNING ***** WARNING ***** WARNING ***** */ |
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PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
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102 /* |
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103 clear_blocks_dcbz32_ppc will not work properly |
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104 on PowerPC processors with a cache line size |
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105 not equal to 32 bytes. |
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106 Fortunately all processor used by Apple up to |
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107 at least the 7450 (aka second generation G4) |
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108 use 32 bytes cache line. |
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109 This is due to the use of the 'dcbz' instruction. |
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110 It simply clear to zero a single cache line, |
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111 so you need to know the cache line size to use it ! |
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112 It's absurd, but it's fast... |
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113 */ |
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114 void clear_blocks_dcbz32_ppc(DCTELEM *blocks) |
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PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
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115 { |
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116 POWERPC_TBL_DECLARE(powerpc_clear_blocks_dcbz32, 1); |
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117 register int misal = ((unsigned long)blocks & 0x00000010); |
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118 register int i = 0; |
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119 POWERPC_TBL_START_COUNT(powerpc_clear_blocks_dcbz32, 1); |
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120 #if 1 |
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121 if (misal) { |
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122 ((unsigned long*)blocks)[0] = 0L; |
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123 ((unsigned long*)blocks)[1] = 0L; |
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124 ((unsigned long*)blocks)[2] = 0L; |
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125 ((unsigned long*)blocks)[3] = 0L; |
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126 i += 16; |
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127 } |
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128 for ( ; i < sizeof(DCTELEM)*6*64 ; i += 32) { |
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129 asm volatile("dcbz %0,%1" : : "r" (blocks), "r" (i) : "memory"); |
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130 } |
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131 if (misal) { |
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132 ((unsigned long*)blocks)[188] = 0L; |
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133 ((unsigned long*)blocks)[189] = 0L; |
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134 ((unsigned long*)blocks)[190] = 0L; |
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135 ((unsigned long*)blocks)[191] = 0L; |
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136 i += 16; |
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PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
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137 } |
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138 #else |
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PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
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139 memset(blocks, 0, sizeof(DCTELEM)*6*64); |
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140 #endif |
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PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
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141 POWERPC_TBL_STOP_COUNT(powerpc_clear_blocks_dcbz32, 1); |
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PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
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142 } |
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143 |
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144 /* check dcbz report how many bytes are set to 0 by dcbz */ |
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145 long check_dcbz_effect(void) |
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PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
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146 { |
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147 register char *fakedata = (char*)av_malloc(1024); |
1015
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148 register char *fakedata_middle; |
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149 register long zero = 0; |
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150 register long i = 0; |
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151 long count = 0; |
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152 |
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Altivec on non darwin systems patch by Romain Dolbeau
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153 if (!fakedata) |
1015
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PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
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154 { |
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155 return 0L; |
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PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
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156 } |
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PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
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157 |
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PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
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158 fakedata_middle = (fakedata + 512); |
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PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
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159 |
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160 memset(fakedata, 0xFF, 1024); |
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161 |
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162 asm volatile("dcbz %0, %1" : : "r" (fakedata_middle), "r" (zero)); |
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PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
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163 |
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164 for (i = 0; i < 1024 ; i ++) |
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165 { |
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166 if (fakedata[i] == (char)0) |
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167 count++; |
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168 } |
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169 |
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170 av_free(fakedata); |
1015
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PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
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171 |
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172 return count; |
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173 } |
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174 |
1092 | 175 void dsputil_init_ppc(DSPContext* c, AVCodecContext *avctx) |
638
0012f75c92bb
altivec build tidyup patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
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176 { |
828
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177 // Common optimisations whether Altivec or not |
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178 |
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179 switch (check_dcbz_effect()) { |
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180 case 32: |
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181 c->clear_blocks = clear_blocks_dcbz32_ppc; |
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182 break; |
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183 default: |
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184 break; |
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PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
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185 } |
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186 |
638
0012f75c92bb
altivec build tidyup patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
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|
187 #if HAVE_ALTIVEC |
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altivec build tidyup patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
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188 if (has_altivec()) { |
894
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altivec accelerated v-resample patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
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189 mm_flags |= MM_ALTIVEC; |
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altivec accelerated v-resample patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
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190 |
828
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191 // Altivec specific optimisations |
878
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altivec optimizations patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
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856
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192 c->pix_abs16x16_x2 = pix_abs16x16_x2_altivec; |
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altivec optimizations patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
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|
193 c->pix_abs16x16_y2 = pix_abs16x16_y2_altivec; |
884 | 194 c->pix_abs16x16_xy2 = pix_abs16x16_xy2_altivec; |
195 c->pix_abs16x16 = pix_abs16x16_altivec; | |
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196 c->pix_abs8x8 = pix_abs8x8_altivec; |
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197 c->sad[0]= sad16x16_altivec; |
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198 c->sad[1]= sad8x8_altivec; |
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199 c->pix_norm1 = pix_norm1_altivec; |
981 | 200 c->sse[1]= sse8_altivec; |
201 c->sse[0]= sse16_altivec; | |
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202 c->pix_sum = pix_sum_altivec; |
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203 c->diff_pixels = diff_pixels_altivec; |
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204 c->get_pixels = get_pixels_altivec; |
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205 // next one disabled as it's untested. |
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206 #if 0 |
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207 c->add_bytes= add_bytes_altivec; |
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208 #endif /* 0 */ |
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209 c->put_pixels_tab[0][0] = put_pixels16_altivec; |
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210 c->avg_pixels_tab[0][0] = avg_pixels16_altivec; |
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211 // next one disabled as it's untested. |
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212 #if 0 |
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213 c->avg_pixels_tab[1][0] = avg_pixels8_altivec; |
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214 #endif /* 0 */ |
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215 c->put_pixels_tab[1][3] = put_pixels8_xy2_altivec; |
1024
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216 c->put_no_rnd_pixels_tab[1][3] = put_no_rnd_pixels8_xy2_altivec; |
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217 c->put_pixels_tab[0][3] = put_pixels16_xy2_altivec; |
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218 c->put_no_rnd_pixels_tab[0][3] = put_no_rnd_pixels16_xy2_altivec; |
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219 |
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220 c->gmc1 = gmc1_altivec; |
1092 | 221 |
222 if ((avctx->idct_algo == FF_IDCT_AUTO) || | |
223 (avctx->idct_algo == FF_IDCT_ALTIVEC)) | |
224 { | |
225 c->idct_put = idct_put_altivec; | |
226 c->idct_add = idct_add_altivec; | |
227 #ifndef ALTIVEC_USE_REFERENCE_C_CODE | |
228 c->idct_permutation_type = FF_TRANSPOSE_IDCT_PERM; | |
229 #else /* ALTIVEC_USE_REFERENCE_C_CODE */ | |
230 c->idct_permutation_type = FF_NO_IDCT_PERM; | |
231 #endif /* ALTIVEC_USE_REFERENCE_C_CODE */ | |
232 } | |
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233 |
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234 #ifdef POWERPC_TBL_PERFORMANCE_REPORT |
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235 { |
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236 int i; |
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237 for (i = 0 ; i < powerpc_perf_total ; i++) |
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238 { |
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239 perfdata[i][powerpc_data_min] = 0xFFFFFFFFFFFFFFFF; |
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240 perfdata[i][powerpc_data_max] = 0x0000000000000000; |
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241 perfdata[i][powerpc_data_sum] = 0x0000000000000000; |
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242 perfdata[i][powerpc_data_num] = 0x0000000000000000; |
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243 #ifdef POWERPC_PERF_USE_PMC |
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244 perfdata_miss[i][powerpc_data_min] = 0xFFFFFFFFFFFFFFFF; |
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245 perfdata_miss[i][powerpc_data_max] = 0x0000000000000000; |
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246 perfdata_miss[i][powerpc_data_sum] = 0x0000000000000000; |
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247 perfdata_miss[i][powerpc_data_num] = 0x0000000000000000; |
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248 #endif /* POWERPC_PERF_USE_PMC */ |
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249 } |
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250 } |
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251 #endif /* POWERPC_TBL_PERFORMANCE_REPORT */ |
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252 } else |
1024
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253 #endif /* HAVE_ALTIVEC */ |
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254 { |
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255 // Non-AltiVec PPC optimisations |
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256 |
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257 // ... pending ... |
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258 } |
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259 } |