annotate simple_idct.c @ 936:caa77cd960c0 libavcodec

qpel encoding 4mv+b frames encoding finally fixed chroma ME 5 comparission functions for ME b frame encoding speedup wmv2 codec (unfinished) user specified diamond size for EPZS
author michaelni
date Fri, 27 Dec 2002 23:51:46 +0000
parents 2f7da29ede37
children fb6cbb8a04a3
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
175
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
1 /*
429
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
2 * Simple IDCT
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
3 *
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
4 * Copyright (c) 2001 Michael Niedermayer <michaelni@gmx.at>
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
5 *
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
6 * This library is free software; you can redistribute it and/or
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
7 * modify it under the terms of the GNU Lesser General Public
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
8 * License as published by the Free Software Foundation; either
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
9 * version 2 of the License, or (at your option) any later version.
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
10 *
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
11 * This library is distributed in the hope that it will be useful,
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
14 * Lesser General Public License for more details.
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
15 *
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
16 * You should have received a copy of the GNU Lesser General Public
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
17 * License along with this library; if not, write to the Free Software
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
19 */
175
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
20 /*
429
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
21 based upon some outcommented c code from mpeg2dec (idct_mmx.c
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
22 written by Aaron Holtzman <aholtzma@ess.engr.uvic.ca>)
718a22dc121f license/copyright change
glantau
parents: 396
diff changeset
23 */
396
fce0a2520551 removed useless header includes - use av memory functions
glantau
parents: 352
diff changeset
24 #include "avcodec.h"
479
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
25 #include "dsputil.h"
175
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
26 #include "simple_idct.h"
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
27
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
28 #if 0
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
29 #define W1 2841 /* 2048*sqrt (2)*cos (1*pi/16) */
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
30 #define W2 2676 /* 2048*sqrt (2)*cos (2*pi/16) */
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
31 #define W3 2408 /* 2048*sqrt (2)*cos (3*pi/16) */
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
32 #define W4 2048 /* 2048*sqrt (2)*cos (4*pi/16) */
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
33 #define W5 1609 /* 2048*sqrt (2)*cos (5*pi/16) */
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
34 #define W6 1108 /* 2048*sqrt (2)*cos (6*pi/16) */
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
35 #define W7 565 /* 2048*sqrt (2)*cos (7*pi/16) */
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
36 #define ROW_SHIFT 8
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
37 #define COL_SHIFT 17
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
38 #else
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
39 #define W1 22725 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
40 #define W2 21407 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
41 #define W3 19266 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
352
5a8eb5cf9f92 C4=16383 for the c version too and even for some outcommented code
michaelni
parents: 215
diff changeset
42 #define W4 16383 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
175
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
43 #define W5 12873 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
44 #define W6 8867 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
45 #define W7 4520 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
46 #define ROW_SHIFT 11
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
47 #define COL_SHIFT 20 // 6
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
48 #endif
205
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
49
476
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
50 #if defined(ARCH_POWERPC_405)
175
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
51
476
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
52 /* signed 16x16 -> 32 multiply add accumulate */
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
53 #define MAC16(rt, ra, rb) \
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
54 asm ("maclhw %0, %2, %3" : "=r" (rt) : "0" (rt), "r" (ra), "r" (rb));
175
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
55
476
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
56 /* signed 16x16 -> 32 multiply */
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
57 #define MUL16(rt, ra, rb) \
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
58 asm ("mullhw %0, %1, %2" : "=r" (rt) : "r" (ra), "r" (rb));
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
59
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
60 #else
205
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
61
476
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
62 /* signed 16x16 -> 32 multiply add accumulate */
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
63 #define MAC16(rt, ra, rb) rt += (ra) * (rb)
175
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
64
476
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
65 /* signed 16x16 -> 32 multiply */
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
66 #define MUL16(rt, ra, rb) rt = (ra) * (rb)
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
67
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
68 #endif
205
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
69
476
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
70 static inline void idctRowCondDC (int16_t * row)
205
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
71 {
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
72 int a0, a1, a2, a3, b0, b1, b2, b3;
476
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
73 #ifdef FAST_64BIT
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
74 uint64_t temp;
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
75 #else
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
76 uint32_t temp;
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
77 #endif
205
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
78
476
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
79 #ifdef FAST_64BIT
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
80 #ifdef WORDS_BIGENDIAN
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
81 #define ROW0_MASK 0xffff000000000000LL
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
82 #else
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
83 #define ROW0_MASK 0xffffLL
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
84 #endif
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
85 if ( ((((uint64_t *)row)[0] & ~ROW0_MASK) |
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
86 ((uint64_t *)row)[1]) == 0) {
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
87 temp = (row[0] << 3) & 0xffff;
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
88 temp += temp << 16;
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
89 temp += temp << 32;
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
90 ((uint64_t *)row)[0] = temp;
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
91 ((uint64_t *)row)[1] = temp;
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
92 return;
205
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
93 }
476
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
94 #else
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
95 if (!(((uint32_t*)row)[1] |
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
96 ((uint32_t*)row)[2] |
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
97 ((uint32_t*)row)[3] |
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
98 row[1])) {
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
99 temp = (row[0] << 3) & 0xffff;
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
100 temp += temp << 16;
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
101 ((uint32_t*)row)[0]=((uint32_t*)row)[1] =
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
102 ((uint32_t*)row)[2]=((uint32_t*)row)[3] = temp;
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
103 return;
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
104 }
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
105 #endif
205
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
106
476
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
107 a0 = (W4 * row[0]) + (1 << (ROW_SHIFT - 1));
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
108 a1 = a0;
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
109 a2 = a0;
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
110 a3 = a0;
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
111
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
112 /* no need to optimize : gcc does it */
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
113 a0 += W2 * row[2];
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
114 a1 += W6 * row[2];
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
115 a2 -= W6 * row[2];
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
116 a3 -= W2 * row[2];
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
117
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
118 MUL16(b0, W1, row[1]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
119 MAC16(b0, W3, row[3]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
120 MUL16(b1, W3, row[1]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
121 MAC16(b1, -W7, row[3]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
122 MUL16(b2, W5, row[1]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
123 MAC16(b2, -W1, row[3]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
124 MUL16(b3, W7, row[1]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
125 MAC16(b3, -W5, row[3]);
205
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
126
476
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
127 #ifdef FAST_64BIT
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
128 temp = ((uint64_t*)row)[1];
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
129 #else
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
130 temp = ((uint32_t*)row)[2] | ((uint32_t*)row)[3];
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
131 #endif
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
132 if (temp != 0) {
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
133 a0 += W4*row[4] + W6*row[6];
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
134 a1 += - W4*row[4] - W2*row[6];
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
135 a2 += - W4*row[4] + W2*row[6];
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
136 a3 += W4*row[4] - W6*row[6];
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
137
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
138 MAC16(b0, W5, row[5]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
139 MAC16(b0, W7, row[7]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
140
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
141 MAC16(b1, -W1, row[5]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
142 MAC16(b1, -W5, row[7]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
143
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
144 MAC16(b2, W7, row[5]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
145 MAC16(b2, W3, row[7]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
146
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
147 MAC16(b3, W3, row[5]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
148 MAC16(b3, -W1, row[7]);
205
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
149 }
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
150
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
151 row[0] = (a0 + b0) >> ROW_SHIFT;
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
152 row[7] = (a0 - b0) >> ROW_SHIFT;
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
153 row[1] = (a1 + b1) >> ROW_SHIFT;
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
154 row[6] = (a1 - b1) >> ROW_SHIFT;
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
155 row[2] = (a2 + b2) >> ROW_SHIFT;
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
156 row[5] = (a2 - b2) >> ROW_SHIFT;
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
157 row[3] = (a3 + b3) >> ROW_SHIFT;
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
158 row[4] = (a3 - b3) >> ROW_SHIFT;
175
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
159 }
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
160
479
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
161 static inline void idctSparseColPut (UINT8 *dest, int line_size,
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
162 int16_t * col)
205
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
163 {
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
164 int a0, a1, a2, a3, b0, b1, b2, b3;
479
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
165 UINT8 *cm = cropTbl + MAX_NEG_CROP;
476
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
166
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
167 /* XXX: I did that only to give same values as previous code */
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
168 a0 = W4 * (col[8*0] + ((1<<(COL_SHIFT-1))/W4));
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
169 a1 = a0;
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
170 a2 = a0;
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
171 a3 = a0;
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
172
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
173 a0 += + W2*col[8*2];
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
174 a1 += + W6*col[8*2];
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
175 a2 += - W6*col[8*2];
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
176 a3 += - W2*col[8*2];
205
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
177
476
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
178 MUL16(b0, W1, col[8*1]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
179 MUL16(b1, W3, col[8*1]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
180 MUL16(b2, W5, col[8*1]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
181 MUL16(b3, W7, col[8*1]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
182
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
183 MAC16(b0, + W3, col[8*3]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
184 MAC16(b1, - W7, col[8*3]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
185 MAC16(b2, - W1, col[8*3]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
186 MAC16(b3, - W5, col[8*3]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
187
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
188 if(col[8*4]){
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
189 a0 += + W4*col[8*4];
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
190 a1 += - W4*col[8*4];
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
191 a2 += - W4*col[8*4];
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
192 a3 += + W4*col[8*4];
205
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
193 }
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
194
476
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
195 if (col[8*5]) {
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
196 MAC16(b0, + W5, col[8*5]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
197 MAC16(b1, - W1, col[8*5]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
198 MAC16(b2, + W7, col[8*5]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
199 MAC16(b3, + W3, col[8*5]);
205
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
200 }
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
201
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
202 if(col[8*6]){
476
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
203 a0 += + W6*col[8*6];
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
204 a1 += - W2*col[8*6];
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
205 a2 += + W2*col[8*6];
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
206 a3 += - W6*col[8*6];
205
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
207 }
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
208
476
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
209 if (col[8*7]) {
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
210 MAC16(b0, + W7, col[8*7]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
211 MAC16(b1, - W5, col[8*7]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
212 MAC16(b2, + W3, col[8*7]);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
213 MAC16(b3, - W1, col[8*7]);
205
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
214 }
ccf36af385f3 (commit by michael)
arpi_esp
parents: 175
diff changeset
215
479
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
216 dest[0] = cm[(a0 + b0) >> COL_SHIFT];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
217 dest += line_size;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
218 dest[0] = cm[(a1 + b1) >> COL_SHIFT];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
219 dest += line_size;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
220 dest[0] = cm[(a2 + b2) >> COL_SHIFT];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
221 dest += line_size;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
222 dest[0] = cm[(a3 + b3) >> COL_SHIFT];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
223 dest += line_size;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
224 dest[0] = cm[(a3 - b3) >> COL_SHIFT];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
225 dest += line_size;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
226 dest[0] = cm[(a2 - b2) >> COL_SHIFT];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
227 dest += line_size;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
228 dest[0] = cm[(a1 - b1) >> COL_SHIFT];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
229 dest += line_size;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
230 dest[0] = cm[(a0 - b0) >> COL_SHIFT];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
231 }
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
232
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
233 static inline void idctSparseColAdd (UINT8 *dest, int line_size,
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
234 int16_t * col)
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
235 {
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
236 int a0, a1, a2, a3, b0, b1, b2, b3;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
237 UINT8 *cm = cropTbl + MAX_NEG_CROP;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
238
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
239 /* XXX: I did that only to give same values as previous code */
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
240 a0 = W4 * (col[8*0] + ((1<<(COL_SHIFT-1))/W4));
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
241 a1 = a0;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
242 a2 = a0;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
243 a3 = a0;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
244
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
245 a0 += + W2*col[8*2];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
246 a1 += + W6*col[8*2];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
247 a2 += - W6*col[8*2];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
248 a3 += - W2*col[8*2];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
249
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
250 MUL16(b0, W1, col[8*1]);
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
251 MUL16(b1, W3, col[8*1]);
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
252 MUL16(b2, W5, col[8*1]);
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
253 MUL16(b3, W7, col[8*1]);
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
254
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
255 MAC16(b0, + W3, col[8*3]);
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
256 MAC16(b1, - W7, col[8*3]);
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
257 MAC16(b2, - W1, col[8*3]);
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
258 MAC16(b3, - W5, col[8*3]);
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
259
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
260 if(col[8*4]){
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
261 a0 += + W4*col[8*4];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
262 a1 += - W4*col[8*4];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
263 a2 += - W4*col[8*4];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
264 a3 += + W4*col[8*4];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
265 }
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
266
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
267 if (col[8*5]) {
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
268 MAC16(b0, + W5, col[8*5]);
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
269 MAC16(b1, - W1, col[8*5]);
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
270 MAC16(b2, + W7, col[8*5]);
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
271 MAC16(b3, + W3, col[8*5]);
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
272 }
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
273
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
274 if(col[8*6]){
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
275 a0 += + W6*col[8*6];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
276 a1 += - W2*col[8*6];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
277 a2 += + W2*col[8*6];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
278 a3 += - W6*col[8*6];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
279 }
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
280
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
281 if (col[8*7]) {
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
282 MAC16(b0, + W7, col[8*7]);
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
283 MAC16(b1, - W5, col[8*7]);
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
284 MAC16(b2, + W3, col[8*7]);
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
285 MAC16(b3, - W1, col[8*7]);
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
286 }
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
287
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
288 dest[0] = cm[dest[0] + ((a0 + b0) >> COL_SHIFT)];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
289 dest += line_size;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
290 dest[0] = cm[dest[0] + ((a1 + b1) >> COL_SHIFT)];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
291 dest += line_size;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
292 dest[0] = cm[dest[0] + ((a2 + b2) >> COL_SHIFT)];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
293 dest += line_size;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
294 dest[0] = cm[dest[0] + ((a3 + b3) >> COL_SHIFT)];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
295 dest += line_size;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
296 dest[0] = cm[dest[0] + ((a3 - b3) >> COL_SHIFT)];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
297 dest += line_size;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
298 dest[0] = cm[dest[0] + ((a2 - b2) >> COL_SHIFT)];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
299 dest += line_size;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
300 dest[0] = cm[dest[0] + ((a1 - b1) >> COL_SHIFT)];
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
301 dest += line_size;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
302 dest[0] = cm[dest[0] + ((a0 - b0) >> COL_SHIFT)];
175
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
303 }
bd77d3cbb233 new IDCT code by Michael Niedermayer (michaelni@gmx.at) - #define SIMPLE_IDCT to enable
arpi_esp
parents:
diff changeset
304
633
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
305 static inline void idctSparseCol (int16_t * col)
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
306 {
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
307 int a0, a1, a2, a3, b0, b1, b2, b3;
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
308
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
309 /* XXX: I did that only to give same values as previous code */
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
310 a0 = W4 * (col[8*0] + ((1<<(COL_SHIFT-1))/W4));
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
311 a1 = a0;
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
312 a2 = a0;
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
313 a3 = a0;
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
314
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
315 a0 += + W2*col[8*2];
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
316 a1 += + W6*col[8*2];
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
317 a2 += - W6*col[8*2];
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
318 a3 += - W2*col[8*2];
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
319
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
320 MUL16(b0, W1, col[8*1]);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
321 MUL16(b1, W3, col[8*1]);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
322 MUL16(b2, W5, col[8*1]);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
323 MUL16(b3, W7, col[8*1]);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
324
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
325 MAC16(b0, + W3, col[8*3]);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
326 MAC16(b1, - W7, col[8*3]);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
327 MAC16(b2, - W1, col[8*3]);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
328 MAC16(b3, - W5, col[8*3]);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
329
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
330 if(col[8*4]){
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
331 a0 += + W4*col[8*4];
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
332 a1 += - W4*col[8*4];
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
333 a2 += - W4*col[8*4];
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
334 a3 += + W4*col[8*4];
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
335 }
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
336
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
337 if (col[8*5]) {
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
338 MAC16(b0, + W5, col[8*5]);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
339 MAC16(b1, - W1, col[8*5]);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
340 MAC16(b2, + W7, col[8*5]);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
341 MAC16(b3, + W3, col[8*5]);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
342 }
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
343
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
344 if(col[8*6]){
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
345 a0 += + W6*col[8*6];
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
346 a1 += - W2*col[8*6];
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
347 a2 += + W2*col[8*6];
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
348 a3 += - W6*col[8*6];
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
349 }
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
350
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
351 if (col[8*7]) {
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
352 MAC16(b0, + W7, col[8*7]);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
353 MAC16(b1, - W5, col[8*7]);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
354 MAC16(b2, + W3, col[8*7]);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
355 MAC16(b3, - W1, col[8*7]);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
356 }
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
357
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
358 col[0 ] = ((a0 + b0) >> COL_SHIFT);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
359 col[8 ] = ((a1 + b1) >> COL_SHIFT);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
360 col[16] = ((a2 + b2) >> COL_SHIFT);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
361 col[24] = ((a3 + b3) >> COL_SHIFT);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
362 col[32] = ((a3 - b3) >> COL_SHIFT);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
363 col[40] = ((a2 - b2) >> COL_SHIFT);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
364 col[48] = ((a1 - b1) >> COL_SHIFT);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
365 col[56] = ((a0 - b0) >> COL_SHIFT);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
366 }
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
367
479
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
368 void simple_idct_put(UINT8 *dest, int line_size, INT16 *block)
476
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
369 {
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
370 int i;
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
371 for(i=0; i<8; i++)
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
372 idctRowCondDC(block + i*8);
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
373
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
374 for(i=0; i<8; i++)
479
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
375 idctSparseColPut(dest + i, line_size, block + i);
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
376 }
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
377
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
378 void simple_idct_add(UINT8 *dest, int line_size, INT16 *block)
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
379 {
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
380 int i;
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
381 for(i=0; i<8; i++)
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
382 idctRowCondDC(block + i*8);
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
383
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
384 for(i=0; i<8; i++)
40ffce2cb6ef added inlined put/add functions
bellard
parents: 476
diff changeset
385 idctSparseColAdd(dest + i, line_size, block + i);
476
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
386 }
ec13b0a726c3 removed unused code - began to merge alpha specific stuff - added mac macros for suitable CPUs
bellard
parents: 464
diff changeset
387
633
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
388 void simple_idct(INT16 *block)
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
389 {
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
390 int i;
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
391 for(i=0; i<8; i++)
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
392 idctRowCondDC(block + i*8);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
393
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
394 for(i=0; i<8; i++)
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
395 idctSparseCol(block + i);
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
396 }
e7b72c1dfa1b dct-test update
michaelni
parents: 503
diff changeset
397
719
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
398 /* 2x4x8 idct */
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
399
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
400 #define CN_SHIFT 12
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
401 #define C_FIX(x) ((int)((x) * (1 << CN_SHIFT) + 0.5))
722
ff90043f4a2d in fact IDCT248 needs to be normalized as I suspected
bellard
parents: 719
diff changeset
402 #define C1 C_FIX(0.6532814824)
ff90043f4a2d in fact IDCT248 needs to be normalized as I suspected
bellard
parents: 719
diff changeset
403 #define C2 C_FIX(0.2705980501)
719
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
404
722
ff90043f4a2d in fact IDCT248 needs to be normalized as I suspected
bellard
parents: 719
diff changeset
405 /* row idct is multiple by 16 * sqrt(2.0), col idct4 is normalized,
ff90043f4a2d in fact IDCT248 needs to be normalized as I suspected
bellard
parents: 719
diff changeset
406 and the butterfly must be multiplied by 0.5 * sqrt(2.0) */
ff90043f4a2d in fact IDCT248 needs to be normalized as I suspected
bellard
parents: 719
diff changeset
407 #define C_SHIFT (4+1+12)
719
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
408
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
409 static inline void idct4col(UINT8 *dest, int line_size, const INT16 *col)
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
410 {
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
411 int c0, c1, c2, c3, a0, a1, a2, a3;
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
412 const UINT8 *cm = cropTbl + MAX_NEG_CROP;
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
413
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
414 a0 = col[8*0];
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
415 a1 = col[8*2];
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
416 a2 = col[8*4];
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
417 a3 = col[8*6];
722
ff90043f4a2d in fact IDCT248 needs to be normalized as I suspected
bellard
parents: 719
diff changeset
418 c0 = ((a0 + a2) << (CN_SHIFT - 1)) + (1 << (C_SHIFT - 1));
ff90043f4a2d in fact IDCT248 needs to be normalized as I suspected
bellard
parents: 719
diff changeset
419 c2 = ((a0 - a2) << (CN_SHIFT - 1)) + (1 << (C_SHIFT - 1));
719
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
420 c1 = a1 * C1 + a3 * C2;
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
421 c3 = a1 * C2 - a3 * C1;
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
422 dest[0] = cm[(c0 + c1) >> C_SHIFT];
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
423 dest += line_size;
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
424 dest[0] = cm[(c2 + c3) >> C_SHIFT];
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
425 dest += line_size;
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
426 dest[0] = cm[(c2 - c3) >> C_SHIFT];
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
427 dest += line_size;
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
428 dest[0] = cm[(c0 - c1) >> C_SHIFT];
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
429 }
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
430
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
431 #define BF(k) \
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
432 {\
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
433 int a0, a1;\
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
434 a0 = ptr[k];\
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
435 a1 = ptr[8 + k];\
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
436 ptr[k] = a0 + a1;\
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
437 ptr[8 + k] = a0 - a1;\
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
438 }
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
439
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
440 /* only used by DV codec. The input must be interlaced. 128 is added
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
441 to the pixels before clamping to avoid systematic error
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
442 (1024*sqrt(2)) offset would be needed otherwise. */
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
443 /* XXX: I think a 1.0/sqrt(2) normalization should be needed to
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
444 compensate the extra butterfly stage - I don't have the full DV
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
445 specification */
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
446 void simple_idct248_put(UINT8 *dest, int line_size, INT16 *block)
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
447 {
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
448 int i;
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
449 INT16 *ptr;
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
450
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
451 /* butterfly */
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
452 ptr = block;
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
453 for(i=0;i<4;i++) {
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
454 BF(0);
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
455 BF(1);
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
456 BF(2);
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
457 BF(3);
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
458 BF(4);
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
459 BF(5);
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
460 BF(6);
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
461 BF(7);
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
462 ptr += 2 * 8;
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
463 }
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
464
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
465 /* IDCT8 on each line */
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
466 for(i=0; i<8; i++) {
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
467 idctRowCondDC(block + i*8);
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
468 }
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
469
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
470 /* IDCT4 and store */
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
471 for(i=0;i<8;i++) {
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
472 idct4col(dest + i, 2 * line_size, block + i);
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
473 idct4col(dest + line_size + i, 2 * line_size, block + 8 + i);
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
474 }
2b7ff6dfee35 first version of IDCT248 for DV decoding support
bellard
parents: 642
diff changeset
475 }
936
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
476
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
477 /* 8x4 & 4x8 WMV2 IDCT */
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
478 #undef CN_SHIFT
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
479 #undef C_SHIFT
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
480 #undef C_FIX
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
481 #undef C1
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
482 #undef C2
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
483 #define CN_SHIFT 12
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
484 #define C_FIX(x) ((int)((x) * 1.414213562 * (1 << CN_SHIFT) + 0.5))
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
485 #define C1 C_FIX(0.6532814824)
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
486 #define C2 C_FIX(0.2705980501)
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
487 #define C3 C_FIX(0.5)
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
488 #define C_SHIFT (4+1+12)
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
489 static inline void idct4col_add(UINT8 *dest, int line_size, const INT16 *col)
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
490 {
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
491 int c0, c1, c2, c3, a0, a1, a2, a3;
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
492 const UINT8 *cm = cropTbl + MAX_NEG_CROP;
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
493
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
494 a0 = col[8*0];
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
495 a1 = col[8*1];
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
496 a2 = col[8*2];
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
497 a3 = col[8*3];
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
498 c0 = (a0 + a2)*C3 + (1 << (C_SHIFT - 1));
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
499 c2 = (a0 - a2)*C3 + (1 << (C_SHIFT - 1));
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
500 c1 = a1 * C1 + a3 * C2;
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
501 c3 = a1 * C2 - a3 * C1;
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
502 dest[0] = cm[dest[0] + ((c0 + c1) >> C_SHIFT)];
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
503 dest += line_size;
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
504 dest[0] = cm[dest[0] + ((c2 + c3) >> C_SHIFT)];
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
505 dest += line_size;
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
506 dest[0] = cm[dest[0] + ((c2 - c3) >> C_SHIFT)];
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
507 dest += line_size;
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
508 dest[0] = cm[dest[0] + ((c0 - c1) >> C_SHIFT)];
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
509 }
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
510
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
511 #define RN_SHIFT 15
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
512 #define R_FIX(x) ((int)((x) * 1.414213562 * (1 << RN_SHIFT) + 0.5))
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
513 #define R1 R_FIX(0.6532814824)
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
514 #define R2 R_FIX(0.2705980501)
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
515 #define R3 R_FIX(0.5)
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
516 #define R_SHIFT 11
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
517 static inline void idct4row(INT16 *row)
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
518 {
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
519 int c0, c1, c2, c3, a0, a1, a2, a3;
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
520 const UINT8 *cm = cropTbl + MAX_NEG_CROP;
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
521
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
522 a0 = row[0];
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
523 a1 = row[1];
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
524 a2 = row[2];
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
525 a3 = row[3];
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
526 c0 = (a0 + a2)*R3 + (1 << (R_SHIFT - 1));
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
527 c2 = (a0 - a2)*R3 + (1 << (R_SHIFT - 1));
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
528 c1 = a1 * R1 + a3 * R2;
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
529 c3 = a1 * R2 - a3 * R1;
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
530 row[0]= (c0 + c1) >> R_SHIFT;
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
531 row[1]= (c2 + c3) >> R_SHIFT;
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
532 row[2]= (c2 - c3) >> R_SHIFT;
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
533 row[3]= (c0 - c1) >> R_SHIFT;
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
534 }
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
535
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
536 void simple_idct84_add(UINT8 *dest, int line_size, INT16 *block)
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
537 {
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
538 int i;
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
539
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
540 /* IDCT8 on each line */
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
541 for(i=0; i<4; i++) {
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
542 idctRowCondDC(block + i*8);
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
543 }
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
544
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
545 /* IDCT4 and store */
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
546 for(i=0;i<8;i++) {
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
547 idct4col_add(dest + i, line_size, block + i);
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
548 }
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
549 }
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
550
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
551 void simple_idct48_add(UINT8 *dest, int line_size, INT16 *block)
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
552 {
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
553 int i;
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
554
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
555 /* IDCT4 on each line */
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
556 for(i=0; i<8; i++) {
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
557 idct4row(block + i*8);
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
558 }
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
559
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
560 /* IDCT8 and store */
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
561 for(i=0; i<4; i++){
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
562 idctSparseColAdd(dest + i, line_size, block + i);
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
563 }
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
564 }
caa77cd960c0 qpel encoding
michaelni
parents: 744
diff changeset
565