Mercurial > libavcodec.hg
annotate i386/mmx.h @ 3886:e96794bc2b0a libavcodec
Original Commit: r86 | ods15 | 2006-09-29 21:08:42 +0300 (Fri, 29 Sep 2006) | 2 lines
make put_vector ignore unused codebook entries
author | ods15 |
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date | Mon, 02 Oct 2006 06:08:48 +0000 |
parents | c537a97eec66 |
children | c8c591fe26f8 |
rev | line source |
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31 | 1 /* |
2 * mmx.h | |
3 * Copyright (C) 1997-2001 H. Dietz and R. Fisher | |
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4 * |
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5 * This library is free software; you can redistribute it and/or |
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6 * modify it under the terms of the GNU Lesser General Public |
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7 * License as published by the Free Software Foundation; either |
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8 * version 2 of the License, or (at your option) any later version. |
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9 * |
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10 * This library is distributed in the hope that it will be useful, |
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11 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
c537a97eec66
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12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
c537a97eec66
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13 * Lesser General Public License for more details. |
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14 * |
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15 * You should have received a copy of the GNU Lesser General Public |
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16 * License along with this library; if not, write to the Free Software |
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17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
31 | 18 */ |
434 | 19 #ifndef AVCODEC_I386MMX_H |
20 #define AVCODEC_I386MMX_H | |
0 | 21 |
31 | 22 /* |
23 * The type of an value that fits in an MMX register (note that long | |
24 * long constant values MUST be suffixed by LL and unsigned long long | |
25 * values by ULL, lest they be truncated by the compiler) | |
26 */ | |
0 | 27 |
2979 | 28 typedef union { |
29 long long q; /* Quadword (64-bit) value */ | |
30 unsigned long long uq; /* Unsigned Quadword */ | |
31 int d[2]; /* 2 Doubleword (32-bit) values */ | |
32 unsigned int ud[2]; /* 2 Unsigned Doubleword */ | |
33 short w[4]; /* 4 Word (16-bit) values */ | |
34 unsigned short uw[4]; /* 4 Unsigned Word */ | |
35 char b[8]; /* 8 Byte (8-bit) values */ | |
36 unsigned char ub[8]; /* 8 Unsigned Byte */ | |
37 float s[2]; /* Single-precision (32-bit) value */ | |
38 } mmx_t; /* On an 8-byte (64-bit) boundary */ | |
0 | 39 |
40 | |
2979 | 41 #define mmx_i2r(op,imm,reg) \ |
42 __asm__ __volatile__ (#op " %0, %%" #reg \ | |
43 : /* nothing */ \ | |
44 : "i" (imm) ) | |
0 | 45 |
2979 | 46 #define mmx_m2r(op,mem,reg) \ |
47 __asm__ __volatile__ (#op " %0, %%" #reg \ | |
48 : /* nothing */ \ | |
49 : "m" (mem)) | |
0 | 50 |
2979 | 51 #define mmx_r2m(op,reg,mem) \ |
52 __asm__ __volatile__ (#op " %%" #reg ", %0" \ | |
53 : "=m" (mem) \ | |
54 : /* nothing */ ) | |
0 | 55 |
2979 | 56 #define mmx_r2r(op,regs,regd) \ |
57 __asm__ __volatile__ (#op " %" #regs ", %" #regd) | |
0 | 58 |
59 | |
2979 | 60 #define emms() __asm__ __volatile__ ("emms") |
31 | 61 |
2979 | 62 #define movd_m2r(var,reg) mmx_m2r (movd, var, reg) |
63 #define movd_r2m(reg,var) mmx_r2m (movd, reg, var) | |
64 #define movd_r2r(regs,regd) mmx_r2r (movd, regs, regd) | |
0 | 65 |
2979 | 66 #define movq_m2r(var,reg) mmx_m2r (movq, var, reg) |
67 #define movq_r2m(reg,var) mmx_r2m (movq, reg, var) | |
68 #define movq_r2r(regs,regd) mmx_r2r (movq, regs, regd) | |
31 | 69 |
2979 | 70 #define packssdw_m2r(var,reg) mmx_m2r (packssdw, var, reg) |
71 #define packssdw_r2r(regs,regd) mmx_r2r (packssdw, regs, regd) | |
72 #define packsswb_m2r(var,reg) mmx_m2r (packsswb, var, reg) | |
73 #define packsswb_r2r(regs,regd) mmx_r2r (packsswb, regs, regd) | |
0 | 74 |
2979 | 75 #define packuswb_m2r(var,reg) mmx_m2r (packuswb, var, reg) |
76 #define packuswb_r2r(regs,regd) mmx_r2r (packuswb, regs, regd) | |
0 | 77 |
2979 | 78 #define paddb_m2r(var,reg) mmx_m2r (paddb, var, reg) |
79 #define paddb_r2r(regs,regd) mmx_r2r (paddb, regs, regd) | |
80 #define paddd_m2r(var,reg) mmx_m2r (paddd, var, reg) | |
81 #define paddd_r2r(regs,regd) mmx_r2r (paddd, regs, regd) | |
82 #define paddw_m2r(var,reg) mmx_m2r (paddw, var, reg) | |
83 #define paddw_r2r(regs,regd) mmx_r2r (paddw, regs, regd) | |
0 | 84 |
2979 | 85 #define paddsb_m2r(var,reg) mmx_m2r (paddsb, var, reg) |
86 #define paddsb_r2r(regs,regd) mmx_r2r (paddsb, regs, regd) | |
87 #define paddsw_m2r(var,reg) mmx_m2r (paddsw, var, reg) | |
88 #define paddsw_r2r(regs,regd) mmx_r2r (paddsw, regs, regd) | |
0 | 89 |
2979 | 90 #define paddusb_m2r(var,reg) mmx_m2r (paddusb, var, reg) |
91 #define paddusb_r2r(regs,regd) mmx_r2r (paddusb, regs, regd) | |
92 #define paddusw_m2r(var,reg) mmx_m2r (paddusw, var, reg) | |
93 #define paddusw_r2r(regs,regd) mmx_r2r (paddusw, regs, regd) | |
0 | 94 |
2979 | 95 #define pand_m2r(var,reg) mmx_m2r (pand, var, reg) |
96 #define pand_r2r(regs,regd) mmx_r2r (pand, regs, regd) | |
31 | 97 |
2979 | 98 #define pandn_m2r(var,reg) mmx_m2r (pandn, var, reg) |
99 #define pandn_r2r(regs,regd) mmx_r2r (pandn, regs, regd) | |
0 | 100 |
2979 | 101 #define pcmpeqb_m2r(var,reg) mmx_m2r (pcmpeqb, var, reg) |
102 #define pcmpeqb_r2r(regs,regd) mmx_r2r (pcmpeqb, regs, regd) | |
103 #define pcmpeqd_m2r(var,reg) mmx_m2r (pcmpeqd, var, reg) | |
104 #define pcmpeqd_r2r(regs,regd) mmx_r2r (pcmpeqd, regs, regd) | |
105 #define pcmpeqw_m2r(var,reg) mmx_m2r (pcmpeqw, var, reg) | |
106 #define pcmpeqw_r2r(regs,regd) mmx_r2r (pcmpeqw, regs, regd) | |
0 | 107 |
2979 | 108 #define pcmpgtb_m2r(var,reg) mmx_m2r (pcmpgtb, var, reg) |
109 #define pcmpgtb_r2r(regs,regd) mmx_r2r (pcmpgtb, regs, regd) | |
110 #define pcmpgtd_m2r(var,reg) mmx_m2r (pcmpgtd, var, reg) | |
111 #define pcmpgtd_r2r(regs,regd) mmx_r2r (pcmpgtd, regs, regd) | |
112 #define pcmpgtw_m2r(var,reg) mmx_m2r (pcmpgtw, var, reg) | |
113 #define pcmpgtw_r2r(regs,regd) mmx_r2r (pcmpgtw, regs, regd) | |
31 | 114 |
2979 | 115 #define pmaddwd_m2r(var,reg) mmx_m2r (pmaddwd, var, reg) |
116 #define pmaddwd_r2r(regs,regd) mmx_r2r (pmaddwd, regs, regd) | |
31 | 117 |
2979 | 118 #define pmulhw_m2r(var,reg) mmx_m2r (pmulhw, var, reg) |
119 #define pmulhw_r2r(regs,regd) mmx_r2r (pmulhw, regs, regd) | |
31 | 120 |
2979 | 121 #define pmullw_m2r(var,reg) mmx_m2r (pmullw, var, reg) |
122 #define pmullw_r2r(regs,regd) mmx_r2r (pmullw, regs, regd) | |
0 | 123 |
2979 | 124 #define por_m2r(var,reg) mmx_m2r (por, var, reg) |
125 #define por_r2r(regs,regd) mmx_r2r (por, regs, regd) | |
0 | 126 |
2979 | 127 #define pslld_i2r(imm,reg) mmx_i2r (pslld, imm, reg) |
128 #define pslld_m2r(var,reg) mmx_m2r (pslld, var, reg) | |
129 #define pslld_r2r(regs,regd) mmx_r2r (pslld, regs, regd) | |
130 #define psllq_i2r(imm,reg) mmx_i2r (psllq, imm, reg) | |
131 #define psllq_m2r(var,reg) mmx_m2r (psllq, var, reg) | |
132 #define psllq_r2r(regs,regd) mmx_r2r (psllq, regs, regd) | |
133 #define psllw_i2r(imm,reg) mmx_i2r (psllw, imm, reg) | |
134 #define psllw_m2r(var,reg) mmx_m2r (psllw, var, reg) | |
135 #define psllw_r2r(regs,regd) mmx_r2r (psllw, regs, regd) | |
0 | 136 |
2979 | 137 #define psrad_i2r(imm,reg) mmx_i2r (psrad, imm, reg) |
138 #define psrad_m2r(var,reg) mmx_m2r (psrad, var, reg) | |
139 #define psrad_r2r(regs,regd) mmx_r2r (psrad, regs, regd) | |
140 #define psraw_i2r(imm,reg) mmx_i2r (psraw, imm, reg) | |
141 #define psraw_m2r(var,reg) mmx_m2r (psraw, var, reg) | |
142 #define psraw_r2r(regs,regd) mmx_r2r (psraw, regs, regd) | |
0 | 143 |
2979 | 144 #define psrld_i2r(imm,reg) mmx_i2r (psrld, imm, reg) |
145 #define psrld_m2r(var,reg) mmx_m2r (psrld, var, reg) | |
146 #define psrld_r2r(regs,regd) mmx_r2r (psrld, regs, regd) | |
147 #define psrlq_i2r(imm,reg) mmx_i2r (psrlq, imm, reg) | |
148 #define psrlq_m2r(var,reg) mmx_m2r (psrlq, var, reg) | |
149 #define psrlq_r2r(regs,regd) mmx_r2r (psrlq, regs, regd) | |
150 #define psrlw_i2r(imm,reg) mmx_i2r (psrlw, imm, reg) | |
151 #define psrlw_m2r(var,reg) mmx_m2r (psrlw, var, reg) | |
152 #define psrlw_r2r(regs,regd) mmx_r2r (psrlw, regs, regd) | |
0 | 153 |
2979 | 154 #define psubb_m2r(var,reg) mmx_m2r (psubb, var, reg) |
155 #define psubb_r2r(regs,regd) mmx_r2r (psubb, regs, regd) | |
156 #define psubd_m2r(var,reg) mmx_m2r (psubd, var, reg) | |
157 #define psubd_r2r(regs,regd) mmx_r2r (psubd, regs, regd) | |
158 #define psubw_m2r(var,reg) mmx_m2r (psubw, var, reg) | |
159 #define psubw_r2r(regs,regd) mmx_r2r (psubw, regs, regd) | |
0 | 160 |
2979 | 161 #define psubsb_m2r(var,reg) mmx_m2r (psubsb, var, reg) |
162 #define psubsb_r2r(regs,regd) mmx_r2r (psubsb, regs, regd) | |
163 #define psubsw_m2r(var,reg) mmx_m2r (psubsw, var, reg) | |
164 #define psubsw_r2r(regs,regd) mmx_r2r (psubsw, regs, regd) | |
31 | 165 |
2979 | 166 #define psubusb_m2r(var,reg) mmx_m2r (psubusb, var, reg) |
167 #define psubusb_r2r(regs,regd) mmx_r2r (psubusb, regs, regd) | |
168 #define psubusw_m2r(var,reg) mmx_m2r (psubusw, var, reg) | |
169 #define psubusw_r2r(regs,regd) mmx_r2r (psubusw, regs, regd) | |
0 | 170 |
2979 | 171 #define punpckhbw_m2r(var,reg) mmx_m2r (punpckhbw, var, reg) |
172 #define punpckhbw_r2r(regs,regd) mmx_r2r (punpckhbw, regs, regd) | |
173 #define punpckhdq_m2r(var,reg) mmx_m2r (punpckhdq, var, reg) | |
174 #define punpckhdq_r2r(regs,regd) mmx_r2r (punpckhdq, regs, regd) | |
175 #define punpckhwd_m2r(var,reg) mmx_m2r (punpckhwd, var, reg) | |
176 #define punpckhwd_r2r(regs,regd) mmx_r2r (punpckhwd, regs, regd) | |
0 | 177 |
2979 | 178 #define punpcklbw_m2r(var,reg) mmx_m2r (punpcklbw, var, reg) |
179 #define punpcklbw_r2r(regs,regd) mmx_r2r (punpcklbw, regs, regd) | |
180 #define punpckldq_m2r(var,reg) mmx_m2r (punpckldq, var, reg) | |
181 #define punpckldq_r2r(regs,regd) mmx_r2r (punpckldq, regs, regd) | |
182 #define punpcklwd_m2r(var,reg) mmx_m2r (punpcklwd, var, reg) | |
183 #define punpcklwd_r2r(regs,regd) mmx_r2r (punpcklwd, regs, regd) | |
0 | 184 |
2979 | 185 #define pxor_m2r(var,reg) mmx_m2r (pxor, var, reg) |
186 #define pxor_r2r(regs,regd) mmx_r2r (pxor, regs, regd) | |
0 | 187 |
188 | |
31 | 189 /* 3DNOW extensions */ |
0 | 190 |
2979 | 191 #define pavgusb_m2r(var,reg) mmx_m2r (pavgusb, var, reg) |
192 #define pavgusb_r2r(regs,regd) mmx_r2r (pavgusb, regs, regd) | |
31 | 193 |
194 | |
195 /* AMD MMX extensions - also available in intel SSE */ | |
0 | 196 |
197 | |
2979 | 198 #define mmx_m2ri(op,mem,reg,imm) \ |
31 | 199 __asm__ __volatile__ (#op " %1, %0, %%" #reg \ |
200 : /* nothing */ \ | |
3578 | 201 : "m" (mem), "i" (imm)) |
2979 | 202 #define mmx_r2ri(op,regs,regd,imm) \ |
31 | 203 __asm__ __volatile__ (#op " %0, %%" #regs ", %%" #regd \ |
204 : /* nothing */ \ | |
3578 | 205 : "i" (imm) ) |
0 | 206 |
2979 | 207 #define mmx_fetch(mem,hint) \ |
208 __asm__ __volatile__ ("prefetch" #hint " %0" \ | |
209 : /* nothing */ \ | |
3578 | 210 : "m" (mem)) |
0 | 211 |
212 | |
2979 | 213 #define maskmovq(regs,maskreg) mmx_r2ri (maskmovq, regs, maskreg) |
31 | 214 |
2979 | 215 #define movntq_r2m(mmreg,var) mmx_r2m (movntq, mmreg, var) |
0 | 216 |
2979 | 217 #define pavgb_m2r(var,reg) mmx_m2r (pavgb, var, reg) |
218 #define pavgb_r2r(regs,regd) mmx_r2r (pavgb, regs, regd) | |
219 #define pavgw_m2r(var,reg) mmx_m2r (pavgw, var, reg) | |
220 #define pavgw_r2r(regs,regd) mmx_r2r (pavgw, regs, regd) | |
31 | 221 |
2979 | 222 #define pextrw_r2r(mmreg,reg,imm) mmx_r2ri (pextrw, mmreg, reg, imm) |
0 | 223 |
2979 | 224 #define pinsrw_r2r(reg,mmreg,imm) mmx_r2ri (pinsrw, reg, mmreg, imm) |
0 | 225 |
2979 | 226 #define pmaxsw_m2r(var,reg) mmx_m2r (pmaxsw, var, reg) |
227 #define pmaxsw_r2r(regs,regd) mmx_r2r (pmaxsw, regs, regd) | |
0 | 228 |
2979 | 229 #define pmaxub_m2r(var,reg) mmx_m2r (pmaxub, var, reg) |
230 #define pmaxub_r2r(regs,regd) mmx_r2r (pmaxub, regs, regd) | |
31 | 231 |
2979 | 232 #define pminsw_m2r(var,reg) mmx_m2r (pminsw, var, reg) |
233 #define pminsw_r2r(regs,regd) mmx_r2r (pminsw, regs, regd) | |
0 | 234 |
2979 | 235 #define pminub_m2r(var,reg) mmx_m2r (pminub, var, reg) |
236 #define pminub_r2r(regs,regd) mmx_r2r (pminub, regs, regd) | |
0 | 237 |
2979 | 238 #define pmovmskb(mmreg,reg) \ |
239 __asm__ __volatile__ ("movmskps %" #mmreg ", %" #reg) | |
0 | 240 |
2979 | 241 #define pmulhuw_m2r(var,reg) mmx_m2r (pmulhuw, var, reg) |
242 #define pmulhuw_r2r(regs,regd) mmx_r2r (pmulhuw, regs, regd) | |
0 | 243 |
2979 | 244 #define prefetcht0(mem) mmx_fetch (mem, t0) |
245 #define prefetcht1(mem) mmx_fetch (mem, t1) | |
246 #define prefetcht2(mem) mmx_fetch (mem, t2) | |
247 #define prefetchnta(mem) mmx_fetch (mem, nta) | |
0 | 248 |
2979 | 249 #define psadbw_m2r(var,reg) mmx_m2r (psadbw, var, reg) |
250 #define psadbw_r2r(regs,regd) mmx_r2r (psadbw, regs, regd) | |
0 | 251 |
2979 | 252 #define pshufw_m2r(var,reg,imm) mmx_m2ri(pshufw, var, reg, imm) |
253 #define pshufw_r2r(regs,regd,imm) mmx_r2ri(pshufw, regs, regd, imm) | |
0 | 254 |
2979 | 255 #define sfence() __asm__ __volatile__ ("sfence\n\t") |
434 | 256 |
1971 | 257 /* SSE2 */ |
2979 | 258 #define pshufhw_m2r(var,reg,imm) mmx_m2ri(pshufhw, var, reg, imm) |
259 #define pshufhw_r2r(regs,regd,imm) mmx_r2ri(pshufhw, regs, regd, imm) | |
260 #define pshuflw_m2r(var,reg,imm) mmx_m2ri(pshuflw, var, reg, imm) | |
261 #define pshuflw_r2r(regs,regd,imm) mmx_r2ri(pshuflw, regs, regd, imm) | |
1971 | 262 |
2979 | 263 #define pshufd_r2r(regs,regd,imm) mmx_r2ri(pshufd, regs, regd, imm) |
1971 | 264 |
2979 | 265 #define movdqa_m2r(var,reg) mmx_m2r (movdqa, var, reg) |
266 #define movdqa_r2m(reg,var) mmx_r2m (movdqa, reg, var) | |
267 #define movdqa_r2r(regs,regd) mmx_r2r (movdqa, regs, regd) | |
268 #define movdqu_m2r(var,reg) mmx_m2r (movdqu, var, reg) | |
269 #define movdqu_r2m(reg,var) mmx_r2m (movdqu, reg, var) | |
270 #define movdqu_r2r(regs,regd) mmx_r2r (movdqu, regs, regd) | |
1971 | 271 |
2979 | 272 #define pmullw_r2m(reg,var) mmx_r2m (pmullw, reg, var) |
1971 | 273 |
2979 | 274 #define pslldq_i2r(imm,reg) mmx_i2r (pslldq, imm, reg) |
275 #define psrldq_i2r(imm,reg) mmx_i2r (psrldq, imm, reg) | |
1971 | 276 |
2979 | 277 #define punpcklqdq_r2r(regs,regd) mmx_r2r (punpcklqdq, regs, regd) |
278 #define punpckhqdq_r2r(regs,regd) mmx_r2r (punpckhqdq, regs, regd) | |
1971 | 279 |
280 | |
434 | 281 #endif /* AVCODEC_I386MMX_H */ |