annotate ppc/dsputil_ppc.c @ 1092:f59c3f66363b libavcodec

MpegEncContext.(i)dct_* -> DspContext.(i)dct_* bitexact cleanup
author michaelni
date Mon, 03 Mar 2003 14:54:00 +0000
parents b4172ff70d27
children 80c46c310a91
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
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1 /*
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2 * Copyright (c) 2002 Brian Foley
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3 * Copyright (c) 2002 Dieter Shirley
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4 *
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5 * This library is free software; you can redistribute it and/or
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6 * modify it under the terms of the GNU Lesser General Public
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7 * License as published by the Free Software Foundation; either
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8 * version 2 of the License, or (at your option) any later version.
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9 *
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10 * This library is distributed in the hope that it will be useful,
ace3ccd18dd2 Altivec Patch (Mark III) by (Dieter Shirley <dieters at schemasoft dot com>)
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11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
ace3ccd18dd2 Altivec Patch (Mark III) by (Dieter Shirley <dieters at schemasoft dot com>)
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12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
ace3ccd18dd2 Altivec Patch (Mark III) by (Dieter Shirley <dieters at schemasoft dot com>)
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13 * Lesser General Public License for more details.
ace3ccd18dd2 Altivec Patch (Mark III) by (Dieter Shirley <dieters at schemasoft dot com>)
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14 *
ace3ccd18dd2 Altivec Patch (Mark III) by (Dieter Shirley <dieters at schemasoft dot com>)
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15 * You should have received a copy of the GNU Lesser General Public
ace3ccd18dd2 Altivec Patch (Mark III) by (Dieter Shirley <dieters at schemasoft dot com>)
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16 * License along with this library; if not, write to the Free Software
ace3ccd18dd2 Altivec Patch (Mark III) by (Dieter Shirley <dieters at schemasoft dot com>)
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17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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18 */
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19
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20 #include "../dsputil.h"
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21
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22 #include "dsputil_ppc.h"
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23
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24 #ifdef HAVE_ALTIVEC
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25 #include "dsputil_altivec.h"
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26 #endif
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27
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f59c3f66363b MpegEncContext.(i)dct_* -> DspContext.(i)dct_*
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28 extern void idct_put_altivec(uint8_t *dest, int line_size, int16_t *block);
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29 extern void idct_add_altivec(uint8_t *dest, int line_size, int16_t *block);
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30
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31 int mm_flags = 0;
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32
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33 int mm_support(void)
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34 {
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35 int result = 0;
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36 #if HAVE_ALTIVEC
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37 if (has_altivec()) {
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38 result |= MM_ALTIVEC;
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39 }
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40 #endif /* result */
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41 return result;
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42 }
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43
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44 #ifdef POWERPC_TBL_PERFORMANCE_REPORT
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45 unsigned long long perfdata[powerpc_perf_total][powerpc_data_total];
1024
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46 /* list below must match enum in dsputil_ppc.h */
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47 static unsigned char* perfname[] = {
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48 "fft_calc_altivec",
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49 "gmc1_altivec",
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50 "dct_unquantize_h263_altivec",
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51 "idct_add_altivec",
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52 "idct_put_altivec",
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53 "put_pixels16_altivec",
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54 "avg_pixels16_altivec",
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55 "avg_pixels8_altivec",
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56 "put_pixels8_xy2_altivec",
1024
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57 "put_no_rnd_pixels8_xy2_altivec",
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58 "put_pixels16_xy2_altivec",
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59 "put_no_rnd_pixels16_xy2_altivec",
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60 "clear_blocks_dcbz32_ppc"
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61 };
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62 #ifdef POWERPC_PERF_USE_PMC
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63 unsigned long long perfdata_miss[powerpc_perf_total][powerpc_data_total];
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64 #endif
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65 #include <stdio.h>
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66 #endif
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67
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68 #ifdef POWERPC_TBL_PERFORMANCE_REPORT
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69 void powerpc_display_perf_report(void)
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70 {
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71 int i;
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72 #ifndef POWERPC_PERF_USE_PMC
1024
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73 fprintf(stderr, "PowerPC performance report\n Values are from the Time Base register, and represent 4 bus cycles.\n");
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74 #else /* POWERPC_PERF_USE_PMC */
1024
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75 fprintf(stderr, "PowerPC performance report\n Values are from the PMC registers, and represent whatever the registers are set to record.\n");
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76 #endif /* POWERPC_PERF_USE_PMC */
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77 for(i = 0 ; i < powerpc_perf_total ; i++)
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78 {
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79 if (perfdata[i][powerpc_data_num] != (unsigned long long)0)
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80 fprintf(stderr, " Function \"%s\" (pmc1):\n\tmin: %llu\n\tmax: %llu\n\tavg: %1.2lf (%llu)\n",
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81 perfname[i],
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82 perfdata[i][powerpc_data_min],
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83 perfdata[i][powerpc_data_max],
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84 (double)perfdata[i][powerpc_data_sum] /
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85 (double)perfdata[i][powerpc_data_num],
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86 perfdata[i][powerpc_data_num]);
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87 #ifdef POWERPC_PERF_USE_PMC
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88 if (perfdata_miss[i][powerpc_data_num] != (unsigned long long)0)
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89 fprintf(stderr, " Function \"%s\" (pmc2):\n\tmin: %llu\n\tmax: %llu\n\tavg: %1.2lf (%llu)\n",
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90 perfname[i],
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91 perfdata_miss[i][powerpc_data_min],
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92 perfdata_miss[i][powerpc_data_max],
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93 (double)perfdata_miss[i][powerpc_data_sum] /
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94 (double)perfdata_miss[i][powerpc_data_num],
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95 perfdata_miss[i][powerpc_data_num]);
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96 #endif
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97 }
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98 }
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99 #endif /* POWERPC_TBL_PERFORMANCE_REPORT */
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100
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101 /* ***** WARNING ***** WARNING ***** WARNING ***** */
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102 /*
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103 clear_blocks_dcbz32_ppc will not work properly
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104 on PowerPC processors with a cache line size
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105 not equal to 32 bytes.
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106 Fortunately all processor used by Apple up to
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107 at least the 7450 (aka second generation G4)
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108 use 32 bytes cache line.
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diff changeset
109 This is due to the use of the 'dcbz' instruction.
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
110 It simply clear to zero a single cache line,
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
111 so you need to know the cache line size to use it !
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
112 It's absurd, but it's fast...
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
113 */
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
114 void clear_blocks_dcbz32_ppc(DCTELEM *blocks)
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
115 {
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
116 POWERPC_TBL_DECLARE(powerpc_clear_blocks_dcbz32, 1);
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
117 register int misal = ((unsigned long)blocks & 0x00000010);
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
118 register int i = 0;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
119 POWERPC_TBL_START_COUNT(powerpc_clear_blocks_dcbz32, 1);
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
120 #if 1
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
121 if (misal) {
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
122 ((unsigned long*)blocks)[0] = 0L;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
123 ((unsigned long*)blocks)[1] = 0L;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
124 ((unsigned long*)blocks)[2] = 0L;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
125 ((unsigned long*)blocks)[3] = 0L;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
126 i += 16;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
127 }
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
128 for ( ; i < sizeof(DCTELEM)*6*64 ; i += 32) {
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
129 asm volatile("dcbz %0,%1" : : "r" (blocks), "r" (i) : "memory");
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
130 }
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
131 if (misal) {
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
132 ((unsigned long*)blocks)[188] = 0L;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
133 ((unsigned long*)blocks)[189] = 0L;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
134 ((unsigned long*)blocks)[190] = 0L;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
135 ((unsigned long*)blocks)[191] = 0L;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
136 i += 16;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
137 }
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
138 #else
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
139 memset(blocks, 0, sizeof(DCTELEM)*6*64);
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
140 #endif
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
141 POWERPC_TBL_STOP_COUNT(powerpc_clear_blocks_dcbz32, 1);
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
142 }
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
143
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
144 /* check dcbz report how many bytes are set to 0 by dcbz */
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
145 long check_dcbz_effect(void)
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
146 {
1033
b4172ff70d27 Altivec on non darwin systems patch by Romain Dolbeau
bellard
parents: 1024
diff changeset
147 register char *fakedata = (char*)av_malloc(1024);
1015
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
148 register char *fakedata_middle;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
149 register long zero = 0;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
150 register long i = 0;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
151 long count = 0;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
152
1033
b4172ff70d27 Altivec on non darwin systems patch by Romain Dolbeau
bellard
parents: 1024
diff changeset
153 if (!fakedata)
1015
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
154 {
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
155 return 0L;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
156 }
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
157
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
158 fakedata_middle = (fakedata + 512);
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
159
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
160 memset(fakedata, 0xFF, 1024);
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
161
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
162 asm volatile("dcbz %0, %1" : : "r" (fakedata_middle), "r" (zero));
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
163
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
164 for (i = 0; i < 1024 ; i ++)
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
165 {
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
166 if (fakedata[i] == (char)0)
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
167 count++;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
168 }
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
169
1033
b4172ff70d27 Altivec on non darwin systems patch by Romain Dolbeau
bellard
parents: 1024
diff changeset
170 av_free(fakedata);
1015
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
171
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
172 return count;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
173 }
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
174
1092
f59c3f66363b MpegEncContext.(i)dct_* -> DspContext.(i)dct_*
michaelni
parents: 1033
diff changeset
175 void dsputil_init_ppc(DSPContext* c, AVCodecContext *avctx)
638
0012f75c92bb altivec build tidyup patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
michaelni
parents:
diff changeset
176 {
828
ace3ccd18dd2 Altivec Patch (Mark III) by (Dieter Shirley <dieters at schemasoft dot com>)
michaelni
parents: 748
diff changeset
177 // Common optimisations whether Altivec or not
ace3ccd18dd2 Altivec Patch (Mark III) by (Dieter Shirley <dieters at schemasoft dot com>)
michaelni
parents: 748
diff changeset
178
1015
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
179 switch (check_dcbz_effect()) {
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
180 case 32:
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
181 c->clear_blocks = clear_blocks_dcbz32_ppc;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
182 break;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
183 default:
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
184 break;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
185 }
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
186
638
0012f75c92bb altivec build tidyup patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
michaelni
parents:
diff changeset
187 #if HAVE_ALTIVEC
0012f75c92bb altivec build tidyup patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
michaelni
parents:
diff changeset
188 if (has_altivec()) {
894
a408778eff87 altivec accelerated v-resample patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
michaelni
parents: 884
diff changeset
189 mm_flags |= MM_ALTIVEC;
a408778eff87 altivec accelerated v-resample patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
michaelni
parents: 884
diff changeset
190
828
ace3ccd18dd2 Altivec Patch (Mark III) by (Dieter Shirley <dieters at schemasoft dot com>)
michaelni
parents: 748
diff changeset
191 // Altivec specific optimisations
878
6ea69518e5f7 altivec optimizations patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
michaelni
parents: 856
diff changeset
192 c->pix_abs16x16_x2 = pix_abs16x16_x2_altivec;
6ea69518e5f7 altivec optimizations patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
michaelni
parents: 856
diff changeset
193 c->pix_abs16x16_y2 = pix_abs16x16_y2_altivec;
884
2cef5c4c0ca6 * altivec and pix_norm patch by Brian Foley
kabi
parents: 878
diff changeset
194 c->pix_abs16x16_xy2 = pix_abs16x16_xy2_altivec;
2cef5c4c0ca6 * altivec and pix_norm patch by Brian Foley
kabi
parents: 878
diff changeset
195 c->pix_abs16x16 = pix_abs16x16_altivec;
856
3c6df37177dd * using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents: 828
diff changeset
196 c->pix_abs8x8 = pix_abs8x8_altivec;
995
edc10966b081 altivec jumbo patch by (Romain Dolbeau <dolbeaur at club-internet dot fr>)
michaelni
parents: 981
diff changeset
197 c->sad[0]= sad16x16_altivec;
edc10966b081 altivec jumbo patch by (Romain Dolbeau <dolbeaur at club-internet dot fr>)
michaelni
parents: 981
diff changeset
198 c->sad[1]= sad8x8_altivec;
878
6ea69518e5f7 altivec optimizations patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
michaelni
parents: 856
diff changeset
199 c->pix_norm1 = pix_norm1_altivec;
981
8bec850dc9c7 altivec patches by Romain Dolbeau
bellard
parents: 978
diff changeset
200 c->sse[1]= sse8_altivec;
8bec850dc9c7 altivec patches by Romain Dolbeau
bellard
parents: 978
diff changeset
201 c->sse[0]= sse16_altivec;
856
3c6df37177dd * using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents: 828
diff changeset
202 c->pix_sum = pix_sum_altivec;
3c6df37177dd * using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents: 828
diff changeset
203 c->diff_pixels = diff_pixels_altivec;
3c6df37177dd * using DSPContext - so each codec could use its local (sub)set of CPU extension
kabi
parents: 828
diff changeset
204 c->get_pixels = get_pixels_altivec;
1024
9cc1031e1864 More AltiVec MC functions patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1015
diff changeset
205 // next one disabled as it's untested.
995
edc10966b081 altivec jumbo patch by (Romain Dolbeau <dolbeaur at club-internet dot fr>)
michaelni
parents: 981
diff changeset
206 #if 0
edc10966b081 altivec jumbo patch by (Romain Dolbeau <dolbeaur at club-internet dot fr>)
michaelni
parents: 981
diff changeset
207 c->add_bytes= add_bytes_altivec;
1024
9cc1031e1864 More AltiVec MC functions patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1015
diff changeset
208 #endif /* 0 */
1009
3b7cc8e4b83f AltiVec perf (take 2), plus a couple AltiVec functions by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 995
diff changeset
209 c->put_pixels_tab[0][0] = put_pixels16_altivec;
3b7cc8e4b83f AltiVec perf (take 2), plus a couple AltiVec functions by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 995
diff changeset
210 c->avg_pixels_tab[0][0] = avg_pixels16_altivec;
1015
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
211 // next one disabled as it's untested.
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
212 #if 0
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
213 c->avg_pixels_tab[1][0] = avg_pixels8_altivec;
1024
9cc1031e1864 More AltiVec MC functions patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1015
diff changeset
214 #endif /* 0 */
1015
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
215 c->put_pixels_tab[1][3] = put_pixels8_xy2_altivec;
1024
9cc1031e1864 More AltiVec MC functions patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1015
diff changeset
216 c->put_no_rnd_pixels_tab[1][3] = put_no_rnd_pixels8_xy2_altivec;
9cc1031e1864 More AltiVec MC functions patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1015
diff changeset
217 c->put_pixels_tab[0][3] = put_pixels16_xy2_altivec;
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218 c->put_no_rnd_pixels_tab[0][3] = put_no_rnd_pixels16_xy2_altivec;
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35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
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219
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edc10966b081 altivec jumbo patch by (Romain Dolbeau <dolbeaur at club-internet dot fr>)
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220 c->gmc1 = gmc1_altivec;
1092
f59c3f66363b MpegEncContext.(i)dct_* -> DspContext.(i)dct_*
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221
f59c3f66363b MpegEncContext.(i)dct_* -> DspContext.(i)dct_*
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222 if ((avctx->idct_algo == FF_IDCT_AUTO) ||
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223 (avctx->idct_algo == FF_IDCT_ALTIVEC))
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224 {
f59c3f66363b MpegEncContext.(i)dct_* -> DspContext.(i)dct_*
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225 c->idct_put = idct_put_altivec;
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226 c->idct_add = idct_add_altivec;
f59c3f66363b MpegEncContext.(i)dct_* -> DspContext.(i)dct_*
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227 #ifndef ALTIVEC_USE_REFERENCE_C_CODE
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228 c->idct_permutation_type = FF_TRANSPOSE_IDCT_PERM;
f59c3f66363b MpegEncContext.(i)dct_* -> DspContext.(i)dct_*
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229 #else /* ALTIVEC_USE_REFERENCE_C_CODE */
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230 c->idct_permutation_type = FF_NO_IDCT_PERM;
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231 #endif /* ALTIVEC_USE_REFERENCE_C_CODE */
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232 }
1024
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233
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234 #ifdef POWERPC_TBL_PERFORMANCE_REPORT
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235 {
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236 int i;
1015
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
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237 for (i = 0 ; i < powerpc_perf_total ; i++)
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parents: 995
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238 {
1015
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
239 perfdata[i][powerpc_data_min] = 0xFFFFFFFFFFFFFFFF;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
240 perfdata[i][powerpc_data_max] = 0x0000000000000000;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
241 perfdata[i][powerpc_data_sum] = 0x0000000000000000;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
242 perfdata[i][powerpc_data_num] = 0x0000000000000000;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
243 #ifdef POWERPC_PERF_USE_PMC
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
244 perfdata_miss[i][powerpc_data_min] = 0xFFFFFFFFFFFFFFFF;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
245 perfdata_miss[i][powerpc_data_max] = 0x0000000000000000;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
246 perfdata_miss[i][powerpc_data_sum] = 0x0000000000000000;
35cf2f4a0f8c PPC perf, PPC clear_block, AltiVec put_pixels8_xy2 patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1009
diff changeset
247 perfdata_miss[i][powerpc_data_num] = 0x0000000000000000;
1024
9cc1031e1864 More AltiVec MC functions patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
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diff changeset
248 #endif /* POWERPC_PERF_USE_PMC */
1009
3b7cc8e4b83f AltiVec perf (take 2), plus a couple AltiVec functions by (Romain Dolbeau <dolbeau at irisa dot fr>)
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parents: 995
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249 }
3b7cc8e4b83f AltiVec perf (take 2), plus a couple AltiVec functions by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
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250 }
1024
9cc1031e1864 More AltiVec MC functions patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1015
diff changeset
251 #endif /* POWERPC_TBL_PERFORMANCE_REPORT */
638
0012f75c92bb altivec build tidyup patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
michaelni
parents:
diff changeset
252 } else
1024
9cc1031e1864 More AltiVec MC functions patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
michaelni
parents: 1015
diff changeset
253 #endif /* HAVE_ALTIVEC */
638
0012f75c92bb altivec build tidyup patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
michaelni
parents:
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254 {
828
ace3ccd18dd2 Altivec Patch (Mark III) by (Dieter Shirley <dieters at schemasoft dot com>)
michaelni
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255 // Non-AltiVec PPC optimisations
ace3ccd18dd2 Altivec Patch (Mark III) by (Dieter Shirley <dieters at schemasoft dot com>)
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256
ace3ccd18dd2 Altivec Patch (Mark III) by (Dieter Shirley <dieters at schemasoft dot com>)
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diff changeset
257 // ... pending ...
638
0012f75c92bb altivec build tidyup patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
michaelni
parents:
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258 }
0012f75c92bb altivec build tidyup patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
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parents:
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259 }