Mercurial > mplayer.hg
annotate vidix/mach64_vid.c @ 22885:2fb21c753674
remove useless ()
author | aurel |
---|---|
date | Sun, 01 Apr 2007 21:58:45 +0000 |
parents | 6c57087c5a2d |
children | a9e111b88c4a |
rev | line source |
---|---|
22850 | 1 /* |
2 mach64_vid - VIDIX based video driver for Mach64 and 3DRage chips | |
3 Copyrights 2002 Nick Kurshev. This file is based on sources from | |
4 GATOS (gatos.sf.net) and X11 (www.xfree86.org) | |
5 Licence: GPL | |
6 WARNING: THIS DRIVER IS IN BETTA STAGE | |
7 */ | |
8 #include <errno.h> | |
9 #include <stdio.h> | |
10 #include <stdlib.h> | |
11 #include <string.h> | |
12 #include <math.h> | |
13 #include <inttypes.h> | |
14 #include <fcntl.h> | |
15 | |
16 #include "../config.h" | |
17 #include "../libavutil/common.h" | |
18 #include "../mpbswap.h" | |
19 #include "vidix.h" | |
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switch to new internal vidix API, no more dlopen/dlsym, libvidix is now a fully static library with all drivers built-in
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changeset
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20 #include "vidixlib.h" |
22850 | 21 #include "fourcc.h" |
22 #include "../libdha/libdha.h" | |
23 #include "../libdha/pci_ids.h" | |
24 #include "../libdha/pci_names.h" | |
25 | |
26 #include "mach64.h" | |
27 | |
28 #define UNUSED(x) ((void)(x)) /**< Removes warning about unused arguments */ | |
29 | |
30 static void *mach64_mmio_base = 0; | |
31 static void *mach64_mem_base = 0; | |
32 static int32_t mach64_overlay_offset = 0; | |
33 static uint32_t mach64_ram_size = 0; | |
34 static uint32_t mach64_buffer_base[10][3]; | |
35 static int num_mach64_buffers=-1; | |
36 static int supports_planar=0; | |
37 static int supports_lcd_v_stretch=0; | |
38 | |
39 pciinfo_t pci_info; | |
40 static int probed = 0; | |
41 static int __verbose = 0; | |
42 | |
43 #define VERBOSE_LEVEL 1 | |
44 | |
45 typedef struct bes_registers_s | |
46 { | |
47 /* base address of yuv framebuffer */ | |
48 uint32_t yuv_base; | |
49 uint32_t fourcc; | |
50 /* YUV BES registers */ | |
51 uint32_t reg_load_cntl; | |
52 uint32_t scale_inc; | |
53 uint32_t y_x_start; | |
54 uint32_t y_x_end; | |
55 uint32_t vid_buf_pitch; | |
56 uint32_t height_width; | |
57 | |
58 uint32_t scale_cntl; | |
59 uint32_t exclusive_horz; | |
60 uint32_t auto_flip_cntl; | |
61 uint32_t filter_cntl; | |
62 uint32_t key_cntl; | |
63 uint32_t test; | |
64 /* Configurable stuff */ | |
65 | |
66 int brightness; | |
67 int saturation; | |
68 | |
69 int ckey_on; | |
70 uint32_t graphics_key_clr; | |
71 uint32_t graphics_key_msk; | |
72 | |
73 int deinterlace_on; | |
74 uint32_t deinterlace_pattern; | |
75 | |
76 } bes_registers_t; | |
77 | |
78 static bes_registers_t besr; | |
79 | |
80 typedef struct video_registers_s | |
81 { | |
82 const char * sname; | |
83 uint32_t name; | |
84 uint32_t value; | |
85 }video_registers_t; | |
86 | |
87 static bes_registers_t besr; | |
88 | |
89 /* Graphic keys */ | |
90 static vidix_grkey_t mach64_grkey; | |
91 | |
92 #define DECLARE_VREG(name) { #name, name, 0 } | |
93 static video_registers_t vregs[] = | |
94 { | |
95 DECLARE_VREG(OVERLAY_SCALE_INC), | |
96 DECLARE_VREG(OVERLAY_Y_X_START), | |
97 DECLARE_VREG(OVERLAY_Y_X_END), | |
98 DECLARE_VREG(OVERLAY_SCALE_CNTL), | |
99 DECLARE_VREG(OVERLAY_EXCLUSIVE_HORZ), | |
100 DECLARE_VREG(OVERLAY_EXCLUSIVE_VERT), | |
101 DECLARE_VREG(OVERLAY_TEST), | |
102 DECLARE_VREG(SCALER_BUF_PITCH), | |
103 DECLARE_VREG(SCALER_HEIGHT_WIDTH), | |
104 DECLARE_VREG(SCALER_BUF0_OFFSET), | |
105 DECLARE_VREG(SCALER_BUF0_OFFSET_U), | |
106 DECLARE_VREG(SCALER_BUF0_OFFSET_V), | |
107 DECLARE_VREG(SCALER_BUF1_OFFSET), | |
108 DECLARE_VREG(SCALER_BUF1_OFFSET_U), | |
109 DECLARE_VREG(SCALER_BUF1_OFFSET_V), | |
110 DECLARE_VREG(SCALER_H_COEFF0), | |
111 DECLARE_VREG(SCALER_H_COEFF1), | |
112 DECLARE_VREG(SCALER_H_COEFF2), | |
113 DECLARE_VREG(SCALER_H_COEFF3), | |
114 DECLARE_VREG(SCALER_H_COEFF4), | |
115 DECLARE_VREG(SCALER_COLOUR_CNTL), | |
116 DECLARE_VREG(SCALER_THRESHOLD), | |
117 DECLARE_VREG(VIDEO_FORMAT), | |
118 DECLARE_VREG(VIDEO_CONFIG), | |
119 DECLARE_VREG(VIDEO_SYNC_TEST), | |
120 DECLARE_VREG(VIDEO_SYNC_TEST_B) | |
121 }; | |
122 | |
123 /* have to restore it on exit */ | |
124 static uint32_t SAVED_OVERLAY_GRAPHICS_KEY_CLR; | |
125 | |
126 /* VIDIX exports */ | |
127 | |
128 /* MMIO space*/ | |
129 #define GETREG(TYPE,PTR,OFFZ) (*((volatile TYPE*)((PTR)+(OFFZ)))) | |
130 #define SETREG(TYPE,PTR,OFFZ,VAL) (*((volatile TYPE*)((PTR)+(OFFZ))))=VAL | |
131 | |
132 #define INREG8(addr) GETREG(uint8_t,(uint8_t *)mach64_mmio_base,((addr)^0x100)<<2) | |
133 #define OUTREG8(addr,val) SETREG(uint8_t,(uint8_t *)mach64_mmio_base,((addr)^0x100)<<2,val) | |
134 | |
135 static inline uint32_t INREG (uint32_t addr) { | |
136 uint32_t tmp = GETREG(uint32_t,(uint8_t *)mach64_mmio_base,((addr)^0x100)<<2); | |
137 return le2me_32(tmp); | |
138 } | |
139 #define OUTREG(addr,val) SETREG(uint32_t,(uint8_t *)mach64_mmio_base,((addr)^0x100)<<2,le2me_32(val)) | |
140 | |
141 #define OUTREGP(addr,val,mask) \ | |
142 do { \ | |
143 unsigned int _tmp = INREG(addr); \ | |
144 _tmp &= (mask); \ | |
145 _tmp |= (val); \ | |
146 OUTREG(addr, _tmp); \ | |
147 } while (0) | |
148 | |
149 static __inline__ int ATIGetMach64LCDReg(int _Index) | |
150 { | |
151 OUTREG8(LCD_INDEX, _Index); | |
152 return INREG(LCD_DATA); | |
153 } | |
154 | |
155 static __inline__ uint32_t INPLL(uint32_t addr) | |
156 { | |
157 uint32_t res; | |
158 uint32_t in; | |
159 | |
160 in= INREG(CLOCK_CNTL); | |
161 in &= ~((PLL_WR_EN | PLL_ADDR)); //clean some stuff | |
162 OUTREG(CLOCK_CNTL, in | (addr<<10)); | |
163 | |
164 /* read the register value */ | |
165 res = (INREG(CLOCK_CNTL)>>16)&0xFF; | |
166 return res; | |
167 } | |
168 | |
169 static __inline__ void OUTPLL(uint32_t addr,uint32_t val) | |
170 { | |
171 //FIXME buggy but its not used | |
172 /* write addr byte */ | |
173 OUTREG8(CLOCK_CNTL + 1, (addr << 2) | PLL_WR_EN); | |
174 /* write the register value */ | |
175 OUTREG(CLOCK_CNTL + 2, val); | |
176 OUTREG8(CLOCK_CNTL + 1, (addr << 2) & ~PLL_WR_EN); | |
177 } | |
178 | |
179 #define OUTPLLP(addr,val,mask) \ | |
180 do { \ | |
181 unsigned int _tmp = INPLL(addr); \ | |
182 _tmp &= (mask); \ | |
183 _tmp |= (val); \ | |
184 OUTPLL(addr, _tmp); \ | |
185 } while (0) | |
186 | |
187 static void mach64_fifo_wait(unsigned n) | |
188 { | |
189 while ((INREG(FIFO_STAT) & 0xffff) > ((uint32_t)(0x8000 >> n))); | |
190 } | |
191 | |
192 static void mach64_wait_for_idle( void ) | |
193 { | |
194 mach64_fifo_wait(16); | |
195 while ((INREG(GUI_STAT) & 1)!= 0); | |
196 } | |
197 | |
198 static void mach64_wait_vsync( void ) | |
199 { | |
200 int i; | |
201 | |
202 for(i=0; i<2000000; i++) | |
203 if( (INREG(CRTC_INT_CNTL)&CRTC_VBLANK)==0 ) break; | |
204 for(i=0; i<2000000; i++) | |
205 if( (INREG(CRTC_INT_CNTL)&CRTC_VBLANK) ) break; | |
206 | |
207 } | |
208 | |
209 static vidix_capability_t mach64_cap = | |
210 { | |
211 "BES driver for Mach64/3DRage cards", | |
212 "Nick Kurshev and Michael Niedermayer", | |
213 TYPE_OUTPUT, | |
214 { 0, 0, 0, 0 }, | |
215 2048, | |
216 2048, | |
217 4, | |
218 4, | |
219 -1, | |
220 FLAG_UPSCALER|FLAG_DOWNSCALER, | |
221 VENDOR_ATI, | |
222 -1, | |
223 { 0, 0, 0, 0 } | |
224 }; | |
225 | |
226 static uint32_t mach64_vid_get_dbpp( void ) | |
227 { | |
228 uint32_t dbpp,retval; | |
229 dbpp = (INREG(CRTC_GEN_CNTL)>>8)& 0x7; | |
230 switch(dbpp) | |
231 { | |
232 case 1: retval = 4; break; | |
233 case 2: retval = 8; break; | |
234 case 3: retval = 15; break; | |
235 case 4: retval = 16; break; | |
236 case 5: retval = 24; break; | |
237 default: retval=32; break; | |
238 } | |
239 return retval; | |
240 } | |
241 | |
242 static int mach64_is_dbl_scan( void ) | |
243 { | |
244 return INREG(CRTC_GEN_CNTL) & CRTC_DBL_SCAN_EN; | |
245 } | |
246 | |
247 static int mach64_is_interlace( void ) | |
248 { | |
249 return INREG(CRTC_GEN_CNTL) & CRTC_INTERLACE_EN; | |
250 } | |
251 | |
252 static uint32_t mach64_get_xres( void ) | |
253 { | |
254 /* FIXME: currently we extract that from CRTC!!!*/ | |
255 uint32_t xres,h_total; | |
256 h_total = INREG(CRTC_H_TOTAL_DISP); | |
257 xres = (h_total >> 16) & 0xffff; | |
258 return (xres + 1)*8; | |
259 } | |
260 | |
261 static uint32_t mach64_get_yres( void ) | |
262 { | |
263 /* FIXME: currently we extract that from CRTC!!!*/ | |
264 uint32_t yres,v_total; | |
265 v_total = INREG(CRTC_V_TOTAL_DISP); | |
266 yres = (v_total >> 16) & 0xffff; | |
267 return yres + 1; | |
268 } | |
269 | |
270 // returns the verical stretch factor in 16.16 | |
271 static int mach64_get_vert_stretch(void) | |
272 { | |
273 int lcd_index; | |
274 int vert_stretching; | |
275 int ext_vert_stretch; | |
276 int ret; | |
277 int yres= mach64_get_yres(); | |
278 | |
279 if(!supports_lcd_v_stretch){ | |
280 if(__verbose>0) printf("[mach64] vertical stretching not supported\n"); | |
281 return 1<<16; | |
282 } | |
283 | |
284 lcd_index= INREG(LCD_INDEX); | |
285 | |
286 vert_stretching= ATIGetMach64LCDReg(LCD_VERT_STRETCHING); | |
287 if(!(vert_stretching&VERT_STRETCH_EN)) ret= 1<<16; | |
288 else | |
289 { | |
290 int panel_size; | |
291 | |
292 ext_vert_stretch= ATIGetMach64LCDReg(LCD_EXT_VERT_STRETCH); | |
293 panel_size= (ext_vert_stretch&VERT_PANEL_SIZE)>>11; | |
294 panel_size++; | |
295 | |
296 ret= ((yres<<16) + (panel_size>>1))/panel_size; | |
297 } | |
298 | |
299 // lcd_gen_ctrl = ATIGetMach64LCDReg(LCD_GEN_CNTL); | |
300 | |
301 OUTREG(LCD_INDEX, lcd_index); | |
302 | |
303 if(__verbose>0) printf("[mach64] vertical stretching factor= %d\n", ret); | |
304 | |
305 return ret; | |
306 } | |
307 | |
308 static void mach64_vid_make_default(void) | |
309 { | |
310 mach64_fifo_wait(5); | |
311 OUTREG(SCALER_COLOUR_CNTL,0x00101000); | |
312 | |
313 besr.ckey_on=0; | |
314 besr.graphics_key_msk=0; | |
315 besr.graphics_key_clr=0; | |
316 | |
317 OUTREG(OVERLAY_GRAPHICS_KEY_MSK, besr.graphics_key_msk); | |
318 OUTREG(OVERLAY_GRAPHICS_KEY_CLR, besr.graphics_key_clr); | |
319 OUTREG(OVERLAY_KEY_CNTL,VIDEO_KEY_FN_TRUE|GRAPHIC_KEY_FN_EQ|CMP_MIX_AND); | |
320 | |
321 } | |
322 | |
323 static void mach64_vid_dump_regs( void ) | |
324 { | |
325 size_t i; | |
326 printf("[mach64] *** Begin of DRIVER variables dump ***\n"); | |
327 printf("[mach64] mach64_mmio_base=%p\n",mach64_mmio_base); | |
328 printf("[mach64] mach64_mem_base=%p\n",mach64_mem_base); | |
329 printf("[mach64] mach64_overlay_off=%08X\n",mach64_overlay_offset); | |
330 printf("[mach64] mach64_ram_size=%08X\n",mach64_ram_size); | |
331 printf("[mach64] video mode: %ux%u@%u\n",mach64_get_xres(),mach64_get_yres(),mach64_vid_get_dbpp()); | |
332 printf("[mach64] *** Begin of OV0 registers dump ***\n"); | |
333 for(i=0;i<sizeof(vregs)/sizeof(video_registers_t);i++) | |
334 { | |
335 mach64_wait_for_idle(); | |
336 printf("[mach64] %s = %08X\n",vregs[i].sname,INREG(vregs[i].name)); | |
337 } | |
338 printf("[mach64] *** End of OV0 registers dump ***\n"); | |
339 } | |
340 | |
341 | |
342 static unsigned short ati_card_ids[] = | |
343 { | |
344 DEVICE_ATI_215CT_MACH64_CT, | |
345 DEVICE_ATI_210888CX_MACH64_CX, | |
346 DEVICE_ATI_210888ET_MACH64_ET, | |
347 DEVICE_ATI_MACH64_VT, | |
348 DEVICE_ATI_210888GX_MACH64_GX, | |
349 DEVICE_ATI_264LT_MACH64_LT, | |
350 DEVICE_ATI_264VT_MACH64_VT, | |
351 DEVICE_ATI_264VT3_MACH64_VT3, | |
352 DEVICE_ATI_264VT4_MACH64_VT4, | |
353 /**/ | |
354 DEVICE_ATI_3D_RAGE_PRO, | |
355 DEVICE_ATI_3D_RAGE_PRO2, | |
356 DEVICE_ATI_3D_RAGE_PRO3, | |
357 DEVICE_ATI_3D_RAGE_PRO4, | |
358 DEVICE_ATI_RAGE_XC, | |
359 DEVICE_ATI_RAGE_XL_AGP, | |
360 DEVICE_ATI_RAGE_XC_AGP, | |
361 DEVICE_ATI_RAGE_XL, | |
362 DEVICE_ATI_3D_RAGE_PRO5, | |
363 DEVICE_ATI_3D_RAGE_PRO6, | |
364 DEVICE_ATI_RAGE_XL2, | |
365 DEVICE_ATI_RAGE_XC2, | |
366 DEVICE_ATI_3D_RAGE_I_II, | |
367 DEVICE_ATI_3D_RAGE_II, | |
368 DEVICE_ATI_3D_RAGE_IIC, | |
369 DEVICE_ATI_3D_RAGE_IIC2, | |
370 DEVICE_ATI_3D_RAGE_IIC3, | |
371 DEVICE_ATI_3D_RAGE_IIC4, | |
372 DEVICE_ATI_3D_RAGE_LT, | |
373 DEVICE_ATI_3D_RAGE_LT2, | |
374 DEVICE_ATI_3D_RAGE_LT_G, | |
375 DEVICE_ATI_3D_RAGE_LT3, | |
376 DEVICE_ATI_RAGE_MOBILITY_P_M, | |
377 DEVICE_ATI_RAGE_MOBILITY_L, | |
378 DEVICE_ATI_3D_RAGE_LT4, | |
379 DEVICE_ATI_3D_RAGE_LT5, | |
380 DEVICE_ATI_RAGE_MOBILITY_P_M2, | |
381 DEVICE_ATI_RAGE_MOBILITY_L2 | |
382 }; | |
383 | |
384 static int find_chip(unsigned chip_id) | |
385 { | |
386 unsigned i; | |
387 for(i = 0;i < sizeof(ati_card_ids)/sizeof(unsigned short);i++) | |
388 { | |
389 if(chip_id == ati_card_ids[i]) return i; | |
390 } | |
391 return -1; | |
392 } | |
393 | |
22857
77def5093daf
switch to new internal vidix API, no more dlopen/dlsym, libvidix is now a fully static library with all drivers built-in
ben
parents:
22850
diff
changeset
|
394 static int mach64_probe(int verbose,int force) |
22850 | 395 { |
396 pciinfo_t lst[MAX_PCI_DEVICES]; | |
397 unsigned i,num_pci; | |
398 int err; | |
399 __verbose = verbose; | |
400 err = pci_scan(lst,&num_pci); | |
401 if(err) | |
402 { | |
403 printf("[mach64] Error occurred during pci scan: %s\n",strerror(err)); | |
404 return err; | |
405 } | |
406 else | |
407 { | |
408 err = ENXIO; | |
409 for(i=0;i<num_pci;i++) | |
410 { | |
411 if(lst[i].vendor == VENDOR_ATI) | |
412 { | |
413 int idx; | |
414 const char *dname; | |
415 idx = find_chip(lst[i].device); | |
416 if(idx == -1 && force == PROBE_NORMAL) continue; | |
417 dname = pci_device_name(VENDOR_ATI,lst[i].device); | |
418 dname = dname ? dname : "Unknown chip"; | |
419 printf("[mach64] Found chip: %s\n",dname); | |
420 if ((lst[i].command & PCI_COMMAND_IO) == 0) | |
421 { | |
422 printf("[mach64] Device is disabled, ignoring\n"); | |
423 continue; | |
424 } | |
425 if(force > PROBE_NORMAL) | |
426 { | |
427 printf("[mach64] Driver was forced. Was found %sknown chip\n",idx == -1 ? "un" : ""); | |
428 if(idx == -1) | |
429 printf("[mach64] Assuming it as Mach64\n"); | |
430 } | |
431 mach64_cap.device_id = lst[i].device; | |
432 err = 0; | |
433 memcpy(&pci_info,&lst[i],sizeof(pciinfo_t)); | |
434 probed=1; | |
435 break; | |
436 } | |
437 } | |
438 } | |
439 if(err && verbose) printf("[mach64] Can't find chip\n"); | |
440 return err; | |
441 } | |
442 | |
443 static void reset_regs( void ) | |
444 { | |
445 size_t i; | |
446 for(i=0;i<sizeof(vregs)/sizeof(video_registers_t);i++) | |
447 { | |
448 mach64_fifo_wait(2); | |
449 OUTREG(vregs[i].name,0); | |
450 } | |
451 } | |
452 | |
453 | |
22857
77def5093daf
switch to new internal vidix API, no more dlopen/dlsym, libvidix is now a fully static library with all drivers built-in
ben
parents:
22850
diff
changeset
|
454 static int mach64_init(void) |
22850 | 455 { |
456 int err; | |
457 if(!probed) | |
458 { | |
459 printf("[mach64] Driver was not probed but is being initializing\n"); | |
460 return EINTR; | |
461 } | |
22857
77def5093daf
switch to new internal vidix API, no more dlopen/dlsym, libvidix is now a fully static library with all drivers built-in
ben
parents:
22850
diff
changeset
|
462 if(__verbose>0) printf("[mach64] version %d\n", VIDIX_VERSION); |
22850 | 463 |
464 if((mach64_mmio_base = map_phys_mem(pci_info.base2,0x1000))==(void *)-1) return ENOMEM; | |
465 mach64_wait_for_idle(); | |
466 mach64_ram_size = INREG(MEM_CNTL) & CTL_MEM_SIZEB; | |
467 if (mach64_ram_size < 8) mach64_ram_size = (mach64_ram_size + 1) * 512; | |
468 else if (mach64_ram_size < 12) mach64_ram_size = (mach64_ram_size - 3) * 1024; | |
469 else mach64_ram_size = (mach64_ram_size - 7) * 2048; | |
470 mach64_ram_size *= 0x400; /* KB -> bytes */ | |
471 if((mach64_mem_base = map_phys_mem(pci_info.base0,mach64_ram_size))==(void *)-1) return ENOMEM; | |
472 memset(&besr,0,sizeof(bes_registers_t)); | |
473 printf("[mach64] Video memory = %uMb\n",mach64_ram_size/0x100000); | |
474 err = mtrr_set_type(pci_info.base0,mach64_ram_size,MTRR_TYPE_WRCOMB); | |
475 if(!err) printf("[mach64] Set write-combining type of video memory\n"); | |
476 | |
477 /* save this */ | |
478 mach64_wait_for_idle(); | |
479 SAVED_OVERLAY_GRAPHICS_KEY_CLR = INREG(OVERLAY_GRAPHICS_KEY_CLR); | |
480 | |
481 /* check if planar formats are supported */ | |
482 supports_planar=0; | |
483 mach64_wait_for_idle(); | |
484 mach64_fifo_wait(2); | |
485 if(INREG(SCALER_BUF0_OFFSET_U)) supports_planar=1; | |
486 else | |
487 { | |
488 OUTREG(SCALER_BUF0_OFFSET_U, -1); | |
489 | |
490 mach64_wait_vsync(); | |
491 mach64_wait_for_idle(); | |
492 mach64_fifo_wait(2); | |
493 | |
494 if(INREG(SCALER_BUF0_OFFSET_U)) supports_planar=1; | |
495 } | |
496 if(supports_planar) printf("[mach64] Planar YUV formats are supported :)\n"); | |
497 else printf("[mach64] Planar YUV formats are not supported :(\n"); | |
498 | |
499 if( mach64_cap.device_id==DEVICE_ATI_RAGE_MOBILITY_P_M | |
500 || mach64_cap.device_id==DEVICE_ATI_RAGE_MOBILITY_P_M2 | |
501 || mach64_cap.device_id==DEVICE_ATI_RAGE_MOBILITY_L | |
502 || mach64_cap.device_id==DEVICE_ATI_RAGE_MOBILITY_L2) | |
503 supports_lcd_v_stretch=1; | |
504 else | |
505 supports_lcd_v_stretch=0; | |
506 | |
507 reset_regs(); | |
508 mach64_vid_make_default(); | |
509 | |
510 if(__verbose > VERBOSE_LEVEL) mach64_vid_dump_regs(); | |
511 return 0; | |
512 } | |
513 | |
22857
77def5093daf
switch to new internal vidix API, no more dlopen/dlsym, libvidix is now a fully static library with all drivers built-in
ben
parents:
22850
diff
changeset
|
514 static void mach64_destroy(void) |
22850 | 515 { |
516 /*restore this*/ | |
517 mach64_wait_for_idle(); | |
518 OUTREG(OVERLAY_GRAPHICS_KEY_CLR,SAVED_OVERLAY_GRAPHICS_KEY_CLR); | |
519 | |
520 unmap_phys_mem(mach64_mem_base,mach64_ram_size); | |
521 unmap_phys_mem(mach64_mmio_base,0x1000); | |
522 } | |
523 | |
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524 static int mach64_get_caps(vidix_capability_t *to) |
22850 | 525 { |
526 memcpy(to, &mach64_cap, sizeof(vidix_capability_t)); | |
527 return 0; | |
528 } | |
529 | |
530 static unsigned mach64_query_pitch(unsigned fourcc,const vidix_yuv_t *spitch) | |
531 { | |
532 unsigned pitch,spy,spv,spu; | |
533 spy = spv = spu = 0; | |
534 switch(spitch->y) | |
535 { | |
536 case 16: | |
537 case 32: | |
538 case 64: | |
539 case 128: | |
540 case 256: spy = spitch->y; break; | |
541 default: break; | |
542 } | |
543 switch(spitch->u) | |
544 { | |
545 case 16: | |
546 case 32: | |
547 case 64: | |
548 case 128: | |
549 case 256: spu = spitch->u; break; | |
550 default: break; | |
551 } | |
552 switch(spitch->v) | |
553 { | |
554 case 16: | |
555 case 32: | |
556 case 64: | |
557 case 128: | |
558 case 256: spv = spitch->v; break; | |
559 default: break; | |
560 } | |
561 switch(fourcc) | |
562 { | |
563 /* 4:2:0 */ | |
564 case IMGFMT_IYUV: | |
565 case IMGFMT_YV12: | |
566 case IMGFMT_I420: | |
567 if(spy > 16 && spu == spy/2 && spv == spy/2) pitch = spy; | |
568 else pitch = 32; | |
569 break; | |
570 case IMGFMT_YVU9: | |
571 if(spy > 32 && spu == spy/4 && spv == spy/4) pitch = spy; | |
572 else pitch = 64; | |
573 break; | |
574 default: | |
575 if(spy >= 16) pitch = spy; | |
576 else pitch = 16; | |
577 break; | |
578 } | |
579 return pitch; | |
580 } | |
581 | |
582 static void mach64_compute_framesize(vidix_playback_t *info) | |
583 { | |
584 unsigned pitch,awidth; | |
585 pitch = mach64_query_pitch(info->fourcc,&info->src.pitch); | |
586 switch(info->fourcc) | |
587 { | |
588 case IMGFMT_I420: | |
589 case IMGFMT_YV12: | |
590 case IMGFMT_IYUV: | |
591 awidth = (info->src.w + (pitch-1)) & ~(pitch-1); | |
592 info->frame_size = awidth*(info->src.h+info->src.h/2); | |
593 break; | |
594 case IMGFMT_YVU9: | |
595 awidth = (info->src.w + (pitch-1)) & ~(pitch-1); | |
596 info->frame_size = awidth*(info->src.h+info->src.h/8); | |
597 break; | |
598 // case IMGFMT_RGB32: | |
599 case IMGFMT_BGR32: | |
600 awidth = (info->src.w*4 + (pitch-1)) & ~(pitch-1); | |
601 info->frame_size = (awidth*info->src.h); | |
602 break; | |
603 /* YUY2 YVYU, RGB15, RGB16 */ | |
604 default: | |
605 awidth = (info->src.w*2 + (pitch-1)) & ~(pitch-1); | |
606 info->frame_size = (awidth*info->src.h); | |
607 break; | |
608 } | |
609 info->frame_size+=256; // so we have some space for alignment & such | |
610 info->frame_size&=~16; | |
611 } | |
612 | |
613 static void mach64_vid_stop_video( void ) | |
614 { | |
615 mach64_fifo_wait(14); | |
616 OUTREG(OVERLAY_SCALE_CNTL, 0x80000000); | |
617 OUTREG(OVERLAY_EXCLUSIVE_HORZ, 0); | |
618 OUTREG(OVERLAY_EXCLUSIVE_VERT, 0); | |
619 OUTREG(SCALER_H_COEFF0, 0x00002000); | |
620 OUTREG(SCALER_H_COEFF1, 0x0D06200D); | |
621 OUTREG(SCALER_H_COEFF2, 0x0D0A1C0D); | |
622 OUTREG(SCALER_H_COEFF3, 0x0C0E1A0C); | |
623 OUTREG(SCALER_H_COEFF4, 0x0C14140C); | |
624 OUTREG(VIDEO_FORMAT, 0xB000B); | |
625 OUTREG(OVERLAY_TEST, 0x0); | |
626 } | |
627 | |
628 static void mach64_vid_display_video( void ) | |
629 { | |
630 uint32_t vf; | |
631 mach64_fifo_wait(14); | |
632 | |
633 OUTREG(OVERLAY_Y_X_START, besr.y_x_start); | |
634 OUTREG(OVERLAY_Y_X_END, besr.y_x_end); | |
635 OUTREG(OVERLAY_SCALE_INC, besr.scale_inc); | |
636 OUTREG(SCALER_BUF_PITCH, besr.vid_buf_pitch); | |
637 OUTREG(SCALER_HEIGHT_WIDTH, besr.height_width); | |
638 OUTREG(SCALER_BUF0_OFFSET, mach64_buffer_base[0][0]); | |
639 OUTREG(SCALER_BUF0_OFFSET_U, mach64_buffer_base[0][1]); | |
640 OUTREG(SCALER_BUF0_OFFSET_V, mach64_buffer_base[0][2]); | |
641 OUTREG(SCALER_BUF1_OFFSET, mach64_buffer_base[0][0]); | |
642 OUTREG(SCALER_BUF1_OFFSET_U, mach64_buffer_base[0][1]); | |
643 OUTREG(SCALER_BUF1_OFFSET_V, mach64_buffer_base[0][2]); | |
644 mach64_wait_vsync(); | |
645 | |
646 mach64_fifo_wait(4); | |
647 OUTREG(OVERLAY_SCALE_CNTL, 0xC4000003); | |
648 // OVERLAY_SCALE_CNTL bits & what they seem to affect | |
649 // bit 0 no effect | |
650 // bit 1 yuv2rgb coeff related | |
651 // bit 2 horizontal interpolation if 0 | |
652 // bit 3 vertical interpolation if 0 | |
653 // bit 4 chroma encoding (0-> 128=neutral / 1-> 0->neutral) | |
654 // bit 5-6 gamma correction | |
655 // bit 7 nothing visible if set | |
656 // bit 8-27 no effect | |
657 // bit 28-31 nothing interresting just crashed my system when i played with them :( | |
658 | |
659 mach64_wait_for_idle(); | |
660 vf = INREG(VIDEO_FORMAT); | |
661 | |
662 // Bits 16-19 seem to select the format | |
663 // 0x0 dunno behaves strange | |
664 // 0x1 dunno behaves strange | |
665 // 0x2 dunno behaves strange | |
666 // 0x3 BGR15 | |
667 // 0x4 BGR16 | |
668 // 0x5 BGR16 (hmm, that need investigation, 2 BGR16 formats, i guess 1 will have only 5bits for green) | |
669 // 0x6 BGR32 | |
670 // 0x7 BGR32 with somehow mixed even / odd pixels ? | |
671 // 0x8 YYYYUVUV | |
672 // 0x9 YVU9 | |
673 // 0xA YV12 | |
674 // 0xB YUY2 | |
675 // 0xC UYVY | |
676 // 0xD UYVY (no difference is visible if i switch between C/D for every even/odd frame) | |
677 // 0xE dunno behaves strange | |
678 // 0xF dunno behaves strange | |
679 // Bit 28 all values are assumed to be 7 bit with chroma=64 for black (tested with YV12 & YUY2) | |
680 // the remaining bits seem to have no effect | |
681 | |
682 | |
683 switch(besr.fourcc) | |
684 { | |
685 /* BGR formats */ | |
686 case IMGFMT_BGR15: OUTREG(VIDEO_FORMAT, 0x00030000); break; | |
687 case IMGFMT_BGR16: OUTREG(VIDEO_FORMAT, 0x00040000); break; | |
688 case IMGFMT_BGR32: OUTREG(VIDEO_FORMAT, 0x00060000); break; | |
689 /* 4:2:0 */ | |
690 case IMGFMT_IYUV: | |
691 case IMGFMT_I420: | |
692 case IMGFMT_YV12: OUTREG(VIDEO_FORMAT, 0x000A0000); break; | |
693 | |
694 case IMGFMT_YVU9: OUTREG(VIDEO_FORMAT, 0x00090000); break; | |
695 /* 4:2:2 */ | |
696 case IMGFMT_YVYU: | |
697 case IMGFMT_UYVY: OUTREG(VIDEO_FORMAT, 0x000C0000); break; | |
698 case IMGFMT_YUY2: | |
699 default: OUTREG(VIDEO_FORMAT, 0x000B0000); break; | |
700 } | |
701 if(__verbose > VERBOSE_LEVEL) mach64_vid_dump_regs(); | |
702 } | |
703 | |
704 static int mach64_vid_init_video( vidix_playback_t *config ) | |
705 { | |
706 uint32_t src_w,src_h,dest_w,dest_h,pitch,h_inc,v_inc,left,leftUV,top,ecp,y_pos; | |
707 int is_420,best_pitch,mpitch; | |
708 int src_offset_y, src_offset_u, src_offset_v; | |
709 unsigned int i; | |
710 | |
711 mach64_vid_stop_video(); | |
712 /* warning, if left or top are != 0 this will fail, as the framesize is too small then */ | |
713 left = config->src.x; | |
714 top = config->src.y; | |
715 src_h = config->src.h; | |
716 src_w = config->src.w; | |
717 is_420 = 0; | |
718 if(config->fourcc == IMGFMT_YV12 || | |
719 config->fourcc == IMGFMT_I420 || | |
720 config->fourcc == IMGFMT_IYUV) is_420 = 1; | |
721 best_pitch = mach64_query_pitch(config->fourcc,&config->src.pitch); | |
722 mpitch = best_pitch-1; | |
723 switch(config->fourcc) | |
724 { | |
725 case IMGFMT_YVU9: | |
726 /* 4:2:0 */ | |
727 case IMGFMT_IYUV: | |
728 case IMGFMT_YV12: | |
729 case IMGFMT_I420: pitch = (src_w + mpitch) & ~mpitch; | |
730 config->dest.pitch.y = | |
731 config->dest.pitch.u = | |
732 config->dest.pitch.v = best_pitch; | |
733 besr.vid_buf_pitch= pitch; | |
734 break; | |
735 /* RGB 4:4:4:4 */ | |
736 case IMGFMT_RGB32: | |
737 case IMGFMT_BGR32: pitch = (src_w*4 + mpitch) & ~mpitch; | |
738 config->dest.pitch.y = | |
739 config->dest.pitch.u = | |
740 config->dest.pitch.v = best_pitch; | |
741 besr.vid_buf_pitch= pitch>>2; | |
742 break; | |
743 /* 4:2:2 */ | |
744 default: /* RGB15, RGB16, YVYU, UYVY, YUY2 */ | |
745 pitch = ((src_w*2) + mpitch) & ~mpitch; | |
746 config->dest.pitch.y = | |
747 config->dest.pitch.u = | |
748 config->dest.pitch.v = best_pitch; | |
749 besr.vid_buf_pitch= pitch>>1; | |
750 break; | |
751 } | |
752 dest_w = config->dest.w; | |
753 dest_h = config->dest.h; | |
754 besr.fourcc = config->fourcc; | |
755 ecp = (INPLL(PLL_VCLK_CNTL) & PLL_ECP_DIV) >> 4; | |
756 #if 0 | |
757 { | |
758 int i; | |
759 for(i=0; i<32; i++){ | |
760 printf("%X ", INPLL(i)); | |
761 } | |
762 } | |
763 #endif | |
764 if(__verbose>0) printf("[mach64] ecp: %d\n", ecp); | |
765 v_inc = src_h * mach64_get_vert_stretch(); | |
766 | |
767 if(mach64_is_interlace()) v_inc<<=1; | |
768 if(mach64_is_dbl_scan() ) v_inc>>=1; | |
769 v_inc>>=4; // convert 16.16 -> 20.12 | |
770 v_inc/= dest_h; | |
771 | |
772 h_inc = (src_w << (12+ecp)) / dest_w; | |
773 /* keep everything in 16.16 */ | |
774 config->offsets[0] = 0; | |
775 for(i=1; i<config->num_frames; i++) | |
776 config->offsets[i] = config->offsets[i-1] + config->frame_size; | |
777 | |
778 /*FIXME the left / top stuff is broken (= zoom a src rectangle from a larger one) | |
779 1. the framesize isn't known as the outer src rectangle dimensions aren't known | |
780 2. the mach64 needs aligned addresses so it can't work anyway | |
781 -> so we could shift the outer buffer to compensate that but that would mean | |
782 alignment problems for the code which writes into it | |
783 */ | |
784 | |
785 if(is_420) | |
786 { | |
787 config->offset.y= 0; | |
788 config->offset.u= (pitch*src_h + 15)&~15; | |
789 config->offset.v= (config->offset.u + (pitch*src_h>>2) + 15)&~15; | |
790 | |
791 if(besr.fourcc == IMGFMT_I420 || besr.fourcc == IMGFMT_IYUV) | |
792 { | |
793 uint32_t tmp; | |
794 tmp = config->offset.u; | |
795 config->offset.u = config->offset.v; | |
796 config->offset.v = tmp; | |
797 } | |
798 | |
799 src_offset_y= config->offset.y + top*pitch + left; | |
800 src_offset_u= config->offset.u + (top*pitch>>2) + (left>>1); | |
801 src_offset_v= config->offset.v + (top*pitch>>2) + (left>>1); | |
802 } | |
803 else if(besr.fourcc == IMGFMT_YVU9) | |
804 { | |
805 config->offset.y= 0; | |
806 config->offset.u= (pitch*src_h + 15)&~15; | |
807 config->offset.v= (config->offset.u + (pitch*src_h>>4) + 15)&~15; | |
808 | |
809 src_offset_y= config->offset.y + top*pitch + left; | |
810 src_offset_u= config->offset.u + (top*pitch>>4) + (left>>1); | |
811 src_offset_v= config->offset.v + (top*pitch>>4) + (left>>1); | |
812 } | |
813 else if(besr.fourcc == IMGFMT_BGR32) | |
814 { | |
815 config->offset.y = config->offset.u = config->offset.v = 0; | |
816 src_offset_y= src_offset_u= src_offset_v= top*pitch + (left << 2); | |
817 } | |
818 else | |
819 { | |
820 config->offset.y = config->offset.u = config->offset.v = 0; | |
821 src_offset_y= src_offset_u= src_offset_v= top*pitch + (left << 1); | |
822 } | |
823 | |
824 num_mach64_buffers= config->num_frames; | |
825 for(i=0; i<config->num_frames; i++) | |
826 { | |
827 mach64_buffer_base[i][0]= (mach64_overlay_offset + config->offsets[i] + src_offset_y)&~15; | |
828 mach64_buffer_base[i][1]= (mach64_overlay_offset + config->offsets[i] + src_offset_u)&~15; | |
829 mach64_buffer_base[i][2]= (mach64_overlay_offset + config->offsets[i] + src_offset_v)&~15; | |
830 } | |
831 | |
832 leftUV = (left >> 17) & 15; | |
833 left = (left >> 16) & 15; | |
834 besr.scale_inc = ( h_inc << 16 ) | v_inc; | |
835 y_pos = config->dest.y; | |
836 if(mach64_is_dbl_scan()) y_pos*=2; | |
837 else | |
838 if(mach64_is_interlace()) y_pos/=2; | |
839 besr.y_x_start = y_pos | (config->dest.x << 16); | |
840 y_pos =config->dest.y + dest_h; | |
841 if(mach64_is_dbl_scan()) y_pos*=2; | |
842 else | |
843 if(mach64_is_interlace()) y_pos/=2; | |
844 besr.y_x_end = y_pos | ((config->dest.x + dest_w) << 16); | |
845 besr.height_width = ((src_w - left)<<16) | (src_h - top); | |
846 | |
847 return 0; | |
848 } | |
849 | |
850 static int is_supported_fourcc(uint32_t fourcc) | |
851 { | |
852 switch(fourcc) | |
853 { | |
854 case IMGFMT_YV12: | |
855 case IMGFMT_I420: | |
856 case IMGFMT_YVU9: | |
857 case IMGFMT_IYUV: | |
858 return supports_planar; | |
859 case IMGFMT_YUY2: | |
860 case IMGFMT_UYVY: | |
861 case IMGFMT_BGR15: | |
862 case IMGFMT_BGR16: | |
863 case IMGFMT_BGR32: | |
864 return 1; | |
865 default: | |
866 return 0; | |
867 } | |
868 } | |
869 | |
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870 static int mach64_query_fourcc(vidix_fourcc_t *to) |
22850 | 871 { |
872 if(is_supported_fourcc(to->fourcc)) | |
873 { | |
874 to->depth = VID_DEPTH_1BPP | VID_DEPTH_2BPP | | |
875 VID_DEPTH_4BPP | VID_DEPTH_8BPP | | |
876 VID_DEPTH_12BPP| VID_DEPTH_15BPP| | |
877 VID_DEPTH_16BPP| VID_DEPTH_24BPP| | |
878 VID_DEPTH_32BPP; | |
879 to->flags = VID_CAP_EXPAND | VID_CAP_SHRINK | VID_CAP_COLORKEY; | |
880 return 0; | |
881 } | |
882 else to->depth = to->flags = 0; | |
883 return ENOSYS; | |
884 } | |
885 | |
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886 static int mach64_config_playback(vidix_playback_t *info) |
22850 | 887 { |
888 if(!is_supported_fourcc(info->fourcc)) return ENOSYS; | |
889 | |
890 mach64_compute_framesize(info); | |
891 | |
892 if(info->num_frames>4) info->num_frames=4; | |
893 for(;info->num_frames>0; info->num_frames--) | |
894 { | |
895 mach64_overlay_offset = mach64_ram_size - info->frame_size*info->num_frames; | |
896 mach64_overlay_offset &= 0xffff0000; | |
897 if(mach64_overlay_offset>0) break; | |
898 } | |
899 if(info->num_frames <= 0) return EINVAL; | |
900 | |
901 info->dga_addr = (char *)mach64_mem_base + mach64_overlay_offset; | |
902 mach64_vid_init_video(info); | |
903 return 0; | |
904 } | |
905 | |
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906 static int mach64_playback_on(void) |
22850 | 907 { |
908 mach64_vid_display_video(); | |
909 return 0; | |
910 } | |
911 | |
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912 static int mach64_playback_off(void) |
22850 | 913 { |
914 mach64_vid_stop_video(); | |
915 return 0; | |
916 } | |
917 | |
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918 static int mach64_frame_sel(unsigned int frame) |
22850 | 919 { |
920 uint32_t off[6]; | |
921 int i; | |
922 int last_frame= (frame-1+num_mach64_buffers) % num_mach64_buffers; | |
923 //printf("Selecting frame %d\n", frame); | |
924 /* | |
925 buf3-5 always should point onto second buffer for better | |
926 deinterlacing and TV-in | |
927 */ | |
928 if(num_mach64_buffers==1) return 0; | |
929 | |
930 for(i=0; i<3; i++) | |
931 { | |
932 off[i] = mach64_buffer_base[frame][i]; | |
933 off[i+3]= mach64_buffer_base[last_frame][i]; | |
934 } | |
935 | |
936 #if 0 // delay routine so the individual frames can be ssen better | |
937 { | |
938 volatile int i=0; | |
939 for(i=0; i<10000000; i++); | |
940 } | |
941 #endif | |
942 | |
943 mach64_wait_for_idle(); | |
944 mach64_fifo_wait(7); | |
945 | |
946 OUTREG(SCALER_BUF0_OFFSET, off[0]); | |
947 OUTREG(SCALER_BUF0_OFFSET_U, off[1]); | |
948 OUTREG(SCALER_BUF0_OFFSET_V, off[2]); | |
949 OUTREG(SCALER_BUF1_OFFSET, off[3]); | |
950 OUTREG(SCALER_BUF1_OFFSET_U, off[4]); | |
951 OUTREG(SCALER_BUF1_OFFSET_V, off[5]); | |
952 if(num_mach64_buffers==2) mach64_wait_vsync(); //only wait for vsync if we do double buffering | |
953 | |
954 if(__verbose > VERBOSE_LEVEL) mach64_vid_dump_regs(); | |
955 return 0; | |
956 } | |
957 | |
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958 static vidix_video_eq_t equal = |
22850 | 959 { |
960 VEQ_CAP_BRIGHTNESS | VEQ_CAP_SATURATION | |
961 , | |
962 0, 0, 0, 0, 0, 0, 0, 0 }; | |
963 | |
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964 static int mach64_get_eq( vidix_video_eq_t * eq) |
22850 | 965 { |
966 memcpy(eq,&equal,sizeof(vidix_video_eq_t)); | |
967 return 0; | |
968 } | |
969 | |
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970 static int mach64_set_eq( const vidix_video_eq_t * eq) |
22850 | 971 { |
972 int br,sat; | |
973 if(eq->cap & VEQ_CAP_BRIGHTNESS) equal.brightness = eq->brightness; | |
974 if(eq->cap & VEQ_CAP_CONTRAST) equal.contrast = eq->contrast; | |
975 if(eq->cap & VEQ_CAP_SATURATION) equal.saturation = eq->saturation; | |
976 if(eq->cap & VEQ_CAP_HUE) equal.hue = eq->hue; | |
977 if(eq->cap & VEQ_CAP_RGB_INTENSITY) | |
978 { | |
979 equal.red_intensity = eq->red_intensity; | |
980 equal.green_intensity = eq->green_intensity; | |
981 equal.blue_intensity = eq->blue_intensity; | |
982 } | |
983 equal.flags = eq->flags; | |
984 br = equal.brightness * 64 / 1000; | |
985 if(br < -64) br = -64; if(br > 63) br = 63; | |
986 sat = (equal.saturation + 1000) * 16 / 1000; | |
987 if(sat < 0) sat = 0; if(sat > 31) sat = 31; | |
988 OUTREG(SCALER_COLOUR_CNTL, (br & 0x7f) | (sat << 8) | (sat << 16)); | |
989 return 0; | |
990 } | |
991 | |
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992 static int mach64_get_gkeys(vidix_grkey_t *grkey) |
22850 | 993 { |
994 memcpy(grkey, &mach64_grkey, sizeof(vidix_grkey_t)); | |
995 return(0); | |
996 } | |
997 | |
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998 static int mach64_set_gkeys(const vidix_grkey_t *grkey) |
22850 | 999 { |
1000 memcpy(&mach64_grkey, grkey, sizeof(vidix_grkey_t)); | |
1001 | |
1002 if(mach64_grkey.ckey.op == CKEY_TRUE) | |
1003 { | |
1004 besr.ckey_on=1; | |
1005 | |
1006 switch(mach64_vid_get_dbpp()) | |
1007 { | |
1008 case 15: | |
1009 besr.graphics_key_msk=0x7FFF; | |
1010 besr.graphics_key_clr= | |
1011 ((mach64_grkey.ckey.blue &0xF8)>>3) | |
1012 | ((mach64_grkey.ckey.green&0xF8)<<2) | |
1013 | ((mach64_grkey.ckey.red &0xF8)<<7); | |
1014 break; | |
1015 case 16: | |
1016 besr.graphics_key_msk=0xFFFF; | |
1017 besr.graphics_key_clr= | |
1018 ((mach64_grkey.ckey.blue &0xF8)>>3) | |
1019 | ((mach64_grkey.ckey.green&0xFC)<<3) | |
1020 | ((mach64_grkey.ckey.red &0xF8)<<8); | |
1021 //besr.graphics_key_clr=le2me_32(besr.graphics_key_clr); | |
1022 break; | |
1023 case 24: | |
1024 besr.graphics_key_msk=0xFFFFFF; | |
1025 besr.graphics_key_clr= | |
1026 ((mach64_grkey.ckey.blue &0xFF)) | |
1027 | ((mach64_grkey.ckey.green&0xFF)<<8) | |
1028 | ((mach64_grkey.ckey.red &0xFF)<<16); | |
1029 break; | |
1030 case 32: | |
1031 besr.graphics_key_msk=0xFFFFFF; | |
1032 besr.graphics_key_clr= | |
1033 ((mach64_grkey.ckey.blue &0xFF)) | |
1034 | ((mach64_grkey.ckey.green&0xFF)<<8) | |
1035 | ((mach64_grkey.ckey.red &0xFF)<<16); | |
1036 break; | |
1037 default: | |
1038 besr.ckey_on=0; | |
1039 besr.graphics_key_msk=0; | |
1040 besr.graphics_key_clr=0; | |
1041 } | |
1042 } | |
1043 else | |
1044 { | |
1045 besr.ckey_on=0; | |
1046 besr.graphics_key_msk=0; | |
1047 besr.graphics_key_clr=0; | |
1048 } | |
1049 | |
1050 mach64_fifo_wait(4); | |
1051 OUTREG(OVERLAY_GRAPHICS_KEY_MSK, besr.graphics_key_msk); | |
1052 OUTREG(OVERLAY_GRAPHICS_KEY_CLR, besr.graphics_key_clr); | |
1053 // OUTREG(OVERLAY_VIDEO_KEY_MSK, 0); | |
1054 // OUTREG(OVERLAY_VIDEO_KEY_CLR, 0); | |
1055 if(besr.ckey_on) | |
1056 OUTREG(OVERLAY_KEY_CNTL,VIDEO_KEY_FN_TRUE|GRAPHIC_KEY_FN_EQ|CMP_MIX_AND); | |
1057 else | |
1058 OUTREG(OVERLAY_KEY_CNTL,VIDEO_KEY_FN_TRUE|GRAPHIC_KEY_FN_TRUE|CMP_MIX_AND); | |
1059 | |
1060 return(0); | |
1061 } | |
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1062 |
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1063 VDXDriver mach64_drv = { |
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1064 "mach64", |
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1065 NULL, |
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1066 .probe = mach64_probe, |
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1067 .get_caps = mach64_get_caps, |
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1068 .query_fourcc = mach64_query_fourcc, |
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1069 .init = mach64_init, |
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1070 .destroy = mach64_destroy, |
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1071 .config_playback = mach64_config_playback, |
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1072 .playback_on = mach64_playback_on, |
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1073 .playback_off = mach64_playback_off, |
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1074 .frame_sel = mach64_frame_sel, |
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1075 .get_eq = mach64_get_eq, |
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1076 .set_eq = mach64_set_eq, |
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1077 .get_gkey = mach64_get_gkeys, |
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1078 .set_gkey = mach64_set_gkeys, |
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1079 }; |