Mercurial > mplayer.hg
annotate vidix/mach64_vid.c @ 23444:4a9e6efb8200
Remove some useless code
author | reimar |
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date | Mon, 04 Jun 2007 13:05:26 +0000 |
parents | 2ab3eac7f6da |
children | b451fd2b2520 |
rev | line source |
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22850 | 1 /* |
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2 * VIDIX driver for ATI Mach64 and 3DRage chipsets. |
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3 * Copyright (C) 2002 Nick Kurshev |
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4 * |
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5 * This file is part of MPlayer. |
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6 * |
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7 * MPlayer is free software; you can redistribute it and/or modify |
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8 * it under the terms of the GNU General Public License as published by |
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9 * the Free Software Foundation; either version 2 of the License, or |
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10 * (at your option) any later version. |
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11 * |
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12 * MPlayer is distributed in the hope that it will be useful, |
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13 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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15 * GNU General Public License for more details. |
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16 * |
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17 * You should have received a copy of the GNU General Public License |
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18 * along with MPlayer; if not, write to the Free Software |
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19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
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20 * |
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21 * This file is based on sources from |
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22 * GATOS (gatos.sf.net) and X11 (www.xfree86.org) |
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23 */ |
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24 |
22850 | 25 #include <errno.h> |
26 #include <stdio.h> | |
27 #include <stdlib.h> | |
28 #include <string.h> | |
29 #include <math.h> | |
30 #include <inttypes.h> | |
31 #include <fcntl.h> | |
32 | |
22905 | 33 #include "config.h" |
34 #include "libavutil/common.h" | |
35 #include "mpbswap.h" | |
22850 | 36 #include "vidix.h" |
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37 #include "vidixlib.h" |
22850 | 38 #include "fourcc.h" |
22901 | 39 #include "dha.h" |
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40 #include "pci_ids.h" |
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41 #include "pci_names.h" |
22850 | 42 |
43 #include "mach64.h" | |
44 | |
45 #define UNUSED(x) ((void)(x)) /**< Removes warning about unused arguments */ | |
46 | |
47 static void *mach64_mmio_base = 0; | |
48 static void *mach64_mem_base = 0; | |
49 static int32_t mach64_overlay_offset = 0; | |
50 static uint32_t mach64_ram_size = 0; | |
51 static uint32_t mach64_buffer_base[10][3]; | |
52 static int num_mach64_buffers=-1; | |
53 static int supports_planar=0; | |
54 static int supports_lcd_v_stretch=0; | |
55 | |
23053 | 56 static pciinfo_t pci_info; |
22850 | 57 static int probed = 0; |
58 static int __verbose = 0; | |
59 | |
60 #define VERBOSE_LEVEL 1 | |
61 | |
62 typedef struct bes_registers_s | |
63 { | |
64 /* base address of yuv framebuffer */ | |
65 uint32_t yuv_base; | |
66 uint32_t fourcc; | |
67 /* YUV BES registers */ | |
68 uint32_t reg_load_cntl; | |
69 uint32_t scale_inc; | |
70 uint32_t y_x_start; | |
71 uint32_t y_x_end; | |
72 uint32_t vid_buf_pitch; | |
73 uint32_t height_width; | |
74 | |
75 uint32_t scale_cntl; | |
76 uint32_t exclusive_horz; | |
77 uint32_t auto_flip_cntl; | |
78 uint32_t filter_cntl; | |
79 uint32_t key_cntl; | |
80 uint32_t test; | |
81 /* Configurable stuff */ | |
82 | |
83 int brightness; | |
84 int saturation; | |
85 | |
86 int ckey_on; | |
87 uint32_t graphics_key_clr; | |
88 uint32_t graphics_key_msk; | |
89 | |
90 int deinterlace_on; | |
91 uint32_t deinterlace_pattern; | |
92 | |
93 } bes_registers_t; | |
94 | |
95 static bes_registers_t besr; | |
96 | |
97 typedef struct video_registers_s | |
98 { | |
99 const char * sname; | |
100 uint32_t name; | |
101 uint32_t value; | |
102 }video_registers_t; | |
103 | |
104 static bes_registers_t besr; | |
105 | |
106 /* Graphic keys */ | |
107 static vidix_grkey_t mach64_grkey; | |
108 | |
109 #define DECLARE_VREG(name) { #name, name, 0 } | |
110 static video_registers_t vregs[] = | |
111 { | |
112 DECLARE_VREG(OVERLAY_SCALE_INC), | |
113 DECLARE_VREG(OVERLAY_Y_X_START), | |
114 DECLARE_VREG(OVERLAY_Y_X_END), | |
115 DECLARE_VREG(OVERLAY_SCALE_CNTL), | |
116 DECLARE_VREG(OVERLAY_EXCLUSIVE_HORZ), | |
117 DECLARE_VREG(OVERLAY_EXCLUSIVE_VERT), | |
118 DECLARE_VREG(OVERLAY_TEST), | |
119 DECLARE_VREG(SCALER_BUF_PITCH), | |
120 DECLARE_VREG(SCALER_HEIGHT_WIDTH), | |
121 DECLARE_VREG(SCALER_BUF0_OFFSET), | |
122 DECLARE_VREG(SCALER_BUF0_OFFSET_U), | |
123 DECLARE_VREG(SCALER_BUF0_OFFSET_V), | |
124 DECLARE_VREG(SCALER_BUF1_OFFSET), | |
125 DECLARE_VREG(SCALER_BUF1_OFFSET_U), | |
126 DECLARE_VREG(SCALER_BUF1_OFFSET_V), | |
127 DECLARE_VREG(SCALER_H_COEFF0), | |
128 DECLARE_VREG(SCALER_H_COEFF1), | |
129 DECLARE_VREG(SCALER_H_COEFF2), | |
130 DECLARE_VREG(SCALER_H_COEFF3), | |
131 DECLARE_VREG(SCALER_H_COEFF4), | |
132 DECLARE_VREG(SCALER_COLOUR_CNTL), | |
133 DECLARE_VREG(SCALER_THRESHOLD), | |
134 DECLARE_VREG(VIDEO_FORMAT), | |
135 DECLARE_VREG(VIDEO_CONFIG), | |
136 DECLARE_VREG(VIDEO_SYNC_TEST), | |
137 DECLARE_VREG(VIDEO_SYNC_TEST_B) | |
138 }; | |
139 | |
140 /* have to restore it on exit */ | |
141 static uint32_t SAVED_OVERLAY_GRAPHICS_KEY_CLR; | |
142 | |
143 /* VIDIX exports */ | |
144 | |
145 /* MMIO space*/ | |
146 #define GETREG(TYPE,PTR,OFFZ) (*((volatile TYPE*)((PTR)+(OFFZ)))) | |
147 #define SETREG(TYPE,PTR,OFFZ,VAL) (*((volatile TYPE*)((PTR)+(OFFZ))))=VAL | |
148 | |
149 #define INREG8(addr) GETREG(uint8_t,(uint8_t *)mach64_mmio_base,((addr)^0x100)<<2) | |
150 #define OUTREG8(addr,val) SETREG(uint8_t,(uint8_t *)mach64_mmio_base,((addr)^0x100)<<2,val) | |
151 | |
152 static inline uint32_t INREG (uint32_t addr) { | |
153 uint32_t tmp = GETREG(uint32_t,(uint8_t *)mach64_mmio_base,((addr)^0x100)<<2); | |
154 return le2me_32(tmp); | |
155 } | |
156 #define OUTREG(addr,val) SETREG(uint32_t,(uint8_t *)mach64_mmio_base,((addr)^0x100)<<2,le2me_32(val)) | |
157 | |
158 #define OUTREGP(addr,val,mask) \ | |
159 do { \ | |
160 unsigned int _tmp = INREG(addr); \ | |
161 _tmp &= (mask); \ | |
162 _tmp |= (val); \ | |
163 OUTREG(addr, _tmp); \ | |
164 } while (0) | |
165 | |
166 static __inline__ int ATIGetMach64LCDReg(int _Index) | |
167 { | |
168 OUTREG8(LCD_INDEX, _Index); | |
169 return INREG(LCD_DATA); | |
170 } | |
171 | |
172 static __inline__ uint32_t INPLL(uint32_t addr) | |
173 { | |
174 uint32_t res; | |
175 uint32_t in; | |
176 | |
177 in= INREG(CLOCK_CNTL); | |
178 in &= ~((PLL_WR_EN | PLL_ADDR)); //clean some stuff | |
179 OUTREG(CLOCK_CNTL, in | (addr<<10)); | |
180 | |
181 /* read the register value */ | |
182 res = (INREG(CLOCK_CNTL)>>16)&0xFF; | |
183 return res; | |
184 } | |
185 | |
186 static __inline__ void OUTPLL(uint32_t addr,uint32_t val) | |
187 { | |
188 //FIXME buggy but its not used | |
189 /* write addr byte */ | |
190 OUTREG8(CLOCK_CNTL + 1, (addr << 2) | PLL_WR_EN); | |
191 /* write the register value */ | |
192 OUTREG(CLOCK_CNTL + 2, val); | |
193 OUTREG8(CLOCK_CNTL + 1, (addr << 2) & ~PLL_WR_EN); | |
194 } | |
195 | |
196 #define OUTPLLP(addr,val,mask) \ | |
197 do { \ | |
198 unsigned int _tmp = INPLL(addr); \ | |
199 _tmp &= (mask); \ | |
200 _tmp |= (val); \ | |
201 OUTPLL(addr, _tmp); \ | |
202 } while (0) | |
203 | |
204 static void mach64_fifo_wait(unsigned n) | |
205 { | |
206 while ((INREG(FIFO_STAT) & 0xffff) > ((uint32_t)(0x8000 >> n))); | |
207 } | |
208 | |
209 static void mach64_wait_for_idle( void ) | |
210 { | |
211 mach64_fifo_wait(16); | |
212 while ((INREG(GUI_STAT) & 1)!= 0); | |
213 } | |
214 | |
215 static void mach64_wait_vsync( void ) | |
216 { | |
217 int i; | |
218 | |
219 for(i=0; i<2000000; i++) | |
220 if( (INREG(CRTC_INT_CNTL)&CRTC_VBLANK)==0 ) break; | |
221 for(i=0; i<2000000; i++) | |
222 if( (INREG(CRTC_INT_CNTL)&CRTC_VBLANK) ) break; | |
223 | |
224 } | |
225 | |
226 static vidix_capability_t mach64_cap = | |
227 { | |
228 "BES driver for Mach64/3DRage cards", | |
229 "Nick Kurshev and Michael Niedermayer", | |
230 TYPE_OUTPUT, | |
231 { 0, 0, 0, 0 }, | |
232 2048, | |
233 2048, | |
234 4, | |
235 4, | |
236 -1, | |
237 FLAG_UPSCALER|FLAG_DOWNSCALER, | |
238 VENDOR_ATI, | |
239 -1, | |
240 { 0, 0, 0, 0 } | |
241 }; | |
242 | |
243 static uint32_t mach64_vid_get_dbpp( void ) | |
244 { | |
245 uint32_t dbpp,retval; | |
246 dbpp = (INREG(CRTC_GEN_CNTL)>>8)& 0x7; | |
247 switch(dbpp) | |
248 { | |
249 case 1: retval = 4; break; | |
250 case 2: retval = 8; break; | |
251 case 3: retval = 15; break; | |
252 case 4: retval = 16; break; | |
253 case 5: retval = 24; break; | |
254 default: retval=32; break; | |
255 } | |
256 return retval; | |
257 } | |
258 | |
259 static int mach64_is_dbl_scan( void ) | |
260 { | |
261 return INREG(CRTC_GEN_CNTL) & CRTC_DBL_SCAN_EN; | |
262 } | |
263 | |
264 static int mach64_is_interlace( void ) | |
265 { | |
266 return INREG(CRTC_GEN_CNTL) & CRTC_INTERLACE_EN; | |
267 } | |
268 | |
269 static uint32_t mach64_get_xres( void ) | |
270 { | |
271 /* FIXME: currently we extract that from CRTC!!!*/ | |
272 uint32_t xres,h_total; | |
273 h_total = INREG(CRTC_H_TOTAL_DISP); | |
274 xres = (h_total >> 16) & 0xffff; | |
275 return (xres + 1)*8; | |
276 } | |
277 | |
278 static uint32_t mach64_get_yres( void ) | |
279 { | |
280 /* FIXME: currently we extract that from CRTC!!!*/ | |
281 uint32_t yres,v_total; | |
282 v_total = INREG(CRTC_V_TOTAL_DISP); | |
283 yres = (v_total >> 16) & 0xffff; | |
284 return yres + 1; | |
285 } | |
286 | |
287 // returns the verical stretch factor in 16.16 | |
288 static int mach64_get_vert_stretch(void) | |
289 { | |
290 int lcd_index; | |
291 int vert_stretching; | |
292 int ext_vert_stretch; | |
293 int ret; | |
294 int yres= mach64_get_yres(); | |
295 | |
296 if(!supports_lcd_v_stretch){ | |
297 if(__verbose>0) printf("[mach64] vertical stretching not supported\n"); | |
298 return 1<<16; | |
299 } | |
300 | |
301 lcd_index= INREG(LCD_INDEX); | |
302 | |
303 vert_stretching= ATIGetMach64LCDReg(LCD_VERT_STRETCHING); | |
304 if(!(vert_stretching&VERT_STRETCH_EN)) ret= 1<<16; | |
305 else | |
306 { | |
307 int panel_size; | |
308 | |
309 ext_vert_stretch= ATIGetMach64LCDReg(LCD_EXT_VERT_STRETCH); | |
310 panel_size= (ext_vert_stretch&VERT_PANEL_SIZE)>>11; | |
311 panel_size++; | |
312 | |
313 ret= ((yres<<16) + (panel_size>>1))/panel_size; | |
314 } | |
315 | |
316 // lcd_gen_ctrl = ATIGetMach64LCDReg(LCD_GEN_CNTL); | |
317 | |
318 OUTREG(LCD_INDEX, lcd_index); | |
319 | |
320 if(__verbose>0) printf("[mach64] vertical stretching factor= %d\n", ret); | |
321 | |
322 return ret; | |
323 } | |
324 | |
325 static void mach64_vid_make_default(void) | |
326 { | |
327 mach64_fifo_wait(5); | |
328 OUTREG(SCALER_COLOUR_CNTL,0x00101000); | |
329 | |
330 besr.ckey_on=0; | |
331 besr.graphics_key_msk=0; | |
332 besr.graphics_key_clr=0; | |
333 | |
334 OUTREG(OVERLAY_GRAPHICS_KEY_MSK, besr.graphics_key_msk); | |
335 OUTREG(OVERLAY_GRAPHICS_KEY_CLR, besr.graphics_key_clr); | |
336 OUTREG(OVERLAY_KEY_CNTL,VIDEO_KEY_FN_TRUE|GRAPHIC_KEY_FN_EQ|CMP_MIX_AND); | |
337 | |
338 } | |
339 | |
340 static void mach64_vid_dump_regs( void ) | |
341 { | |
342 size_t i; | |
343 printf("[mach64] *** Begin of DRIVER variables dump ***\n"); | |
344 printf("[mach64] mach64_mmio_base=%p\n",mach64_mmio_base); | |
345 printf("[mach64] mach64_mem_base=%p\n",mach64_mem_base); | |
346 printf("[mach64] mach64_overlay_off=%08X\n",mach64_overlay_offset); | |
347 printf("[mach64] mach64_ram_size=%08X\n",mach64_ram_size); | |
348 printf("[mach64] video mode: %ux%u@%u\n",mach64_get_xres(),mach64_get_yres(),mach64_vid_get_dbpp()); | |
349 printf("[mach64] *** Begin of OV0 registers dump ***\n"); | |
350 for(i=0;i<sizeof(vregs)/sizeof(video_registers_t);i++) | |
351 { | |
352 mach64_wait_for_idle(); | |
353 printf("[mach64] %s = %08X\n",vregs[i].sname,INREG(vregs[i].name)); | |
354 } | |
355 printf("[mach64] *** End of OV0 registers dump ***\n"); | |
356 } | |
357 | |
358 | |
359 static unsigned short ati_card_ids[] = | |
360 { | |
361 DEVICE_ATI_215CT_MACH64_CT, | |
362 DEVICE_ATI_210888CX_MACH64_CX, | |
363 DEVICE_ATI_210888ET_MACH64_ET, | |
364 DEVICE_ATI_MACH64_VT, | |
365 DEVICE_ATI_210888GX_MACH64_GX, | |
366 DEVICE_ATI_264LT_MACH64_LT, | |
367 DEVICE_ATI_264VT_MACH64_VT, | |
368 DEVICE_ATI_264VT3_MACH64_VT3, | |
369 DEVICE_ATI_264VT4_MACH64_VT4, | |
370 /**/ | |
371 DEVICE_ATI_3D_RAGE_PRO, | |
372 DEVICE_ATI_3D_RAGE_PRO2, | |
373 DEVICE_ATI_3D_RAGE_PRO3, | |
374 DEVICE_ATI_3D_RAGE_PRO4, | |
375 DEVICE_ATI_RAGE_XC, | |
376 DEVICE_ATI_RAGE_XL_AGP, | |
377 DEVICE_ATI_RAGE_XC_AGP, | |
378 DEVICE_ATI_RAGE_XL, | |
379 DEVICE_ATI_3D_RAGE_PRO5, | |
380 DEVICE_ATI_3D_RAGE_PRO6, | |
381 DEVICE_ATI_RAGE_XL2, | |
382 DEVICE_ATI_RAGE_XC2, | |
383 DEVICE_ATI_3D_RAGE_I_II, | |
384 DEVICE_ATI_3D_RAGE_II, | |
385 DEVICE_ATI_3D_RAGE_IIC, | |
386 DEVICE_ATI_3D_RAGE_IIC2, | |
387 DEVICE_ATI_3D_RAGE_IIC3, | |
388 DEVICE_ATI_3D_RAGE_IIC4, | |
389 DEVICE_ATI_3D_RAGE_LT, | |
390 DEVICE_ATI_3D_RAGE_LT2, | |
391 DEVICE_ATI_3D_RAGE_LT_G, | |
392 DEVICE_ATI_3D_RAGE_LT3, | |
393 DEVICE_ATI_RAGE_MOBILITY_P_M, | |
394 DEVICE_ATI_RAGE_MOBILITY_L, | |
395 DEVICE_ATI_3D_RAGE_LT4, | |
396 DEVICE_ATI_3D_RAGE_LT5, | |
397 DEVICE_ATI_RAGE_MOBILITY_P_M2, | |
398 DEVICE_ATI_RAGE_MOBILITY_L2 | |
399 }; | |
400 | |
401 static int find_chip(unsigned chip_id) | |
402 { | |
403 unsigned i; | |
404 for(i = 0;i < sizeof(ati_card_ids)/sizeof(unsigned short);i++) | |
405 { | |
406 if(chip_id == ati_card_ids[i]) return i; | |
407 } | |
408 return -1; | |
409 } | |
410 | |
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411 static int mach64_probe(int verbose,int force) |
22850 | 412 { |
413 pciinfo_t lst[MAX_PCI_DEVICES]; | |
414 unsigned i,num_pci; | |
415 int err; | |
416 __verbose = verbose; | |
417 err = pci_scan(lst,&num_pci); | |
418 if(err) | |
419 { | |
420 printf("[mach64] Error occurred during pci scan: %s\n",strerror(err)); | |
421 return err; | |
422 } | |
423 else | |
424 { | |
425 err = ENXIO; | |
426 for(i=0;i<num_pci;i++) | |
427 { | |
428 if(lst[i].vendor == VENDOR_ATI) | |
429 { | |
430 int idx; | |
431 const char *dname; | |
432 idx = find_chip(lst[i].device); | |
433 if(idx == -1 && force == PROBE_NORMAL) continue; | |
434 dname = pci_device_name(VENDOR_ATI,lst[i].device); | |
435 dname = dname ? dname : "Unknown chip"; | |
436 printf("[mach64] Found chip: %s\n",dname); | |
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437 #if 0 |
22850 | 438 if ((lst[i].command & PCI_COMMAND_IO) == 0) |
439 { | |
440 printf("[mach64] Device is disabled, ignoring\n"); | |
441 continue; | |
442 } | |
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443 #endif |
22850 | 444 if(force > PROBE_NORMAL) |
445 { | |
446 printf("[mach64] Driver was forced. Was found %sknown chip\n",idx == -1 ? "un" : ""); | |
447 if(idx == -1) | |
448 printf("[mach64] Assuming it as Mach64\n"); | |
449 } | |
450 mach64_cap.device_id = lst[i].device; | |
451 err = 0; | |
452 memcpy(&pci_info,&lst[i],sizeof(pciinfo_t)); | |
453 probed=1; | |
454 break; | |
455 } | |
456 } | |
457 } | |
458 if(err && verbose) printf("[mach64] Can't find chip\n"); | |
459 return err; | |
460 } | |
461 | |
462 static void reset_regs( void ) | |
463 { | |
464 size_t i; | |
465 for(i=0;i<sizeof(vregs)/sizeof(video_registers_t);i++) | |
466 { | |
467 mach64_fifo_wait(2); | |
468 OUTREG(vregs[i].name,0); | |
469 } | |
470 } | |
471 | |
472 | |
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473 static int mach64_init(void) |
22850 | 474 { |
475 int err; | |
476 if(!probed) | |
477 { | |
478 printf("[mach64] Driver was not probed but is being initializing\n"); | |
479 return EINTR; | |
480 } | |
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481 if(__verbose>0) printf("[mach64] version %d\n", VIDIX_VERSION); |
22850 | 482 |
483 if((mach64_mmio_base = map_phys_mem(pci_info.base2,0x1000))==(void *)-1) return ENOMEM; | |
484 mach64_wait_for_idle(); | |
485 mach64_ram_size = INREG(MEM_CNTL) & CTL_MEM_SIZEB; | |
486 if (mach64_ram_size < 8) mach64_ram_size = (mach64_ram_size + 1) * 512; | |
487 else if (mach64_ram_size < 12) mach64_ram_size = (mach64_ram_size - 3) * 1024; | |
488 else mach64_ram_size = (mach64_ram_size - 7) * 2048; | |
489 mach64_ram_size *= 0x400; /* KB -> bytes */ | |
490 if((mach64_mem_base = map_phys_mem(pci_info.base0,mach64_ram_size))==(void *)-1) return ENOMEM; | |
491 memset(&besr,0,sizeof(bes_registers_t)); | |
492 printf("[mach64] Video memory = %uMb\n",mach64_ram_size/0x100000); | |
493 err = mtrr_set_type(pci_info.base0,mach64_ram_size,MTRR_TYPE_WRCOMB); | |
494 if(!err) printf("[mach64] Set write-combining type of video memory\n"); | |
495 | |
496 /* save this */ | |
497 mach64_wait_for_idle(); | |
498 SAVED_OVERLAY_GRAPHICS_KEY_CLR = INREG(OVERLAY_GRAPHICS_KEY_CLR); | |
499 | |
500 /* check if planar formats are supported */ | |
501 supports_planar=0; | |
502 mach64_wait_for_idle(); | |
503 mach64_fifo_wait(2); | |
504 if(INREG(SCALER_BUF0_OFFSET_U)) supports_planar=1; | |
505 else | |
506 { | |
507 OUTREG(SCALER_BUF0_OFFSET_U, -1); | |
508 | |
509 mach64_wait_vsync(); | |
510 mach64_wait_for_idle(); | |
511 mach64_fifo_wait(2); | |
512 | |
513 if(INREG(SCALER_BUF0_OFFSET_U)) supports_planar=1; | |
514 } | |
515 if(supports_planar) printf("[mach64] Planar YUV formats are supported :)\n"); | |
516 else printf("[mach64] Planar YUV formats are not supported :(\n"); | |
517 | |
518 if( mach64_cap.device_id==DEVICE_ATI_RAGE_MOBILITY_P_M | |
519 || mach64_cap.device_id==DEVICE_ATI_RAGE_MOBILITY_P_M2 | |
520 || mach64_cap.device_id==DEVICE_ATI_RAGE_MOBILITY_L | |
521 || mach64_cap.device_id==DEVICE_ATI_RAGE_MOBILITY_L2) | |
522 supports_lcd_v_stretch=1; | |
523 else | |
524 supports_lcd_v_stretch=0; | |
525 | |
526 reset_regs(); | |
527 mach64_vid_make_default(); | |
528 | |
529 if(__verbose > VERBOSE_LEVEL) mach64_vid_dump_regs(); | |
530 return 0; | |
531 } | |
532 | |
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533 static void mach64_destroy(void) |
22850 | 534 { |
535 /*restore this*/ | |
536 mach64_wait_for_idle(); | |
537 OUTREG(OVERLAY_GRAPHICS_KEY_CLR,SAVED_OVERLAY_GRAPHICS_KEY_CLR); | |
538 | |
539 unmap_phys_mem(mach64_mem_base,mach64_ram_size); | |
540 unmap_phys_mem(mach64_mmio_base,0x1000); | |
541 } | |
542 | |
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543 static int mach64_get_caps(vidix_capability_t *to) |
22850 | 544 { |
545 memcpy(to, &mach64_cap, sizeof(vidix_capability_t)); | |
546 return 0; | |
547 } | |
548 | |
549 static unsigned mach64_query_pitch(unsigned fourcc,const vidix_yuv_t *spitch) | |
550 { | |
551 unsigned pitch,spy,spv,spu; | |
552 spy = spv = spu = 0; | |
553 switch(spitch->y) | |
554 { | |
555 case 16: | |
556 case 32: | |
557 case 64: | |
558 case 128: | |
559 case 256: spy = spitch->y; break; | |
560 default: break; | |
561 } | |
562 switch(spitch->u) | |
563 { | |
564 case 16: | |
565 case 32: | |
566 case 64: | |
567 case 128: | |
568 case 256: spu = spitch->u; break; | |
569 default: break; | |
570 } | |
571 switch(spitch->v) | |
572 { | |
573 case 16: | |
574 case 32: | |
575 case 64: | |
576 case 128: | |
577 case 256: spv = spitch->v; break; | |
578 default: break; | |
579 } | |
580 switch(fourcc) | |
581 { | |
582 /* 4:2:0 */ | |
583 case IMGFMT_IYUV: | |
584 case IMGFMT_YV12: | |
585 case IMGFMT_I420: | |
586 if(spy > 16 && spu == spy/2 && spv == spy/2) pitch = spy; | |
587 else pitch = 32; | |
588 break; | |
589 case IMGFMT_YVU9: | |
590 if(spy > 32 && spu == spy/4 && spv == spy/4) pitch = spy; | |
591 else pitch = 64; | |
592 break; | |
593 default: | |
594 if(spy >= 16) pitch = spy; | |
595 else pitch = 16; | |
596 break; | |
597 } | |
598 return pitch; | |
599 } | |
600 | |
601 static void mach64_compute_framesize(vidix_playback_t *info) | |
602 { | |
603 unsigned pitch,awidth; | |
604 pitch = mach64_query_pitch(info->fourcc,&info->src.pitch); | |
605 switch(info->fourcc) | |
606 { | |
607 case IMGFMT_I420: | |
608 case IMGFMT_YV12: | |
609 case IMGFMT_IYUV: | |
610 awidth = (info->src.w + (pitch-1)) & ~(pitch-1); | |
611 info->frame_size = awidth*(info->src.h+info->src.h/2); | |
612 break; | |
613 case IMGFMT_YVU9: | |
614 awidth = (info->src.w + (pitch-1)) & ~(pitch-1); | |
615 info->frame_size = awidth*(info->src.h+info->src.h/8); | |
616 break; | |
617 // case IMGFMT_RGB32: | |
618 case IMGFMT_BGR32: | |
619 awidth = (info->src.w*4 + (pitch-1)) & ~(pitch-1); | |
620 info->frame_size = (awidth*info->src.h); | |
621 break; | |
622 /* YUY2 YVYU, RGB15, RGB16 */ | |
623 default: | |
624 awidth = (info->src.w*2 + (pitch-1)) & ~(pitch-1); | |
625 info->frame_size = (awidth*info->src.h); | |
626 break; | |
627 } | |
628 info->frame_size+=256; // so we have some space for alignment & such | |
629 info->frame_size&=~16; | |
630 } | |
631 | |
632 static void mach64_vid_stop_video( void ) | |
633 { | |
634 mach64_fifo_wait(14); | |
635 OUTREG(OVERLAY_SCALE_CNTL, 0x80000000); | |
636 OUTREG(OVERLAY_EXCLUSIVE_HORZ, 0); | |
637 OUTREG(OVERLAY_EXCLUSIVE_VERT, 0); | |
638 OUTREG(SCALER_H_COEFF0, 0x00002000); | |
639 OUTREG(SCALER_H_COEFF1, 0x0D06200D); | |
640 OUTREG(SCALER_H_COEFF2, 0x0D0A1C0D); | |
641 OUTREG(SCALER_H_COEFF3, 0x0C0E1A0C); | |
642 OUTREG(SCALER_H_COEFF4, 0x0C14140C); | |
643 OUTREG(VIDEO_FORMAT, 0xB000B); | |
644 OUTREG(OVERLAY_TEST, 0x0); | |
645 } | |
646 | |
647 static void mach64_vid_display_video( void ) | |
648 { | |
649 uint32_t vf; | |
650 mach64_fifo_wait(14); | |
651 | |
652 OUTREG(OVERLAY_Y_X_START, besr.y_x_start); | |
653 OUTREG(OVERLAY_Y_X_END, besr.y_x_end); | |
654 OUTREG(OVERLAY_SCALE_INC, besr.scale_inc); | |
655 OUTREG(SCALER_BUF_PITCH, besr.vid_buf_pitch); | |
656 OUTREG(SCALER_HEIGHT_WIDTH, besr.height_width); | |
657 OUTREG(SCALER_BUF0_OFFSET, mach64_buffer_base[0][0]); | |
658 OUTREG(SCALER_BUF0_OFFSET_U, mach64_buffer_base[0][1]); | |
659 OUTREG(SCALER_BUF0_OFFSET_V, mach64_buffer_base[0][2]); | |
660 OUTREG(SCALER_BUF1_OFFSET, mach64_buffer_base[0][0]); | |
661 OUTREG(SCALER_BUF1_OFFSET_U, mach64_buffer_base[0][1]); | |
662 OUTREG(SCALER_BUF1_OFFSET_V, mach64_buffer_base[0][2]); | |
663 mach64_wait_vsync(); | |
664 | |
665 mach64_fifo_wait(4); | |
666 OUTREG(OVERLAY_SCALE_CNTL, 0xC4000003); | |
667 // OVERLAY_SCALE_CNTL bits & what they seem to affect | |
668 // bit 0 no effect | |
669 // bit 1 yuv2rgb coeff related | |
670 // bit 2 horizontal interpolation if 0 | |
671 // bit 3 vertical interpolation if 0 | |
672 // bit 4 chroma encoding (0-> 128=neutral / 1-> 0->neutral) | |
673 // bit 5-6 gamma correction | |
674 // bit 7 nothing visible if set | |
675 // bit 8-27 no effect | |
676 // bit 28-31 nothing interresting just crashed my system when i played with them :( | |
677 | |
678 mach64_wait_for_idle(); | |
679 vf = INREG(VIDEO_FORMAT); | |
680 | |
681 // Bits 16-19 seem to select the format | |
682 // 0x0 dunno behaves strange | |
683 // 0x1 dunno behaves strange | |
684 // 0x2 dunno behaves strange | |
685 // 0x3 BGR15 | |
686 // 0x4 BGR16 | |
687 // 0x5 BGR16 (hmm, that need investigation, 2 BGR16 formats, i guess 1 will have only 5bits for green) | |
688 // 0x6 BGR32 | |
689 // 0x7 BGR32 with somehow mixed even / odd pixels ? | |
690 // 0x8 YYYYUVUV | |
691 // 0x9 YVU9 | |
692 // 0xA YV12 | |
693 // 0xB YUY2 | |
694 // 0xC UYVY | |
695 // 0xD UYVY (no difference is visible if i switch between C/D for every even/odd frame) | |
696 // 0xE dunno behaves strange | |
697 // 0xF dunno behaves strange | |
698 // Bit 28 all values are assumed to be 7 bit with chroma=64 for black (tested with YV12 & YUY2) | |
699 // the remaining bits seem to have no effect | |
700 | |
701 | |
702 switch(besr.fourcc) | |
703 { | |
704 /* BGR formats */ | |
705 case IMGFMT_BGR15: OUTREG(VIDEO_FORMAT, 0x00030000); break; | |
706 case IMGFMT_BGR16: OUTREG(VIDEO_FORMAT, 0x00040000); break; | |
707 case IMGFMT_BGR32: OUTREG(VIDEO_FORMAT, 0x00060000); break; | |
708 /* 4:2:0 */ | |
709 case IMGFMT_IYUV: | |
710 case IMGFMT_I420: | |
711 case IMGFMT_YV12: OUTREG(VIDEO_FORMAT, 0x000A0000); break; | |
712 | |
713 case IMGFMT_YVU9: OUTREG(VIDEO_FORMAT, 0x00090000); break; | |
714 /* 4:2:2 */ | |
715 case IMGFMT_YVYU: | |
716 case IMGFMT_UYVY: OUTREG(VIDEO_FORMAT, 0x000C0000); break; | |
717 case IMGFMT_YUY2: | |
718 default: OUTREG(VIDEO_FORMAT, 0x000B0000); break; | |
719 } | |
720 if(__verbose > VERBOSE_LEVEL) mach64_vid_dump_regs(); | |
721 } | |
722 | |
723 static int mach64_vid_init_video( vidix_playback_t *config ) | |
724 { | |
725 uint32_t src_w,src_h,dest_w,dest_h,pitch,h_inc,v_inc,left,leftUV,top,ecp,y_pos; | |
726 int is_420,best_pitch,mpitch; | |
727 int src_offset_y, src_offset_u, src_offset_v; | |
728 unsigned int i; | |
729 | |
730 mach64_vid_stop_video(); | |
731 /* warning, if left or top are != 0 this will fail, as the framesize is too small then */ | |
732 left = config->src.x; | |
733 top = config->src.y; | |
734 src_h = config->src.h; | |
735 src_w = config->src.w; | |
736 is_420 = 0; | |
737 if(config->fourcc == IMGFMT_YV12 || | |
738 config->fourcc == IMGFMT_I420 || | |
739 config->fourcc == IMGFMT_IYUV) is_420 = 1; | |
740 best_pitch = mach64_query_pitch(config->fourcc,&config->src.pitch); | |
741 mpitch = best_pitch-1; | |
742 switch(config->fourcc) | |
743 { | |
744 case IMGFMT_YVU9: | |
745 /* 4:2:0 */ | |
746 case IMGFMT_IYUV: | |
747 case IMGFMT_YV12: | |
748 case IMGFMT_I420: pitch = (src_w + mpitch) & ~mpitch; | |
749 config->dest.pitch.y = | |
750 config->dest.pitch.u = | |
751 config->dest.pitch.v = best_pitch; | |
752 besr.vid_buf_pitch= pitch; | |
753 break; | |
754 /* RGB 4:4:4:4 */ | |
755 case IMGFMT_RGB32: | |
756 case IMGFMT_BGR32: pitch = (src_w*4 + mpitch) & ~mpitch; | |
757 config->dest.pitch.y = | |
758 config->dest.pitch.u = | |
759 config->dest.pitch.v = best_pitch; | |
760 besr.vid_buf_pitch= pitch>>2; | |
761 break; | |
762 /* 4:2:2 */ | |
763 default: /* RGB15, RGB16, YVYU, UYVY, YUY2 */ | |
764 pitch = ((src_w*2) + mpitch) & ~mpitch; | |
765 config->dest.pitch.y = | |
766 config->dest.pitch.u = | |
767 config->dest.pitch.v = best_pitch; | |
768 besr.vid_buf_pitch= pitch>>1; | |
769 break; | |
770 } | |
771 dest_w = config->dest.w; | |
772 dest_h = config->dest.h; | |
773 besr.fourcc = config->fourcc; | |
774 ecp = (INPLL(PLL_VCLK_CNTL) & PLL_ECP_DIV) >> 4; | |
23048 | 775 |
22850 | 776 if(__verbose>0) printf("[mach64] ecp: %d\n", ecp); |
777 v_inc = src_h * mach64_get_vert_stretch(); | |
778 | |
779 if(mach64_is_interlace()) v_inc<<=1; | |
780 if(mach64_is_dbl_scan() ) v_inc>>=1; | |
781 v_inc>>=4; // convert 16.16 -> 20.12 | |
782 v_inc/= dest_h; | |
783 | |
784 h_inc = (src_w << (12+ecp)) / dest_w; | |
785 /* keep everything in 16.16 */ | |
786 config->offsets[0] = 0; | |
787 for(i=1; i<config->num_frames; i++) | |
788 config->offsets[i] = config->offsets[i-1] + config->frame_size; | |
789 | |
790 /*FIXME the left / top stuff is broken (= zoom a src rectangle from a larger one) | |
791 1. the framesize isn't known as the outer src rectangle dimensions aren't known | |
792 2. the mach64 needs aligned addresses so it can't work anyway | |
793 -> so we could shift the outer buffer to compensate that but that would mean | |
794 alignment problems for the code which writes into it | |
795 */ | |
796 | |
797 if(is_420) | |
798 { | |
799 config->offset.y= 0; | |
800 config->offset.u= (pitch*src_h + 15)&~15; | |
801 config->offset.v= (config->offset.u + (pitch*src_h>>2) + 15)&~15; | |
802 | |
803 if(besr.fourcc == IMGFMT_I420 || besr.fourcc == IMGFMT_IYUV) | |
804 { | |
805 uint32_t tmp; | |
806 tmp = config->offset.u; | |
807 config->offset.u = config->offset.v; | |
808 config->offset.v = tmp; | |
809 } | |
810 | |
811 src_offset_y= config->offset.y + top*pitch + left; | |
812 src_offset_u= config->offset.u + (top*pitch>>2) + (left>>1); | |
813 src_offset_v= config->offset.v + (top*pitch>>2) + (left>>1); | |
814 } | |
815 else if(besr.fourcc == IMGFMT_YVU9) | |
816 { | |
817 config->offset.y= 0; | |
818 config->offset.u= (pitch*src_h + 15)&~15; | |
819 config->offset.v= (config->offset.u + (pitch*src_h>>4) + 15)&~15; | |
820 | |
821 src_offset_y= config->offset.y + top*pitch + left; | |
822 src_offset_u= config->offset.u + (top*pitch>>4) + (left>>1); | |
823 src_offset_v= config->offset.v + (top*pitch>>4) + (left>>1); | |
824 } | |
825 else if(besr.fourcc == IMGFMT_BGR32) | |
826 { | |
827 config->offset.y = config->offset.u = config->offset.v = 0; | |
828 src_offset_y= src_offset_u= src_offset_v= top*pitch + (left << 2); | |
829 } | |
830 else | |
831 { | |
832 config->offset.y = config->offset.u = config->offset.v = 0; | |
833 src_offset_y= src_offset_u= src_offset_v= top*pitch + (left << 1); | |
834 } | |
835 | |
836 num_mach64_buffers= config->num_frames; | |
837 for(i=0; i<config->num_frames; i++) | |
838 { | |
839 mach64_buffer_base[i][0]= (mach64_overlay_offset + config->offsets[i] + src_offset_y)&~15; | |
840 mach64_buffer_base[i][1]= (mach64_overlay_offset + config->offsets[i] + src_offset_u)&~15; | |
841 mach64_buffer_base[i][2]= (mach64_overlay_offset + config->offsets[i] + src_offset_v)&~15; | |
842 } | |
843 | |
844 leftUV = (left >> 17) & 15; | |
845 left = (left >> 16) & 15; | |
846 besr.scale_inc = ( h_inc << 16 ) | v_inc; | |
847 y_pos = config->dest.y; | |
848 if(mach64_is_dbl_scan()) y_pos*=2; | |
849 else | |
850 if(mach64_is_interlace()) y_pos/=2; | |
851 besr.y_x_start = y_pos | (config->dest.x << 16); | |
852 y_pos =config->dest.y + dest_h; | |
853 if(mach64_is_dbl_scan()) y_pos*=2; | |
854 else | |
855 if(mach64_is_interlace()) y_pos/=2; | |
856 besr.y_x_end = y_pos | ((config->dest.x + dest_w) << 16); | |
857 besr.height_width = ((src_w - left)<<16) | (src_h - top); | |
858 | |
859 return 0; | |
860 } | |
861 | |
862 static int is_supported_fourcc(uint32_t fourcc) | |
863 { | |
864 switch(fourcc) | |
865 { | |
866 case IMGFMT_YV12: | |
867 case IMGFMT_I420: | |
868 case IMGFMT_YVU9: | |
869 case IMGFMT_IYUV: | |
870 return supports_planar; | |
871 case IMGFMT_YUY2: | |
872 case IMGFMT_UYVY: | |
873 case IMGFMT_BGR15: | |
874 case IMGFMT_BGR16: | |
875 case IMGFMT_BGR32: | |
876 return 1; | |
877 default: | |
878 return 0; | |
879 } | |
880 } | |
881 | |
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882 static int mach64_query_fourcc(vidix_fourcc_t *to) |
22850 | 883 { |
884 if(is_supported_fourcc(to->fourcc)) | |
885 { | |
23060 | 886 to->depth = VID_DEPTH_ALL; |
22850 | 887 to->flags = VID_CAP_EXPAND | VID_CAP_SHRINK | VID_CAP_COLORKEY; |
888 return 0; | |
889 } | |
890 else to->depth = to->flags = 0; | |
891 return ENOSYS; | |
892 } | |
893 | |
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894 static int mach64_config_playback(vidix_playback_t *info) |
22850 | 895 { |
896 if(!is_supported_fourcc(info->fourcc)) return ENOSYS; | |
897 | |
898 mach64_compute_framesize(info); | |
899 | |
900 if(info->num_frames>4) info->num_frames=4; | |
901 for(;info->num_frames>0; info->num_frames--) | |
902 { | |
903 mach64_overlay_offset = mach64_ram_size - info->frame_size*info->num_frames; | |
904 mach64_overlay_offset &= 0xffff0000; | |
905 if(mach64_overlay_offset>0) break; | |
906 } | |
907 if(info->num_frames <= 0) return EINVAL; | |
908 | |
909 info->dga_addr = (char *)mach64_mem_base + mach64_overlay_offset; | |
910 mach64_vid_init_video(info); | |
911 return 0; | |
912 } | |
913 | |
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914 static int mach64_playback_on(void) |
22850 | 915 { |
916 mach64_vid_display_video(); | |
917 return 0; | |
918 } | |
919 | |
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920 static int mach64_playback_off(void) |
22850 | 921 { |
922 mach64_vid_stop_video(); | |
923 return 0; | |
924 } | |
925 | |
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926 static int mach64_frame_sel(unsigned int frame) |
22850 | 927 { |
928 uint32_t off[6]; | |
929 int i; | |
930 int last_frame= (frame-1+num_mach64_buffers) % num_mach64_buffers; | |
931 //printf("Selecting frame %d\n", frame); | |
932 /* | |
933 buf3-5 always should point onto second buffer for better | |
934 deinterlacing and TV-in | |
935 */ | |
936 if(num_mach64_buffers==1) return 0; | |
937 | |
938 for(i=0; i<3; i++) | |
939 { | |
940 off[i] = mach64_buffer_base[frame][i]; | |
941 off[i+3]= mach64_buffer_base[last_frame][i]; | |
942 } | |
943 | |
944 mach64_wait_for_idle(); | |
945 mach64_fifo_wait(7); | |
946 | |
947 OUTREG(SCALER_BUF0_OFFSET, off[0]); | |
948 OUTREG(SCALER_BUF0_OFFSET_U, off[1]); | |
949 OUTREG(SCALER_BUF0_OFFSET_V, off[2]); | |
950 OUTREG(SCALER_BUF1_OFFSET, off[3]); | |
951 OUTREG(SCALER_BUF1_OFFSET_U, off[4]); | |
952 OUTREG(SCALER_BUF1_OFFSET_V, off[5]); | |
953 if(num_mach64_buffers==2) mach64_wait_vsync(); //only wait for vsync if we do double buffering | |
954 | |
955 if(__verbose > VERBOSE_LEVEL) mach64_vid_dump_regs(); | |
956 return 0; | |
957 } | |
958 | |
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959 static vidix_video_eq_t equal = |
22850 | 960 { |
961 VEQ_CAP_BRIGHTNESS | VEQ_CAP_SATURATION | |
962 , | |
963 0, 0, 0, 0, 0, 0, 0, 0 }; | |
964 | |
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965 static int mach64_get_eq( vidix_video_eq_t * eq) |
22850 | 966 { |
967 memcpy(eq,&equal,sizeof(vidix_video_eq_t)); | |
968 return 0; | |
969 } | |
970 | |
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971 static int mach64_set_eq( const vidix_video_eq_t * eq) |
22850 | 972 { |
973 int br,sat; | |
974 if(eq->cap & VEQ_CAP_BRIGHTNESS) equal.brightness = eq->brightness; | |
975 if(eq->cap & VEQ_CAP_CONTRAST) equal.contrast = eq->contrast; | |
976 if(eq->cap & VEQ_CAP_SATURATION) equal.saturation = eq->saturation; | |
977 if(eq->cap & VEQ_CAP_HUE) equal.hue = eq->hue; | |
978 if(eq->cap & VEQ_CAP_RGB_INTENSITY) | |
979 { | |
980 equal.red_intensity = eq->red_intensity; | |
981 equal.green_intensity = eq->green_intensity; | |
982 equal.blue_intensity = eq->blue_intensity; | |
983 } | |
984 equal.flags = eq->flags; | |
985 br = equal.brightness * 64 / 1000; | |
986 if(br < -64) br = -64; if(br > 63) br = 63; | |
987 sat = (equal.saturation + 1000) * 16 / 1000; | |
988 if(sat < 0) sat = 0; if(sat > 31) sat = 31; | |
989 OUTREG(SCALER_COLOUR_CNTL, (br & 0x7f) | (sat << 8) | (sat << 16)); | |
990 return 0; | |
991 } | |
992 | |
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993 static int mach64_get_gkeys(vidix_grkey_t *grkey) |
22850 | 994 { |
995 memcpy(grkey, &mach64_grkey, sizeof(vidix_grkey_t)); | |
996 return(0); | |
997 } | |
998 | |
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999 static int mach64_set_gkeys(const vidix_grkey_t *grkey) |
22850 | 1000 { |
1001 memcpy(&mach64_grkey, grkey, sizeof(vidix_grkey_t)); | |
1002 | |
1003 if(mach64_grkey.ckey.op == CKEY_TRUE) | |
1004 { | |
1005 besr.ckey_on=1; | |
1006 | |
1007 switch(mach64_vid_get_dbpp()) | |
1008 { | |
1009 case 15: | |
1010 besr.graphics_key_msk=0x7FFF; | |
1011 besr.graphics_key_clr= | |
1012 ((mach64_grkey.ckey.blue &0xF8)>>3) | |
1013 | ((mach64_grkey.ckey.green&0xF8)<<2) | |
1014 | ((mach64_grkey.ckey.red &0xF8)<<7); | |
1015 break; | |
1016 case 16: | |
1017 besr.graphics_key_msk=0xFFFF; | |
1018 besr.graphics_key_clr= | |
1019 ((mach64_grkey.ckey.blue &0xF8)>>3) | |
1020 | ((mach64_grkey.ckey.green&0xFC)<<3) | |
1021 | ((mach64_grkey.ckey.red &0xF8)<<8); | |
1022 //besr.graphics_key_clr=le2me_32(besr.graphics_key_clr); | |
1023 break; | |
1024 case 24: | |
1025 besr.graphics_key_msk=0xFFFFFF; | |
1026 besr.graphics_key_clr= | |
1027 ((mach64_grkey.ckey.blue &0xFF)) | |
1028 | ((mach64_grkey.ckey.green&0xFF)<<8) | |
1029 | ((mach64_grkey.ckey.red &0xFF)<<16); | |
1030 break; | |
1031 case 32: | |
1032 besr.graphics_key_msk=0xFFFFFF; | |
1033 besr.graphics_key_clr= | |
1034 ((mach64_grkey.ckey.blue &0xFF)) | |
1035 | ((mach64_grkey.ckey.green&0xFF)<<8) | |
1036 | ((mach64_grkey.ckey.red &0xFF)<<16); | |
1037 break; | |
1038 default: | |
1039 besr.ckey_on=0; | |
1040 besr.graphics_key_msk=0; | |
1041 besr.graphics_key_clr=0; | |
1042 } | |
1043 } | |
1044 else | |
1045 { | |
1046 besr.ckey_on=0; | |
1047 besr.graphics_key_msk=0; | |
1048 besr.graphics_key_clr=0; | |
1049 } | |
1050 | |
1051 mach64_fifo_wait(4); | |
1052 OUTREG(OVERLAY_GRAPHICS_KEY_MSK, besr.graphics_key_msk); | |
1053 OUTREG(OVERLAY_GRAPHICS_KEY_CLR, besr.graphics_key_clr); | |
1054 // OUTREG(OVERLAY_VIDEO_KEY_MSK, 0); | |
1055 // OUTREG(OVERLAY_VIDEO_KEY_CLR, 0); | |
1056 if(besr.ckey_on) | |
1057 OUTREG(OVERLAY_KEY_CNTL,VIDEO_KEY_FN_TRUE|GRAPHIC_KEY_FN_EQ|CMP_MIX_AND); | |
1058 else | |
1059 OUTREG(OVERLAY_KEY_CNTL,VIDEO_KEY_FN_TRUE|GRAPHIC_KEY_FN_TRUE|CMP_MIX_AND); | |
1060 | |
1061 return(0); | |
1062 } | |
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1063 |
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1064 VDXDriver mach64_drv = { |
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1065 "mach64", |
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1066 NULL, |
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1067 .probe = mach64_probe, |
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1068 .get_caps = mach64_get_caps, |
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1069 .query_fourcc = mach64_query_fourcc, |
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1070 .init = mach64_init, |
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1071 .destroy = mach64_destroy, |
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1072 .config_playback = mach64_config_playback, |
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1073 .playback_on = mach64_playback_on, |
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1074 .playback_off = mach64_playback_off, |
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1075 .frame_sel = mach64_frame_sel, |
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1076 .get_eq = mach64_get_eq, |
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1077 .set_eq = mach64_set_eq, |
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1078 .get_gkey = mach64_get_gkeys, |
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1079 .set_gkey = mach64_set_gkeys, |
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1080 }; |