annotate vidix/pm3_vid.c @ 29591:bd3ac7fc0a70

enable ffwmapro
author faust3
date Wed, 02 Sep 2009 17:49:24 +0000
parents 0f1b5b68af32
children 945eab072c9d
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1 /*
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2 * VIDIX driver for 3DLabs Glint R3 and Permedia 3 chipsets.
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3 * Copyright (C) 2002 Måns Rullgård
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4 *
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5 * This file is part of MPlayer.
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6 *
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7 * MPlayer is free software; you can redistribute it and/or modify
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8 * it under the terms of the GNU General Public License as published by
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9 * the Free Software Foundation; either version 2 of the License, or
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10 * (at your option) any later version.
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11 *
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12 * MPlayer is distributed in the hope that it will be useful,
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13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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15 * GNU General Public License for more details.
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16 *
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17 * You should have received a copy of the GNU General Public License along
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18 * with MPlayer; if not, write to the Free Software Foundation, Inc.,
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19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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20 */
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21
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22 #include <errno.h>
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23 #include <stdio.h>
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24 #include <stdlib.h>
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25 #include <string.h>
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26 #include <inttypes.h>
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27 #include <unistd.h>
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28
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29 #include "config.h"
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30 #include "vidix.h"
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31 #include "fourcc.h"
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32 #include "dha.h"
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33 #include "pci_ids.h"
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34 #include "pci_names.h"
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35
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36 #include "pm3_regs.h"
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37
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38 #if 0
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39 #define TRACE_ENTER() fprintf(stderr, "%s: enter\n", __FUNCTION__)
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40 #define TRACE_EXIT() fprintf(stderr, "%s: exit\n", __FUNCTION__)
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41 #else
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42 #define TRACE_ENTER()
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43 #define TRACE_EXIT()
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44 #endif
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45
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46 static pciinfo_t pci_info;
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47
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48 void *pm3_reg_base;
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49 static void *pm3_mem;
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50
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51 static vidix_capability_t pm3_cap =
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52 {
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53 "3DLabs GLINT R3/Permedia3 driver",
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54 "Måns Rullgård <mru@users.sf.net>",
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55 TYPE_OUTPUT,
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56 { 0, 0, 0, 0 },
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57 2048,
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58 2048,
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59 4,
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60 4,
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61 -1,
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62 FLAG_UPSCALER|FLAG_DOWNSCALER,
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63 VENDOR_3DLABS,
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64 -1,
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65 { 0, 0, 0, 0 }
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66 };
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67
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68 static unsigned short pm3_card_ids[] =
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69 {
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70 DEVICE_3DLABS_GLINT_R3
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71 };
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72
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73 static int find_chip(unsigned chip_id)
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74 {
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75 unsigned i;
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76 for(i = 0;i < sizeof(pm3_card_ids)/sizeof(unsigned short);i++)
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77 {
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78 if(chip_id == pm3_card_ids[i]) return i;
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79 }
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80 return -1;
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81 }
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82
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83 static int pm3_probe(int verbose, int force)
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84 {
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85 pciinfo_t lst[MAX_PCI_DEVICES];
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86 unsigned i,num_pci;
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87 int err;
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88
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89 err = pci_scan(lst,&num_pci);
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90 if(err)
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91 {
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92 printf("[pm3] Error occurred during pci scan: %s\n",strerror(err));
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93 return err;
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94 }
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95 else
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96 {
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97 err = ENXIO;
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98 for(i=0; i < num_pci; i++)
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99 {
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100 if(lst[i].vendor == VENDOR_3DLABS)
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101 {
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102 int idx;
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103 const char *dname;
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104 idx = find_chip(lst[i].device);
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105 if(idx == -1)
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106 continue;
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107 dname = pci_device_name(VENDOR_3DLABS, lst[i].device);
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108 dname = dname ? dname : "Unknown chip";
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109 printf("[pm3] Found chip: %s\n", dname);
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110 #if 0
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111 if ((lst[i].command & PCI_COMMAND_IO) == 0)
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112 {
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113 printf("[pm3] Device is disabled, ignoring\n");
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114 continue;
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115 }
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116 #endif
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117 pm3_cap.device_id = lst[i].device;
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118 err = 0;
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119 memcpy(&pci_info, &lst[i], sizeof(pciinfo_t));
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120 break;
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121 }
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122 }
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123 }
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124 if(err && verbose) printf("[pm3] Can't find chip\n");
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125 return err;
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126 }
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127
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128 #define PRINT_REG(reg) \
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129 { \
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130 long _foo = READ_REG(reg); \
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131 printf("[pm3] " #reg " (%x) = %#lx (%li)\n", reg, _foo, _foo); \
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132 }
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133
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134 static int pm3_init(void)
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135 {
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136 pm3_reg_base = map_phys_mem(pci_info.base0, 0x20000);
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137 pm3_mem = map_phys_mem(pci_info.base2, 0x2000000);
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138 return 0;
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139 }
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140
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141 static void pm3_destroy(void)
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142 {
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143 unmap_phys_mem(pm3_reg_base, 0x20000);
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144 unmap_phys_mem(pm3_mem, 0x2000000);
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145 }
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146
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147 static int pm3_get_caps(vidix_capability_t *to)
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148 {
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149 memcpy(to, &pm3_cap, sizeof(vidix_capability_t));
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150 return 0;
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151 }
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152
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153 static int is_supported_fourcc(uint32_t fourcc)
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154 {
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155 switch(fourcc){
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156 case IMGFMT_YUY2:
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157 case IMGFMT_UYVY:
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158 return 1;
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159 default:
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160 return 0;
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161 }
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162 }
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163
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164 static int pm3_query_fourcc(vidix_fourcc_t *to)
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165 {
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166 if(is_supported_fourcc(to->fourcc))
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167 {
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168 to->depth = VID_DEPTH_ALL;
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169 to->flags = VID_CAP_EXPAND | VID_CAP_SHRINK | VID_CAP_COLORKEY;
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170 return 0;
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171 }
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172 else to->depth = to->flags = 0;
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173 return ENOSYS;
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174 }
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175
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176 #define FORMAT_RGB8888 PM3VideoOverlayMode_COLORFORMAT_RGB8888
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177 #define FORMAT_RGB4444 PM3VideoOverlayMode_COLORFORMAT_RGB4444
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178 #define FORMAT_RGB5551 PM3VideoOverlayMode_COLORFORMAT_RGB5551
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179 #define FORMAT_RGB565 PM3VideoOverlayMode_COLORFORMAT_RGB565
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180 #define FORMAT_RGB332 PM3VideoOverlayMode_COLORFORMAT_RGB332
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181 #define FORMAT_BGR8888 PM3VideoOverlayMode_COLORFORMAT_BGR8888
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182 #define FORMAT_BGR4444 PM3VideoOverlayMode_COLORFORMAT_BGR4444
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183 #define FORMAT_BGR5551 PM3VideoOverlayMode_COLORFORMAT_BGR5551
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184 #define FORMAT_BGR565 PM3VideoOverlayMode_COLORFORMAT_BGR565
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185 #define FORMAT_BGR332 PM3VideoOverlayMode_COLORFORMAT_BGR332
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186 #define FORMAT_CI8 PM3VideoOverlayMode_COLORFORMAT_CI8
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187 #define FORMAT_VUY444 PM3VideoOverlayMode_COLORFORMAT_VUY444
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188 #define FORMAT_YUV444 PM3VideoOverlayMode_COLORFORMAT_YUV444
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189 #define FORMAT_VUY422 PM3VideoOverlayMode_COLORFORMAT_VUY422
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190 #define FORMAT_YUV422 PM3VideoOverlayMode_COLORFORMAT_YUV422
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191
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192 /* Notice, have to check that we don't overflow the deltas here ... */
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193 static void
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194 compute_scale_factor(
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195 short* src_w, short* dst_w,
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196 uint32_t* shrink_delta, uint32_t* zoom_delta)
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197 {
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198 /* NOTE: If we don't return reasonable values here then the video
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199 * unit can potential shut off and won't display an image until re-enabled.
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200 * Seems as though the zoom_delta is o.k, and I've not had the problem.
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201 * The 'shrink_delta' is prone to this the most - FIXME ! */
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202
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203 if (*src_w >= *dst_w) {
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204 *src_w &= ~0x3;
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205 *dst_w &= ~0x3;
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206 *shrink_delta = (((*src_w << 16) / *dst_w) + 0x0f) & 0x0ffffff0;
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207 *zoom_delta = 1<<16;
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208 if ( ((*shrink_delta * *dst_w) >> 16) & 0x03 )
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209 *shrink_delta += 0x10;
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210 } else {
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211 *src_w &= ~0x3;
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212 *dst_w &= ~0x3;
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213 *zoom_delta = (((*src_w << 16) / *dst_w) + 0x0f) & 0x0001fff0;
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214 *shrink_delta = 1<<16;
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215 if ( ((*zoom_delta * *dst_w) >> 16) & 0x03 )
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216 *zoom_delta += 0x10;
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217 }
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218 }
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219
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220 static int frames[VID_PLAY_MAXFRAMES];
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221
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222 static long overlay_mode, overlay_control;
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223
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224 static int pm3_config_playback(vidix_playback_t *info)
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225 {
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226 uint32_t shrink, zoom;
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227 short src_w, drw_w;
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228 short src_h, drw_h;
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229 long base0;
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230 int pitch;
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231 int format;
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232 unsigned int i;
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233
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234 TRACE_ENTER();
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235
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236 if(!is_supported_fourcc(info->fourcc))
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237 return -1;
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238
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239 switch(info->fourcc){
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240 case IMGFMT_YUY2:
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241 format = FORMAT_YUV422;
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242 break;
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243 case IMGFMT_UYVY:
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244 format = FORMAT_VUY422;
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245 break;
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246 default:
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247 return -1;
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248 }
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249
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250 src_w = info->src.w;
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251 src_h = info->src.h;
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252
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253 drw_w = info->dest.w;
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254 drw_h = info->dest.h;
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255
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256 pitch = src_w;
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257
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258 /* Assume we have 16 MB to play with */
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259 info->num_frames = 0x1000000 / (pitch * src_h * 2);
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260 if(info->num_frames > VID_PLAY_MAXFRAMES)
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261 info->num_frames = VID_PLAY_MAXFRAMES;
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262
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263 /* Start at 16 MB. Let's hope it's not in use. */
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264 base0 = 0x1000000;
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265 info->dga_addr = pm3_mem + base0;
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266
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267 info->dest.pitch.y = 2;
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268 info->dest.pitch.u = 0;
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269 info->dest.pitch.v = 0;
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270 info->offset.y = 0;
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271 info->offset.v = 0;
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272 info->offset.u = 0;
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273 info->frame_size = pitch * src_h * 2;
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274 for(i = 0; i < info->num_frames; i++){
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275 info->offsets[i] = info->frame_size * i;
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276 frames[i] = (base0 + info->offsets[i]) >> 1;
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277 }
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278
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279 compute_scale_factor(&src_w, &drw_w, &shrink, &zoom);
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280
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281 WRITE_REG(PM3VideoOverlayBase0, base0 >> 1);
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282 WRITE_REG(PM3VideoOverlayStride, PM3VideoOverlayStride_STRIDE(pitch));
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283 WRITE_REG(PM3VideoOverlayWidth, PM3VideoOverlayWidth_WIDTH(src_w));
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284 WRITE_REG(PM3VideoOverlayHeight, PM3VideoOverlayHeight_HEIGHT(src_h));
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285 WRITE_REG(PM3VideoOverlayOrigin, 0);
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286
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287 /* Scale the source to the destinationsize */
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288 if (src_h == drw_h) {
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289 WRITE_REG(PM3VideoOverlayYDelta, PM3VideoOverlayYDelta_NONE);
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290 } else {
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291 WRITE_REG(PM3VideoOverlayYDelta,
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292 PM3VideoOverlayYDelta_DELTA(src_h, drw_h));
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293 }
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294 if (src_w == drw_w) {
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295 WRITE_REG(PM3VideoOverlayShrinkXDelta, 1<<16);
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296 WRITE_REG(PM3VideoOverlayZoomXDelta, 1<<16);
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297 } else {
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298 WRITE_REG(PM3VideoOverlayShrinkXDelta, shrink);
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299 WRITE_REG(PM3VideoOverlayZoomXDelta, zoom);
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300 }
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301 WRITE_REG(PM3VideoOverlayIndex, 0);
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302
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303 /* Now set the ramdac video overlay region and mode */
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304 RAMDAC_SET_REG(PM3RD_VideoOverlayXStartLow, (info->dest.x & 0xff));
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305 RAMDAC_SET_REG(PM3RD_VideoOverlayXStartHigh, (info->dest.x & 0xf00)>>8);
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306 RAMDAC_SET_REG(PM3RD_VideoOverlayXEndLow, (info->dest.x+drw_w) & 0xff);
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307 RAMDAC_SET_REG(PM3RD_VideoOverlayXEndHigh,
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308 ((info->dest.x+drw_w) & 0xf00)>>8);
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309 RAMDAC_SET_REG(PM3RD_VideoOverlayYStartLow, (info->dest.y & 0xff));
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310 RAMDAC_SET_REG(PM3RD_VideoOverlayYStartHigh, (info->dest.y & 0xf00)>>8);
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diff changeset
311 RAMDAC_SET_REG(PM3RD_VideoOverlayYEndLow, (info->dest.y+drw_h) & 0xff);
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312 RAMDAC_SET_REG(PM3RD_VideoOverlayYEndHigh,
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313 ((info->dest.y+drw_h) & 0xf00)>>8);
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314
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315 RAMDAC_SET_REG(PM3RD_VideoOverlayKeyR, 0xff);
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316 RAMDAC_SET_REG(PM3RD_VideoOverlayKeyG, 0x00);
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317 RAMDAC_SET_REG(PM3RD_VideoOverlayKeyB, 0xff);
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318
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319 overlay_mode =
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diff changeset
320 1 << 5 |
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321 format |
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322 PM3VideoOverlayMode_FILTER_FULL |
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323 PM3VideoOverlayMode_BUFFERSYNC_MANUAL |
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324 PM3VideoOverlayMode_FLIP_VIDEO;
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diff changeset
325
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diff changeset
326 overlay_control =
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327 PM3RD_VideoOverlayControl_KEY_COLOR |
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diff changeset
328 PM3RD_VideoOverlayControl_MODE_MAINKEY |
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329 PM3RD_VideoOverlayControl_DIRECTCOLOR_ENABLED;
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330
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331 TRACE_EXIT();
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332 return 0;
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333 }
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334
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diff changeset
335 static int pm3_playback_on(void)
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336 {
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diff changeset
337 TRACE_ENTER();
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338
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339 WRITE_REG(PM3VideoOverlayMode,
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340 overlay_mode | PM3VideoOverlayMode_ENABLE);
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341 RAMDAC_SET_REG(PM3RD_VideoOverlayControl,
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342 overlay_control | PM3RD_VideoOverlayControl_ENABLE);
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343 WRITE_REG(PM3VideoOverlayUpdate,
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344 PM3VideoOverlayUpdate_ENABLE);
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345
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346 TRACE_EXIT();
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347 return 0;
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348 }
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349
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350 static int pm3_playback_off(void)
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351 {
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352 RAMDAC_SET_REG(PM3RD_VideoOverlayControl,
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353 PM3RD_VideoOverlayControl_DISABLE);
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354 WRITE_REG(PM3VideoOverlayMode,
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355 PM3VideoOverlayMode_DISABLE);
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356
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357 RAMDAC_SET_REG(PM3RD_VideoOverlayKeyR, 0x01);
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358 RAMDAC_SET_REG(PM3RD_VideoOverlayKeyG, 0x01);
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359 RAMDAC_SET_REG(PM3RD_VideoOverlayKeyB, 0xfe);
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360
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361 return 0;
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362 }
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363
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364 static int pm3_frame_select(unsigned int frame)
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365 {
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366 WRITE_REG(PM3VideoOverlayBase0, frames[frame]);
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367 return 0;
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368 }
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369
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370 VDXDriver pm3_drv = {
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371 "pm3",
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372 NULL,
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373 .probe = pm3_probe,
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374 .get_caps = pm3_get_caps,
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375 .query_fourcc = pm3_query_fourcc,
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376 .init = pm3_init,
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377 .destroy = pm3_destroy,
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378 .config_playback = pm3_config_playback,
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379 .playback_on = pm3_playback_on,
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380 .playback_off = pm3_playback_off,
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381 .frame_sel = pm3_frame_select,
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382 };