annotate vidix/cyberblade_regs.h @ 34227:c2916bf4f140

Fix compilation with --disable-mencoder.
author reimar
date Sun, 06 Nov 2011 22:41:37 +0000
parents 2391228b7ff0
children
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1 /*
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2 * Copyright 1992-2000 by Alan Hourihane, Wigan, England
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3 *
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4 * Permission to use, copy, modify, distribute, and sell this software and its
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5 * documentation for any purpose is hereby granted without fee, provided that
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6 * the above copyright notice appear in all copies and that both that
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7 * copyright notice and this permission notice appear in supporting
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8 * documentation, and that the name of Alan Hourihane not be used in
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9 * advertising or publicity pertaining to distribution of the software without
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10 * specific, written prior permission. Alan Hourihane makes no representations
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11 * about the suitability of this software for any purpose. It is provided
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12 * "as is" without express or implied warranty.
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13 *
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14 * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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16 * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
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18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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20 * PERFORMANCE OF THIS SOFTWARE.
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21 *
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22 * Author: Alan Hourihane, alanh@fairlite.demon.co.uk
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23 */
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24 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/trident_regs.h,v 1.22 2002/01/11 13:06:30 alanh Exp $ */
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25
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26 #ifndef MPLAYER_CYBERBLADE_REGS_H
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27 #define MPLAYER_CYBERBLADE_REGS_H
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28
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29 #define DEBUG 1
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30
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31 #define NTSC 14.31818
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32 #define PAL 17.73448
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33
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34 /* General Registers */
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35 #define SPR 0x1F /* Software Programming Register (videoram) */
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36
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37 /* 3C4 */
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38 #define RevisionID 0x09
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39 #define ConfPort1 0x0C
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40 #define ConfPort2 0x0C
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41 #define NewMode2 0x0D
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42 #define OldMode2 0x00 /* Should be 0x0D - dealt with in trident_dac.c */
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43 #define OldMode1 0x0E
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44 #define NewMode1 0x0E
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45 #define Protection 0x11
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46 #define MCLKLow 0x16
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47 #define MCLKHigh 0x17
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48 #define ClockLow 0x18
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49 #define ClockHigh 0x19
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50 #define SSetup 0x20
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51 #define SKey 0x37
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52 #define SPKey 0x57
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53
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54 /* 3x4 */
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55 #define Offset 0x13
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56 #define Underline 0x14
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57 #define CRTCMode 0x17
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58 #define CRTCModuleTest 0x1E
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59 #define FIFOControl 0x20
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60 #define LinearAddReg 0x21
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61 #define DRAMTiming 0x23
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62 #define New32 0x23
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63 #define RAMDACTiming 0x25
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64 #define CRTHiOrd 0x27
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65 #define AddColReg 0x29
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66 #define InterfaceSel 0x2A
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67 #define HorizOverflow 0x2B
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68 #define GETest 0x2D
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69 #define Performance 0x2F
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70 #define GraphEngReg 0x36
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71 #define I2C 0x37
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72 #define PixelBusReg 0x38
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73 #define PCIReg 0x39
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74 #define DRAMControl 0x3A
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75 #define MiscContReg 0x3C
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76 #define CursorXLow 0x40
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77 #define CursorXHigh 0x41
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78 #define CursorYLow 0x42
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79 #define CursorYHigh 0x43
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80 #define CursorLocLow 0x44
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81 #define CursorLocHigh 0x45
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82 #define CursorXOffset 0x46
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83 #define CursorYOffset 0x47
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84 #define CursorFG1 0x48
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85 #define CursorFG2 0x49
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86 #define CursorFG3 0x4A
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87 #define CursorFG4 0x4B
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88 #define CursorBG1 0x4C
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89 #define CursorBG2 0x4D
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90 #define CursorBG3 0x4E
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91 #define CursorBG4 0x4F
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92 #define CursorControl 0x50
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93 #define PCIRetry 0x55
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94 #define PreEndControl 0x56
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95 #define PreEndFetch 0x57
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96 #define PCIMaster 0x60
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97 #define Enhancement0 0x62
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98 #define NewEDO 0x64
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99
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100 /* --- Additions by AMR for Vidix support --- */
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101 #define VideoWin1_HScale 0x80
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102 #define VideoWin1_VScale 0x82
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103 #define VideoWin1_Start 0x86
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104 #define VideoWin1_Stop 0x8a
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105 #define Video_Flags 0x8e
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106 #define VideoWin1_Y_BPR 0x90
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107 #define VideoWin1_Y_Offset 0x92
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108 #define Video_LineBufferThreshold 0x95
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109 #define Video_LineBufferLevel 0x96
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110 #define Video_Flags2 0x97
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111 /* --- */
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112
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113 #define TVinterface 0xC0
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114 #define TVMode 0xC1
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115 #define ClockControl 0xCF
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116
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117
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118 /* 3CE */
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119 #define MiscExtFunc 0x0F
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120 #define MiscIntContReg 0x2F
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121 #define CyberControl 0x30
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122 #define CyberEnhance 0x31
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123 #define FPConfig 0x33
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124 #define VertStretch 0x52
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125 #define HorStretch 0x53
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126 #define BiosMode 0x5c
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127 #define BiosNewMode1 0x5a
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128 #define BiosNewMode2 0x5c
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129 #define BiosReg 0x5d
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130
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131 /* --- IO Macros by AMR --- */
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132
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133 #define CRINB(reg) (OUTPORT8(0x3d4,reg), INPORT8(0x3d5))
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134 #define SRINB(reg) (OUTPORT8(0x3c4,reg), INPORT8(0x3c5))
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135 #define CROUTB(reg,val) (OUTPORT8(0x3d4,reg), OUTPORT8(0x3d5,val))
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136 #define SROUTB(reg,val) (OUTPORT8(0x3c4,reg), OUTPORT8(0x3c5,val))
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137
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138 /* --- */
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139
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140 #endif /* MPLAYER_CYBERBLADE_REGS_H */