Mercurial > mplayer.hg
annotate vidix/glint_regs.h @ 37195:ac6c37d85d65 default tip
configure: Fix initialization of variable def_local_aligned_32
It contiained the #define of HAVE_LOCAL_ALIGNED_16 instead
of HAVE_LOCAL_ALIGNED_32.
author | al |
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date | Sun, 28 Sep 2014 18:38:41 +0000 |
parents | 0f1b5b68af32 |
children |
rev | line source |
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22974 | 1 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/glint_regs.h,v 1.31 2001/12/08 16:01:52 alanh Exp $ */ |
2 | |
3 /* | |
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4 * glint register file |
22974 | 5 * |
6 * Copyright by Stefan Dirsch, Dirk Hohndel, Alan Hourihane | |
7 * Authors: Alan Hourihane, <alanh@fairlite.demon.co.uk> | |
8 * Dirk Hohndel, <hohndel@suse.de> | |
9 * Stefan Dirsch, <sndirsch@suse.de> | |
10 * Simon P., <sim@suse.de> | |
11 * | |
12 * this work is sponsored by S.u.S.E. GmbH, Fuerth, Elsa GmbH, Aachen and | |
13 * Siemens Nixdorf Informationssysteme | |
14 * | |
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15 */ |
22974 | 16 |
26030 | 17 #ifndef MPLAYER_GLINT_REGS_H |
18 #define MPLAYER_GLINT_REGS_H | |
22974 | 19 |
20 /********************************************** | |
21 * GLINT 500TX Configuration Region Registers * | |
22 ***********************************************/ | |
23 | |
24 /* Device Identification */ | |
25 #define CFGVendorId 0x0000 | |
26 #define PCI_VENDOR_3DLABS 0x3D3D | |
27 #define PCI_VENDOR_TI 0x104C | |
28 #define CFGDeviceId 0x0002 | |
29 | |
30 #define CFGRevisionId 0x08 | |
31 #define CFGClassCode 0x09 | |
32 #define CFGHeaderType 0x0E | |
33 | |
34 /* Device Control/Status */ | |
35 #define CFGCommand 0x04 | |
36 #define CFGStatus 0x06 | |
37 | |
38 /* Miscellaneous Functions */ | |
39 #define CFGBist 0x0f | |
40 #define CFGLatTimer 0x0d | |
41 #define CFGCacheLine 0x0c | |
42 #define CFGMaxLat 0x3f | |
43 #define CFGMinGrant 0x3e | |
44 #define CFGIntPin 0x3d | |
45 #define CFGIntLine 0x3c | |
46 | |
47 /* Base Adresses */ | |
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48 #define CFGBaseAddr0 0x10 |
22974 | 49 #define CFGBaseAddr1 0x14 |
50 #define CFGBaseAddr2 0x18 | |
51 #define CFGBaseAddr3 0x1C | |
52 #define CFGBaseAddr4 0x20 | |
53 #define CFGRomAddr 0x30 | |
54 | |
55 | |
56 | |
57 /********************************** | |
58 * GLINT 500TX Region 0 Registers * | |
59 **********************************/ | |
60 | |
61 /* Control Status Registers */ | |
62 #define ResetStatus 0x0000 | |
63 #define IntEnable 0x0008 | |
64 #define IntFlags 0x0010 | |
65 #define InFIFOSpace 0x0018 | |
66 #define OutFIFOWords 0x0020 | |
67 #define DMAAddress 0x0028 | |
68 #define DMACount 0x0030 | |
69 #define ErrorFlags 0x0038 | |
70 #define VClkCtl 0x0040 | |
71 #define TestRegister 0x0048 | |
72 #define Aperture0 0x0050 | |
73 #define Aperture1 0x0058 | |
74 #define DMAControl 0x0060 | |
75 #define FIFODis 0x0068 | |
76 | |
77 /* GLINT PerMedia Region 0 additional Registers */ | |
78 #define ChipConfig 0x0070 | |
79 #define SCLK_SEL_MASK (3 << 10) | |
80 #define SCLK_SEL_MCLK_HALF (3 << 10) | |
81 #define ByDMAControl 0x00D8 | |
82 | |
83 /* GLINT 500TX LocalBuffer Registers */ | |
84 #define LBMemoryCtl 0x1000 | |
85 #define LBNumBanksMask 0x00000001 | |
86 #define LBNumBanks1 (0) | |
87 #define LBNumBanks2 (1) | |
88 #define LBPageSizeMask 0x00000006 | |
89 #define LBPageSize256 (0<<1) | |
90 #define LBPageSize512 (1<<1) | |
91 #define LBPageSize1024 (2<<1) | |
92 #define LBPageSize2048 (3<<1) | |
93 #define LBRASCASLowMask 0x00000018 | |
94 #define LBRASCASLow2 (0<<3) | |
95 #define LBRASCASLow3 (1<<3) | |
96 #define LBRASCASLow4 (2<<3) | |
97 #define LBRASCASLow5 (3<<3) | |
98 #define LBRASPrechargeMask 0x00000060 | |
99 #define LBRASPrecharge2 (0<<5) | |
100 #define LBRASPrecharge3 (1<<5) | |
101 #define LBRASPrecharge4 (2<<5) | |
102 #define LBRASPrecharge5 (3<<5) | |
103 #define LBCASLowMask 0x00000180 | |
104 #define LBCASLow1 (0<<7) | |
105 #define LBCASLow2 (1<<7) | |
106 #define LBCASLow3 (2<<7) | |
107 #define LBCASLow4 (3<<7) | |
108 #define LBPageModeMask 0x00000200 | |
109 #define LBPageModeEnabled (0<<9) | |
110 #define LBPageModeDisabled (1<<9) | |
111 #define LBRefreshCountMask 0x0003fc00 | |
112 #define LBRefreshCountShift 10 | |
113 | |
114 #define LBMemoryEDO 0x1008 | |
115 #define LBEDOMask 0x00000001 | |
116 #define LBEDODisabled (0) | |
117 #define LBEDOEnabled (1) | |
118 #define LBEDOBankSizeMask 0x0000000e | |
119 #define LBEDOBankSizeDiabled (0<<1) | |
120 #define LBEDOBankSize256K (1<<1) | |
121 #define LBEDOBankSize512K (2<<1) | |
122 #define LBEDOBankSize1M (3<<1) | |
123 #define LBEDOBankSize2M (4<<1) | |
124 #define LBEDOBankSize4M (5<<1) | |
125 #define LBEDOBankSize8M (6<<1) | |
126 #define LBEDOBankSize16M (7<<1) | |
127 #define LBTwoPageDetectorMask 0x00000010 | |
128 #define LBSinglePageDetector (0<<4) | |
129 #define LBTwoPageDetector (1<<4) | |
130 | |
131 /* GLINT PerMedia Memory Control Registers */ | |
132 #define PMReboot 0x1000 | |
133 #define PMRomControl 0x1040 | |
134 #define PMBootAddress 0x1080 | |
135 #define PMMemConfig 0x10C0 | |
136 #define RowCharge8 1 << 10 | |
137 #define TimeRCD8 1 << 7 | |
138 #define TimeRC8 0x6 << 3 | |
139 #define TimeRP8 1 | |
140 #define CAS3Latency8 0 << 16 | |
141 #define BootAdress8 0x10 | |
142 #define NumberBanks8 0x3 << 29 | |
143 #define RefreshCount8 0x41 << 21 | |
144 #define TimeRASMin8 1 << 13 | |
145 #define DeadCycle8 1 << 17 | |
146 #define BankDelay8 0 << 18 | |
147 #define Burst1Cycle8 1 << 31 | |
148 #define SDRAM8 0 << 4 | |
149 | |
150 #define RowCharge6 1 << 10 | |
151 #define TimeRCD6 1 << 7 | |
152 #define TimeRC6 0x6 << 3 | |
153 #define TimeRP6 0x2 | |
154 #define CAS3Latency6 1 << 16 | |
155 #define BootAdress6 0x60 | |
156 #define NumberBanks6 0x2 << 29 | |
157 #define RefreshCount6 0x41 << 21 | |
158 #define TimeRASMin6 1 << 13 | |
159 #define DeadCycle6 1 << 17 | |
160 #define BankDelay6 0 << 18 | |
161 #define Burst1Cycle6 1 << 31 | |
162 #define SDRAM6 0 << 4 | |
163 | |
164 #define RowCharge4 0 << 10 | |
165 #define TimeRCD4 0 << 7 | |
166 #define TimeRC4 0x4 << 3 | |
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167 #define TimeRP4 1 |
22974 | 168 #define CAS3Latency4 0 << 16 |
169 #define BootAdress4 0x10 | |
170 #define NumberBanks4 1 << 29 | |
171 #define RefreshCount4 0x30 << 21 | |
172 #define TimeRASMin4 1 << 13 | |
173 #define DeadCycle4 0 << 17 | |
174 #define BankDelay4 0 << 18 | |
175 #define Burst1Cycle4 1 << 31 | |
176 #define SDRAM4 0 << 4 | |
177 | |
178 /* Permedia 2 Control */ | |
179 #define MemControl 0x1040 | |
180 | |
181 #define PMBypassWriteMask 0x1100 | |
182 #define PMFramebufferWriteMask 0x1140 | |
183 #define PMCount 0x1180 | |
184 | |
185 /* Framebuffer Registers */ | |
186 #define FBMemoryCtl 0x1800 | |
187 #define FBModeSel 0x1808 | |
188 #define FBGCWrMask 0x1810 | |
189 #define FBGCColorLower 0x1818 | |
190 #define FBTXMemCtl 0x1820 | |
191 #define FBWrMaskk 0x1830 | |
192 #define FBGCColorUpper 0x1838 | |
193 | |
194 /* Core FIFO */ | |
195 #define OutputFIFO 0x2000 | |
196 | |
197 /* 500TX Internal Video Registers */ | |
198 #define VTGHLimit 0x3000 | |
199 #define VTGHSyncStart 0x3008 | |
200 #define VTGHSyncEnd 0x3010 | |
201 #define VTGHBlankEnd 0x3018 | |
202 #define VTGVLimit 0x3020 | |
203 #define VTGVSyncStart 0x3028 | |
204 #define VTGVSyncEnd 0x3030 | |
205 #define VTGVBlankEnd 0x3038 | |
206 #define VTGHGateStart 0x3040 | |
207 #define VTGHGateEnd 0x3048 | |
208 #define VTGVGateStart 0x3050 | |
209 #define VTGVGateEnd 0x3058 | |
210 #define VTGPolarity 0x3060 | |
211 #define VTGFrameRowAddr 0x3068 | |
212 #define VTGVLineNumber 0x3070 | |
213 #define VTGSerialClk 0x3078 | |
214 #define VTGModeCtl 0x3080 | |
215 | |
216 /* Permedia Video Control Registers */ | |
217 #define PMScreenBase 0x3000 | |
218 #define PMScreenStride 0x3008 | |
219 #define PMHTotal 0x3010 | |
220 #define PMHgEnd 0x3018 | |
221 #define PMHbEnd 0x3020 | |
222 #define PMHsStart 0x3028 | |
223 #define PMHsEnd 0x3030 | |
224 #define PMVTotal 0x3038 | |
225 #define PMVbEnd 0x3040 | |
226 #define PMVsStart 0x3048 | |
227 #define PMVsEnd 0x3050 | |
228 #define PMVideoControl 0x3058 | |
229 #define PMInterruptLine 0x3060 | |
230 #define PMDDCData 0x3068 | |
231 #define DataIn (1<<0) | |
232 #define ClkIn (1<<1) | |
233 #define DataOut (1<<2) | |
234 #define ClkOut (1<<3) | |
235 #define PMLineCount 0x3070 | |
236 #define PMFifoControl 0x3078 | |
237 | |
238 /* Permedia 2 RAMDAC Registers */ | |
239 #define PM2DACWriteAddress 0x4000 | |
240 #define PM2DACIndexReg 0x4000 | |
241 #define PM2DACData 0x4008 | |
242 #define PM2DACReadMask 0x4010 | |
243 #define PM2DACReadAddress 0x4018 | |
244 #define PM2DACCursorColorAddress 0x4020 | |
245 #define PM2DACCursorColorData 0x4028 | |
246 #define PM2DACIndexData 0x4050 | |
247 #define PM2DACCursorData 0x4058 | |
248 #define PM2DACCursorXLsb 0x4060 | |
249 #define PM2DACCursorXMsb 0x4068 | |
250 #define PM2DACCursorYLsb 0x4070 | |
251 #define PM2DACCursorYMsb 0x4078 | |
252 #define PM2DACCursorControl 0x06 | |
253 #define PM2DACIndexCMR 0x18 | |
254 #define PM2DAC_TRUECOLOR 0x80 | |
255 #define PM2DAC_RGB 0x20 | |
256 #define PM2DAC_GRAPHICS 0x10 | |
257 #define PM2DAC_PACKED 0x09 | |
258 #define PM2DAC_8888 0x08 | |
259 #define PM2DAC_565 0x06 | |
260 #define PM2DAC_4444 0x05 | |
261 #define PM2DAC_5551 0x04 | |
262 #define PM2DAC_2321 0x03 | |
263 #define PM2DAC_2320 0x02 | |
264 #define PM2DAC_332 0x01 | |
265 #define PM2DAC_CI8 0x00 | |
266 #define PM2DACIndexMDCR 0x19 | |
267 #define PM2DACIndexPalettePage 0x1c | |
268 #define PM2DACIndexMCR 0x1e | |
269 #define PM2DACIndexClockAM 0x20 | |
270 #define PM2DACIndexClockAN 0x21 | |
271 #define PM2DACIndexClockAP 0x22 | |
272 #define PM2DACIndexClockBM 0x23 | |
273 #define PM2DACIndexClockBN 0x24 | |
274 #define PM2DACIndexClockBP 0x25 | |
275 #define PM2DACIndexClockCM 0x26 | |
276 #define PM2DACIndexClockCN 0x27 | |
277 #define PM2DACIndexClockCP 0x28 | |
278 #define PM2DACIndexClockStatus 0x29 | |
279 #define PM2DACIndexMemClockM 0x30 | |
280 #define PM2DACIndexMemClockN 0x31 | |
281 #define PM2DACIndexMemClockP 0x32 | |
282 #define PM2DACIndexMemClockStatus 0x33 | |
283 #define PM2DACIndexColorKeyControl 0x40 | |
284 #define PM2DACIndexColorKeyOverlay 0x41 | |
285 #define PM2DACIndexColorKeyRed 0x42 | |
286 #define PM2DACIndexColorKeyGreen 0x43 | |
287 #define PM2DACIndexColorKeyBlue 0x44 | |
288 | |
289 /* Permedia 2V extensions */ | |
290 #define PM2VDACRDMiscControl 0x000 | |
291 #define PM2VDACRDSyncControl 0x001 | |
292 #define PM2VDACRDDACControl 0x002 | |
293 #define PM2VDACRDPixelSize 0x003 | |
294 #define PM2VDACRDColorFormat 0x004 | |
295 #define PM2VDACRDCursorMode 0x005 | |
296 #define PM2VDACRDCursorXLow 0x007 | |
297 #define PM2VDACRDCursorXHigh 0x008 | |
298 #define PM2VDACRDCursorYLow 0x009 | |
299 #define PM2VDACRDCursorYHigh 0x00A | |
300 #define PM2VDACRDCursorHotSpotX 0x00B | |
301 #define PM2VDACRDCursorHotSpotY 0x00C | |
302 #define PM2VDACRDOverlayKey 0x00D | |
303 #define PM2VDACRDPan 0x00E | |
304 #define PM2VDACRDSense 0x00F | |
305 #define PM2VDACRDCheckControl 0x018 | |
306 #define PM2VDACIndexClockControl 0x200 | |
307 #define PM2VDACRDDClk0PreScale 0x201 | |
308 #define PM2VDACRDDClk0FeedbackScale 0x202 | |
309 #define PM2VDACRDDClk0PostScale 0x203 | |
310 #define PM2VDACRDDClk1PreScale 0x204 | |
311 #define PM2VDACRDDClk1FeedbackScale 0x205 | |
312 #define PM2VDACRDDClk1PostScale 0x206 | |
313 #define PM2VDACRDMClkControl 0x20D | |
314 #define PM2VDACRDMClkPreScale 0x20E | |
315 #define PM2VDACRDMClkFeedbackScale 0x20F | |
316 #define PM2VDACRDMClkPostScale 0x210 | |
317 #define PM2VDACRDCursorPalette 0x303 | |
318 #define PM2VDACRDCursorPattern 0x400 | |
319 #define PM2VDACIndexRegLow 0x4020 | |
320 #define PM2VDACIndexRegHigh 0x4028 | |
321 #define PM2VDACIndexData 0x4030 | |
322 #define PM2VDACRDIndexControl 0x4038 | |
323 | |
324 /* Permedia 2 Video Streams Unit Registers */ | |
325 #define VSBIntFlag (1<<8) | |
326 #define VSAIntFlag (1<<9) | |
327 | |
328 #define VSConfiguration 0x5800 | |
329 #define VS_UnitMode_ROM 0 | |
330 #define VS_UnitMode_AB8 3 | |
331 #define VS_UnitMode_Mask 7 | |
332 #define VS_GPBusMode_A (1<<3) | |
333 #define VS_HRefPolarityA (1<<9) | |
334 #define VS_VRefPolarityA (1<<10) | |
335 #define VS_VActivePolarityA (1<<11) | |
336 #define VS_UseFieldA (1<<12) | |
337 #define VS_FieldPolarityA (1<<13) | |
338 #define VS_FieldEdgeA (1<<14) | |
339 #define VS_VActiveVBIA (1<<15) | |
340 #define VS_InterlaceA (1<<16) | |
341 #define VS_ReverseDataA (1<<17) | |
342 #define VS_HRefPolarityB (1<<18) | |
343 #define VS_VRefPolarityB (1<<19) | |
344 #define VS_VActivePolarityB (1<<20) | |
345 #define VS_UseFieldB (1<<21) | |
346 #define VS_FieldPolarityB (1<<22) | |
347 #define VS_FieldEdgeB (1<<23) | |
348 #define VS_VActiveVBIB (1<<24) | |
349 #define VS_InterlaceB (1<<25) | |
350 #define VS_ColorSpaceB_RGB (1<<26) | |
351 #define VS_ReverseDataB (1<<27) | |
352 #define VS_DoubleEdgeB (1<<28) | |
353 | |
354 #define VSStatus 0x5808 | |
355 #define VS_FieldOne0A (1<<9) | |
356 #define VS_FieldOne1A (1<<10) | |
357 #define VS_FieldOne2A (1<<11) | |
358 #define VS_InvalidInterlaceA (1<<12) | |
359 #define VS_FieldOne0B (1<<17) | |
360 #define VS_FieldOne1B (1<<18) | |
361 #define VS_FieldOne2B (1<<19) | |
362 #define VS_InvalidInterlaceB (1<<20) | |
363 | |
364 #define VSSerialBusControl 0x5810 | |
365 | |
366 #define VSABase 0x5900 | |
367 #define VSA_Video (1<<0) | |
368 #define VSA_VBI (1<<1) | |
369 #define VSA_BufferCtl (1<<2) | |
370 #define VSA_MirrorX (1<<7) | |
371 #define VSA_MirrorY (1<<8) | |
372 #define VSA_Discard_None (0<<9) | |
373 #define VSA_Discard_FieldOne (1<<9) | |
374 #define VSA_Discard_FieldTwo (2<<9) | |
375 #define VSA_CombineFields (1<<11) | |
376 #define VSA_LockToStreamB (1<<12) | |
377 #define VSBBase 0x5A00 | |
378 #define VSB_Video (1<<0) | |
379 #define VSB_VBI (1<<1) | |
380 #define VSB_BufferCtl (1<<2) | |
381 #define VSB_CombineFields (1<<3) | |
382 #define VSB_RGBOrder (1<<11) | |
383 #define VSB_GammaCorrect (1<<12) | |
384 #define VSB_LockToStreamA (1<<13) | |
385 | |
386 #define VSControl 0x0000 | |
387 #define VSInterrupt 0x0008 | |
388 #define VSCurrentLine 0x0010 | |
389 #define VSVideoAddressHost 0x0018 | |
390 #define VSVideoAddressIndex 0x0020 | |
391 #define VSVideoAddress0 0x0028 | |
392 #define VSVideoAddress1 0x0030 | |
393 #define VSVideoAddress2 0x0038 | |
394 #define VSVideoStride 0x0040 | |
395 #define VSVideoStartLine 0x0048 | |
396 #define VSVideoEndLine 0x0050 | |
397 #define VSVideoStartData 0x0058 | |
398 #define VSVideoEndData 0x0060 | |
399 #define VSVBIAddressHost 0x0068 | |
400 #define VSVBIAddressIndex 0x0070 | |
401 #define VSVBIAddress0 0x0078 | |
402 #define VSVBIAddress1 0x0080 | |
403 #define VSVBIAddress2 0x0088 | |
404 #define VSVBIStride 0x0090 | |
405 #define VSVBIStartLine 0x0098 | |
406 #define VSVBIEndLine 0x00A0 | |
407 #define VSVBIStartData 0x00A8 | |
408 #define VSVBIEndData 0x00B0 | |
409 #define VSFifoControl 0x00B8 | |
410 | |
411 /********************************** | |
412 * GLINT Delta Region 0 Registers * | |
413 **********************************/ | |
414 | |
415 /* Control Status Registers */ | |
416 #define DResetStatus 0x0800 | |
417 #define DIntEnable 0x0808 | |
418 #define DIntFlags 0x0810 | |
419 #define DErrorFlags 0x0838 | |
420 #define DTestRegister 0x0848 | |
421 #define DFIFODis 0x0868 | |
422 | |
423 | |
424 | |
425 /********************************** | |
426 * GLINT Gamma Region 0 Registers * | |
427 **********************************/ | |
428 | |
429 /* Control Status Registers */ | |
430 #define GInFIFOSpace 0x0018 | |
431 #define GDMAAddress 0x0028 | |
432 #define GDMACount 0x0030 | |
433 #define GDMAControl 0x0060 | |
434 #define GOutDMA 0x0080 | |
435 #define GOutDMACount 0x0088 | |
436 #define GResetStatus 0x0800 | |
437 #define GIntEnable 0x0808 | |
438 #define GIntFlags 0x0810 | |
439 #define GErrorFlags 0x0838 | |
440 #define GTestRegister 0x0848 | |
441 #define GFIFODis 0x0868 | |
442 | |
443 #define GChipConfig 0x0870 | |
444 #define GChipAGPCapable 1 << 0 | |
445 #define GChipAGPSideband 1 << 1 | |
446 #define GChipMultiGLINTApMask 3 << 19 | |
447 #define GChipMultiGLINTAp_0M 0 << 19 | |
448 #define GChipMultiGLINTAp_16M 1 << 19 | |
449 #define GChipMultiGLINTAp_32M 2 << 19 | |
450 #define GChipMultiGLINTAp_64M 3 << 19 | |
451 | |
452 #define GCSRAperture 0x0878 | |
453 #define GCSRSecondaryGLINTMapEn 1 << 0 | |
454 | |
455 #define GPageTableAddr 0x0c00 | |
456 #define GPageTableLength 0x0c08 | |
457 #define GDelayTimer 0x0c38 | |
458 #define GCommandMode 0x0c40 | |
459 #define GCommandIntEnable 0x0c48 | |
460 #define GCommandIntFlags 0x0c50 | |
461 #define GCommandErrorFlags 0x0c58 | |
462 #define GCommandStatus 0x0c60 | |
463 #define GCommandFaultingAddr 0x0c68 | |
464 #define GVertexFaultingAddr 0x0c70 | |
465 #define GWriteFaultingAddr 0x0c88 | |
466 #define GFeedbackSelectCount 0x0c98 | |
467 #define GGammaProcessorMode 0x0cb8 | |
468 #define GVGAShadow 0x0d00 | |
469 #define GMultGLINTAperture 0x0d08 | |
470 #define GMultGLINT1 0x0d10 | |
471 #define GMultGLINT2 0x0d18 | |
472 | |
473 /************************ | |
474 * GLINT Core Registers * | |
475 ************************/ | |
476 | |
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477 #define GLINT_TAG(major,offset) (((major) << 7) | ((offset) << 3)) |
22974 | 478 #define GLINT_TAG_ADDR(major,offset) (0x8000 | GLINT_TAG((major),(offset))) |
479 | |
480 #define UNIT_DISABLE 0 | |
481 #define UNIT_ENABLE 1 | |
482 | |
483 #define StartXDom GLINT_TAG_ADDR(0x00,0x00) | |
484 #define dXDom GLINT_TAG_ADDR(0x00,0x01) | |
485 #define StartXSub GLINT_TAG_ADDR(0x00,0x02) | |
486 #define dXSub GLINT_TAG_ADDR(0x00,0x03) | |
487 #define StartY GLINT_TAG_ADDR(0x00,0x04) | |
488 #define dY GLINT_TAG_ADDR(0x00,0x05) | |
489 #define GLINTCount GLINT_TAG_ADDR(0x00,0x06) | |
490 #define Render GLINT_TAG_ADDR(0x00,0x07) | |
491 #define AreaStippleEnable 0x00001 | |
492 #define LineStippleEnable 0x00002 | |
493 #define ResetLineStipple 0x00004 | |
494 #define FastFillEnable 0x00008 | |
495 #define PrimitiveLine 0 | |
496 #define PrimitiveTrapezoid 0x00040 | |
497 #define PrimitivePoint 0x00080 | |
498 #define PrimitiveRectangle 0x000C0 | |
499 #define AntialiasEnable 0x00100 | |
500 #define AntialiasingQuality 0x00200 | |
501 #define UsePointTable 0x00400 | |
502 #define SyncOnBitMask 0x00800 | |
503 #define SyncOnHostData 0x01000 | |
504 #define TextureEnable 0x02000 | |
505 #define FogEnable 0x04000 | |
506 #define CoverageEnable 0x08000 | |
507 #define SubPixelCorrectionEnable 0x10000 | |
508 #define SpanOperation 0x40000 | |
509 #define XPositive 1<<21 | |
510 #define YPositive 1<<22 | |
511 | |
512 | |
513 #define ContinueNewLine GLINT_TAG_ADDR(0x00,0x08) | |
514 #define ContinueNewDom GLINT_TAG_ADDR(0x00,0x09) | |
515 #define ContinueNewSub GLINT_TAG_ADDR(0x00,0x0a) | |
516 #define Continue GLINT_TAG_ADDR(0x00,0x0b) | |
517 #define FlushSpan GLINT_TAG_ADDR(0x00,0x0c) | |
518 #define BitMaskPattern GLINT_TAG_ADDR(0x00,0x0d) | |
519 | |
520 #define PointTable0 GLINT_TAG_ADDR(0x01,0x00) | |
521 #define PointTable1 GLINT_TAG_ADDR(0x01,0x01) | |
522 #define PointTable2 GLINT_TAG_ADDR(0x01,0x02) | |
523 #define PointTable3 GLINT_TAG_ADDR(0x01,0x03) | |
524 #define RasterizerMode GLINT_TAG_ADDR(0x01,0x04) | |
525 #define RMMultiGLINT 1<<17 | |
526 #define BitMaskPackingEachScanline 1<<9 | |
527 #define ForceBackgroundColor 1<<6 | |
528 #define InvertBitMask 1<<1 | |
529 #define YLimits GLINT_TAG_ADDR(0x01,0x05) | |
530 #define ScanLineOwnership GLINT_TAG_ADDR(0x01,0x06) | |
531 #define WaitForCompletion GLINT_TAG_ADDR(0x01,0x07) | |
532 #define PixelSize GLINT_TAG_ADDR(0x01,0x08) | |
533 #define XLimits GLINT_TAG_ADDR(0x01,0x09) /* PM only */ | |
534 | |
535 #define RectangleOrigin GLINT_TAG_ADDR(0x01,0x0A) /* PM2 only */ | |
536 #define RectangleSize GLINT_TAG_ADDR(0x01,0x0B) /* PM2 only */ | |
537 | |
538 #define PackedDataLimits GLINT_TAG_ADDR(0x02,0x0a) /* PM only */ | |
539 | |
540 #define ScissorMode GLINT_TAG_ADDR(0x03,0x00) | |
541 #define SCI_USER 0x01 | |
542 #define SCI_SCREEN 0x02 | |
543 #define SCI_USERANDSCREEN 0x03 | |
544 | |
545 #define ScissorMinXY GLINT_TAG_ADDR(0x03,0x01) | |
546 #define ScissorMaxXY GLINT_TAG_ADDR(0x03,0x02) | |
547 #define ScreenSize GLINT_TAG_ADDR(0x03,0x03) | |
548 #define AreaStippleMode GLINT_TAG_ADDR(0x03,0x04) | |
549 /* 0: */ | |
550 /* NoMirrorY */ | |
551 /* NoMirrorX */ | |
552 /* NoInvertPattern */ | |
553 /* YAddress_1bit */ | |
554 /* XAddress_1bit */ | |
555 /* UNIT_DISABLE */ | |
556 | |
557 #define ASM_XAddress_2bit 1 << 1 | |
558 #define ASM_XAddress_3bit 2 << 1 | |
559 #define ASM_XAddress_4bit 3 << 1 | |
560 #define ASM_XAddress_5bit 4 << 1 | |
561 #define ASM_YAddress_2bit 1 << 4 | |
562 #define ASM_YAddress_3bit 2 << 4 | |
563 #define ASM_YAddress_4bit 3 << 4 | |
564 #define ASM_YAddress_5bit 4 << 4 | |
565 #define ASM_InvertPattern 1 << 17 | |
566 #define ASM_MirrorX 1 << 18 | |
567 #define ASM_MirrorY 1 << 19 | |
568 | |
569 #define LineStippleMode GLINT_TAG_ADDR(0x03,0x05) | |
570 #define LoadLineStippleCounters GLINT_TAG_ADDR(0x03,0x06) | |
571 #define UpdateLineStippleCounters GLINT_TAG_ADDR(0x03,0x07) | |
572 #define SaveLineStippleState GLINT_TAG_ADDR(0x03,0x08) | |
573 #define WindowOrigin GLINT_TAG_ADDR(0x03,0x09) | |
574 | |
575 #define AreaStipplePattern0 GLINT_TAG_ADDR(0x04,0x00) | |
576 #define AreaStipplePattern1 GLINT_TAG_ADDR(0x04,0x01) | |
577 #define AreaStipplePattern2 GLINT_TAG_ADDR(0x04,0x02) | |
578 #define AreaStipplePattern3 GLINT_TAG_ADDR(0x04,0x03) | |
579 #define AreaStipplePattern4 GLINT_TAG_ADDR(0x04,0x04) | |
580 #define AreaStipplePattern5 GLINT_TAG_ADDR(0x04,0x05) | |
581 #define AreaStipplePattern6 GLINT_TAG_ADDR(0x04,0x06) | |
582 #define AreaStipplePattern7 GLINT_TAG_ADDR(0x04,0x07) | |
583 | |
584 #define TextureAddressMode GLINT_TAG_ADDR(0x07,0x00) | |
585 #define SStart GLINT_TAG_ADDR(0x07,0x01) | |
586 #define dSdx GLINT_TAG_ADDR(0x07,0x02) | |
587 #define dSdyDom GLINT_TAG_ADDR(0x07,0x03) | |
588 #define TStart GLINT_TAG_ADDR(0x07,0x04) | |
589 #define dTdx GLINT_TAG_ADDR(0x07,0x05) | |
590 #define dTdyDom GLINT_TAG_ADDR(0x07,0x06) | |
591 #define QStart GLINT_TAG_ADDR(0x07,0x07) | |
592 #define dQdx GLINT_TAG_ADDR(0x07,0x08) | |
593 #define dQdyDom GLINT_TAG_ADDR(0x07,0x09) | |
594 #define LOD GLINT_TAG_ADDR(0x07,0x0A) | |
595 #define dSdy GLINT_TAG_ADDR(0x07,0x0B) | |
596 #define dTdy GLINT_TAG_ADDR(0x07,0x0C) | |
597 #define dQdy GLINT_TAG_ADDR(0x07,0x0D) | |
598 | |
599 #define TextureReadMode GLINT_TAG_ADDR(0x09,0x00) | |
600 #define TextureFormat GLINT_TAG_ADDR(0x09,0x01) | |
601 #define Texture_4_Components 3 << 3 | |
602 #define Texture_Texel 0 | |
603 | |
604 #define TextureCacheControl GLINT_TAG_ADDR(0x09,0x02) | |
605 #define TextureCacheControlEnable 2 | |
606 #define TextureCacheControlInvalidate 1 | |
607 | |
608 #define GLINTBorderColor GLINT_TAG_ADDR(0x09,0x05) | |
609 | |
610 #define TexelLUTIndex GLINT_TAG_ADDR(0x09,0x08) | |
611 #define TexelLUTData GLINT_TAG_ADDR(0x09,0x09) | |
612 #define TexelLUTAddress GLINT_TAG_ADDR(0x09,0x0A) | |
613 #define TexelLUTTransfer GLINT_TAG_ADDR(0x09,0x0B) | |
614 #define TextureFilterMode GLINT_TAG_ADDR(0x09,0x0C) | |
615 #define TextureChromaUpper GLINT_TAG_ADDR(0x09,0x0D) | |
616 #define TextureChromaLower GLINT_TAG_ADDR(0x09,0x0E) | |
617 | |
618 #define TxBaseAddr0 GLINT_TAG_ADDR(0x0A,0x00) | |
619 #define TxBaseAddr1 GLINT_TAG_ADDR(0x0A,0x01) | |
620 #define TxBaseAddr2 GLINT_TAG_ADDR(0x0A,0x02) | |
621 #define TxBaseAddr3 GLINT_TAG_ADDR(0x0A,0x03) | |
622 #define TxBaseAddr4 GLINT_TAG_ADDR(0x0A,0x04) | |
623 #define TxBaseAddr5 GLINT_TAG_ADDR(0x0A,0x05) | |
624 #define TxBaseAddr6 GLINT_TAG_ADDR(0x0A,0x06) | |
625 #define TxBaseAddr7 GLINT_TAG_ADDR(0x0A,0x07) | |
626 #define TxBaseAddr8 GLINT_TAG_ADDR(0x0A,0x08) | |
627 #define TxBaseAddr9 GLINT_TAG_ADDR(0x0A,0x09) | |
628 #define TxBaseAddr10 GLINT_TAG_ADDR(0x0A,0x0A) | |
629 #define TxBaseAddr11 GLINT_TAG_ADDR(0x0A,0x0B) | |
630 | |
631 #define PMTextureBaseAddress GLINT_TAG_ADDR(0x0b,0x00) | |
632 #define PMTextureMapFormat GLINT_TAG_ADDR(0x0b,0x01) | |
633 #define PMTextureDataFormat GLINT_TAG_ADDR(0x0b,0x02) | |
634 | |
635 #define Texel0 GLINT_TAG_ADDR(0x0c,0x00) | |
636 #define Texel1 GLINT_TAG_ADDR(0x0c,0x01) | |
637 #define Texel2 GLINT_TAG_ADDR(0x0c,0x02) | |
638 #define Texel3 GLINT_TAG_ADDR(0x0c,0x03) | |
639 #define Texel4 GLINT_TAG_ADDR(0x0c,0x04) | |
640 #define Texel5 GLINT_TAG_ADDR(0x0c,0x05) | |
641 #define Texel6 GLINT_TAG_ADDR(0x0c,0x06) | |
642 #define Texel7 GLINT_TAG_ADDR(0x0c,0x07) | |
643 #define Interp0 GLINT_TAG_ADDR(0x0c,0x08) | |
644 #define Interp1 GLINT_TAG_ADDR(0x0c,0x09) | |
645 #define Interp2 GLINT_TAG_ADDR(0x0c,0x0a) | |
646 #define Interp3 GLINT_TAG_ADDR(0x0c,0x0b) | |
647 #define Interp4 GLINT_TAG_ADDR(0x0c,0x0c) | |
648 #define TextureFilter GLINT_TAG_ADDR(0x0c,0x0d) | |
649 #define PMTextureReadMode GLINT_TAG_ADDR(0x0c,0x0e) | |
650 #define TexelLUTMode GLINT_TAG_ADDR(0x0c,0x0f) | |
651 | |
652 #define TextureColorMode GLINT_TAG_ADDR(0x0d,0x00) | |
653 #define TextureTypeOpenGL 0 | |
654 #define TextureTypeApple 1 << 4 | |
655 #define TextureKsDDA 1 << 5 /* only Apple-Mode */ | |
656 #define TextureKdDDA 1 << 6 /* only Apple-Mode */ | |
657 | |
658 #define TextureEnvColor GLINT_TAG_ADDR(0x0d,0x01) | |
659 #define FogMode GLINT_TAG_ADDR(0x0d,0x02) | |
660 /* 0: */ | |
661 /* FOG RGBA */ | |
662 /* UNIT_DISABLE */ | |
663 | |
664 #define FOG_CI 0x0002 | |
665 | |
666 #define FogColor GLINT_TAG_ADDR(0x0d,0x03) | |
667 #define FStart GLINT_TAG_ADDR(0x0d,0x04) | |
668 #define dFdx GLINT_TAG_ADDR(0x0d,0x05) | |
669 #define dFdyDom GLINT_TAG_ADDR(0x0d,0x06) | |
670 #define KsStart GLINT_TAG_ADDR(0x0d,0x09) | |
671 #define dKsdx GLINT_TAG_ADDR(0x0d,0x0a) | |
672 #define dKsdyDom GLINT_TAG_ADDR(0x0d,0x0b) | |
673 #define KdStart GLINT_TAG_ADDR(0x0d,0x0c) | |
674 #define dKdStart GLINT_TAG_ADDR(0x0d,0x0d) | |
675 #define dKddyDom GLINT_TAG_ADDR(0x0d,0x0e) | |
676 | |
677 #define RStart GLINT_TAG_ADDR(0x0f,0x00) | |
678 #define dRdx GLINT_TAG_ADDR(0x0f,0x01) | |
679 #define dRdyDom GLINT_TAG_ADDR(0x0f,0x02) | |
680 #define GStart GLINT_TAG_ADDR(0x0f,0x03) | |
681 #define dGdx GLINT_TAG_ADDR(0x0f,0x04) | |
682 #define dGdyDom GLINT_TAG_ADDR(0x0f,0x05) | |
683 #define BStart GLINT_TAG_ADDR(0x0f,0x06) | |
684 #define dBdx GLINT_TAG_ADDR(0x0f,0x07) | |
685 #define dBdyDom GLINT_TAG_ADDR(0x0f,0x08) | |
686 #define AStart GLINT_TAG_ADDR(0x0f,0x09) | |
687 #define dAdx GLINT_TAG_ADDR(0x0f,0x0a) | |
688 #define dAdyDom GLINT_TAG_ADDR(0x0f,0x0b) | |
689 #define ColorDDAMode GLINT_TAG_ADDR(0x0f,0x0c) | |
690 /* 0: */ | |
691 #define CDDA_FlatShading 0 | |
692 /* UNIT_DISABLE */ | |
693 #define CDDA_GouraudShading 0x0002 | |
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694 |
22974 | 695 |
696 #define ConstantColor GLINT_TAG_ADDR(0x0f,0x0d) | |
697 #define GLINTColor GLINT_TAG_ADDR(0x0f,0x0e) | |
698 #define AlphaTestMode GLINT_TAG_ADDR(0x10,0x00) | |
699 #define AntialiasMode GLINT_TAG_ADDR(0x10,0x01) | |
700 #define AlphaBlendMode GLINT_TAG_ADDR(0x10,0x02) | |
701 /* 0: */ | |
702 /* SrcZERO */ | |
703 /* DstZERO */ | |
704 /* ColorFormat8888 */ | |
705 /* AlphaBuffer present */ | |
706 /* ColorOrderBGR */ | |
707 /* TypeOpenGL */ | |
708 /* DstFBData */ | |
709 /* UNIT_DISABLE */ | |
710 | |
711 #define ABM_SrcONE 1 << 1 | |
712 #define ABM_SrcDST_COLOR 2 << 1 | |
713 #define ABM_SrcONE_MINUS_DST_COLOR 3 << 1 | |
714 #define ABM_SrcSRC_ALPHA 4 << 1 | |
715 #define ABM_SrcONE_MINUS_SRC_ALPHA 5 << 1 | |
716 #define ABM_SrcDST_ALPHA 6 << 1 | |
717 #define ABM_SrcONE_MINUS_DST_ALPHA 7 << 1 | |
718 #define ABM_SrcSRC_ALPHA_SATURATE 8 << 1 | |
719 #define ABM_DstONE 1 << 5 | |
720 #define ABM_DstSRC_COLOR 2 << 5 | |
721 #define ABM_DstONE_MINUS_SRC_COLOR 3 << 5 | |
722 #define ABM_DstSRC_ALPHA 4 << 5 | |
723 #define ABM_DstONE_MINUS_SRC_ALPHA 5 << 5 | |
724 #define ABM_DstDST_ALPHA 6 << 5 | |
725 #define ABM_DstONE_MINUS_DST_ALPHA 7 << 5 | |
726 #define ABM_ColorFormat5555 1 << 8 | |
727 #define ABM_ColorFormat4444 2 << 8 | |
728 #define ABM_ColorFormat4444_Front 3 << 8 | |
729 #define ABM_ColorFormat4444_Back 4 << 8 | |
730 #define ABM_ColorFormat332_Front 5 << 8 | |
731 #define ABM_ColorFormat332_Back 6 << 8 | |
732 #define ABM_ColorFormat121_Front 7 << 8 | |
733 #define ABM_ColorFormat121_Back 8 << 8 | |
734 #define ABM_ColorFormat555_Back 13 << 8 | |
735 #define ABM_ColorFormat_CI8 14 << 8 | |
736 #define ABM_ColorFormat_CI4 15 << 8 | |
737 #define ABM_NoAlphaBuffer 0x1000 | |
738 #define ABM_ColorOrderRGB 0x2000 | |
739 #define ABM_TypeQuickDraw3D 0x4000 | |
740 #define ABM_DstFBSourceData 0x8000 | |
741 | |
742 #define DitherMode GLINT_TAG_ADDR(0x10,0x03) | |
743 /* 0: */ | |
744 /* ColorOrder BGR */ | |
745 /* AlphaDitherDefault */ | |
746 /* ColorFormat8888 */ | |
747 /* TruncateMode */ | |
748 /* DitherDisable */ | |
749 /* UNIT_DISABLE */ | |
750 | |
751 #define DTM_DitherEnable 1 << 1 | |
752 #define DTM_ColorFormat5555 1 << 2 | |
753 #define DTM_ColorFormat4444 2 << 2 | |
754 #define DTM_ColorFormat4444_Front 3 << 2 | |
755 #define DTM_ColorFormat4444_Back 4 << 2 | |
756 #define DTM_ColorFormat332_Front 5 << 2 | |
757 #define DTM_ColorFormat332_Back 6 << 2 | |
758 #define DTM_ColorFormat121_Front 7 << 2 | |
759 #define DTM_ColorFormat121_Back 8 << 2 | |
760 #define DTM_ColorFormat555_Back 13 << 2 | |
761 #define DTM_ColorFormat_CI8 14 << 2 | |
762 #define DTM_ColorFormat_CI4 15 << 2 | |
763 #define DTM_ColorOrderRGB 1 << 10 | |
764 #define DTM_NoAlphaDither 1 << 14 | |
765 #define DTM_RoundMode 1 << 15 | |
766 | |
767 #define FBSoftwareWriteMask GLINT_TAG_ADDR(0x10,0x04) | |
768 #define LogicalOpMode GLINT_TAG_ADDR(0x10,0x05) | |
769 #define Use_ConstantFBWriteData 0x40 | |
770 | |
771 | |
772 #define FBWriteData GLINT_TAG_ADDR(0x10,0x06) | |
773 #define RouterMode GLINT_TAG_ADDR(0x10,0x08) | |
774 #define ROUTER_Depth_Texture 1 | |
775 #define ROUTER_Texture_Depth 0 | |
776 | |
777 | |
778 #define LBReadMode GLINT_TAG_ADDR(0x11,0x00) | |
779 /* 0: */ | |
780 /* SrcNoRead */ | |
781 /* DstNoRead */ | |
782 /* DataLBDefault */ | |
783 /* WinTopLeft */ | |
784 /* NoPatch */ | |
785 /* ScanlineInterval1 */ | |
786 | |
787 #define LBRM_SrcEnable 1 << 9 | |
788 #define LBRM_DstEnable 1 << 10 | |
789 #define LBRM_DataLBStencil 1 << 16 | |
790 #define LBRM_DataLBDepth 2 << 16 | |
791 #define LBRM_WinBottomLeft 1 << 18 | |
792 #define LBRM_DoPatch 1 << 19 | |
793 | |
794 #define LBRM_ScanlineInt2 1 << 20 | |
795 #define LBRM_ScanlineInt4 2 << 20 | |
796 #define LBRM_ScanlineInt8 3 << 20 | |
797 | |
798 | |
799 #define LBReadFormat GLINT_TAG_ADDR(0x11,0x01) | |
800 #define LBRF_DepthWidth15 0x03 /* only permedia */ | |
801 #define LBRF_DepthWidth16 0x00 | |
802 #define LBRF_DepthWidth24 0x01 | |
803 #define LBRF_DepthWidth32 0x02 | |
804 | |
805 #define LBRF_StencilWidth0 (0 << 2) | |
806 #define LBRF_StencilWidth4 (1 << 2) | |
807 #define LBRF_StencilWidth8 (2 << 2) | |
808 | |
809 #define LBRF_StencilPos16 (0 << 4) | |
810 #define LBRF_StencilPos20 (1 << 4) | |
811 #define LBRF_StencilPos24 (2 << 4) | |
812 #define LBRF_StencilPos28 (3 << 4) | |
813 #define LBRF_StencilPos32 (4 << 4) | |
814 | |
815 #define LBRF_FrameCount0 (0 << 7) | |
816 #define LBRF_FrameCount4 (1 << 7) | |
817 #define LBRF_FrameCount8 (2 << 7) | |
818 | |
819 #define LBRF_FrameCountPos16 (0 << 9) | |
820 #define LBRF_FrameCountPos20 (1 << 9) | |
821 #define LBRF_FrameCountPos24 (2 << 9) | |
822 #define LBRF_FrameCountPos28 (3 << 9) | |
823 #define LBRF_FrameCountPos32 (4 << 9) | |
824 #define LBRF_FrameCountPos36 (5 << 9) | |
825 #define LBRF_FrameCountPos40 (6 << 9) | |
826 | |
827 #define LBRF_GIDWidth0 (0 << 12) | |
828 #define LBRF_GIDWidth4 (1 << 12) | |
829 | |
830 #define LBRF_GIDPos16 (0 << 13) | |
831 #define LBRF_GIDPos20 (1 << 13) | |
832 #define LBRF_GIDPos24 (2 << 13) | |
833 #define LBRF_GIDPos28 (3 << 13) | |
834 #define LBRF_GIDPos32 (4 << 13) | |
835 #define LBRF_GIDPos36 (5 << 13) | |
836 #define LBRF_GIDPos40 (6 << 13) | |
837 #define LBRF_GIDPos44 (7 << 13) | |
838 #define LBRF_GIDPos48 (8 << 13) | |
839 | |
840 #define LBRF_Compact32 (1 << 17) | |
841 | |
842 | |
843 | |
844 #define LBSourceOffset GLINT_TAG_ADDR(0x11,0x02) | |
845 #define LBStencil GLINT_TAG_ADDR(0x11,0x05) | |
846 #define LBDepth GLINT_TAG_ADDR(0x11,0x06) | |
847 #define LBWindowBase GLINT_TAG_ADDR(0x11,0x07) | |
848 #define LBWriteMode GLINT_TAG_ADDR(0x11,0x08) | |
849 #define LBWM_WriteEnable 0x1 | |
850 #define LBWM_UpLoad_LBDepth 0x2 | |
851 #define LBWM_UpLoad_LBStencil 0x4 | |
852 | |
853 #define LBWriteFormat GLINT_TAG_ADDR(0x11,0x09) | |
854 | |
855 | |
856 #define TextureData GLINT_TAG_ADDR(0x11,0x0d) | |
857 #define TextureDownloadOffset GLINT_TAG_ADDR(0x11,0x0e) | |
858 #define LBWindowOffset GLINT_TAG_ADDR(0x11,0x0f) | |
859 | |
860 #define GLINTWindow GLINT_TAG_ADDR(0x13,0x00) | |
861 #define GWIN_UnitEnable (1 << 0) | |
862 #define GWIN_ForceLBUpdate (1 << 3) | |
863 #define GWIN_LBUpdateSourceREG (1 << 4) | |
864 #define GWIN_LBUpdateSourceLB (0 << 4) | |
865 #define GWIN_StencilFCP (1 << 17) | |
866 #define GWIN_DepthFCP (1 << 18) | |
867 #define GWIN_OverrideWriteFilter (1 << 19) | |
868 | |
869 /* ??? is this needed, set by permedia (2) modules */ | |
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870 #define GWIN_DisableLBUpdate 0x40000 |
22974 | 871 |
872 #define StencilMode GLINT_TAG_ADDR(0x13,0x01) | |
873 #define StencilData GLINT_TAG_ADDR(0x13,0x02) | |
874 #define GLINTStencil GLINT_TAG_ADDR(0x13,0x03) | |
875 #define DepthMode GLINT_TAG_ADDR(0x13,0x04) | |
876 /* 0: */ | |
877 /* WriteDisable */ | |
878 /* SrcCompFragment */ | |
879 /* CompFuncNEVER */ | |
880 /* UNIT_DISABLE */ | |
881 | |
882 #define DPM_WriteEnable 1 << 1 | |
883 #define DPM_SrcCompLBData 1 << 2 | |
884 #define DPM_SrcCompDregister 2 << 2 | |
885 #define DPM_SrcCompLBSourceData 3 << 2 | |
886 #define DPM_CompFuncLESS 1 << 4 | |
887 #define DPM_CompFuncEQUAL 2 << 4 | |
888 #define DPM_CompFuncLESS_OR_EQ 3 << 4 | |
889 #define DPM_CompFuncGREATER 4 << 4 | |
890 #define DPM_CompFuncNOT_EQ 5 << 4 | |
891 #define DPM_CompFuncGREATER_OR_EQ 6 << 4 | |
892 #define DPM_CompFuncALWAYS 7 << 4 | |
893 | |
894 #define GLINTDepth GLINT_TAG_ADDR(0x13,0x05) | |
895 #define ZStartU GLINT_TAG_ADDR(0x13,0x06) | |
896 #define ZStartL GLINT_TAG_ADDR(0x13,0x07) | |
897 #define dZdxU GLINT_TAG_ADDR(0x13,0x08) | |
898 #define dZdxL GLINT_TAG_ADDR(0x13,0x09) | |
899 #define dZdyDomU GLINT_TAG_ADDR(0x13,0x0a) | |
900 #define dZdyDomL GLINT_TAG_ADDR(0x13,0x0b) | |
901 #define FastClearDepth GLINT_TAG_ADDR(0x13,0x0c) | |
902 | |
903 #define FBReadMode GLINT_TAG_ADDR(0x15,0x00) | |
904 /* 0: */ | |
905 /* SrcNoRead */ | |
906 /* DstNoRead */ | |
907 /* DataFBDefault */ | |
908 /* WinTopLeft */ | |
909 /* ScanlineInterval1 */ | |
910 | |
911 #define FBRM_SrcEnable 1 << 9 | |
912 #define FBRM_DstEnable 1 << 10 | |
913 #define FBRM_DataFBColor 1 << 15 | |
914 #define FBRM_WinBottomLeft 1 << 16 | |
915 #define FBRM_Packed 1 << 19 | |
916 #define FBRM_ScanlineInt2 1 << 23 | |
917 #define FBRM_ScanlineInt4 2 << 23 | |
918 #define FBRM_ScanlineInt8 3 << 23 | |
919 | |
920 | |
921 #define FBSourceOffset GLINT_TAG_ADDR(0x15,0x01) | |
922 #define FBPixelOffset GLINT_TAG_ADDR(0x15,0x02) | |
923 #define FBColor GLINT_TAG_ADDR(0x15,0x03) | |
924 #define FBData GLINT_TAG_ADDR(0x15,0x04) | |
925 #define FBSourceData GLINT_TAG_ADDR(0x15,0x05) | |
926 | |
927 #define FBWindowBase GLINT_TAG_ADDR(0x15,0x06) | |
928 #define FBWriteMode GLINT_TAG_ADDR(0x15,0x07) | |
929 /* 0: */ | |
930 /* FBWM_NoColorUpload */ | |
931 /* FBWM_WriteDisable */ | |
932 #define FBWM_WriteEnable 1 | |
933 #define FBWM_UploadColor 1 << 3 | |
934 /* Permedia3 extensions */ | |
935 #define FBWM_Enable0 1 << 12 | |
936 | |
937 #define FBHardwareWriteMask GLINT_TAG_ADDR(0x15,0x08) | |
938 #define FBBlockColor GLINT_TAG_ADDR(0x15,0x09) | |
939 #define FBReadPixel GLINT_TAG_ADDR(0x15,0x0a) /* PM */ | |
940 #define PatternRamMode GLINT_TAG_ADDR(0x15,0x0f) | |
941 | |
942 #define PatternRamData0 GLINT_TAG_ADDR(0x16,0x00) | |
943 #define PatternRamData1 GLINT_TAG_ADDR(0x16,0x01) | |
944 #define PatternRamData2 GLINT_TAG_ADDR(0x16,0x02) | |
945 #define PatternRamData3 GLINT_TAG_ADDR(0x16,0x03) | |
946 #define PatternRamData4 GLINT_TAG_ADDR(0x16,0x04) | |
947 #define PatternRamData5 GLINT_TAG_ADDR(0x16,0x05) | |
948 #define PatternRamData6 GLINT_TAG_ADDR(0x16,0x06) | |
949 #define PatternRamData7 GLINT_TAG_ADDR(0x16,0x07) | |
950 | |
951 #define FilterMode GLINT_TAG_ADDR(0x18,0x00) | |
952 /* 0: */ | |
953 /* CullDepthTags */ | |
954 /* CullDepthData */ | |
955 /* CullStencilTags */ | |
956 /* CullStencilData */ | |
957 /* CullColorTag */ | |
958 /* CullColorData */ | |
959 /* CullSyncTag */ | |
960 /* CullSyncData */ | |
961 /* CullStatisticTag */ | |
962 /* CullStatisticData */ | |
963 | |
964 #define FM_PassDepthTags 0x0010 | |
965 #define FM_PassDepthData 0x0020 | |
966 #define FM_PassStencilTags 0x0040 | |
967 #define FM_PassStencilData 0x0080 | |
968 #define FM_PassColorTag 0x0100 | |
969 #define FM_PassColorData 0x0200 | |
970 #define FM_PassSyncTag 0x0400 | |
971 #define FM_PassSyncData 0x0800 | |
972 #define FM_PassStatisticTag 0x1000 | |
973 #define FM_PassStatisticData 0x2000 | |
974 | |
975 #define Sync_tag 0x0188 | |
976 | |
977 #define StatisticMode GLINT_TAG_ADDR(0x18,0x01) | |
978 #define MinRegion GLINT_TAG_ADDR(0x18,0x02) | |
979 #define MaxRegion GLINT_TAG_ADDR(0x18,0x03) | |
980 #define ResetPickResult GLINT_TAG_ADDR(0x18,0x04) | |
981 #define MitHitRegion GLINT_TAG_ADDR(0x18,0x05) | |
982 #define MaxHitRegion GLINT_TAG_ADDR(0x18,0x06) | |
983 #define PickResult GLINT_TAG_ADDR(0x18,0x07) | |
984 #define GlintSync GLINT_TAG_ADDR(0x18,0x08) | |
985 | |
986 #define FBBlockColorU GLINT_TAG_ADDR(0x18,0x0d) | |
987 #define FBBlockColorL GLINT_TAG_ADDR(0x18,0x0e) | |
988 #define SuspendUntilFrameBlank GLINT_TAG_ADDR(0x18,0x0f) | |
989 | |
990 #define KsRStart GLINT_TAG_ADDR(0x19,0x00) | |
991 #define dKsRdx GLINT_TAG_ADDR(0x19,0x01) | |
992 #define dKsRdyDom GLINT_TAG_ADDR(0x19,0x02) | |
993 #define KsGStart GLINT_TAG_ADDR(0x19,0x03) | |
994 #define dKsGdx GLINT_TAG_ADDR(0x19,0x04) | |
995 #define dKsGdyDom GLINT_TAG_ADDR(0x19,0x05) | |
996 #define KsBStart GLINT_TAG_ADDR(0x19,0x06) | |
997 #define dKsBdx GLINT_TAG_ADDR(0x19,0x07) | |
998 #define dKsBdyDom GLINT_TAG_ADDR(0x19,0x08) | |
999 | |
1000 #define KdRStart GLINT_TAG_ADDR(0x1A,0x00) | |
1001 #define dKdRdx GLINT_TAG_ADDR(0x1A,0x01) | |
1002 #define dKdRdyDom GLINT_TAG_ADDR(0x1A,0x02) | |
1003 #define KdGStart GLINT_TAG_ADDR(0x1A,0x03) | |
1004 #define dKdGdx GLINT_TAG_ADDR(0x1A,0x04) | |
1005 #define dKdGdyDom GLINT_TAG_ADDR(0x1A,0x05) | |
1006 #define KdBStart GLINT_TAG_ADDR(0x1A,0x06) | |
1007 #define dKdBdx GLINT_TAG_ADDR(0x1A,0x07) | |
1008 #define dKdBdyDom GLINT_TAG_ADDR(0x1A,0x08) | |
1009 | |
1010 #define FBSourceBase GLINT_TAG_ADDR(0x1B,0x00) | |
1011 #define FBSourceDelta GLINT_TAG_ADDR(0x1B,0x01) | |
1012 #define Config GLINT_TAG_ADDR(0x1B,0x02) | |
1013 #define CFBRM_SrcEnable 1<<0 | |
1014 #define CFBRM_DstEnable 1<<1 | |
1015 #define CFBRM_Packed 1<<2 | |
1016 #define CWM_Enable 1<<3 | |
1017 #define CCDDA_Enable 1<<4 | |
1018 #define CLogOp_Enable 1<<5 | |
1019 #define ContextDump GLINT_TAG_ADDR(0x1B,0x08) | |
1020 #define ContextRestore GLINT_TAG_ADDR(0x1B,0x09) | |
1021 #define ContextData GLINT_TAG_ADDR(0x1B,0x0a) | |
1022 | |
1023 #define TexelLUT0 GLINT_TAG_ADDR(0x1D,0x00) | |
1024 #define TexelLUT1 GLINT_TAG_ADDR(0x1D,0x01) | |
1025 #define TexelLUT2 GLINT_TAG_ADDR(0x1D,0x02) | |
1026 #define TexelLUT3 GLINT_TAG_ADDR(0x1D,0x03) | |
1027 #define TexelLUT4 GLINT_TAG_ADDR(0x1D,0x04) | |
1028 #define TexelLUT5 GLINT_TAG_ADDR(0x1D,0x05) | |
1029 #define TexelLUT6 GLINT_TAG_ADDR(0x1D,0x06) | |
1030 #define TexelLUT7 GLINT_TAG_ADDR(0x1D,0x07) | |
1031 #define TexelLUT8 GLINT_TAG_ADDR(0x1D,0x08) | |
1032 #define TexelLUT9 GLINT_TAG_ADDR(0x1D,0x09) | |
1033 #define TexelLUT10 GLINT_TAG_ADDR(0x1D,0x0A) | |
1034 #define TexelLUT11 GLINT_TAG_ADDR(0x1D,0x0B) | |
1035 #define TexelLUT12 GLINT_TAG_ADDR(0x1D,0x0C) | |
1036 #define TexelLUT13 GLINT_TAG_ADDR(0x1D,0x0D) | |
1037 #define TexelLUT14 GLINT_TAG_ADDR(0x1D,0x0E) | |
1038 #define TexelLUT15 GLINT_TAG_ADDR(0x1D,0x0F) | |
1039 | |
1040 #define YUVMode GLINT_TAG_ADDR(0x1E,0x00) | |
1041 #define ChromaUpper GLINT_TAG_ADDR(0x1E,0x01) | |
1042 #define ChromaLower GLINT_TAG_ADDR(0x1E,0x02) | |
1043 #define ChromaTestMode GLINT_TAG_ADDR(0x1E,0x03) | |
1044 #define AlphaMapUpperBound GLINT_TAG_ADDR(0x1E,0x03) /* PM2 */ | |
1045 #define AlphaMapLowerBound GLINT_TAG_ADDR(0x1E,0x04) /* PM2 */ | |
1046 | |
1047 | |
1048 /****************************** | |
1049 * GLINT Delta Core Registers * | |
1050 ******************************/ | |
1051 | |
1052 #define V0FixedTag GLINT_TAG_ADDR(0x20,0x00) | |
1053 #define V1FixedTag GLINT_TAG_ADDR(0x21,0x00) | |
1054 #define V2FixedTag GLINT_TAG_ADDR(0x22,0x00) | |
1055 #define V0FloatTag GLINT_TAG_ADDR(0x23,0x00) | |
1056 #define V1FloatTag GLINT_TAG_ADDR(0x24,0x00) | |
1057 #define V2FloatTag GLINT_TAG_ADDR(0x25,0x00) | |
1058 | |
1059 #define VPAR_s 0x00 | |
1060 #define VPAR_t 0x08 | |
1061 #define VPAR_q 0x10 | |
1062 #define VPAR_Ks 0x18 | |
1063 #define VPAR_Kd 0x20 | |
1064 | |
1065 /* have changed colors in ramdac ! | |
1066 #define VPAR_R 0x28 | |
1067 #define VPAR_G 0x30 | |
1068 #define VPAR_B 0x38 | |
1069 #define VPAR_A 0x40 | |
1070 */ | |
1071 #define VPAR_B 0x28 | |
1072 #define VPAR_G 0x30 | |
1073 #define VPAR_R 0x38 | |
1074 #define VPAR_A 0x40 | |
1075 | |
1076 #define VPAR_f 0x48 | |
1077 | |
1078 #define VPAR_x 0x50 | |
1079 #define VPAR_y 0x58 | |
1080 #define VPAR_z 0x60 | |
1081 | |
1082 #define DeltaModeTag GLINT_TAG_ADDR(0x26,0x00) | |
1083 /* 0: */ | |
1084 /* GLINT_300SX */ | |
1085 | |
1086 /* DeltaMode Register Bit Field Assignments */ | |
1087 #define DM_GLINT_300SX 0x0000 | |
1088 #define DM_GLINT_500TX 0x0001 | |
1089 #define DM_PERMEDIA 0x0002 | |
1090 #define DM_Depth_16BPP (1 << 2) | |
1091 #define DM_Depth_24BPP (2 << 2) | |
1092 #define DM_Depth_32BPP (3 << 2) | |
1093 #define DM_FogEnable 0x0010 | |
1094 #define DM_TextureEnable 0x0020 | |
1095 #define DM_SmoothShadingEnable 0x0040 | |
1096 #define DM_DepthEnable 0x0080 | |
1097 #define DM_SpecularTextureEnable 0x0100 | |
1098 #define DM_DiffuseTextureEnable 0x0200 | |
1099 #define DM_SubPixelCorrectionEnable 0x0400 | |
1100 #define DM_DiamondExit 0x0800 | |
1101 #define DM_NoDraw 0x1000 | |
1102 #define DM_ClampEnable 0x2000 | |
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1103 #define DM_ClampedTexParMode 0x4000 |
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1104 #define DM_NormalizedTexParMode 0xC000 |
22974 | 1105 |
1106 | |
1107 #define DDCMD_AreaStrippleEnable 0x0001 | |
1108 #define DDCMD_LineStrippleEnable 0x0002 | |
1109 #define DDCMD_ResetLineStripple 1 << 2 | |
1110 #define DDCMD_FastFillEnable 1 << 3 | |
1111 /* 2 Bits reserved */ | |
1112 #define DDCMD_PrimitiveType_Point 2 << 6 | |
1113 #define DDCMD_PrimitiveType_Line 0 << 6 | |
1114 #define DDCMD_PrimitiveType_Trapezoid 1 << 6 | |
1115 #define DDCMD_AntialiasEnable 1 << 8 | |
1116 #define DDCMD_AntialiasingQuality 1 << 9 | |
1117 #define DDCMD_UsePointTable 1 << 10 | |
1118 #define DDCMD_SyncOnBitMask 1 << 11 | |
1119 #define DDCMD_SyncOnHostDate 1 << 12 | |
1120 #define DDCMD_TextureEnable 1 << 13 | |
1121 #define DDCMD_FogEnable 1 << 14 | |
1122 #define DDCMD_CoverageEnable 1 << 15 | |
1123 #define DDCMD_SubPixelCorrectionEnable 1 << 16 | |
1124 | |
1125 | |
1126 | |
1127 #define DrawTriangle GLINT_TAG_ADDR(0x26,0x01) | |
1128 #define RepeatTriangle GLINT_TAG_ADDR(0x26,0x02) | |
1129 #define DrawLine01 GLINT_TAG_ADDR(0x26,0x03) | |
1130 #define DrawLine10 GLINT_TAG_ADDR(0x26,0x04) | |
1131 #define RepeatLine GLINT_TAG_ADDR(0x26,0x05) | |
1132 #define BroadcastMask GLINT_TAG_ADDR(0x26,0x0F) | |
1133 | |
1134 /* Permedia 3 - Accelerator Extensions */ | |
1135 #define FillRectanglePosition 0x8348 | |
1136 #define FillRender2D 0x8350 | |
1137 #define FBDstReadBufAddr0 0xAE80 | |
1138 #define FBDstReadBufOffset0 0xAEA0 | |
1139 #define FBDstReadBufWidth0 0xAEC0 | |
1140 #define FBDstReadMode 0xAEE0 | |
1141 #define FBDRM_Enable0 1<<8 | |
1142 #define FBDRM_Blocking 1<<24 | |
1143 #define FBDstReadEnables 0xAEE8 | |
1144 #define FBSrcReadMode 0xAF00 | |
1145 #define FBSRM_Blocking 1<<11 | |
1146 #define FBSrcReadBufAddr 0xAF08 | |
1147 #define FBSrcReadBufOffset0 0xAF10 | |
1148 #define FBSrcReadBufWidth 0xAF18 | |
1149 #define FBWriteBufAddr0 0xB000 | |
1150 #define FBWriteBufOffset0 0xB020 | |
1151 #define FBWriteBufWidth0 0xB040 | |
1152 #define FBBlockColorBack 0xB0A0 | |
1153 #define ForegroundColor 0xB0C0 | |
1154 #define BackgroundColor 0xB0C8 | |
1155 #define RectanglePosition 0xB600 | |
1156 #define Render2D 0xB640 | |
1157 | |
1158 /* Colorformats */ | |
1159 #define BGR555 1 | |
1160 #define BGR565 16 | |
1161 #define CI8 14 | |
1162 #define CI4 15 | |
1163 | |
1164 #ifdef DEBUG | |
1165 #define GLINT_WRITE_REG(v,r) \ | |
1166 GLINT_VERB_WRITE_REG(pGlint,v,r,__FILE__,__LINE__) | |
1167 #define GLINT_READ_REG(r) \ | |
1168 GLINT_VERB_READ_REG(pGlint,r,__FILE__,__LINE__) | |
1169 #else | |
1170 | |
1171 #define GLINT_WRITE_REG(v,r) \ | |
1172 MMIO_OUT32(pGlint->IOBase + pGlint->IOOffset,(unsigned long)(r), (v)) | |
1173 #define GLINT_READ_REG(r) \ | |
1174 MMIO_IN32(pGlint->IOBase + pGlint->IOOffset,(unsigned long)(r)) | |
1175 | |
1176 #endif /* DEBUG */ | |
1177 | |
1178 #define GLINT_WAIT(n) \ | |
1179 do{ \ | |
1180 if (pGlint->InFifoSpace>=(n)) \ | |
1181 pGlint->InFifoSpace -= (n); \ | |
1182 else { \ | |
1183 int tmp; \ | |
1184 while((tmp=GLINT_READ_REG(InFIFOSpace))<(n)); \ | |
1185 /* Clamp value due to bugs in PM3 */ \ | |
1186 if (tmp > pGlint->FIFOSize) \ | |
1187 tmp = pGlint->FIFOSize; \ | |
1188 pGlint->InFifoSpace = tmp - (n); \ | |
1189 } \ | |
1190 }while(0) | |
1191 | |
1192 #define GLINTDACDelay(x) do { \ | |
1193 int delay = x; \ | |
1194 unsigned char tmp; \ | |
1195 while(delay--){tmp = GLINT_READ_REG(InFIFOSpace);}; \ | |
1196 } while(0) | |
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1197 |
22974 | 1198 #define GLINT_MASK_WRITE_REG(v,m,r) \ |
1199 GLINT_WRITE_REG((GLINT_READ_REG(r)&(m))|(v),r) | |
1200 | |
1201 #define GLINT_SLOW_WRITE_REG(v,r) \ | |
1202 do{ \ | |
1203 mem_barrier(); \ | |
1204 GLINT_WAIT(pGlint->FIFOSize); \ | |
1205 mem_barrier(); \ | |
1206 GLINT_WRITE_REG(v,r); \ | |
1207 }while(0) | |
1208 | |
1209 #define GLINT_SET_INDEX(index) \ | |
1210 do{ \ | |
1211 GLINT_SLOW_WRITE_REG(((index)>>8)&0xff,PM2VDACIndexRegHigh); \ | |
1212 GLINT_SLOW_WRITE_REG((index)&0xff,PM2VDACIndexRegLow); \ | |
1213 } while(0) | |
1214 | |
1215 #define REPLICATE(r) \ | |
1216 { \ | |
1217 if (pScrn->bitsPerPixel == 16) { \ | |
1218 r &= 0xFFFF; \ | |
1219 r |= (r<<16); \ | |
1220 } else \ | |
1221 if (pScrn->bitsPerPixel == 8) { \ | |
1222 r &= 0xFF; \ | |
1223 r |= (r<<8); \ | |
1224 r |= (r<<16); \ | |
1225 } \ | |
1226 } | |
1227 | |
1228 #ifndef XF86DRI | |
1229 #define LOADROP(rop) \ | |
1230 { \ | |
1231 if (pGlint->ROP != rop) { \ | |
1232 GLINT_WRITE_REG(rop<<1|UNIT_ENABLE, LogicalOpMode); \ | |
1233 pGlint->ROP = rop; \ | |
1234 } \ | |
1235 } | |
1236 #else | |
1237 #define LOADROP(rop) \ | |
1238 { \ | |
1239 GLINT_WRITE_REG(rop<<1|UNIT_ENABLE, LogicalOpMode); \ | |
1240 pGlint->ROP = rop; \ | |
1241 } | |
1242 #endif | |
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1243 |
22974 | 1244 #define CHECKCLIPPING \ |
1245 { \ | |
1246 if (pGlint->ClippingOn) { \ | |
1247 pGlint->ClippingOn = FALSE; \ | |
1248 GLINT_WAIT(1); \ | |
1249 GLINT_WRITE_REG(0, ScissorMode); \ | |
1250 } \ | |
1251 } | |
1252 | |
1253 #ifndef XF86DRI | |
1254 #define DO_PLANEMASK(planemask) \ | |
1255 { \ | |
1256 if (planemask != pGlint->planemask) { \ | |
1257 pGlint->planemask = planemask; \ | |
1258 REPLICATE(planemask); \ | |
1259 GLINT_WRITE_REG(planemask, FBHardwareWriteMask);\ | |
1260 } \ | |
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1261 } |
22974 | 1262 #else |
1263 #define DO_PLANEMASK(planemask) \ | |
1264 { \ | |
1265 pGlint->planemask = planemask; \ | |
1266 REPLICATE(planemask); \ | |
1267 GLINT_WRITE_REG(planemask, FBHardwareWriteMask);\ | |
1268 } | |
1269 #endif | |
1270 | |
1271 /* Permedia Save/Restore functions */ | |
1272 | |
1273 #define STOREREG(address,value) \ | |
1274 pReg->glintRegs[address >> 3] = value; | |
1275 | |
1276 #define SAVEREG(address) \ | |
1277 pReg->glintRegs[address >> 3] = GLINT_READ_REG(address); | |
1278 | |
1279 #define RESTOREREG(address) \ | |
1280 GLINT_SLOW_WRITE_REG(pReg->glintRegs[address >> 3], address); | |
1281 | |
1282 #define STOREDAC(address,value) \ | |
1283 pReg->DacRegs[address] = value; | |
1284 | |
1285 #define P2VOUT(address) \ | |
1286 Permedia2vOutIndReg(pScrn, address, 0x00, pReg->DacRegs[address]); | |
1287 | |
1288 #define P2VIN(address) \ | |
1289 pReg->DacRegs[address] = Permedia2vInIndReg(pScrn, address); | |
1290 | |
1291 /* RamDac Save/Restore functions, used by external DAC's */ | |
1292 | |
1293 #define STORERAMDAC(address,value) \ | |
1294 ramdacReg->DacRegs[address] = value; | |
1295 | |
1296 /* Multi Chip access */ | |
1297 | |
1298 #define ACCESSCHIP1() \ | |
1299 pGlint->IOOffset = 0; | |
1300 | |
1301 #define ACCESSCHIP2() \ | |
1302 pGlint->IOOffset = 0x10000; | |
1303 | |
26030 | 1304 #endif /* MPLAYER_GLINT_REGS_H */ |