Mercurial > mplayer.hg
comparison vidix/drivers/radeon_vid.c @ 13335:6c002b4462ae
workaround for Xorg-6.8 not saving the surface registers on bigendian
architectures, patch by Luca Barbato <lu_zero at gentoo.org>
author | faust3 |
---|---|
date | Tue, 14 Sep 2004 20:43:39 +0000 |
parents | a6f958139ab8 |
children | c2cd3374a1cb |
comparison
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inserted
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13334:04f7b5e75785 | 13335:6c002b4462ae |
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1314 } | 1314 } |
1315 | 1315 |
1316 static void radeon_vid_display_video( void ) | 1316 static void radeon_vid_display_video( void ) |
1317 { | 1317 { |
1318 int bes_flags; | 1318 int bes_flags; |
1319 #ifdef WORDS_BIGENDIAN | |
1320 #if defined(RAGE128) | |
1321 /* code from gatos */ | |
1322 { | |
1323 SAVED_CONFIG_CNTL = INREG(CONFIG_CNTL); | |
1324 OUTREG(CONFIG_CNTL, SAVED_CONFIG_CNTL & | |
1325 ~(APER_0_BIG_ENDIAN_16BPP_SWAP|APER_0_BIG_ENDIAN_32BPP_SWAP)); | |
1326 | |
1327 // printf("saved: %x, current: %x\n", SAVED_CONFIG_CNTL, | |
1328 // INREG(CONFIG_CNTL)); | |
1329 } | |
1330 #else | |
1331 /*code from radeon_video.c*/ | |
1332 { | |
1333 SAVED_CONFIG_CNTL = INREG(RADEON_SURFACE_CNTL); | |
1334 /* OUTREG(RADEON_SURFACE_CNTL, (SAVED_CONFIG_CNTL | | |
1335 RADEON_NONSURF_AP0_SWP_32BPP) & ~RADEON_NONSURF_AP0_SWP_16BPP); | |
1336 */ | |
1337 OUTREG(RADEON_SURFACE_CNTL, SAVED_CONFIG_CNTL & ~(RADEON_NONSURF_AP0_SWP_32BPP | |
1338 | RADEON_NONSURF_AP0_SWP_16BPP)); | |
1339 | |
1340 /* | |
1341 OUTREG(RADEON_SURFACE_CNTL, (SAVED_CONFIG_CNTL | RADEON_NONSURF_AP0_SWP_32BPP) | |
1342 & ~RADEON_NONSURF_AP0_SWP_16BPP); | |
1343 */ | |
1344 } | |
1345 #endif | |
1346 #endif | |
1347 | |
1348 | |
1349 | |
1319 radeon_fifo_wait(2); | 1350 radeon_fifo_wait(2); |
1320 OUTREG(OV0_REG_LOAD_CNTL, REG_LD_CTL_LOCK); | 1351 OUTREG(OV0_REG_LOAD_CNTL, REG_LD_CTL_LOCK); |
1321 radeon_engine_idle(); | 1352 radeon_engine_idle(); |
1322 while(!(INREG(OV0_REG_LOAD_CNTL)®_LD_CTL_LOCK_READBACK)); | 1353 while(!(INREG(OV0_REG_LOAD_CNTL)®_LD_CTL_LOCK_READBACK)); |
1323 radeon_fifo_wait(15); | 1354 radeon_fifo_wait(15); |