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changeset 35211:014d0c671b80

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mpcommon: Show more CPU flags Add SSE3, SSE4, SSE4.2, and AVX in CPU flags information. Patch by Josh [joshf87 live com]
author upsuper
date Wed, 31 Oct 2012 04:41:32 +0000
parents 318c7824c50d
children fe44546ee423
files mpcommon.c
diffstat 1 files changed, 12 insertions(+), 2 deletions(-) [+]
line wrap: on
line diff
--- a/mpcommon.c	Wed Oct 31 04:23:38 2012 +0000
+++ b/mpcommon.c	Wed Oct 31 04:41:32 2012 +0000
@@ -74,10 +74,12 @@
     GetCpuCaps(&gCpuCaps);
 #if ARCH_X86
     mp_msg(MSGT_CPLAYER, MSGL_V,
-           "CPUflags:  MMX: %d MMX2: %d 3DNow: %d 3DNowExt: %d SSE: %d SSE2: %d SSSE3: %d\n",
+           "CPUflags:  MMX: %d MMX2: %d 3DNow: %d 3DNowExt: %d SSE: %d SSE2: %d SSE3: %d SSSE3: %d SSE4: %d SSE4.2: %d AVX: %d\n",
            gCpuCaps.hasMMX, gCpuCaps.hasMMX2,
            gCpuCaps.has3DNow, gCpuCaps.has3DNowExt,
-           gCpuCaps.hasSSE, gCpuCaps.hasSSE2, gCpuCaps.hasSSSE3);
+           gCpuCaps.hasSSE, gCpuCaps.hasSSE2, gCpuCaps.hasSSE3,
+           gCpuCaps.hasSSSE3, gCpuCaps.hasSSE4, gCpuCaps.hasSSE42,
+           gCpuCaps.hasAVX);
 #if CONFIG_RUNTIME_CPUDETECT
     mp_msg(MSGT_CPLAYER, MSGL_V, "Compiled with runtime CPU detection.\n");
 #else
@@ -94,8 +96,16 @@
     mp_msg(MSGT_CPLAYER,MSGL_V," SSE");
 if (HAVE_SSE2)
     mp_msg(MSGT_CPLAYER,MSGL_V," SSE2");
+if (HAVE_SSE3)
+    mp_msg(MSGT_CPLAYER,MSGL_V," SSE3");
 if (HAVE_SSSE3)
     mp_msg(MSGT_CPLAYER,MSGL_V," SSSE3");
+if (HAVE_SSE4)
+    mp_msg(MSGT_CPLAYER,MSGL_V," SSE4");
+if (HAVE_SSE42)
+    mp_msg(MSGT_CPLAYER,MSGL_V," SSE4.2");
+if (HAVE_AVX)
+    mp_msg(MSGT_CPLAYER,MSGL_V," AVX");
 if (HAVE_CMOV)
     mp_msg(MSGT_CPLAYER,MSGL_V," CMOV");
     mp_msg(MSGT_CPLAYER,MSGL_V,"\n");