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changeset 15824:53231c701b29

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width % 16 != 0 workaround by (Nicolas Plourde: nicolas plourde, gmail com>) cleanup by me indention fixed second one must be yv12touyvy instead of yv12toyuy2 replace slow modulo by bitwise and move %16!=0 code before the comment saying the code cant handle %16!=0
author michael
date Mon, 27 Jun 2005 07:40:24 +0000
parents 500f49f31630
children 8549fc0fb5b1
files postproc/swscale_altivec_template.c
diffstat 1 files changed, 10 insertions(+), 0 deletions(-) [+]
line wrap: on
line diff
--- a/postproc/swscale_altivec_template.c	Sun Jun 26 20:28:12 2005 +0000
+++ b/postproc/swscale_altivec_template.c	Mon Jun 27 07:40:24 2005 +0000
@@ -400,6 +400,11 @@
   const int vertLumPerChroma = 2;  
   register unsigned int y;
 
+  if(width&15){
+    yv12toyuy2( ysrc, usrc, vsrc, dst,c->srcW,srcSliceH, lumStride, chromStride, dstStride);
+    return srcSliceH;
+  }
+
   /* this code assume:
 
   1) dst is 16 bytes-aligned
@@ -474,6 +479,11 @@
   const vector unsigned char yperm = vec_lvsl(0, ysrc);
   register unsigned int y;
 
+  if(width&15){
+    yv12touyvy( ysrc, usrc, vsrc, dst,c->srcW,srcSliceH, lumStride, chromStride, dstStride);
+    return srcSliceH;
+  }
+
   /* this code assume:
 
   1) dst is 16 bytes-aligned