annotate driver/pt1_pci.c @ 79:3c2123189edf

improve PT2 support. - update read check in initialization - PT2 specific RAM phase initialization
author Yoshiki Yazawa <yaz@honeyplanet.jp>
date Mon, 07 Dec 2009 15:01:57 +0900
parents 272a8fba970b
children f336fd2dcf28
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
1 /* pt1-pci.c: A PT1 on PCI bus driver for Linux. */
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
2 #define DRV_NAME "pt1-pci"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
3 #define DRV_VERSION "1.00"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
4 #define DRV_RELDATE "11/28/2008"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
5
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
6
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
7 #include <linux/module.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
8 #include <linux/kernel.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
9 #include <linux/errno.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
10 #include <linux/pci.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
11 #include <linux/init.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
12 #include <linux/interrupt.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
13
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
14 #include <asm/system.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
15 #include <asm/io.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
16 #include <asm/irq.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
17 #include <asm/uaccess.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
18 #include <linux/version.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
19 #include <linux/mutex.h>
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
20 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23)
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
21 #include <linux/freezer.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
22 #else
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
23 #define set_freezable()
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
24 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11)
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
25 typedef struct pm_message {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
26 int event;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
27 } pm_message_t;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
28 #endif
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
29 #endif
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
30 #include <linux/kthread.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
31 #include <linux/dma-mapping.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
32
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
33 #include <linux/fs.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
34 #include <linux/cdev.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
35
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
36 #include <linux/ioctl.h>
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
37
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
38 #include "pt1_com.h"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
39 #include "pt1_pci.h"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
40 #include "pt1_tuner.h"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
41 #include "pt1_i2c.h"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
42 #include "pt1_tuner_data.h"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
43 #include "pt1_ioctl.h"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
44
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
45 /* These identify the driver base version and may not be removed. */
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
46 static char version[] __devinitdata =
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
47 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " \n";
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
48
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
49 MODULE_AUTHOR("Tomoaki Ishikawa tomy@users.sourceforge.jp");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
50 #define DRIVER_DESC "PCI earthsoft PT1 driver"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
51 MODULE_DESCRIPTION(DRIVER_DESC);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
52 MODULE_LICENSE("GPL");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
53
51
c915076353ae backout 23b6f99f65b2 for now. it may cause scheduling while atomic operation.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 50
diff changeset
54 static int debug = 7; /* 1 normal messages, 0 quiet .. 7 verbose. */
c915076353ae backout 23b6f99f65b2 for now. it may cause scheduling while atomic operation.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 50
diff changeset
55 static int lnb = 0; /* LNB OFF:0 +11V:1 +15V:2 */
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
56
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
57 module_param(debug, int, 0);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
58 module_param(lnb, int, 0);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
59 MODULE_PARM_DESC(debug, "debug level (1-2)");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
60 MODULE_PARM_DESC(debug, "LNB level (0:OFF 1:+11V 2:+15V)");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
61
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
62 #define VENDOR_EARTHSOFT 0x10ee
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
63 #define PCI_PT1_ID 0x211a
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
64 #define PCI_PT2_ID 0x222a
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
65
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
66 static struct pci_device_id pt1_pci_tbl[] = {
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
67 { VENDOR_EARTHSOFT, PCI_PT1_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
68 { VENDOR_EARTHSOFT, PCI_PT2_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
69 { 0, }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
70 };
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
71 MODULE_DEVICE_TABLE(pci, pt1_pci_tbl);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
72 #define DEV_NAME "pt1video"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
73
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
74 #define PACKET_SIZE 188 // 1パケット長
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
75 #define MAX_READ_BLOCK 4 // 1度に読み出す最大DMAバッファ数
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
76 #define MAX_PCI_DEVICE 128 // 最大64枚
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
77 #define DMA_SIZE 4096 // DMAバッファサイズ
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
78 #define DMA_RING_SIZE 128 // RINGサイズ
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
79 #define DMA_RING_MAX 511 // 1RINGにいくつ詰めるか(1023はNGで511まで)
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
80 #define CHANEL_DMA_SIZE (2*1024*1024) // 地デジ用(16Mbps)
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
81 #define BS_CHANEL_DMA_SIZE (4*1024*1024) // BS用(32Mbps)
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
82
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
83 typedef struct _DMA_CONTROL{
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
84 dma_addr_t ring_dma[DMA_RING_MAX] ; // DMA情報
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
85 __u32 *data[DMA_RING_MAX];
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
86 }DMA_CONTROL;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
87
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
88 typedef struct _PT1_CHANNEL PT1_CHANNEL;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
89
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
90 typedef struct _pt1_device{
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
91 unsigned long mmio_start ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
92 __u32 mmio_len ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
93 void __iomem *regs;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
94 struct mutex lock ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
95 dma_addr_t ring_dma[DMA_RING_SIZE] ; // DMA情報
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
96 void *dmaptr[DMA_RING_SIZE] ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
97 struct task_struct *kthread;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
98 dev_t dev ;
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
99 int card_number;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
100 __u32 base_minor ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
101 struct cdev cdev[MAX_CHANNEL];
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
102 wait_queue_head_t dma_wait_q ;// for poll on reading
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
103 DMA_CONTROL *dmactl[DMA_RING_SIZE];
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
104 PT1_CHANNEL *channel[MAX_CHANNEL];
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
105 int cardtype;
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
106 } PT1_DEVICE;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
107
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
108 typedef struct _MICRO_PACKET{
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
109 char data[3];
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
110 char head ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
111 }MICRO_PACKET;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
112
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
113 struct _PT1_CHANNEL{
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
114 __u32 valid ; // 使用中フラグ
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
115 __u32 address ; // I2Cアドレス
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
116 __u32 channel ; // チャネル番号
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
117 int type ; // チャネルタイプ
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
118 __u32 packet_size ; // パケットサイズ
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
119 __u32 drop ; // パケットドロップ数
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
120 struct mutex lock ; // CH別mutex_lock用
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
121 __u32 size ; // DMAされたサイズ
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
122 __u32 maxsize ; // DMA用バッファサイズ
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
123 __u32 bufsize ; // チャネルに割り振られたサイズ
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
124 __u32 overflow ; // オーバーフローエラー発生
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
125 __u32 counetererr ; // 転送カウンタ1エラー
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
126 __u32 transerr ; // 転送エラー
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
127 __u32 minor ; // マイナー番号
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
128 __u8 *buf; // CH別受信メモリ
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
129 __u32 pointer;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
130 __u8 req_dma ; // 溢れたチャネル
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
131 __u8 packet_buf[PACKET_SIZE] ; // 溢れたチャネル
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
132 PT1_DEVICE *ptr ; // カード別情報
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
133 wait_queue_head_t wait_q ; // for poll on reading
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
134 };
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
135
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
136 // I2Cアドレス(video0, 1 = ISDB-S) (video2, 3 = ISDB-T)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
137 int i2c_address[MAX_CHANNEL] = {T0_ISDB_S, T1_ISDB_S, T0_ISDB_T, T1_ISDB_T};
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
138 int real_chanel[MAX_CHANNEL] = {0, 2, 1, 3};
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
139 int channeltype[MAX_CHANNEL] = {CHANNEL_TYPE_ISDB_S, CHANNEL_TYPE_ISDB_S,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
140 CHANNEL_TYPE_ISDB_T, CHANNEL_TYPE_ISDB_T};
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
141
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
142 static PT1_DEVICE *device[MAX_PCI_DEVICE];
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
143 static struct class *pt1video_class;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
144
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
145 #define PT1MAJOR 251
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
146 #define DRIVERNAME "pt1video"
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
147
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
148 static void reset_dma(PT1_DEVICE *dev_conf)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
149 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
150
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
151 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
152 __u32 addr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
153 int ring_pos = 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
154 int data_pos = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
155 __u32 *dataptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
156
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
157 // データ初期化
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
158 for(ring_pos = 0 ; ring_pos < DMA_RING_SIZE ; ring_pos++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
159 for(data_pos = 0 ; data_pos < DMA_RING_MAX ; data_pos++){
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
160 dataptr = (dev_conf->dmactl[ring_pos])->data[data_pos];
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
161 dataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
162 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
163 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
164 // 転送カウンタをリセット
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
165 writel(0x00000010, dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
166 // 転送カウンタをインクリメント
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
167 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
168 writel(0x00000020, dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
169 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
170
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
171 addr = (int)dev_conf->ring_dma[0] ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
172 addr >>= 12 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
173 // DMAバッファ設定
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
174 writel(addr, dev_conf->regs + DMA_ADDR);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
175 // DMA開始
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
176 writel(0x0c000040, dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
177
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
178 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
179 static int pt1_thread(void *data)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
180 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
181 PT1_DEVICE *dev_conf = data ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
182 PT1_CHANNEL *channel ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
183 int ring_pos = 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
184 int data_pos = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
185 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
186 int chno ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
187 int lp2 ;
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
188 int dma_channel ;
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
189 int packet_pos ;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
190 __u32 *dataptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
191 __u32 *curdataptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
192 __u32 val ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
193 union mpacket{
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
194 __u32 val ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
195 MICRO_PACKET packet ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
196 }micro;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
197
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
198 set_freezable();
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
199 reset_dma(dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
200 printk(KERN_INFO "pt1_thread run\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
201
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
202 for(;;){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
203 if(kthread_should_stop()){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
204 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
205 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
206
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
207 for(;;){
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
208 dataptr = (dev_conf->dmactl[ring_pos])->data[data_pos];
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
209 // データあり?
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
210 if(dataptr[(DMA_SIZE / sizeof(__u32)) - 2] == 0){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
211 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
212 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
213 micro.val = *dataptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
214 curdataptr = dataptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
215 data_pos += 1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
216 for(lp = 0 ; lp < (DMA_SIZE / sizeof(__u32)) ; lp++, dataptr++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
217 micro.val = *dataptr ;
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
218 dma_channel = ((micro.packet.head >> 5) & 0x07);
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
219 //チャネル情報不正
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
220 if(dma_channel > MAX_CHANNEL){
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
221 printk(KERN_ERR "DMA Channel Number Error(%d)\n", dma_channel);
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
222 continue ;
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
223 }
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
224 chno = real_chanel[(((micro.packet.head >> 5) & 0x07) - 1)];
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
225 packet_pos = ((micro.packet.head >> 2) & 0x07);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
226 channel = dev_conf->channel[chno] ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
227 // エラーチェック
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
228 if((micro.packet.head & MICROPACKET_ERROR)){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
229 val = readl(dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
230 if((val & BIT_RAM_OVERFLOW)){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
231 channel->overflow += 1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
232 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
233 if((val & BIT_INITIATOR_ERROR)){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
234 channel->counetererr += 1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
235 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
236 if((val & BIT_INITIATOR_WARNING)){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
237 channel->transerr += 1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
238 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
239 // 初期化して先頭から
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
240 reset_dma(dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
241 ring_pos = data_pos = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
242 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
243 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
244 // 未使用チャネルは捨てる
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
245 if(channel->valid == FALSE){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
246 continue ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
247 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
248 mutex_lock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
249 // あふれたら読み出すまで待つ
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
250 while(1){
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
251 if(channel->size >= (channel->maxsize - PACKET_SIZE - 4)){
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
252 // 該当チャンネルのDMA読みだし待ちにする
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
253 wake_up(&channel->wait_q);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
254 channel->req_dma = TRUE ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
255 mutex_unlock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
256 // タスクに時間を渡す為中断
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
257 wait_event_timeout(dev_conf->dma_wait_q, (channel->req_dma == FALSE),
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
258 msecs_to_jiffies(500));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
259 mutex_lock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
260 channel->drop += 1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
261 }else{
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
262 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
263 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
264 }
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
265 // 先頭で、一時バッファに残っている場合
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
266 if((micro.packet.head & 0x02) && (channel->packet_size != 0)){
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
267 channel->packet_size = 0 ;
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
268 }
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
269 // データコピー
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
270 for(lp2 = 2 ; lp2 >= 0 ; lp2--){
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
271 channel->packet_buf[channel->packet_size] = micro.packet.data[lp2] ;
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
272 channel->packet_size += 1 ;
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
273 }
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
274
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
275 // パケットが出来たらコピーする
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
276 if(channel->packet_size >= PACKET_SIZE){
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
277 if (channel->pointer + channel->size >= channel->maxsize) {
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
278 // リングバッファの境界を越えていてリングバッファの先頭に戻っている場合
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
279 // channel->pointer + channel->size - channel->maxsize でリングバッファ先頭からのアドレスになる
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
280 memcpy(&channel->buf[channel->pointer + channel->size - channel->maxsize], channel->packet_buf, PACKET_SIZE);
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
281 } else if (channel->pointer + channel->size + PACKET_SIZE > channel->maxsize) {
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
282 // リングバッファの境界をまたぐように書き込まれる場合
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
283 // リングバッファの境界まで書き込み
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
284 __u32 tmp_size = channel->maxsize - (channel->pointer + channel->size);
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
285 memcpy(&channel->buf[channel->pointer + channel->size], channel->packet_buf, tmp_size);
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
286 // 先頭に戻って書き込み
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
287 memcpy(channel->buf, &channel->packet_buf[tmp_size], PACKET_SIZE - tmp_size);
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
288 } else {
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
289 // リングバッファ内で収まる場合
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
290 // 通常の書き込み
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
291 memcpy(&channel->buf[channel->pointer + channel->size], channel->packet_buf, PACKET_SIZE);
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
292 }
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
293 channel->size += PACKET_SIZE ;
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
294 channel->packet_size = 0 ;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
295 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
296 mutex_unlock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
297 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
298 curdataptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
299
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
300 if(data_pos >= DMA_RING_MAX){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
301 data_pos = 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
302 ring_pos += 1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
303 // DMAリングが変わった場合はインクリメント
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
304 writel(0x00000020, dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
305 if(ring_pos >= DMA_RING_SIZE){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
306 ring_pos = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
307 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
308 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
309
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
310 // 頻度を落す(4Kで起動させる)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
311 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
312 channel = dev_conf->channel[real_chanel[lp]] ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
313 if((channel->size >= DMA_SIZE) && (channel->valid == TRUE)){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
314 wake_up(&channel->wait_q);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
315 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
316 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
317 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
318 schedule_timeout_interruptible(msecs_to_jiffies(1));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
319 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
320 return 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
321 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
322 static int pt1_open(struct inode *inode, struct file *file)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
323 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
324
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
325 int major = imajor(inode);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
326 int minor = iminor(inode);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
327 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
328 int lp2 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
329 PT1_CHANNEL *channel ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
330
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
331 for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
332 if(device[lp] == NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
333 return -EIO ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
334 }
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
335
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
336 if(MAJOR(device[lp]->dev) == major &&
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
337 device[lp]->base_minor <= minor &&
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
338 device[lp]->base_minor + MAX_CHANNEL > minor) {
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
339
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
340 mutex_lock(&device[lp]->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
341 for(lp2 = 0 ; lp2 < MAX_CHANNEL ; lp2++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
342 channel = device[lp]->channel[lp2] ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
343 if(channel->minor == minor){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
344 if(channel->valid == TRUE){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
345 mutex_unlock(&device[lp]->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
346 return -EIO ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
347 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
348 channel->drop = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
349 channel->valid = TRUE ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
350 channel->overflow = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
351 channel->counetererr = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
352 channel->transerr = 0 ;
37
c359e7adf700 propagate upstream change:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 36
diff changeset
353 channel->packet_size = 0 ;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
354 file->private_data = channel;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
355 mutex_lock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
356 // データ初期化
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
357 channel->size = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
358 mutex_unlock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
359 mutex_unlock(&device[lp]->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
360 return 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
361 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
362 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
363 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
364 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
365 return -EIO;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
366 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
367 static int pt1_release(struct inode *inode, struct file *file)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
368 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
369 PT1_CHANNEL *channel = file->private_data;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
370
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
371 mutex_lock(&channel->ptr->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
372 SetStream(channel->ptr->regs, channel->channel, FALSE);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
373 channel->valid = FALSE ;
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
374 printk(KERN_INFO "(%d:%d)Drop=%08d:%08d:%08d:%08d\n", imajor(inode), iminor(inode), channel->drop,
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
375 channel->overflow, channel->counetererr, channel->transerr);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
376 channel->overflow = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
377 channel->counetererr = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
378 channel->transerr = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
379 channel->drop = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
380 // 停止している場合は起こす
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
381 if(channel->req_dma == TRUE){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
382 channel->req_dma = FALSE ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
383 wake_up(&channel->ptr->dma_wait_q);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
384 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
385 mutex_unlock(&channel->ptr->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
386 return 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
387 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
388
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
389 static ssize_t pt1_read(struct file *file, char __user *buf, size_t cnt, loff_t * ppos)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
390 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
391 PT1_CHANNEL *channel = file->private_data;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
392 __u32 size ;
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
393 unsigned long dummy;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
394
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
395 // 4K単位で起こされるのを待つ(CPU負荷対策)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
396 if(channel->size < DMA_SIZE){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
397 wait_event_timeout(channel->wait_q, (channel->size >= DMA_SIZE),
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
398 msecs_to_jiffies(500));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
399 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
400 mutex_lock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
401 if(!channel->size){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
402 size = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
403 }else{
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
404 __u32 tmp_size = 0;
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
405 if (cnt < channel->size) {
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
406 // バッファにあるデータより小さい読み込みの場合
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
407 size = cnt;
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
408 } else {
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
409 // バッファにあるデータ以上の読み込みの場合
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
410 size = channel->size;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
411 }
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
412 if (channel->maxsize <= size + channel->pointer) {
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
413 // リングバッファの境界を越える場合
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
414 tmp_size = channel->maxsize - channel->pointer;
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
415 // 境界までコピー
44
07d71b1484a8 suppress warnings
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 41
diff changeset
416 dummy = copy_to_user(buf, &channel->buf[channel->pointer], tmp_size);
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
417 // 残りをコピー
44
07d71b1484a8 suppress warnings
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 41
diff changeset
418 dummy = copy_to_user(&buf[tmp_size], channel->buf, size - tmp_size);
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
419 channel->pointer = size - tmp_size;
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
420 } else {
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
421 // 普通にコピー
44
07d71b1484a8 suppress warnings
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 41
diff changeset
422 dummy = copy_to_user(buf, &channel->buf[channel->pointer], size);
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
423 channel->pointer += size;
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
424 }
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
425 channel->size -= size;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
426 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
427 // 読み終わったかつ使用しているのがが4K以下
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
428 if(channel->req_dma == TRUE){
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
429 channel->req_dma = FALSE ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
430 wake_up(&channel->ptr->dma_wait_q);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
431 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
432 mutex_unlock(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
433 return size ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
434 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
435 static int SetFreq(PT1_CHANNEL *channel, FREQUENCY *freq)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
436 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
437
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
438 switch(channel->type){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
439 case CHANNEL_TYPE_ISDB_S:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
440 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
441 ISDB_S_TMCC tmcc ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
442 if(bs_tune(channel->ptr->regs,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
443 &channel->ptr->lock,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
444 channel->address,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
445 freq->frequencyno,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
446 &tmcc) < 0){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
447 return -EIO ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
448 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
449
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
450 #if 0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
451 printk(KERN_INFO "clockmargin = (%x)\n", (tmcc.clockmargin & 0xFF));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
452 printk(KERN_INFO "carriermargin = (%x)\n", (tmcc.carriermargin & 0xFF));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
453
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
454 for(lp = 0 ; lp < MAX_BS_TS_ID ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
455 if(tmcc.ts_id[lp].ts_id == 0xFFFF){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
456 continue ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
457 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
458 printk(KERN_INFO "Slot(%d:%x)\n", lp, tmcc.ts_id[lp].ts_id);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
459 printk(KERN_INFO "mode (low/high) = (%x:%x)\n",
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
460 tmcc.ts_id[lp].low_mode, tmcc.ts_id[lp].high_mode);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
461 printk(KERN_INFO "slot (low/high) = (%x:%x)\n",
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
462 tmcc.ts_id[lp].low_slot,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
463 tmcc.ts_id[lp].high_slot);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
464 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
465 #endif
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
466 ts_lock(channel->ptr->regs,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
467 &channel->ptr->lock,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
468 channel->address,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
469 tmcc.ts_id[freq->slot].ts_id);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
470 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
471 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
472 case CHANNEL_TYPE_ISDB_T:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
473 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
474 if(isdb_t_frequency(channel->ptr->regs,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
475 &channel->ptr->lock,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
476 channel->address,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
477 freq->frequencyno, freq->slot) < 0){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
478 return -EINVAL ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
479 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
480 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
481 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
482 return 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
483 }
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
484 static int pt1_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg0)
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
485 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
486 PT1_CHANNEL *channel = file->private_data;
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
487 int signal ;
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
488 unsigned long dummy;
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
489 void *arg = (void *)arg0;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
490
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
491 switch(cmd){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
492 case SET_CHANNEL:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
493 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
494 FREQUENCY freq ;
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
495 dummy = copy_from_user(&freq, arg, sizeof(FREQUENCY));
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
496 return SetFreq(channel, &freq);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
497 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
498 case START_REC:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
499 SetStream(channel->ptr->regs, channel->channel, TRUE);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
500 return 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
501 case STOP_REC:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
502 SetStream(channel->ptr->regs, channel->channel, FALSE);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
503 return 0 ;
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
504 case GET_SIGNAL_STRENGTH:
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
505 switch(channel->type){
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
506 case CHANNEL_TYPE_ISDB_S:
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
507 {
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
508 signal = isdb_s_read_signal_strength(channel->ptr->regs,
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
509 &channel->ptr->lock,
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
510 channel->address);
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
511 }
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
512 break ;
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
513 case CHANNEL_TYPE_ISDB_T:
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
514 // calc C/N
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
515 signal = isdb_t_read_signal_strength(channel->ptr->regs,
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
516 &channel->ptr->lock, channel->address);
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
517 break ;
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
518 }
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
519 dummy = copy_to_user(arg, &signal, sizeof(int));
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
520 return 0 ;
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
521 case LNB_ENABLE:
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
522 if(lnb){
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
523 settuner_reset(channel->ptr->regs, channel->ptr->cardtype, lnb, TUNER_POWER_ON_RESET_DISABLE);
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
524 }
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
525 return 0 ;
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
526 case LNB_DISABLE:
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
527 if(lnb){
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
528 settuner_reset(channel->ptr->regs, channel->ptr->cardtype, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE);
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
529 }
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
530 return 0 ;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
531 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
532 return -EINVAL;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
533 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
534
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
535 /*
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
536 */
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
537 static const struct file_operations pt1_fops = {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
538 .owner = THIS_MODULE,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
539 .open = pt1_open,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
540 .release = pt1_release,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
541 .read = pt1_read,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
542 .ioctl = pt1_ioctl,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
543 .llseek = no_llseek,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
544 };
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
545
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
546 int pt1_makering(struct pci_dev *pdev, PT1_DEVICE *dev_conf)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
547 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
548 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
549 int lp2 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
550 DMA_CONTROL *dmactl;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
551 __u32 *dmaptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
552 __u32 addr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
553 __u32 *ptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
554
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
555 //DMAリング作成
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
556 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
557 ptr = dev_conf->dmaptr[lp];
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
558 if(lp == (DMA_RING_SIZE - 1)){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
559 addr = (__u32)dev_conf->ring_dma[0];
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
560 }else{
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
561 addr = (__u32)dev_conf->ring_dma[(lp + 1)];
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
562 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
563 addr >>= 12 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
564 memcpy(ptr, &addr, sizeof(__u32));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
565 ptr += 1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
566
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
567 dmactl = dev_conf->dmactl[lp];
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
568 for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
569 dmaptr = pci_alloc_consistent(pdev, DMA_SIZE, &dmactl->ring_dma[lp2]);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
570 if(dmaptr == NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
571 printk(KERN_INFO "PT1:DMA ALLOC ERROR\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
572 return -1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
573 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
574 dmactl->data[lp2] = dmaptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
575 // DMAデータエリア初期化
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
576 dmaptr[(DMA_SIZE / sizeof(__u32)) - 2] = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
577 addr = (__u32)dmactl->ring_dma[lp2];
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
578 addr >>= 12 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
579 memcpy(ptr, &addr, sizeof(__u32));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
580 ptr += 1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
581 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
582 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
583 return 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
584 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
585 int pt1_dma_init(struct pci_dev *pdev, PT1_DEVICE *dev_conf)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
586 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
587 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
588 void *ptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
589
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
590 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
591 ptr = pci_alloc_consistent(pdev, DMA_SIZE, &dev_conf->ring_dma[lp]);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
592 if(ptr == NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
593 printk(KERN_INFO "PT1:DMA ALLOC ERROR\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
594 return -1 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
595 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
596 dev_conf->dmaptr[lp] = ptr ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
597 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
598
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
599 return pt1_makering(pdev, dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
600 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
601 int pt1_dma_free(struct pci_dev *pdev, PT1_DEVICE *dev_conf)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
602 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
603
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
604 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
605 int lp2 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
606
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
607 for(lp = 0 ; lp < DMA_RING_SIZE ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
608 if(dev_conf->dmaptr[lp] != NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
609 pci_free_consistent(pdev, DMA_SIZE,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
610 dev_conf->dmaptr[lp], dev_conf->ring_dma[lp]);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
611 for(lp2 = 0 ; lp2 < DMA_RING_MAX ; lp2++){
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
612 if((dev_conf->dmactl[lp])->data[lp2] != NULL){
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
613 pci_free_consistent(pdev, DMA_SIZE,
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
614 (dev_conf->dmactl[lp])->data[lp2],
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
615 (dev_conf->dmactl[lp])->ring_dma[lp2]);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
616 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
617 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
618 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
619 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
620 return 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
621 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
622 static int __devinit pt1_pci_init_one (struct pci_dev *pdev,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
623 const struct pci_device_id *ent)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
624 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
625 int rc ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
626 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
627 int minor ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
628 u16 cmd ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
629 PT1_DEVICE *dev_conf ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
630 PT1_CHANNEL *channel ;
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
631 int i;
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
632 struct resource *dummy;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
633
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
634 rc = pci_enable_device(pdev);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
635 if (rc)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
636 return rc;
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
637 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
638 if (rc) {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
639 printk(KERN_ERR "PT1:DMA MASK ERROR");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
640 return rc;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
641 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
642
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
643 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
644 if (!(cmd & PCI_COMMAND_MASTER)) {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
645 printk(KERN_INFO "Attempting to enable Bus Mastering\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
646 pci_set_master(pdev);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
647 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
648 if (!(cmd & PCI_COMMAND_MASTER)) {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
649 printk(KERN_ERR "Bus Mastering is not enabled\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
650 return -EIO;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
651 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
652 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
653 printk(KERN_INFO "Bus Mastering Enabled.\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
654
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
655 dev_conf = kzalloc(sizeof(PT1_DEVICE), GFP_KERNEL);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
656 if(!dev_conf){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
657 printk(KERN_ERR "PT1:out of memory !");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
658 return -ENOMEM ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
659 }
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
660 for (i = 0; i < DMA_RING_SIZE; i++) {
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
661 dev_conf->dmactl[i] = kzalloc(sizeof(DMA_CONTROL), GFP_KERNEL);
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
662 if(!dev_conf->dmactl[i]){
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
663 int j;
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
664 for (j = 0; j < i; j++) {
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
665 kfree(dev_conf->dmactl[j]);
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
666 }
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
667 kfree(dev_conf);
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
668 printk(KERN_ERR "PT1:out of memory !");
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
669 return -ENOMEM ;
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
670 }
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
671 }
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
672
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
673 switch(ent->device) {
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
674 case PCI_PT1_ID:
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
675 dev_conf->cardtype = PT1;
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
676 break;
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
677 case PCI_PT2_ID:
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
678 dev_conf->cardtype = PT2;
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
679 break;
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
680 default:
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
681 break;
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
682 }
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
683
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
684 // PCIアドレスをマップする
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
685 dev_conf->mmio_start = pci_resource_start(pdev, 0);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
686 dev_conf->mmio_len = pci_resource_len(pdev, 0);
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
687 dummy = request_mem_region(dev_conf->mmio_start, dev_conf->mmio_len, DEV_NAME);
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
688 if (!dummy) {
79
3c2123189edf improve PT2 support.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 69
diff changeset
689 printk(KERN_ERR "PT1:cannot request iomem (0x%llx).\n", (unsigned long long) dev_conf->mmio_start);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
690 goto out_err_regbase;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
691 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
692
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
693 dev_conf->regs = ioremap(dev_conf->mmio_start, dev_conf->mmio_len);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
694 if (!dev_conf->regs){
79
3c2123189edf improve PT2 support.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 69
diff changeset
695 printk(KERN_ERR "pt1:Can't remap register area.\n");
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
696 goto out_err_regbase;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
697 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
698 // 初期化処理
79
3c2123189edf improve PT2 support.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 69
diff changeset
699 if(xc3s_init(dev_conf->regs, dev_conf->cardtype)){
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
700 printk(KERN_ERR "Error xc3s_init\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
701 goto out_err_fpga;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
702 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
703 // チューナリセット
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
704 settuner_reset(dev_conf->regs, dev_conf->cardtype, LNB_OFF, TUNER_POWER_ON_RESET_ENABLE);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
705 schedule_timeout_interruptible(msecs_to_jiffies(50));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
706
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
707 settuner_reset(dev_conf->regs, dev_conf->cardtype, LNB_OFF, TUNER_POWER_ON_RESET_DISABLE);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
708 schedule_timeout_interruptible(msecs_to_jiffies(10));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
709 mutex_init(&dev_conf->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
710
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
711 // Tuner 初期化処理
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
712 for(lp = 0 ; lp < MAX_TUNER ; lp++){
69
272a8fba970b added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 64
diff changeset
713 rc = tuner_init(dev_conf->regs, dev_conf->cardtype, &dev_conf->lock, lp);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
714 if(rc < 0){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
715 printk(KERN_ERR "Error tuner_init\n");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
716 goto out_err_fpga;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
717 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
718 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
719 // 初期化完了
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
720 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
721 set_sleepmode(dev_conf->regs, &dev_conf->lock,
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
722 i2c_address[lp], channeltype[lp], TYPE_SLEEP);
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
723
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
724 schedule_timeout_interruptible(msecs_to_jiffies(50));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
725 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
726 rc = alloc_chrdev_region(&dev_conf->dev, 0, MAX_CHANNEL, DEV_NAME);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
727 if(rc < 0){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
728 goto out_err_fpga;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
729 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
730
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
731 // 初期化
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
732 init_waitqueue_head(&dev_conf->dma_wait_q);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
733
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
734 minor = MINOR(dev_conf->dev) ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
735 dev_conf->base_minor = minor ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
736 for(lp = 0 ; lp < MAX_PCI_DEVICE ; lp++){
79
3c2123189edf improve PT2 support.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 69
diff changeset
737 printk(KERN_INFO "PT1:device[%d]=%p\n", lp, device[lp]);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
738 if(device[lp] == NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
739 device[lp] = dev_conf ;
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
740 dev_conf->card_number = lp;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
741 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
742 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
743 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
744 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
745 cdev_init(&dev_conf->cdev[lp], &pt1_fops);
30
eb694d8e4c7e setup owner in initialization
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 9
diff changeset
746 dev_conf->cdev[lp].owner = THIS_MODULE;
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
747 cdev_add(&dev_conf->cdev[lp],
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
748 MKDEV(MAJOR(dev_conf->dev), (MINOR(dev_conf->dev) + lp)), 1);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
749 channel = kzalloc(sizeof(PT1_CHANNEL), GFP_KERNEL);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
750 if(!channel){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
751 printk(KERN_ERR "PT1:out of memory !");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
752 return -ENOMEM ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
753 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
754
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
755 // 共通情報
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
756 mutex_init(&channel->lock);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
757 // 待ち状態を解除
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
758 channel->req_dma = FALSE ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
759 // マイナー番号設定
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
760 channel->minor = MINOR(dev_conf->dev) + lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
761 // 対象のI2Cデバイス
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
762 channel->address = i2c_address[lp] ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
763 channel->type = channeltype[lp] ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
764 // 実際のチューナ番号
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
765 channel->channel = real_chanel[lp] ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
766 channel->ptr = dev_conf ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
767 channel->size = 0 ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
768 dev_conf->channel[lp] = channel ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
769
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
770 init_waitqueue_head(&channel->wait_q);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
771
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
772 switch(channel->type){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
773 case CHANNEL_TYPE_ISDB_T:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
774 channel->maxsize = CHANEL_DMA_SIZE ;
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
775 channel->buf = vmalloc(CHANEL_DMA_SIZE);
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
776 channel->pointer = 0;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
777 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
778 case CHANNEL_TYPE_ISDB_S:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
779 channel->maxsize = BS_CHANEL_DMA_SIZE ;
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
780 channel->buf = vmalloc(BS_CHANEL_DMA_SIZE);
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
781 channel->pointer = 0;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
782 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
783 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
784 if(channel->buf == NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
785 goto out_err_v4l;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
786 }
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
787 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
79
3c2123189edf improve PT2 support.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 69
diff changeset
788 printk(KERN_INFO "PT1:card_number = %d\n",
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
789 dev_conf->card_number);
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
790 device_create(pt1video_class,
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
791 NULL,
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
792 MKDEV(MAJOR(dev_conf->dev),
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
793 (MINOR(dev_conf->dev) + lp)),
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
794 NULL,
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
795 "pt1video%u",
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
796 MINOR(dev_conf->dev) + lp +
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
797 dev_conf->card_number * MAX_CHANNEL);
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
798 #else
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
799 device_create(pt1video_class,
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
800 NULL,
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
801 MKDEV(MAJOR(dev_conf->dev),
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
802 (MINOR(dev_conf->dev) + lp)),
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
803 "pt1video%u",
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
804 MINOR(dev_conf->dev) + lp +
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
805 dev_conf->card_number * MAX_CHANNEL);
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
806 #endif
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
807
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
808 #if 0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
809 dev_conf->vdev[lp] = video_device_alloc();
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
810 memcpy(dev_conf->vdev[lp], &pt1_template, sizeof(pt1_template));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
811 video_set_drvdata(dev_conf->vdev[lp], channel);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
812 video_register_device(dev_conf->vdev[lp], VFL_TYPE_GRABBER, -1);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
813 #endif
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
814 }
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
815
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
816 if(pt1_dma_init(pdev, dev_conf) < 0){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
817 goto out_err_dma;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
818 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
819 dev_conf->kthread = kthread_run(pt1_thread, dev_conf, "pt1");
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
820 pci_set_drvdata(pdev, dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
821 return 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
822
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
823 out_err_dma:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
824 pt1_dma_free(pdev, dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
825 out_err_v4l:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
826 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
827 if(dev_conf->channel[lp] != NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
828 if(dev_conf->channel[lp]->buf != NULL){
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
829 vfree(dev_conf->channel[lp]->buf);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
830 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
831 kfree(dev_conf->channel[lp]);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
832 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
833 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
834 out_err_fpga:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
835 writel(0xb0b0000, dev_conf->regs);
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
836 writel(0, dev_conf->regs + CFG_REGS_ADDR);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
837 iounmap(dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
838 release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len);
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
839 for (i = 0; i < DMA_RING_SIZE; i++) {
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
840 kfree(dev_conf->dmactl[i]);
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
841 }
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
842 kfree(dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
843 out_err_regbase:
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
844 return -EIO;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
845
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
846 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
847
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
848 static void __devexit pt1_pci_remove_one(struct pci_dev *pdev)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
849 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
850
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
851 int lp ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
852 __u32 val ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
853 PT1_DEVICE *dev_conf = (PT1_DEVICE *)pci_get_drvdata(pdev);
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
854 int i;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
855
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
856 if(dev_conf){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
857 if(dev_conf->kthread) {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
858 kthread_stop(dev_conf->kthread);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
859 dev_conf->kthread = NULL;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
860 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
861
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
862 // DMA終了
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
863 writel(0x08080000, dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
864 for(lp = 0 ; lp < 10 ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
865 val = readl(dev_conf->regs);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
866 if(!(val & (1 << 6))){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
867 break ;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
868 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
869 schedule_timeout_interruptible(msecs_to_jiffies(1));
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
870 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
871 pt1_dma_free(pdev, dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
872 for(lp = 0 ; lp < MAX_CHANNEL ; lp++){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
873 if(dev_conf->channel[lp] != NULL){
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
874 cdev_del(&dev_conf->cdev[lp]);
41
51a006a8d843 imported patch ringbuf-vmalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 40
diff changeset
875 vfree(dev_conf->channel[lp]->buf);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
876 kfree(dev_conf->channel[lp]);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
877 }
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
878 device_destroy(pt1video_class,
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
879 MKDEV(MAJOR(dev_conf->dev),
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
880 (MINOR(dev_conf->dev) + lp)));
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
881 }
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
882
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
883 unregister_chrdev_region(dev_conf->dev, MAX_CHANNEL);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
884 writel(0xb0b0000, dev_conf->regs);
64
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
885 writel(0, dev_conf->regs + CFG_REGS_ADDR);
98a92ce5382e added fake support code for PT2. the PT2 part is not expected to work. be careful!
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 51
diff changeset
886 settuner_reset(dev_conf->regs, dev_conf->cardtype, LNB_OFF, TUNER_POWER_OFF);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
887 release_mem_region(dev_conf->mmio_start, dev_conf->mmio_len);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
888 iounmap(dev_conf->regs);
40
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
889 for (i = 0; i < DMA_RING_SIZE; i++) {
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
890 kfree(dev_conf->dmactl[i]);
8f30a05cded2 imported patch dmactlalloc
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 37
diff changeset
891 }
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
892 device[dev_conf->card_number] = NULL;
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
893 kfree(dev_conf);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
894 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
895 pci_set_drvdata(pdev, NULL);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
896 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
897 #ifdef CONFIG_PM
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
898
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
899 static int pt1_pci_suspend (struct pci_dev *pdev, pm_message_t state)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
900 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
901 return 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
902 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
903
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
904 static int pt1_pci_resume (struct pci_dev *pdev)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
905 {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
906 return 0;
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
907 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
908
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
909 #endif /* CONFIG_PM */
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
910
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
911
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
912 static struct pci_driver pt1_driver = {
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
913 .name = DRV_NAME,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
914 .probe = pt1_pci_init_one,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
915 .remove = __devexit_p(pt1_pci_remove_one),
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
916 .id_table = pt1_pci_tbl,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
917 #ifdef CONFIG_PM
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
918 .suspend = pt1_pci_suspend,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
919 .resume = pt1_pci_resume,
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
920 #endif /* CONFIG_PM */
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
921
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
922 };
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
923
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
924
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
925 static int __init pt1_pci_init(void)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
926 {
36
65c8ac567074 cleaning up:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 31
diff changeset
927 printk(version);
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
928 pt1video_class = class_create(THIS_MODULE, DRIVERNAME);
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
929 if (IS_ERR(pt1video_class))
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
930 return PTR_ERR(pt1video_class);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
931 return pci_register_driver(&pt1_driver);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
932 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
933
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
934
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
935 static void __exit pt1_pci_cleanup(void)
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
936 {
9
07b2fc07ff48 updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 0
diff changeset
937 class_destroy(pt1video_class);
31
289794dc265f adapted to use of multiple number of pt1:
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents: 30
diff changeset
938 pci_unregister_driver(&pt1_driver);
0
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
939 }
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
940
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
941 module_init(pt1_pci_init);
67e8eca28a80 initial import
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
diff changeset
942 module_exit(pt1_pci_cleanup);