Mercurial > libavcodec.hg
annotate ppc/dsputil_ppc.c @ 2014:15c885db82a8 libavcodec
reduce dependancy between motion estimation and MpegEncContext
this is practically just a s/s->me./c->/
author | michael |
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date | Tue, 11 May 2004 00:58:08 +0000 |
parents | 1ba490d60bb9 |
children | 31bf68b1792b |
rev | line source |
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1 /* |
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2 * Copyright (c) 2002 Brian Foley |
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3 * Copyright (c) 2002 Dieter Shirley |
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4 * Copyright (c) 2003-2004 Romain Dolbeau <romain@dolbeau.org> |
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5 * |
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6 * This library is free software; you can redistribute it and/or |
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7 * modify it under the terms of the GNU Lesser General Public |
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8 * License as published by the Free Software Foundation; either |
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9 * version 2 of the License, or (at your option) any later version. |
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10 * |
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11 * This library is distributed in the hope that it will be useful, |
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12 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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14 * Lesser General Public License for more details. |
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15 * |
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16 * You should have received a copy of the GNU Lesser General Public |
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17 * License along with this library; if not, write to the Free Software |
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18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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19 */ |
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20 |
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21 #include "../dsputil.h" |
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22 |
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23 #include "dsputil_ppc.h" |
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24 |
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25 #ifdef HAVE_ALTIVEC |
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26 #include "dsputil_altivec.h" |
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27 #endif |
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28 |
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29 extern void fdct_altivec(int16_t *block); |
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31 extern void idct_add_altivec(uint8_t *dest, int line_size, int16_t *block); | |
32 | |
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33 int mm_flags = 0; |
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34 |
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35 int mm_support(void) |
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36 { |
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37 int result = 0; |
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38 #ifdef HAVE_ALTIVEC |
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39 if (has_altivec()) { |
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40 result |= MM_ALTIVEC; |
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41 } |
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42 #endif /* result */ |
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43 return result; |
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44 } |
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45 |
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46 #ifdef POWERPC_PERFORMANCE_REPORT |
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47 unsigned long long perfdata[POWERPC_NUM_PMC_ENABLED][powerpc_perf_total][powerpc_data_total]; |
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48 /* list below must match enum in dsputil_ppc.h */ |
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49 static unsigned char* perfname[] = { |
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50 "ff_fft_calc_altivec", |
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51 "gmc1_altivec", |
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52 "dct_unquantize_h263_altivec", |
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53 "fdct_altivec", |
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54 "idct_add_altivec", |
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55 "idct_put_altivec", |
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56 "put_pixels16_altivec", |
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57 "avg_pixels16_altivec", |
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58 "avg_pixels8_altivec", |
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59 "put_pixels8_xy2_altivec", |
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60 "put_no_rnd_pixels8_xy2_altivec", |
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61 "put_pixels16_xy2_altivec", |
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62 "put_no_rnd_pixels16_xy2_altivec", |
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63 "hadamard8_diff8x8_altivec", |
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64 "hadamard8_diff16_altivec", |
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65 "clear_blocks_dcbz32_ppc", |
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66 "clear_blocks_dcbz128_ppc" |
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67 }; |
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68 #include <stdio.h> |
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69 #endif |
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70 |
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71 #ifdef POWERPC_PERFORMANCE_REPORT |
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72 void powerpc_display_perf_report(void) |
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73 { |
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74 int i, j; |
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75 av_log(NULL, AV_LOG_INFO, "PowerPC performance report\n Values are from the PMC registers, and represent whatever the registers are set to record.\n"); |
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76 for(i = 0 ; i < powerpc_perf_total ; i++) |
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77 { |
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78 for (j = 0; j < POWERPC_NUM_PMC_ENABLED ; j++) |
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79 { |
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80 if (perfdata[j][i][powerpc_data_num] != (unsigned long long)0) |
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81 av_log(NULL, AV_LOG_INFO, |
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82 " Function \"%s\" (pmc%d):\n\tmin: %llu\n\tmax: %llu\n\tavg: %1.2lf (%llu)\n", |
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83 perfname[i], |
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84 j+1, |
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85 perfdata[j][i][powerpc_data_min], |
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86 perfdata[j][i][powerpc_data_max], |
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87 (double)perfdata[j][i][powerpc_data_sum] / |
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88 (double)perfdata[j][i][powerpc_data_num], |
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89 perfdata[j][i][powerpc_data_num]); |
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90 } |
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91 } |
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92 } |
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93 #endif /* POWERPC_PERFORMANCE_REPORT */ |
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94 |
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95 /* ***** WARNING ***** WARNING ***** WARNING ***** */ |
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96 /* |
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97 clear_blocks_dcbz32_ppc will not work properly |
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98 on PowerPC processors with a cache line size |
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99 not equal to 32 bytes. |
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100 Fortunately all processor used by Apple up to |
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101 at least the 7450 (aka second generation G4) |
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102 use 32 bytes cache line. |
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103 This is due to the use of the 'dcbz' instruction. |
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104 It simply clear to zero a single cache line, |
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105 so you need to know the cache line size to use it ! |
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106 It's absurd, but it's fast... |
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107 |
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108 update 24/06/2003 : Apple released yesterday the G5, |
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109 with a PPC970. cache line size : 128 bytes. Oups. |
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110 The semantic of dcbz was changed, it always clear |
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111 32 bytes. so the function below will work, but will |
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112 be slow. So I fixed check_dcbz_effect to use dcbzl, |
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113 which is defined to clear a cache line (as dcbz before). |
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114 So we still can distinguish, and use dcbz (32 bytes) |
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115 or dcbzl (one cache line) as required. |
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116 |
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117 see <http://developer.apple.com/technotes/tn/tn2087.html> |
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118 and <http://developer.apple.com/technotes/tn/tn2086.html> |
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119 */ |
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120 void clear_blocks_dcbz32_ppc(DCTELEM *blocks) |
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121 { |
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122 POWERPC_PERF_DECLARE(powerpc_clear_blocks_dcbz32, 1); |
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123 register int misal = ((unsigned long)blocks & 0x00000010); |
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124 register int i = 0; |
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125 POWERPC_PERF_START_COUNT(powerpc_clear_blocks_dcbz32, 1); |
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126 #if 1 |
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127 if (misal) { |
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128 ((unsigned long*)blocks)[0] = 0L; |
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129 ((unsigned long*)blocks)[1] = 0L; |
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130 ((unsigned long*)blocks)[2] = 0L; |
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131 ((unsigned long*)blocks)[3] = 0L; |
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132 i += 16; |
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133 } |
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134 for ( ; i < sizeof(DCTELEM)*6*64 ; i += 32) { |
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135 #ifndef __MWERKS__ |
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136 asm volatile("dcbz %0,%1" : : "b" (blocks), "r" (i) : "memory"); |
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137 #else |
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138 __dcbz( blocks, i ); |
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139 #endif |
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140 } |
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141 if (misal) { |
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142 ((unsigned long*)blocks)[188] = 0L; |
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143 ((unsigned long*)blocks)[189] = 0L; |
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144 ((unsigned long*)blocks)[190] = 0L; |
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145 ((unsigned long*)blocks)[191] = 0L; |
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146 i += 16; |
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147 } |
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148 #else |
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149 memset(blocks, 0, sizeof(DCTELEM)*6*64); |
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150 #endif |
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151 POWERPC_PERF_STOP_COUNT(powerpc_clear_blocks_dcbz32, 1); |
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152 } |
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153 |
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154 /* same as above, when dcbzl clear a whole 128B cache line |
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155 i.e. the PPC970 aka G5 */ |
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156 #ifndef NO_DCBZL |
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157 void clear_blocks_dcbz128_ppc(DCTELEM *blocks) |
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158 { |
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159 POWERPC_PERF_DECLARE(powerpc_clear_blocks_dcbz128, 1); |
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160 register int misal = ((unsigned long)blocks & 0x0000007f); |
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161 register int i = 0; |
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162 POWERPC_PERF_START_COUNT(powerpc_clear_blocks_dcbz128, 1); |
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163 #if 1 |
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164 if (misal) { |
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165 // we could probably also optimize this case, |
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166 // but there's not much point as the machines |
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167 // aren't available yet (2003-06-26) |
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168 memset(blocks, 0, sizeof(DCTELEM)*6*64); |
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169 } |
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170 else |
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171 for ( ; i < sizeof(DCTELEM)*6*64 ; i += 128) { |
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172 asm volatile("dcbzl %0,%1" : : "b" (blocks), "r" (i) : "memory"); |
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173 } |
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174 #else |
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175 memset(blocks, 0, sizeof(DCTELEM)*6*64); |
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176 #endif |
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177 POWERPC_PERF_STOP_COUNT(powerpc_clear_blocks_dcbz128, 1); |
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178 } |
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179 #else |
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180 void clear_blocks_dcbz128_ppc(DCTELEM *blocks) |
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181 { |
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182 memset(blocks, 0, sizeof(DCTELEM)*6*64); |
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183 } |
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184 #endif |
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185 |
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186 #ifndef NO_DCBZL |
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187 /* check dcbz report how many bytes are set to 0 by dcbz */ |
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188 /* update 24/06/2003 : replace dcbz by dcbzl to get |
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189 the intended effect (Apple "fixed" dcbz) |
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190 unfortunately this cannot be used unless the assembler |
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191 knows about dcbzl ... */ |
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192 long check_dcbzl_effect(void) |
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193 { |
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194 register char *fakedata = (char*)av_malloc(1024); |
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195 register char *fakedata_middle; |
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196 register long zero = 0; |
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197 register long i = 0; |
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198 long count = 0; |
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199 |
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200 if (!fakedata) |
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201 { |
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202 return 0L; |
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203 } |
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204 |
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205 fakedata_middle = (fakedata + 512); |
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206 |
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207 memset(fakedata, 0xFF, 1024); |
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208 |
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209 /* below the constraint "b" seems to mean "Address base register" |
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210 in gcc-3.3 / RS/6000 speaks. seems to avoid using r0, so.... */ |
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211 asm volatile("dcbzl %0, %1" : : "b" (fakedata_middle), "r" (zero)); |
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212 |
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213 for (i = 0; i < 1024 ; i ++) |
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214 { |
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215 if (fakedata[i] == (char)0) |
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216 count++; |
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217 } |
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218 |
1033
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Altivec on non darwin systems patch by Romain Dolbeau
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219 av_free(fakedata); |
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220 |
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221 return count; |
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222 } |
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223 #else |
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224 long check_dcbzl_effect(void) |
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225 { |
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226 return 0; |
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227 } |
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228 #endif |
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229 |
1092 | 230 void dsputil_init_ppc(DSPContext* c, AVCodecContext *avctx) |
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231 { |
1334
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232 // Common optimizations whether Altivec is available or not |
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233 |
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234 switch (check_dcbzl_effect()) { |
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235 case 32: |
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236 c->clear_blocks = clear_blocks_dcbz32_ppc; |
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237 break; |
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238 case 128: |
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239 c->clear_blocks = clear_blocks_dcbz128_ppc; |
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240 break; |
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241 default: |
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242 break; |
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243 } |
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244 |
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245 #ifdef HAVE_ALTIVEC |
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altivec build tidyup patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
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246 if (has_altivec()) { |
894
a408778eff87
altivec accelerated v-resample patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
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247 mm_flags |= MM_ALTIVEC; |
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altivec accelerated v-resample patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
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248 |
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249 // Altivec specific optimisations |
1708 | 250 c->pix_abs[0][1] = sad16_x2_altivec; |
251 c->pix_abs[0][2] = sad16_y2_altivec; | |
252 c->pix_abs[0][3] = sad16_xy2_altivec; | |
253 c->pix_abs[0][0] = sad16_altivec; | |
254 c->pix_abs[1][0] = sad8_altivec; | |
255 c->sad[0]= sad16_altivec; | |
256 c->sad[1]= sad8_altivec; | |
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altivec optimizations patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
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257 c->pix_norm1 = pix_norm1_altivec; |
981 | 258 c->sse[1]= sse8_altivec; |
259 c->sse[0]= sse16_altivec; | |
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260 c->pix_sum = pix_sum_altivec; |
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261 c->diff_pixels = diff_pixels_altivec; |
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262 c->get_pixels = get_pixels_altivec; |
1024
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263 // next one disabled as it's untested. |
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264 #if 0 |
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265 c->add_bytes= add_bytes_altivec; |
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266 #endif /* 0 */ |
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267 c->put_pixels_tab[0][0] = put_pixels16_altivec; |
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268 /* the two functions do the same thing, so use the same code */ |
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269 c->put_no_rnd_pixels_tab[0][0] = put_pixels16_altivec; |
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270 c->avg_pixels_tab[0][0] = avg_pixels16_altivec; |
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271 // next one disabled as it's untested. |
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272 #if 0 |
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273 c->avg_pixels_tab[1][0] = avg_pixels8_altivec; |
1024
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274 #endif /* 0 */ |
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275 c->put_pixels_tab[1][3] = put_pixels8_xy2_altivec; |
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More AltiVec MC functions patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
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276 c->put_no_rnd_pixels_tab[1][3] = put_no_rnd_pixels8_xy2_altivec; |
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277 c->put_pixels_tab[0][3] = put_pixels16_xy2_altivec; |
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278 c->put_no_rnd_pixels_tab[0][3] = put_no_rnd_pixels16_xy2_altivec; |
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279 |
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280 c->gmc1 = gmc1_altivec; |
1092 | 281 |
1981
1ba490d60bb9
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282 #if (__GNUC__ * 100 + __GNUC_MINOR__ >= 330) |
1949
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283 c->hadamard8_diff[0] = hadamard8_diff16_altivec; |
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284 c->hadamard8_diff[1] = hadamard8_diff8x8_altivec; |
1981
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285 #endif |
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286 |
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287 #ifdef CONFIG_ENCODERS |
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288 if (avctx->dct_algo == FF_DCT_AUTO || |
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289 avctx->dct_algo == FF_DCT_ALTIVEC) |
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290 { |
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291 c->fdct = fdct_altivec; |
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292 } |
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293 #endif //CONFIG_ENCODERS |
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294 |
1092 | 295 if ((avctx->idct_algo == FF_IDCT_AUTO) || |
296 (avctx->idct_algo == FF_IDCT_ALTIVEC)) | |
297 { | |
298 c->idct_put = idct_put_altivec; | |
299 c->idct_add = idct_add_altivec; | |
300 #ifndef ALTIVEC_USE_REFERENCE_C_CODE | |
301 c->idct_permutation_type = FF_TRANSPOSE_IDCT_PERM; | |
302 #else /* ALTIVEC_USE_REFERENCE_C_CODE */ | |
303 c->idct_permutation_type = FF_NO_IDCT_PERM; | |
304 #endif /* ALTIVEC_USE_REFERENCE_C_CODE */ | |
305 } | |
1024
9cc1031e1864
More AltiVec MC functions patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
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306 |
1352
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|
307 #ifdef POWERPC_PERFORMANCE_REPORT |
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308 { |
1352
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309 int i, j; |
1015
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310 for (i = 0 ; i < powerpc_perf_total ; i++) |
1009
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AltiVec perf (take 2), plus a couple AltiVec functions by (Romain Dolbeau <dolbeau at irisa dot fr>)
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311 { |
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312 for (j = 0; j < POWERPC_NUM_PMC_ENABLED ; j++) |
e8ff4783f188
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313 { |
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314 perfdata[j][i][powerpc_data_min] = (unsigned long long)0xFFFFFFFFFFFFFFFF; |
e8ff4783f188
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315 perfdata[j][i][powerpc_data_max] = (unsigned long long)0x0000000000000000; |
e8ff4783f188
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316 perfdata[j][i][powerpc_data_sum] = (unsigned long long)0x0000000000000000; |
e8ff4783f188
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317 perfdata[j][i][powerpc_data_num] = (unsigned long long)0x0000000000000000; |
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318 } |
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319 } |
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AltiVec perf (take 2), plus a couple AltiVec functions by (Romain Dolbeau <dolbeau at irisa dot fr>)
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320 } |
1352
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changeset
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321 #endif /* POWERPC_PERFORMANCE_REPORT */ |
638
0012f75c92bb
altivec build tidyup patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
michaelni
parents:
diff
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322 } else |
1024
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More AltiVec MC functions patch by (Romain Dolbeau <dolbeau at irisa dot fr>)
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323 #endif /* HAVE_ALTIVEC */ |
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324 { |
828
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325 // Non-AltiVec PPC optimisations |
ace3ccd18dd2
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326 |
ace3ccd18dd2
Altivec Patch (Mark III) by (Dieter Shirley <dieters at schemasoft dot com>)
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327 // ... pending ... |
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altivec build tidyup patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
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328 } |
0012f75c92bb
altivec build tidyup patch by (Brian Foley <bfoley at compsoc dot nuigalway dot ie>)
michaelni
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329 } |