annotate common.h @ 277:5cb2978e701f libavcodec

new motion estimation (epzs) not complete yet but allready pretty good :) unlimited mv search range minor bugfix in the mpeg4 header parser reset picture in gop counter if scene change is detected
author michaelni
date Fri, 22 Mar 2002 02:21:17 +0000
parents 28c5c62b1c4c
children 2899263586cd
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1 #ifndef COMMON_H
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2 #define COMMON_H
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3
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4 #define FFMPEG_VERSION_INT 0x000406
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5 #define FFMPEG_VERSION "0.4.6"
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6
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7 #if defined(WIN32) && !defined(__MINGW32__) && !defined(__CYGWIN__)
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8 #define CONFIG_WIN32
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9 #endif
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10
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11 //#define ALT_BITSTREAM_WRITER
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12 //#define ALIGNED_BITSTREAM_WRITER
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13 //#define ALT_BITSTREAM_READER
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14 //#define ALIGNED_BITSTREAM
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15 #define FAST_GET_FIRST_VLC
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17 #ifdef HAVE_AV_CONFIG_H
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18 /* only include the following when compiling package */
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19 #include "../config.h"
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20
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21 #include <stdlib.h>
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22 #include <stdio.h>
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23 #include <string.h>
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24 #include <errno.h>
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25
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26 #ifndef ENODATA
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27 #define ENODATA 61
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28 #endif
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30 #endif
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31
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32 #ifdef CONFIG_WIN32
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33
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34 /* windows */
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35
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36 typedef unsigned short UINT16;
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37 typedef signed short INT16;
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38 typedef unsigned char UINT8;
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39 typedef unsigned int UINT32;
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40 typedef unsigned __int64 UINT64;
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41 typedef signed char INT8;
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42 typedef signed int INT32;
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43 typedef signed __int64 INT64;
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44
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45 typedef UINT8 uint8_t;
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46 typedef INT8 int8_t;
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47 typedef UINT16 uint16_t;
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48 typedef INT16 int16_t;
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49 typedef UINT32 uint32_t;
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50 typedef INT32 int32_t;
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51
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52 #ifndef __MINGW32__
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53 #define INT64_C(c) (c ## i64)
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54 #define UINT64_C(c) (c ## i64)
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55
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56 #define inline __inline
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57
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58 /*
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59 Disable warning messages:
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60 warning C4244: '=' : conversion from 'double' to 'float', possible loss of data
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61 warning C4305: 'argument' : truncation from 'const double' to 'float'
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62 */
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63 #pragma warning( disable : 4244 )
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64 #pragma warning( disable : 4305 )
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66 #else
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67 #define INT64_C(c) (c ## LL)
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68 #define UINT64_C(c) (c ## ULL)
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69 #endif /* __MINGW32__ */
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70
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71 #define M_PI 3.14159265358979323846
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72 #define M_SQRT2 1.41421356237309504880 /* sqrt(2) */
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73
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74 #ifdef _DEBUG
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75 #define DEBUG
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76 #endif
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78 // code from bits/byteswap.h (C) 1997, 1998 Free Software Foundation, Inc.
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79 #define bswap_32(x) \
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80 ((((x) & 0xff000000) >> 24) | (((x) & 0x00ff0000) >> 8) | \
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81 (((x) & 0x0000ff00) << 8) | (((x) & 0x000000ff) << 24))
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82 #define be2me_32(x) bswap_32(x)
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83
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84 #define snprintf _snprintf
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86 #ifndef __MINGW32__
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87 /* no config.h with VC */
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88 #define CONFIG_ENCODERS 1
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89 #define CONFIG_DECODERS 1
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90 #define CONFIG_AC3 1
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91 #endif
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93 #else
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94
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95 /* unix */
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96
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97 #include <inttypes.h>
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99 #ifndef __WINE_WINDEF16_H
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100 /* workaround for typedef conflict in MPlayer (wine typedefs) */
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101 typedef unsigned short UINT16;
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102 typedef signed short INT16;
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103 #endif
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104
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105 typedef unsigned char UINT8;
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106 typedef unsigned int UINT32;
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107 typedef unsigned long long UINT64;
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108 typedef signed char INT8;
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109 typedef signed int INT32;
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110 typedef signed long long INT64;
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112 #ifdef HAVE_AV_CONFIG_H
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113
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114 #ifdef __FreeBSD__
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115 #include <sys/param.h>
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116 #endif
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117
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118 #ifndef INT64_C
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119 #define INT64_C(c) (c ## LL)
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120 #define UINT64_C(c) (c ## ULL)
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121 #endif
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122
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123 #include "../bswap.h"
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124
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125 #ifdef USE_FASTMEMCPY
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126 #include "fastmemcpy.h"
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127 #endif
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128
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129 #endif /* HAVE_AV_CONFIG_H */
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130
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131 #endif /* !CONFIG_WIN32 */
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134 /* debug stuff */
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135 #ifdef HAVE_AV_CONFIG_H
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137 #ifndef DEBUG
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138 #define NDEBUG
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139 #endif
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140 #include <assert.h>
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142 /* dprintf macros */
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143 #if defined(CONFIG_WIN32) && !defined(__MINGW32__)
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144
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145 inline void dprintf(const char* fmt,...) {}
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146
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147 #else
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149 #ifdef DEBUG
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150 #define dprintf(fmt,args...) printf(fmt, ## args)
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151 #else
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152 #define dprintf(fmt,args...)
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153 #endif
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154
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155 #endif /* !CONFIG_WIN32 */
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157 #endif /* HAVE_AV_CONFIG_H */
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158
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159 /* bit output */
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160
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161 struct PutBitContext;
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162
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163 typedef void (*WriteDataFunc)(void *, UINT8 *, int);
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164
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165 typedef struct PutBitContext {
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166 #ifdef ALT_BITSTREAM_WRITER
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167 UINT8 *buf, *buf_end;
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168 int index;
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169 #else
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170 UINT32 bit_buf;
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171 int bit_left;
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172 UINT8 *buf, *buf_ptr, *buf_end;
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173 #endif
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174 INT64 data_out_size; /* in bytes */
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175 } PutBitContext;
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176
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177 void init_put_bits(PutBitContext *s,
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178 UINT8 *buffer, int buffer_size,
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179 void *opaque,
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180 void (*write_data)(void *, UINT8 *, int));
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181
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182 INT64 get_bit_count(PutBitContext *s); /* XXX: change function name */
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183 void align_put_bits(PutBitContext *s);
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184 void flush_put_bits(PutBitContext *s);
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185
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186 /* jpeg specific put_bits */
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187 void jflush_put_bits(PutBitContext *s);
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188
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189 /* bit input */
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190
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191 typedef struct GetBitContext {
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192 #ifdef ALT_BITSTREAM_READER
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193 int index;
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194 UINT8 *buffer;
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195 #else
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196 UINT32 bit_buf;
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197 int bit_cnt;
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198 UINT8 *buf, *buf_ptr, *buf_end;
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199 #endif
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200 int size;
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201 } GetBitContext;
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202
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203 typedef struct VLC {
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204 int bits;
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205 INT16 *table_codes;
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206 INT8 *table_bits;
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207 int table_size, table_allocated;
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208 } VLC;
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209
193
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210 /* used to avoid missaligned exceptions on some archs (alpha, ...) */
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211 #ifdef ARCH_X86
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212 #define unaligned32(a) (*(UINT32*)(a))
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213 #else
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214 #ifdef __GNUC__
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215 static inline uint32_t unaligned32(const void *v) {
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216 struct Unaligned {
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217 uint32_t i;
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218 } __attribute__((packed));
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219
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220 return ((const struct Unaligned *) v)->i;
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221 }
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222 #elif defined(__DECC)
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223 static inline uint32_t unaligned32(const void *v) {
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224 return *(const __unaligned uint32_t *) v;
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225 }
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226 #else
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227 static inline uint32_t unaligned32(const void *v) {
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228 return *(const uint32_t *) v;
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229 }
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230 #endif
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231 #endif //!ARCH_X86
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232
238
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233 #ifndef ALT_BITSTREAM_WRITER
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234 static inline void put_bits(PutBitContext *s, int n, unsigned int value)
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235 {
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236 unsigned int bit_buf;
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237 int bit_left;
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238
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239 #ifdef STATS
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240 st_out_bit_counts[st_current_index] += n;
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241 #endif
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242 // printf("put_bits=%d %x\n", n, value);
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243 assert(n == 32 || value < (1U << n));
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244
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245 bit_buf = s->bit_buf;
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246 bit_left = s->bit_left;
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247
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248 // printf("n=%d value=%x cnt=%d buf=%x\n", n, value, bit_cnt, bit_buf);
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249 /* XXX: optimize */
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250 if (n < bit_left) {
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251 bit_buf = (bit_buf<<n) | value;
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252 bit_left-=n;
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253 } else {
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254 bit_buf<<=bit_left;
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255 bit_buf |= value >> (n - bit_left);
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256 *(UINT32 *)s->buf_ptr = be2me_32(bit_buf);
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257 //printf("bitbuf = %08x\n", bit_buf);
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258 s->buf_ptr+=4;
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259 bit_left+=32 - n;
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260 bit_buf = value;
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261 }
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262
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263 s->bit_buf = bit_buf;
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264 s->bit_left = bit_left;
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265 }
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266 #endif
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267
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268
234
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269 #ifdef ALT_BITSTREAM_WRITER
235
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270 static inline void put_bits(PutBitContext *s, int n, unsigned int value)
234
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271 {
235
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272 #ifdef ALIGNED_BITSTREAM_WRITER
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273 #ifdef ARCH_X86
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274 asm volatile(
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275 "movl %0, %%ecx \n\t"
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276 "xorl %%eax, %%eax \n\t"
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277 "shrdl %%cl, %1, %%eax \n\t"
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278 "shrl %%cl, %1 \n\t"
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279 "movl %0, %%ecx \n\t"
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280 "shrl $3, %%ecx \n\t"
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281 "andl $0xFFFFFFFC, %%ecx \n\t"
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282 "bswapl %1 \n\t"
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283 "orl %1, (%2, %%ecx) \n\t"
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284 "bswapl %%eax \n\t"
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285 "addl %3, %0 \n\t"
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286 "movl %%eax, 4(%2, %%ecx) \n\t"
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287 : "=&r" (s->index), "=&r" (value)
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288 : "r" (s->buf), "r" (n), "0" (s->index), "1" (value<<(-n))
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289 : "%eax", "%ecx"
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290 );
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291 #else
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292 int index= s->index;
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293 uint32_t *ptr= ((uint32_t *)s->buf)+(index>>5);
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294
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295 value<<= 32-n;
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296
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297 ptr[0] |= be2me_32(value>>(index&31));
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298 ptr[1] = be2me_32(value<<(32-(index&31)));
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299 //if(n>24) printf("%d %d\n", n, value);
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300 index+= n;
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301 s->index= index;
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302 #endif
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303 #else //ALIGNED_BITSTREAM_WRITER
234
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304 #ifdef ARCH_X86
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305 asm volatile(
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306 "movl $7, %%ecx \n\t"
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307 "andl %0, %%ecx \n\t"
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308 "addl %3, %%ecx \n\t"
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309 "negl %%ecx \n\t"
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310 "shll %%cl, %1 \n\t"
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311 "bswapl %1 \n\t"
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312 "movl %0, %%ecx \n\t"
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313 "shrl $3, %%ecx \n\t"
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314 "orl %1, (%%ecx, %2) \n\t"
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315 "addl %3, %0 \n\t"
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316 "movl $0, 4(%%ecx, %2) \n\t"
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317 : "=&r" (s->index), "=&r" (value)
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318 : "r" (s->buf), "r" (n), "0" (s->index), "1" (value)
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319 : "%ecx"
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320 );
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321 #else
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322 int index= s->index;
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323 uint32_t *ptr= (uint32_t*)(((uint8_t *)s->buf)+(index>>3));
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324
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325 ptr[0] |= be2me_32(value<<(32-n-(index&7) ));
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326 ptr[1] = 0;
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327 //if(n>24) printf("%d %d\n", n, value);
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328 index+= n;
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329 s->index= index;
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330 #endif
235
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331 #endif //!ALIGNED_BITSTREAM_WRITER
234
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
332 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
333 #endif
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
334
238
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
335 #ifndef ALT_BITSTREAM_WRITER
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
336 /* for jpeg : escape 0xff with 0x00 after it */
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
337 static inline void jput_bits(PutBitContext *s, int n, unsigned int value)
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
338 {
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
339 unsigned int bit_buf, b;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
340 int bit_left, i;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
341
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
342 assert(n == 32 || value < (1U << n));
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
343
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
344 bit_buf = s->bit_buf;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
345 bit_left = s->bit_left;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
346
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
347 //printf("n=%d value=%x cnt=%d buf=%x\n", n, value, bit_cnt, bit_buf);
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
348 /* XXX: optimize */
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
349 if (n < bit_left) {
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
350 bit_buf = (bit_buf<<n) | value;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
351 bit_left-=n;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
352 } else {
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
353 bit_buf<<=bit_left;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
354 bit_buf |= value >> (n - bit_left);
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
355 /* handle escape */
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
356 for(i=0;i<4;i++) {
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
357 b = (bit_buf >> 24);
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
358 *(s->buf_ptr++) = b;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
359 if (b == 0xff)
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
360 *(s->buf_ptr++) = 0;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
361 bit_buf <<= 8;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
362 }
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
363
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
364 bit_left+= 32 - n;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
365 bit_buf = value;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
366 }
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
367
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
368 s->bit_buf = bit_buf;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
369 s->bit_left = bit_left;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
370 }
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
371 #endif
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
372
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
373
234
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
374 #ifdef ALT_BITSTREAM_WRITER
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
375 static inline void jput_bits(PutBitContext *s, int n, int value)
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
376 {
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
377 int index= s->index;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
378 uint32_t *ptr= (uint32_t*)(((uint8_t *)s->buf)+(index>>3));
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
379 int v= ptr[0];
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
380 //if(n>24) printf("%d %d\n", n, value);
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
381
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
382 v |= be2me_32(value<<(32-n-(index&7) ));
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
383 if(((v+0x01010101)^0xFFFFFFFF)&v&0x80808080)
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
384 {
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
385 /* handle idiotic (m)jpeg escapes */
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
386 uint8_t *bPtr= (uint8_t*)ptr;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
387 int numChecked= ((index+n)>>3) - (index>>3);
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
388
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
389 v= be2me_32(v);
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
390
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
391 *(bPtr++)= v>>24;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
392 if((v&0xFF000000)==0xFF000000 && numChecked>0){
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
393 *(bPtr++)= 0x00;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
394 index+=8;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
395 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
396 *(bPtr++)= (v>>16)&0xFF;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
397 if((v&0x00FF0000)==0x00FF0000 && numChecked>1){
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
398 *(bPtr++)= 0x00;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
399 index+=8;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
400 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
401 *(bPtr++)= (v>>8)&0xFF;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
402 if((v&0x0000FF00)==0x0000FF00 && numChecked>2){
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
403 *(bPtr++)= 0x00;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
404 index+=8;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
405 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
406 *(bPtr++)= v&0xFF;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
407 if((v&0x000000FF)==0x000000FF && numChecked>3){
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
408 *(bPtr++)= 0x00;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
409 index+=8;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
410 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
411 *((uint32_t*)bPtr)= 0;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
412 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
413 else
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
414 {
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
415 ptr[0] = v;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
416 ptr[1] = 0;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
417 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
418
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
419 index+= n;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
420 s->index= index;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
421 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
422 #endif
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
423
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
424
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
425 static inline uint8_t* pbBufPtr(PutBitContext *s)
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
426 {
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
427 #ifdef ALT_BITSTREAM_WRITER
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
428 return s->buf + (s->index>>3);
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
429 #else
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
430 return s->buf_ptr;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
431 #endif
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
432 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
433
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
434 void init_get_bits(GetBitContext *s,
986e461dc072 Initial revision
glantau
parents:
diff changeset
435 UINT8 *buffer, int buffer_size);
986e461dc072 Initial revision
glantau
parents:
diff changeset
436
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
437 #ifndef ALT_BITSTREAM_READER
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
438 unsigned int get_bits_long(GetBitContext *s, int n);
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
439 unsigned int show_bits_long(GetBitContext *s, int n);
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
440 #endif
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
441
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
442 static inline unsigned int get_bits(GetBitContext *s, int n){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
443 #ifdef ALT_BITSTREAM_READER
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
444 #ifdef ALIGNED_BITSTREAM
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
445 int index= s->index;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
446 uint32_t result1= be2me_32( ((uint32_t *)s->buffer)[index>>5] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
447 uint32_t result2= be2me_32( ((uint32_t *)s->buffer)[(index>>5) + 1] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
448 #ifdef ARCH_X86
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
449 asm ("shldl %%cl, %2, %0\n\t"
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
450 : "=r" (result1)
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
451 : "0" (result1), "r" (result2), "c" (index));
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
452 #else
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
453 result1<<= (index&0x1F);
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
454 result2= (result2>>1) >> (31-(index&0x1F));
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
455 result1|= result2;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
456 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
457 result1>>= 32 - n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
458 index+= n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
459 s->index= index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
460
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
461 return result1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
462 #else //ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
463 int index= s->index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
464 uint32_t result= be2me_32( unaligned32( ((uint8_t *)s->buffer)+(index>>3) ) );
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
465
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
466 result<<= (index&0x07);
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
467 result>>= 32 - n;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
468 index+= n;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
469 s->index= index;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
470
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
471 return result;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
472 #endif //!ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
473 #else //ALT_BITSTREAM_READER
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
474 if(s->bit_cnt>=n){
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
475 /* most common case here */
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
476 unsigned int val = s->bit_buf >> (32 - n);
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
477 s->bit_buf <<= n;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
478 s->bit_cnt -= n;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
479 #ifdef STATS
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
480 st_bit_counts[st_current_index] += n;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
481 #endif
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
482 return val;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
483 }
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
484 return get_bits_long(s,n);
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
485 #endif //!ALT_BITSTREAM_READER
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
486 }
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
487
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
488 static inline unsigned int get_bits1(GetBitContext *s){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
489 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
490 int index= s->index;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
491 uint8_t result= s->buffer[ index>>3 ];
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
492 result<<= (index&0x07);
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
493 result>>= 8 - 1;
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
494 index++;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
495 s->index= index;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
496
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
497 return result;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
498 #else
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
499 if(s->bit_cnt>0){
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
500 /* most common case here */
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
501 unsigned int val = s->bit_buf >> 31;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
502 s->bit_buf <<= 1;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
503 s->bit_cnt--;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
504 #ifdef STATS
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
505 st_bit_counts[st_current_index]++;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
506 #endif
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
507 return val;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
508 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
509 return get_bits_long(s,1);
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
510 #endif
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
511 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
512
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
513 /* This function is identical to get_bits(), the only */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
514 /* diference is that it doesn't touch the buffer */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
515 /* it is usefull to see the buffer. */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
516 static inline unsigned int show_bits(GetBitContext *s, int n)
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
517 {
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
518 #ifdef ALT_BITSTREAM_READER
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
519 #ifdef ALIGNED_BITSTREAM
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
520 int index= s->index;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
521 uint32_t result1= be2me_32( ((uint32_t *)s->buffer)[index>>5] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
522 uint32_t result2= be2me_32( ((uint32_t *)s->buffer)[(index>>5) + 1] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
523 #ifdef ARCH_X86
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
524 asm ("shldl %%cl, %2, %0\n\t"
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
525 : "=r" (result1)
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
526 : "0" (result1), "r" (result2), "c" (index));
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
527 #else
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
528 result1<<= (index&0x1F);
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
529 result2= (result2>>1) >> (31-(index&0x1F));
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
530 result1|= result2;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
531 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
532 result1>>= 32 - n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
533
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
534 return result1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
535 #else //ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
536 int index= s->index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
537 uint32_t result= be2me_32( unaligned32( ((uint8_t *)s->buffer)+(index>>3) ) );
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
538
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
539 result<<= (index&0x07);
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
540 result>>= 32 - n;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
541
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
542 return result;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
543 #endif //!ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
544 #else //ALT_BITSTREAM_READER
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
545 if(s->bit_cnt>=n) {
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
546 /* most common case here */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
547 unsigned int val = s->bit_buf >> (32 - n);
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
548 return val;
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
549 }
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
550 return show_bits_long(s,n);
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
551 #endif //!ALT_BITSTREAM_READER
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
552 }
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
553
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
554 static inline void skip_bits(GetBitContext *s, int n){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
555 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
556 s->index+= n;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
557 #else
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
558 if(s->bit_cnt>=n){
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
559 /* most common case here */
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
560 s->bit_buf <<= n;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
561 s->bit_cnt -= n;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
562 #ifdef STATS
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
563 st_bit_counts[st_current_index] += n;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
564 #endif
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
565 } else {
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
566 get_bits_long(s,n);
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
567 }
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
568 #endif
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
569 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
570
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
571 static inline void skip_bits1(GetBitContext *s){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
572 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
573 s->index++;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
574 #else
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
575 if(s->bit_cnt>0){
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
576 /* most common case here */
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
577 s->bit_buf <<= 1;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
578 s->bit_cnt--;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
579 #ifdef STATS
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
580 st_bit_counts[st_current_index]++;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
581 #endif
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
582 } else {
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
583 get_bits_long(s,1);
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
584 }
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
585 #endif
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
586 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
587
85
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
588 static inline int get_bits_count(GetBitContext *s)
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
589 {
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
590 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
591 return s->index;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
592 #else
85
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
593 return (s->buf_ptr - s->buf) * 8 - s->bit_cnt;
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
594 #endif
85
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
595 }
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
596
264
28c5c62b1c4c support decoding (with mplayer) of 3 .mp4 files from mphq
michaelni
parents: 238
diff changeset
597 int check_marker(GetBitContext *s, char *msg);
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
598 void align_get_bits(GetBitContext *s);
986e461dc072 Initial revision
glantau
parents:
diff changeset
599 int init_vlc(VLC *vlc, int nb_bits, int nb_codes,
986e461dc072 Initial revision
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parents:
diff changeset
600 const void *bits, int bits_wrap, int bits_size,
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parents:
diff changeset
601 const void *codes, int codes_wrap, int codes_size);
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diff changeset
602 void free_vlc(VLC *vlc);
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parents:
diff changeset
603
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
604 #ifdef ALT_BITSTREAM_READER
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
605 #ifdef ALIGNED_BITSTREAM
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
606 #ifdef ARCH_X86
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
607 #define SHOW_BITS(s, val, n) \
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
608 val= be2me_32( ((uint32_t *)(s)->buffer)[bit_cnt>>5] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
609 {uint32_t result2= be2me_32( ((uint32_t *)(s)->buffer)[(bit_cnt>>5) + 1] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
610 asm ("shldl %%cl, %2, %0\n\t"\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
611 : "=r" (val)\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
612 : "0" (val), "r" (result2), "c" (bit_cnt));\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
613 ((uint32_t)val)>>= 32 - n;}
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
614 #else //ARCH_X86
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
615 #define SHOW_BITS(s, val, n) \
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
616 val= be2me_32( ((uint32_t *)(s)->buffer)[bit_cnt>>5] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
617 {uint32_t result2= be2me_32( ((uint32_t *)(s)->buffer)[(bit_cnt>>5) + 1] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
618 val<<= (bit_cnt&0x1F);\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
619 result2= (result2>>1) >> (31-(bit_cnt&0x1F));\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
620 val|= result2;\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
621 ((uint32_t)val)>>= 32 - n;}
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
622 #endif //!ARCH_X86
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
623 #else //ALIGNED_BITSTREAM
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
624 #define SHOW_BITS(s, val, n) \
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
625 val= be2me_32( unaligned32( ((uint8_t *)(s)->buffer)+(bit_cnt>>3) ) );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
626 val<<= (bit_cnt&0x07);\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
627 ((uint32_t)val)>>= 32 - n;
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
628 #endif // !ALIGNED_BITSTREAM
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
629 #define FLUSH_BITS(n) bit_cnt+=n;
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
630 #define SAVE_BITS(s) bit_cnt= (s)->index;
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
631 #define RESTORE_BITS(s) (s)->index= bit_cnt;
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
632 #else
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
633
0
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diff changeset
634 /* macro to go faster */
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parents:
diff changeset
635 /* n must be <= 24 */
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parents:
diff changeset
636 /* XXX: optimize buffer end test */
986e461dc072 Initial revision
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parents:
diff changeset
637 #define SHOW_BITS(s, val, n)\
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glantau
parents:
diff changeset
638 {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
639 if (bit_cnt < n && buf_ptr < (s)->buf_end) {\
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glantau
parents:
diff changeset
640 bit_buf |= *buf_ptr++ << (24 - bit_cnt);\
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parents:
diff changeset
641 bit_cnt += 8;\
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parents:
diff changeset
642 if (bit_cnt < n && buf_ptr < (s)->buf_end) {\
986e461dc072 Initial revision
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parents:
diff changeset
643 bit_buf |= *buf_ptr++ << (24 - bit_cnt);\
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parents:
diff changeset
644 bit_cnt += 8;\
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parents:
diff changeset
645 if (bit_cnt < n && buf_ptr < (s)->buf_end) {\
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parents:
diff changeset
646 bit_buf |= *buf_ptr++ << (24 - bit_cnt);\
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parents:
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647 bit_cnt += 8;\
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648 }\
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parents:
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649 }\
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650 }\
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parents:
diff changeset
651 val = bit_buf >> (32 - n);\
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parents:
diff changeset
652 }
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parents:
diff changeset
653
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parents:
diff changeset
654 /* SHOW_BITS with n1 >= n must be been done before */
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parents:
diff changeset
655 #define FLUSH_BITS(n)\
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parents:
diff changeset
656 {\
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parents:
diff changeset
657 bit_buf <<= n;\
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parents:
diff changeset
658 bit_cnt -= n;\
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parents:
diff changeset
659 }
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parents:
diff changeset
660
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parents:
diff changeset
661 #define SAVE_BITS(s) \
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glantau
parents:
diff changeset
662 {\
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parents:
diff changeset
663 bit_cnt = (s)->bit_cnt;\
986e461dc072 Initial revision
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parents:
diff changeset
664 bit_buf = (s)->bit_buf;\
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parents:
diff changeset
665 buf_ptr = (s)->buf_ptr;\
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parents:
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666 }
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parents:
diff changeset
667
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parents:
diff changeset
668 #define RESTORE_BITS(s) \
986e461dc072 Initial revision
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parents:
diff changeset
669 {\
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parents:
diff changeset
670 (s)->buf_ptr = buf_ptr;\
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parents:
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671 (s)->bit_buf = bit_buf;\
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672 (s)->bit_cnt = bit_cnt;\
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parents:
diff changeset
673 }
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
674 #endif // !ALT_BITSTREAM_READER
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
675
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
676 static inline int get_vlc(GetBitContext *s, VLC *vlc)
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
677 {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
678 int code, n, nb_bits, index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
679 INT16 *table_codes;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
680 INT8 *table_bits;
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
681 int bit_cnt;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
682 #ifndef ALT_BITSTREAM_READER
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
683 UINT32 bit_buf;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
684 UINT8 *buf_ptr;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
685 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
686
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
687 SAVE_BITS(s);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
688 nb_bits = vlc->bits;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
689 table_codes = vlc->table_codes;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
690 table_bits = vlc->table_bits;
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
691
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
692 #ifdef FAST_GET_FIRST_VLC
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
693 SHOW_BITS(s, index, nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
694 code = table_codes[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
695 n = table_bits[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
696 if (n > 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
697 /* most common case (90%)*/
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
698 FLUSH_BITS(n);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
699 RESTORE_BITS(s);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
700 return code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
701 } else if (n == 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
702 return -1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
703 } else {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
704 FLUSH_BITS(nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
705 nb_bits = -n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
706 table_codes = vlc->table_codes + code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
707 table_bits = vlc->table_bits + code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
708 }
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
709 #endif
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
710 for(;;) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
711 SHOW_BITS(s, index, nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
712 code = table_codes[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
713 n = table_bits[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
714 if (n > 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
715 /* most common case */
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
716 FLUSH_BITS(n);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
717 #ifdef STATS
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
718 st_bit_counts[st_current_index] += n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
719 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
720 break;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
721 } else if (n == 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
722 return -1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
723 } else {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
724 FLUSH_BITS(nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
725 #ifdef STATS
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
726 st_bit_counts[st_current_index] += nb_bits;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
727 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
728 nb_bits = -n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
729 table_codes = vlc->table_codes + code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
730 table_bits = vlc->table_bits + code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
731 }
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
732 }
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
733 RESTORE_BITS(s);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
734 return code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
735 }
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
736
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
737
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
738 /* define it to include statistics code (useful only for optimizing
986e461dc072 Initial revision
glantau
parents:
diff changeset
739 codec efficiency */
986e461dc072 Initial revision
glantau
parents:
diff changeset
740 //#define STATS
986e461dc072 Initial revision
glantau
parents:
diff changeset
741
986e461dc072 Initial revision
glantau
parents:
diff changeset
742 #ifdef STATS
986e461dc072 Initial revision
glantau
parents:
diff changeset
743
986e461dc072 Initial revision
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parents:
diff changeset
744 enum {
986e461dc072 Initial revision
glantau
parents:
diff changeset
745 ST_UNKNOWN,
986e461dc072 Initial revision
glantau
parents:
diff changeset
746 ST_DC,
986e461dc072 Initial revision
glantau
parents:
diff changeset
747 ST_INTRA_AC,
986e461dc072 Initial revision
glantau
parents:
diff changeset
748 ST_INTER_AC,
986e461dc072 Initial revision
glantau
parents:
diff changeset
749 ST_INTRA_MB,
986e461dc072 Initial revision
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parents:
diff changeset
750 ST_INTER_MB,
986e461dc072 Initial revision
glantau
parents:
diff changeset
751 ST_MV,
986e461dc072 Initial revision
glantau
parents:
diff changeset
752 ST_NB,
986e461dc072 Initial revision
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parents:
diff changeset
753 };
986e461dc072 Initial revision
glantau
parents:
diff changeset
754
986e461dc072 Initial revision
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parents:
diff changeset
755 extern int st_current_index;
986e461dc072 Initial revision
glantau
parents:
diff changeset
756 extern unsigned int st_bit_counts[ST_NB];
986e461dc072 Initial revision
glantau
parents:
diff changeset
757 extern unsigned int st_out_bit_counts[ST_NB];
986e461dc072 Initial revision
glantau
parents:
diff changeset
758
986e461dc072 Initial revision
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parents:
diff changeset
759 void print_stats(void);
986e461dc072 Initial revision
glantau
parents:
diff changeset
760 #endif
986e461dc072 Initial revision
glantau
parents:
diff changeset
761
986e461dc072 Initial revision
glantau
parents:
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762 /* misc math functions */
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763
151
ae0516eadae2 fixed gcc-3.0.x compilation (by Michael Niedermayer)
nickols_k
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764 static inline int av_log2(unsigned int v)
0
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765 {
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766 int n;
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767
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768 n = 0;
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769 if (v & 0xffff0000) {
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770 v >>= 16;
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771 n += 16;
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772 }
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glantau
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773 if (v & 0xff00) {
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774 v >>= 8;
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775 n += 8;
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776 }
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777 if (v & 0xf0) {
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778 v >>= 4;
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779 n += 4;
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780 }
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781 if (v & 0xc) {
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782 v >>= 2;
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783 n += 2;
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784 }
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785 if (v & 0x2) {
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786 n++;
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787 }
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788 return n;
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789 }
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glantau
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790
277
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
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791 /* median of 3 */
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michaelni
parents: 264
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792 static inline int mid_pred(int a, int b, int c)
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michaelni
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793 {
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michaelni
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794 int vmin, vmax;
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michaelni
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795 vmax = vmin = a;
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michaelni
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796 if (b < vmin)
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michaelni
parents: 264
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797 vmin = b;
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michaelni
parents: 264
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798 else
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michaelni
parents: 264
diff changeset
799 vmax = b;
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michaelni
parents: 264
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800
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michaelni
parents: 264
diff changeset
801 if (c < vmin)
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michaelni
parents: 264
diff changeset
802 vmin = c;
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michaelni
parents: 264
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803 else if (c > vmax)
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michaelni
parents: 264
diff changeset
804 vmax = c;
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michaelni
parents: 264
diff changeset
805
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michaelni
parents: 264
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806 return a + b + c - vmin - vmax;
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michaelni
parents: 264
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807 }
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
808
0
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glantau
parents:
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809 /* memory */
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glantau
parents:
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810 void *av_mallocz(int size);
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glantau
parents:
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811
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812 #endif