Mercurial > libavcodec.hg
annotate ppc/dsputil_ppc.c @ 1570:9a9c14e87ebf libavcodec
optimizing
author | michael |
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date | Fri, 24 Oct 2003 21:57:04 +0000 |
parents | 587258262aa5 |
children | 6a4cfc5f9f96 |
rev | line source |
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1 /* |
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2 * Copyright (c) 2002 Brian Foley |
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3 * Copyright (c) 2002 Dieter Shirley |
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4 * |
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5 * This library is free software; you can redistribute it and/or |
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6 * modify it under the terms of the GNU Lesser General Public |
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7 * License as published by the Free Software Foundation; either |
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8 * version 2 of the License, or (at your option) any later version. |
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9 * |
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10 * This library is distributed in the hope that it will be useful, |
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11 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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13 * Lesser General Public License for more details. |
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14 * |
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15 * You should have received a copy of the GNU Lesser General Public |
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16 * License along with this library; if not, write to the Free Software |
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17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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18 */ |
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19 |
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20 #include "../dsputil.h" |
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21 |
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22 #include "dsputil_ppc.h" |
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23 |
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24 #ifdef HAVE_ALTIVEC |
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25 #include "dsputil_altivec.h" |
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26 #endif |
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27 |
1092 | 28 extern void idct_put_altivec(uint8_t *dest, int line_size, int16_t *block); |
29 extern void idct_add_altivec(uint8_t *dest, int line_size, int16_t *block); | |
30 | |
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31 int mm_flags = 0; |
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32 |
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33 int mm_support(void) |
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34 { |
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35 int result = 0; |
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36 #ifdef HAVE_ALTIVEC |
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37 if (has_altivec()) { |
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38 result |= MM_ALTIVEC; |
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39 } |
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40 #endif /* result */ |
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41 return result; |
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42 } |
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43 |
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44 #ifdef POWERPC_PERFORMANCE_REPORT |
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45 unsigned long long perfdata[POWERPC_NUM_PMC_ENABLED][powerpc_perf_total][powerpc_data_total]; |
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46 /* list below must match enum in dsputil_ppc.h */ |
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47 static unsigned char* perfname[] = { |
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48 "fft_calc_altivec", |
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49 "gmc1_altivec", |
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50 "dct_unquantize_h263_altivec", |
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51 "idct_add_altivec", |
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52 "idct_put_altivec", |
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53 "put_pixels16_altivec", |
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54 "avg_pixels16_altivec", |
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55 "avg_pixels8_altivec", |
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56 "put_pixels8_xy2_altivec", |
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57 "put_no_rnd_pixels8_xy2_altivec", |
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58 "put_pixels16_xy2_altivec", |
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59 "put_no_rnd_pixels16_xy2_altivec", |
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60 "clear_blocks_dcbz32_ppc", |
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61 "clear_blocks_dcbz128_ppc" |
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62 }; |
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63 #include <stdio.h> |
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64 #endif |
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65 |
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66 #ifdef POWERPC_PERFORMANCE_REPORT |
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67 void powerpc_display_perf_report(void) |
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68 { |
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69 int i, j; |
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70 fprintf(stderr, "PowerPC performance report\n Values are from the PMC registers, and represent whatever the registers are set to record.\n"); |
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71 for(i = 0 ; i < powerpc_perf_total ; i++) |
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72 { |
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73 for (j = 0; j < POWERPC_NUM_PMC_ENABLED ; j++) |
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74 { |
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75 if (perfdata[j][i][powerpc_data_num] != (unsigned long long)0) |
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76 fprintf(stderr, |
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77 " Function \"%s\" (pmc%d):\n\tmin: %llu\n\tmax: %llu\n\tavg: %1.2lf (%llu)\n", |
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78 perfname[i], |
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79 j+1, |
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80 perfdata[j][i][powerpc_data_min], |
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81 perfdata[j][i][powerpc_data_max], |
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82 (double)perfdata[j][i][powerpc_data_sum] / |
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83 (double)perfdata[j][i][powerpc_data_num], |
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84 perfdata[j][i][powerpc_data_num]); |
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85 } |
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86 } |
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87 } |
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88 #endif /* POWERPC_PERFORMANCE_REPORT */ |
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89 |
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90 /* ***** WARNING ***** WARNING ***** WARNING ***** */ |
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91 /* |
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92 clear_blocks_dcbz32_ppc will not work properly |
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93 on PowerPC processors with a cache line size |
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94 not equal to 32 bytes. |
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95 Fortunately all processor used by Apple up to |
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96 at least the 7450 (aka second generation G4) |
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97 use 32 bytes cache line. |
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98 This is due to the use of the 'dcbz' instruction. |
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99 It simply clear to zero a single cache line, |
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100 so you need to know the cache line size to use it ! |
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101 It's absurd, but it's fast... |
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102 |
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103 update 24/06/2003 : Apple released yesterday the G5, |
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104 with a PPC970. cache line size : 128 bytes. Oups. |
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105 The semantic of dcbz was changed, it always clear |
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106 32 bytes. so the function below will work, but will |
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107 be slow. So I fixed check_dcbz_effect to use dcbzl, |
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108 which is defined to clear a cache line (as dcbz before). |
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109 So we still can distinguish, and use dcbz (32 bytes) |
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110 or dcbzl (one cache line) as required. |
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111 |
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112 see <http://developer.apple.com/technotes/tn/tn2087.html> |
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113 and <http://developer.apple.com/technotes/tn/tn2086.html> |
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114 */ |
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115 void clear_blocks_dcbz32_ppc(DCTELEM *blocks) |
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116 { |
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117 POWERPC_PERF_DECLARE(powerpc_clear_blocks_dcbz32, 1); |
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118 register int misal = ((unsigned long)blocks & 0x00000010); |
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119 register int i = 0; |
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120 POWERPC_PERF_START_COUNT(powerpc_clear_blocks_dcbz32, 1); |
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121 #if 1 |
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122 if (misal) { |
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123 ((unsigned long*)blocks)[0] = 0L; |
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124 ((unsigned long*)blocks)[1] = 0L; |
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125 ((unsigned long*)blocks)[2] = 0L; |
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126 ((unsigned long*)blocks)[3] = 0L; |
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127 i += 16; |
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128 } |
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129 for ( ; i < sizeof(DCTELEM)*6*64 ; i += 32) { |
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130 asm volatile("dcbz %0,%1" : : "b" (blocks), "r" (i) : "memory"); |
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131 } |
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132 if (misal) { |
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133 ((unsigned long*)blocks)[188] = 0L; |
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134 ((unsigned long*)blocks)[189] = 0L; |
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135 ((unsigned long*)blocks)[190] = 0L; |
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136 ((unsigned long*)blocks)[191] = 0L; |
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137 i += 16; |
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138 } |
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139 #else |
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140 memset(blocks, 0, sizeof(DCTELEM)*6*64); |
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141 #endif |
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142 POWERPC_PERF_STOP_COUNT(powerpc_clear_blocks_dcbz32, 1); |
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143 } |
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144 |
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145 /* same as above, when dcbzl clear a whole 128B cache line |
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146 i.e. the PPC970 aka G5 */ |
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147 #ifndef NO_DCBZL |
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148 void clear_blocks_dcbz128_ppc(DCTELEM *blocks) |
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149 { |
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150 POWERPC_PERF_DECLARE(powerpc_clear_blocks_dcbz128, 1); |
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151 register int misal = ((unsigned long)blocks & 0x0000007f); |
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152 register int i = 0; |
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153 POWERPC_PERF_START_COUNT(powerpc_clear_blocks_dcbz128, 1); |
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154 #if 1 |
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155 if (misal) { |
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156 // we could probably also optimize this case, |
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157 // but there's not much point as the machines |
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158 // aren't available yet (2003-06-26) |
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159 memset(blocks, 0, sizeof(DCTELEM)*6*64); |
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160 } |
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161 else |
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162 for ( ; i < sizeof(DCTELEM)*6*64 ; i += 128) { |
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163 asm volatile("dcbzl %0,%1" : : "b" (blocks), "r" (i) : "memory"); |
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164 } |
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165 #else |
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166 memset(blocks, 0, sizeof(DCTELEM)*6*64); |
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167 #endif |
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168 POWERPC_PERF_STOP_COUNT(powerpc_clear_blocks_dcbz128, 1); |
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169 } |
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170 #else |
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171 void clear_blocks_dcbz128_ppc(DCTELEM *blocks) |
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172 { |
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173 memset(blocks, 0, sizeof(DCTELEM)*6*64); |
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174 } |
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175 #endif |
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176 |
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177 #ifndef NO_DCBZL |
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178 /* check dcbz report how many bytes are set to 0 by dcbz */ |
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179 /* update 24/06/2003 : replace dcbz by dcbzl to get |
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180 the intended effect (Apple "fixed" dcbz) |
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181 unfortunately this cannot be used unless the assembler |
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182 knows about dcbzl ... */ |
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183 long check_dcbzl_effect(void) |
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184 { |
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185 register char *fakedata = (char*)av_malloc(1024); |
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186 register char *fakedata_middle; |
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187 register long zero = 0; |
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188 register long i = 0; |
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189 long count = 0; |
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190 |
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191 if (!fakedata) |
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192 { |
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193 return 0L; |
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194 } |
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195 |
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196 fakedata_middle = (fakedata + 512); |
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197 |
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198 memset(fakedata, 0xFF, 1024); |
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199 |
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200 /* below the constraint "b" seems to mean "Address base register" |
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201 in gcc-3.3 / RS/6000 speaks. seems to avoid using r0, so.... */ |
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202 asm volatile("dcbzl %0, %1" : : "b" (fakedata_middle), "r" (zero)); |
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203 |
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204 for (i = 0; i < 1024 ; i ++) |
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205 { |
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206 if (fakedata[i] == (char)0) |
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207 count++; |
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208 } |
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209 |
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210 av_free(fakedata); |
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211 |
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212 return count; |
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213 } |
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214 #else |
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215 long check_dcbzl_effect(void) |
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216 { |
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217 return 0; |
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218 } |
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219 #endif |
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220 |
1092 | 221 void dsputil_init_ppc(DSPContext* c, AVCodecContext *avctx) |
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222 { |
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223 // Common optimizations whether Altivec is available or not |
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224 |
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225 switch (check_dcbzl_effect()) { |
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226 case 32: |
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227 c->clear_blocks = clear_blocks_dcbz32_ppc; |
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228 break; |
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229 case 128: |
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230 c->clear_blocks = clear_blocks_dcbz128_ppc; |
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231 break; |
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232 default: |
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233 break; |
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234 } |
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235 |
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236 #ifdef HAVE_ALTIVEC |
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237 if (has_altivec()) { |
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238 mm_flags |= MM_ALTIVEC; |
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239 |
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240 // Altivec specific optimisations |
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241 c->pix_abs16x16_x2 = pix_abs16x16_x2_altivec; |
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242 c->pix_abs16x16_y2 = pix_abs16x16_y2_altivec; |
884 | 243 c->pix_abs16x16_xy2 = pix_abs16x16_xy2_altivec; |
244 c->pix_abs16x16 = pix_abs16x16_altivec; | |
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245 c->pix_abs8x8 = pix_abs8x8_altivec; |
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246 c->sad[0]= sad16x16_altivec; |
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247 c->sad[1]= sad8x8_altivec; |
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248 c->pix_norm1 = pix_norm1_altivec; |
981 | 249 c->sse[1]= sse8_altivec; |
250 c->sse[0]= sse16_altivec; | |
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251 c->pix_sum = pix_sum_altivec; |
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252 c->diff_pixels = diff_pixels_altivec; |
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253 c->get_pixels = get_pixels_altivec; |
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254 // next one disabled as it's untested. |
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255 #if 0 |
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256 c->add_bytes= add_bytes_altivec; |
1024
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257 #endif /* 0 */ |
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258 c->put_pixels_tab[0][0] = put_pixels16_altivec; |
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259 /* the tow functions do the same thing, so use the same code */ |
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260 c->put_no_rnd_pixels_tab[0][0] = put_pixels16_altivec; |
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261 c->avg_pixels_tab[0][0] = avg_pixels16_altivec; |
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262 // next one disabled as it's untested. |
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263 #if 0 |
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264 c->avg_pixels_tab[1][0] = avg_pixels8_altivec; |
1024
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265 #endif /* 0 */ |
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266 c->put_pixels_tab[1][3] = put_pixels8_xy2_altivec; |
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267 c->put_no_rnd_pixels_tab[1][3] = put_no_rnd_pixels8_xy2_altivec; |
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268 c->put_pixels_tab[0][3] = put_pixels16_xy2_altivec; |
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269 c->put_no_rnd_pixels_tab[0][3] = put_no_rnd_pixels16_xy2_altivec; |
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270 |
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271 c->gmc1 = gmc1_altivec; |
1092 | 272 |
273 if ((avctx->idct_algo == FF_IDCT_AUTO) || | |
274 (avctx->idct_algo == FF_IDCT_ALTIVEC)) | |
275 { | |
276 c->idct_put = idct_put_altivec; | |
277 c->idct_add = idct_add_altivec; | |
278 #ifndef ALTIVEC_USE_REFERENCE_C_CODE | |
279 c->idct_permutation_type = FF_TRANSPOSE_IDCT_PERM; | |
280 #else /* ALTIVEC_USE_REFERENCE_C_CODE */ | |
281 c->idct_permutation_type = FF_NO_IDCT_PERM; | |
282 #endif /* ALTIVEC_USE_REFERENCE_C_CODE */ | |
283 } | |
1024
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284 |
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285 #ifdef POWERPC_PERFORMANCE_REPORT |
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286 { |
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287 int i, j; |
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288 for (i = 0 ; i < powerpc_perf_total ; i++) |
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289 { |
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290 for (j = 0; j < POWERPC_NUM_PMC_ENABLED ; j++) |
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291 { |
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292 perfdata[j][i][powerpc_data_min] = (unsigned long long)0xFFFFFFFFFFFFFFFF; |
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293 perfdata[j][i][powerpc_data_max] = (unsigned long long)0x0000000000000000; |
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294 perfdata[j][i][powerpc_data_sum] = (unsigned long long)0x0000000000000000; |
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295 perfdata[j][i][powerpc_data_num] = (unsigned long long)0x0000000000000000; |
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296 } |
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297 } |
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298 } |
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299 #endif /* POWERPC_PERFORMANCE_REPORT */ |
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300 } else |
1024
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301 #endif /* HAVE_ALTIVEC */ |
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302 { |
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303 // Non-AltiVec PPC optimisations |
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304 |
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305 // ... pending ... |
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306 } |
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307 } |