Mercurial > mplayer.hg
annotate drivers/mga_vid.c @ 6836:0e6860ff93e3
added missing formats :)
author | rfelker |
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date | Mon, 29 Jul 2002 16:24:40 +0000 |
parents | 7935d85facff |
children | ed98b850668d |
rev | line source |
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2345 | 1 //#define CRTC2 |
2 | |
1 | 3 // YUY2 support (see config.format) added by A'rpi/ESP-team |
57 | 4 // double buffering added by A'rpi/ESP-team |
5623 | 5 // brightness/contrast introduced by eyck |
57 | 6 |
7 // Set this value, if autodetection fails! (video ram size in megabytes) | |
91 | 8 // #define MGA_MEMORY_SIZE 16 |
1 | 9 |
68 | 10 //#define MGA_ALLOW_IRQ |
11 | |
12 #define MGA_VSYNC_POS 2 | |
13 | |
1 | 14 /* |
15 * | |
16 * mga_vid.c | |
17 * | |
18 * Copyright (C) 1999 Aaron Holtzman | |
19 * | |
20 * Module skeleton based on gutted agpgart module by Jeff Hartmann | |
21 * <slicer@ionet.net> | |
22 * | |
23 * Matrox MGA G200/G400 YUV Video Interface module Version 0.1.0 | |
24 * | |
25 * BES == Back End Scaler | |
26 * | |
27 * This software has been released under the terms of the GNU Public | |
28 * license. See http://www.gnu.org/copyleft/gpl.html for details. | |
29 */ | |
30 | |
31 //It's entirely possible this major conflicts with something else | |
32 /* mknod /dev/mga_vid c 178 0 */ | |
33 | |
34 #include <linux/config.h> | |
35 #include <linux/version.h> | |
36 #include <linux/module.h> | |
37 #include <linux/types.h> | |
38 #include <linux/kernel.h> | |
39 #include <linux/sched.h> | |
40 #include <linux/mm.h> | |
41 #include <linux/string.h> | |
42 #include <linux/errno.h> | |
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43 |
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44 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,10) |
1 | 45 #include <linux/malloc.h> |
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46 #else |
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47 #include <linux/slab.h> |
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48 #endif |
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49 |
1 | 50 #include <linux/pci.h> |
63 | 51 #include <linux/ioport.h> |
1 | 52 #include <linux/init.h> |
53 | |
54 #include "mga_vid.h" | |
55 | |
56 #ifdef CONFIG_MTRR | |
57 #include <asm/mtrr.h> | |
58 #endif | |
59 | |
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60 #ifdef CONFIG_DEVFS_FS |
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61 #include <linux/devfs_fs_kernel.h> |
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62 #endif |
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63 |
1 | 64 #include <asm/uaccess.h> |
65 #include <asm/system.h> | |
66 #include <asm/io.h> | |
67 | |
68 #define TRUE 1 | |
69 #define FALSE 0 | |
70 | |
71 #define MGA_VID_MAJOR 178 | |
72 | |
57 | 73 //#define MGA_VIDMEM_SIZE mga_ram_size |
1 | 74 |
75 #ifndef PCI_DEVICE_ID_MATROX_G200_PCI | |
76 #define PCI_DEVICE_ID_MATROX_G200_PCI 0x0520 | |
77 #endif | |
78 | |
79 #ifndef PCI_DEVICE_ID_MATROX_G200_AGP | |
80 #define PCI_DEVICE_ID_MATROX_G200_AGP 0x0521 | |
81 #endif | |
82 | |
83 #ifndef PCI_DEVICE_ID_MATROX_G400 | |
84 #define PCI_DEVICE_ID_MATROX_G400 0x0525 | |
85 #endif | |
86 | |
1989 | 87 #ifndef PCI_DEVICE_ID_MATROX_G550 |
88 #define PCI_DEVICE_ID_MATROX_G550 0x2527 | |
89 #endif | |
90 | |
1 | 91 MODULE_AUTHOR("Aaron Holtzman <aholtzma@engr.uvic.ca>"); |
2262 | 92 #ifdef MODULE_LICENSE |
93 MODULE_LICENSE("GPL"); | |
94 #endif | |
1 | 95 |
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96 #define PARAM_BRIGHTNESS "brightness=" |
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97 #define PARAM_CONTRAST "contrast=" |
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98 #define PARAM_BLACKIE "blackie=" |
4484 | 99 |
100 #define PARAM_BUFF_SIZE 4096 | |
101 static uint8_t *mga_param_buff = NULL; | |
102 static uint32_t mga_param_buff_size=0; | |
103 static uint32_t mga_param_buff_len=0; | |
104 | |
5764 | 105 #ifndef min |
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106 #define min(x,y) (((x)<(y))?(x):(y)) |
5764 | 107 #endif |
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108 |
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109 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0) |
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110 #include <linux/ctype.h> |
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111 |
5884 | 112 static unsigned long simple_strtoul(const char *cp,char **endp,unsigned int base) |
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113 { |
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114 unsigned long result = 0,value; |
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115 |
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116 if (!base) { |
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117 base = 10; |
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118 if (*cp == '0') { |
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119 base = 8; |
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120 cp++; |
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121 if ((*cp == 'x') && isxdigit(cp[1])) { |
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122 cp++; |
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123 base = 16; |
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124 } |
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125 } |
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126 } |
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127 while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp) |
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128 ? toupper(*cp) : *cp)-'A'+10) < base) { |
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129 result = result*base + value; |
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130 cp++; |
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131 } |
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132 if (endp) |
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133 *endp = (char *)cp; |
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134 return result; |
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135 } |
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136 #endif |
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137 |
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138 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0) || LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,5) |
5884 | 139 static long simple_strtol(const char *cp,char **endp,unsigned int base) |
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140 { |
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141 if(*cp=='-') |
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142 return -simple_strtoul(cp+1,endp,base); |
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143 return simple_strtoul(cp,endp,base); |
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144 } |
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145 #endif |
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146 |
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147 |
1 | 148 typedef struct bes_registers_s |
149 { | |
150 //BES Control | |
151 uint32_t besctl; | |
152 //BES Global control | |
153 uint32_t besglobctl; | |
154 //Luma control (brightness and contrast) | |
155 uint32_t beslumactl; | |
156 //Line pitch | |
157 uint32_t bespitch; | |
158 | |
159 //Buffer A-1 Chroma 3 plane org | |
160 uint32_t besa1c3org; | |
161 //Buffer A-1 Chroma org | |
162 uint32_t besa1corg; | |
163 //Buffer A-1 Luma org | |
164 uint32_t besa1org; | |
165 | |
166 //Buffer A-2 Chroma 3 plane org | |
167 uint32_t besa2c3org; | |
168 //Buffer A-2 Chroma org | |
169 uint32_t besa2corg; | |
170 //Buffer A-2 Luma org | |
171 uint32_t besa2org; | |
172 | |
173 //Buffer B-1 Chroma 3 plane org | |
174 uint32_t besb1c3org; | |
175 //Buffer B-1 Chroma org | |
176 uint32_t besb1corg; | |
177 //Buffer B-1 Luma org | |
178 uint32_t besb1org; | |
179 | |
180 //Buffer B-2 Chroma 3 plane org | |
181 uint32_t besb2c3org; | |
182 //Buffer B-2 Chroma org | |
183 uint32_t besb2corg; | |
184 //Buffer B-2 Luma org | |
185 uint32_t besb2org; | |
186 | |
187 //BES Horizontal coord | |
188 uint32_t beshcoord; | |
189 //BES Horizontal inverse scaling [5.14] | |
190 uint32_t beshiscal; | |
191 //BES Horizontal source start [10.14] (for scaling) | |
192 uint32_t beshsrcst; | |
193 //BES Horizontal source ending [10.14] (for scaling) | |
194 uint32_t beshsrcend; | |
195 //BES Horizontal source last | |
196 uint32_t beshsrclst; | |
197 | |
198 | |
199 //BES Vertical coord | |
200 uint32_t besvcoord; | |
201 //BES Vertical inverse scaling [5.14] | |
202 uint32_t besviscal; | |
203 //BES Field 1 vertical source last position | |
204 uint32_t besv1srclst; | |
205 //BES Field 1 weight start | |
206 uint32_t besv1wght; | |
207 //BES Field 2 vertical source last position | |
208 uint32_t besv2srclst; | |
209 //BES Field 2 weight start | |
210 uint32_t besv2wght; | |
211 | |
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212 |
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213 //configurable stuff |
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214 int blackie; |
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215 |
1 | 216 } bes_registers_t; |
217 | |
218 static bes_registers_t regs; | |
2344 | 219 #ifdef CRTC2 |
220 typedef struct crtc2_registers_s | |
221 { | |
222 uint32_t c2ctl; | |
223 uint32_t c2datactl; | |
224 uint32_t c2misc; | |
225 uint32_t c2hparam; | |
226 uint32_t c2hsync; | |
227 uint32_t c2offset; | |
228 uint32_t c2pl2startadd0; | |
229 uint32_t c2pl2startadd1; | |
230 uint32_t c2pl3startadd0; | |
231 uint32_t c2pl3startadd1; | |
232 uint32_t c2preload; | |
233 uint32_t c2spicstartadd0; | |
234 uint32_t c2spicstartadd1; | |
235 uint32_t c2startadd0; | |
236 uint32_t c2startadd1; | |
237 uint32_t c2subpiclut; | |
238 uint32_t c2vcount; | |
239 uint32_t c2vparam; | |
240 uint32_t c2vsync; | |
241 } crtc2_registers_t; | |
242 static crtc2_registers_t cregs; | |
243 #endif | |
1 | 244 static uint32_t mga_vid_in_use = 0; |
245 static uint32_t is_g400 = 0; | |
246 static uint32_t vid_src_ready = 0; | |
247 static uint32_t vid_overlay_on = 0; | |
248 | |
249 static uint8_t *mga_mmio_base = 0; | |
250 static uint32_t mga_mem_base = 0; | |
251 | |
57 | 252 static int mga_src_base = 0; // YUV buffer position in video memory |
253 | |
254 static uint32_t mga_ram_size = 0; // how much megabytes videoram we have | |
1 | 255 |
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256 static uint32_t mga_top_reserved = 0; // reserved space for console font (matroxfb + fastfont) |
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257 |
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258 static int mga_brightness = 0; // initial brightness |
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259 static int mga_contrast = 0; // initial contrast |
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260 |
95 | 261 //static int mga_force_memsize = 0; |
90 | 262 |
95 | 263 MODULE_PARM(mga_ram_size, "i"); |
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264 MODULE_PARM(mga_top_reserved, "i"); |
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265 MODULE_PARM(mga_brightness, "i"); |
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266 MODULE_PARM(mga_contrast, "i"); |
90 | 267 |
1 | 268 static struct pci_dev *pci_dev; |
269 | |
270 static mga_vid_config_t mga_config; | |
271 | |
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272 #ifdef CONFIG_DEVFS_FS |
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273 static devfs_handle_t dev_handle = NULL; |
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274 #endif |
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275 |
2086 | 276 static int colkey_saved=0; |
277 static int colkey_on=0; | |
278 static unsigned char colkey_color[4]; | |
279 static unsigned char colkey_mask[4]; | |
280 | |
48 | 281 static int mga_irq = -1; |
1 | 282 |
283 //All register offsets are converted to word aligned offsets (32 bit) | |
284 //because we want all our register accesses to be 32 bits | |
285 #define VCOUNT 0x1e20 | |
286 | |
287 #define PALWTADD 0x3c00 // Index register for X_DATAREG port | |
288 #define X_DATAREG 0x3c0a | |
289 | |
290 #define XMULCTRL 0x19 | |
291 #define BPP_8 0x00 | |
292 #define BPP_15 0x01 | |
293 #define BPP_16 0x02 | |
294 #define BPP_24 0x03 | |
295 #define BPP_32_DIR 0x04 | |
296 #define BPP_32_PAL 0x07 | |
297 | |
298 #define XCOLMSK 0x40 | |
299 #define X_COLKEY 0x42 | |
300 #define XKEYOPMODE 0x51 | |
301 #define XCOLMSK0RED 0x52 | |
302 #define XCOLMSK0GREEN 0x53 | |
303 #define XCOLMSK0BLUE 0x54 | |
304 #define XCOLKEY0RED 0x55 | |
305 #define XCOLKEY0GREEN 0x56 | |
306 #define XCOLKEY0BLUE 0x57 | |
307 | |
2344 | 308 #ifdef CRTC2 |
309 | |
310 /*CRTC2 registers*/ | |
311 #define XMISCCTRL 0x1e | |
312 #define C2CTL 0x3c10 | |
313 #define C2DATACTL 0x3c4c | |
314 #define C2MISC 0x3c44 | |
315 #define C2HPARAM 0x3c14 | |
316 #define C2HSYNC 0x3c18 | |
317 #define C2OFFSET 0x3c40 | |
318 #define C2PL2STARTADD0 0x3c30 // like BESA1CORG | |
319 #define C2PL2STARTADD1 0x3c34 // like BESA2CORG | |
320 #define C2PL3STARTADD0 0x3c38 // like BESA1C3ORG | |
321 #define C2PL3STARTADD1 0x3c3c // like BESA2C3ORG | |
322 #define C2PRELOAD 0x3c24 | |
323 #define C2SPICSTARTADD0 0x3c54 | |
324 #define C2SPICSTARTADD1 0x3c58 | |
325 #define C2STARTADD0 0x3c28 // like BESA1ORG | |
326 #define C2STARTADD1 0x3c2c // like BESA2ORG | |
327 #define C2SUBPICLUT 0x3c50 | |
328 #define C2VCOUNT 0x3c48 | |
329 #define C2VPARAM 0x3c1c | |
330 #define C2VSYNC 0x3c20 | |
331 | |
332 #endif | |
333 | |
1 | 334 // Backend Scaler registers |
335 #define BESCTL 0x3d20 | |
336 #define BESGLOBCTL 0x3dc0 | |
337 #define BESLUMACTL 0x3d40 | |
338 #define BESPITCH 0x3d24 | |
48 | 339 |
1 | 340 #define BESA1C3ORG 0x3d60 |
341 #define BESA1CORG 0x3d10 | |
342 #define BESA1ORG 0x3d00 | |
48 | 343 |
1 | 344 #define BESA2C3ORG 0x3d64 |
345 #define BESA2CORG 0x3d14 | |
346 #define BESA2ORG 0x3d04 | |
48 | 347 |
1 | 348 #define BESB1C3ORG 0x3d68 |
349 #define BESB1CORG 0x3d18 | |
350 #define BESB1ORG 0x3d08 | |
48 | 351 |
1 | 352 #define BESB2C3ORG 0x3d6C |
353 #define BESB2CORG 0x3d1C | |
354 #define BESB2ORG 0x3d0C | |
48 | 355 |
1 | 356 #define BESHCOORD 0x3d28 |
357 #define BESHISCAL 0x3d30 | |
358 #define BESHSRCEND 0x3d3C | |
359 #define BESHSRCLST 0x3d50 | |
360 #define BESHSRCST 0x3d38 | |
361 #define BESV1WGHT 0x3d48 | |
362 #define BESV2WGHT 0x3d4c | |
363 #define BESV1SRCLST 0x3d54 | |
364 #define BESV2SRCLST 0x3d58 | |
365 #define BESVISCAL 0x3d34 | |
366 #define BESVCOORD 0x3d2c | |
367 #define BESSTATUS 0x3dc4 | |
368 | |
48 | 369 #define CRTCX 0x1fd4 |
370 #define CRTCD 0x1fd5 | |
371 #define IEN 0x1e1c | |
372 #define ICLEAR 0x1e18 | |
373 #define STATUS 0x1e14 | |
374 | |
375 static int mga_next_frame=0; | |
1 | 376 |
2344 | 377 #ifdef CRTC2 |
378 static void crtc2_frame_sel(int frame) | |
379 { | |
380 switch(frame) { | |
381 case 0: | |
382 cregs.c2pl2startadd0=regs.besa1corg; | |
383 cregs.c2pl3startadd0=regs.besa1c3org; | |
384 cregs.c2startadd0=regs.besa1org; | |
385 break; | |
386 case 1: | |
387 cregs.c2pl2startadd0=regs.besa2corg; | |
388 cregs.c2pl3startadd0=regs.besa2c3org; | |
389 cregs.c2startadd0=regs.besa2org; | |
390 break; | |
391 case 2: | |
392 cregs.c2pl2startadd0=regs.besb1corg; | |
393 cregs.c2pl3startadd0=regs.besb1c3org; | |
394 cregs.c2startadd0=regs.besb1org; | |
395 break; | |
396 case 3: | |
397 cregs.c2pl2startadd0=regs.besb2corg; | |
398 cregs.c2pl3startadd0=regs.besb2c3org; | |
399 cregs.c2startadd0=regs.besb2org; | |
400 break; | |
401 } | |
402 writel(cregs.c2startadd0, mga_mmio_base + C2STARTADD0); | |
403 writel(cregs.c2pl2startadd0, mga_mmio_base + C2PL2STARTADD0); | |
404 writel(cregs.c2pl3startadd0, mga_mmio_base + C2PL3STARTADD0); | |
405 } | |
406 #endif | |
407 | |
1 | 408 static void mga_vid_frame_sel(int frame) |
409 { | |
48 | 410 if ( mga_irq != -1 ) { |
411 mga_next_frame=frame; | |
412 } else { | |
413 | |
1 | 414 //we don't need the vcount protection as we're only hitting |
415 //one register (and it doesn't seem to be double buffered) | |
416 regs.besctl = (regs.besctl & ~0x07000000) + (frame << 25); | |
417 writel( regs.besctl, mga_mmio_base + BESCTL ); | |
68 | 418 |
419 // writel( regs.besglobctl + ((readl(mga_mmio_base + VCOUNT)+2)<<16), | |
420 writel( regs.besglobctl + (MGA_VSYNC_POS<<16), | |
421 mga_mmio_base + BESGLOBCTL); | |
2344 | 422 #ifdef CRTC2 |
423 crtc2_frame_sel(frame); | |
424 #endif | |
68 | 425 |
48 | 426 } |
1 | 427 } |
428 | |
429 | |
2086 | 430 static void mga_vid_write_regs(int restore) |
1 | 431 { |
432 //Make sure internal registers don't get updated until we're done | |
433 writel( (readl(mga_mmio_base + VCOUNT)-1)<<16, | |
434 mga_mmio_base + BESGLOBCTL); | |
435 | |
436 // color or coordinate keying | |
2086 | 437 |
438 if(restore && colkey_saved){ | |
439 // restore it | |
440 colkey_saved=0; | |
441 | |
5623 | 442 #ifdef MP_DEBUG |
2086 | 443 printk("mga_vid: Restoring colorkey (ON: %d %02X:%02X:%02X)\n", |
444 colkey_on,colkey_color[0],colkey_color[1],colkey_color[2]); | |
5623 | 445 #endif |
2086 | 446 |
447 // Set color key registers: | |
448 writeb( XKEYOPMODE, mga_mmio_base + PALWTADD); | |
449 writeb( colkey_on, mga_mmio_base + X_DATAREG); | |
450 | |
451 writeb( XCOLKEY0RED, mga_mmio_base + PALWTADD); | |
452 writeb( colkey_color[0], mga_mmio_base + X_DATAREG); | |
453 writeb( XCOLKEY0GREEN, mga_mmio_base + PALWTADD); | |
454 writeb( colkey_color[1], mga_mmio_base + X_DATAREG); | |
455 writeb( XCOLKEY0BLUE, mga_mmio_base + PALWTADD); | |
456 writeb( colkey_color[2], mga_mmio_base + X_DATAREG); | |
457 writeb( X_COLKEY, mga_mmio_base + PALWTADD); | |
458 writeb( colkey_color[3], mga_mmio_base + X_DATAREG); | |
459 | |
460 writeb( XCOLMSK0RED, mga_mmio_base + PALWTADD); | |
461 writeb( colkey_mask[0], mga_mmio_base + X_DATAREG); | |
462 writeb( XCOLMSK0GREEN, mga_mmio_base + PALWTADD); | |
463 writeb( colkey_mask[1], mga_mmio_base + X_DATAREG); | |
464 writeb( XCOLMSK0BLUE, mga_mmio_base + PALWTADD); | |
465 writeb( colkey_mask[2], mga_mmio_base + X_DATAREG); | |
466 writeb( XCOLMSK, mga_mmio_base + PALWTADD); | |
467 writeb( colkey_mask[3], mga_mmio_base + X_DATAREG); | |
468 | |
469 } else if(!colkey_saved){ | |
470 // save it | |
471 colkey_saved=1; | |
472 // Get color key registers: | |
473 writeb( XKEYOPMODE, mga_mmio_base + PALWTADD); | |
474 colkey_on=(unsigned char)readb(mga_mmio_base + X_DATAREG) & 1; | |
475 | |
476 writeb( XCOLKEY0RED, mga_mmio_base + PALWTADD); | |
477 colkey_color[0]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
478 writeb( XCOLKEY0GREEN, mga_mmio_base + PALWTADD); | |
479 colkey_color[1]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
480 writeb( XCOLKEY0BLUE, mga_mmio_base + PALWTADD); | |
481 colkey_color[2]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
482 writeb( X_COLKEY, mga_mmio_base + PALWTADD); | |
483 colkey_color[3]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
484 | |
485 writeb( XCOLMSK0RED, mga_mmio_base + PALWTADD); | |
486 colkey_mask[0]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
487 writeb( XCOLMSK0GREEN, mga_mmio_base + PALWTADD); | |
488 colkey_mask[1]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
489 writeb( XCOLMSK0BLUE, mga_mmio_base + PALWTADD); | |
490 colkey_mask[2]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
491 writeb( XCOLMSK, mga_mmio_base + PALWTADD); | |
492 colkey_mask[3]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
493 | |
5623 | 494 #ifdef MP_DEBUG |
2086 | 495 printk("mga_vid: Saved colorkey (ON: %d %02X:%02X:%02X)\n", |
496 colkey_on,colkey_color[0],colkey_color[1],colkey_color[2]); | |
5623 | 497 #endif |
2086 | 498 |
499 } | |
500 | |
501 if(!restore){ | |
1 | 502 writeb( XKEYOPMODE, mga_mmio_base + PALWTADD); |
503 writeb( mga_config.colkey_on, mga_mmio_base + X_DATAREG); | |
504 if ( mga_config.colkey_on ) | |
505 { | |
506 uint32_t r=0, g=0, b=0; | |
507 | |
508 writeb( XMULCTRL, mga_mmio_base + PALWTADD); | |
509 switch (readb (mga_mmio_base + X_DATAREG)) | |
510 { | |
511 case BPP_8: | |
512 /* Need to look up the color index, just using | |
513 color 0 for now. */ | |
514 break; | |
515 | |
516 case BPP_15: | |
517 r = mga_config.colkey_red >> 3; | |
518 g = mga_config.colkey_green >> 3; | |
519 b = mga_config.colkey_blue >> 3; | |
520 break; | |
521 | |
522 case BPP_16: | |
523 r = mga_config.colkey_red >> 3; | |
524 g = mga_config.colkey_green >> 2; | |
525 b = mga_config.colkey_blue >> 3; | |
526 break; | |
527 | |
528 case BPP_24: | |
529 case BPP_32_DIR: | |
530 case BPP_32_PAL: | |
531 r = mga_config.colkey_red; | |
532 g = mga_config.colkey_green; | |
533 b = mga_config.colkey_blue; | |
534 break; | |
535 } | |
536 | |
537 // Disable color keying on alpha channel | |
538 writeb( XCOLMSK, mga_mmio_base + PALWTADD); | |
539 writeb( 0x00, mga_mmio_base + X_DATAREG); | |
540 writeb( X_COLKEY, mga_mmio_base + PALWTADD); | |
541 writeb( 0x00, mga_mmio_base + X_DATAREG); | |
542 | |
2086 | 543 |
1 | 544 // Set up color key registers |
545 writeb( XCOLKEY0RED, mga_mmio_base + PALWTADD); | |
546 writeb( r, mga_mmio_base + X_DATAREG); | |
547 writeb( XCOLKEY0GREEN, mga_mmio_base + PALWTADD); | |
548 writeb( g, mga_mmio_base + X_DATAREG); | |
549 writeb( XCOLKEY0BLUE, mga_mmio_base + PALWTADD); | |
550 writeb( b, mga_mmio_base + X_DATAREG); | |
551 | |
552 // Set up color key mask registers | |
553 writeb( XCOLMSK0RED, mga_mmio_base + PALWTADD); | |
554 writeb( 0xff, mga_mmio_base + X_DATAREG); | |
555 writeb( XCOLMSK0GREEN, mga_mmio_base + PALWTADD); | |
556 writeb( 0xff, mga_mmio_base + X_DATAREG); | |
557 writeb( XCOLMSK0BLUE, mga_mmio_base + PALWTADD); | |
558 writeb( 0xff, mga_mmio_base + X_DATAREG); | |
559 } | |
560 | |
2086 | 561 } |
562 | |
1 | 563 // Backend Scaler |
564 writel( regs.besctl, mga_mmio_base + BESCTL); | |
565 if(is_g400) | |
566 writel( regs.beslumactl, mga_mmio_base + BESLUMACTL); | |
567 writel( regs.bespitch, mga_mmio_base + BESPITCH); | |
568 | |
569 writel( regs.besa1org, mga_mmio_base + BESA1ORG); | |
570 writel( regs.besa1corg, mga_mmio_base + BESA1CORG); | |
48 | 571 writel( regs.besa2org, mga_mmio_base + BESA2ORG); |
572 writel( regs.besa2corg, mga_mmio_base + BESA2CORG); | |
1 | 573 writel( regs.besb1org, mga_mmio_base + BESB1ORG); |
574 writel( regs.besb1corg, mga_mmio_base + BESB1CORG); | |
48 | 575 writel( regs.besb2org, mga_mmio_base + BESB2ORG); |
576 writel( regs.besb2corg, mga_mmio_base + BESB2CORG); | |
1 | 577 if(is_g400) |
578 { | |
579 writel( regs.besa1c3org, mga_mmio_base + BESA1C3ORG); | |
48 | 580 writel( regs.besa2c3org, mga_mmio_base + BESA2C3ORG); |
1 | 581 writel( regs.besb1c3org, mga_mmio_base + BESB1C3ORG); |
48 | 582 writel( regs.besb2c3org, mga_mmio_base + BESB2C3ORG); |
1 | 583 } |
584 | |
585 writel( regs.beshcoord, mga_mmio_base + BESHCOORD); | |
586 writel( regs.beshiscal, mga_mmio_base + BESHISCAL); | |
587 writel( regs.beshsrcst, mga_mmio_base + BESHSRCST); | |
588 writel( regs.beshsrcend, mga_mmio_base + BESHSRCEND); | |
589 writel( regs.beshsrclst, mga_mmio_base + BESHSRCLST); | |
590 | |
591 writel( regs.besvcoord, mga_mmio_base + BESVCOORD); | |
592 writel( regs.besviscal, mga_mmio_base + BESVISCAL); | |
48 | 593 |
1 | 594 writel( regs.besv1srclst, mga_mmio_base + BESV1SRCLST); |
595 writel( regs.besv1wght, mga_mmio_base + BESV1WGHT); | |
48 | 596 writel( regs.besv2srclst, mga_mmio_base + BESV2SRCLST); |
597 writel( regs.besv2wght, mga_mmio_base + BESV2WGHT); | |
1 | 598 |
599 //update the registers somewhere between 1 and 2 frames from now. | |
600 writel( regs.besglobctl + ((readl(mga_mmio_base + VCOUNT)+2)<<16), | |
601 mga_mmio_base + BESGLOBCTL); | |
602 | |
77 | 603 #if 0 |
61 | 604 printk(KERN_DEBUG "mga_vid: wrote BES registers\n"); |
605 printk(KERN_DEBUG "mga_vid: BESCTL = 0x%08x\n", | |
1 | 606 readl(mga_mmio_base + BESCTL)); |
61 | 607 printk(KERN_DEBUG "mga_vid: BESGLOBCTL = 0x%08x\n", |
1 | 608 readl(mga_mmio_base + BESGLOBCTL)); |
61 | 609 printk(KERN_DEBUG "mga_vid: BESSTATUS= 0x%08x\n", |
1 | 610 readl(mga_mmio_base + BESSTATUS)); |
77 | 611 #endif |
2344 | 612 #ifdef CRTC2 |
613 // printk("c2ctl:0x%08x c2datactl:0x%08x\n",readl(mga_mmio_base + C2CTL),readl(mga_mmio_base + C2DATACTL)); | |
614 // printk("c2misc:0x%08x\n",readl(mga_mmio_base + C2MISC)); | |
615 // printk("c2ctl:0x%08x c2datactl:0x%08x\n",cregs.c2ctl,cregs.c2datactl); | |
616 | |
617 // writel(cregs.c2ctl, mga_mmio_base + C2CTL); | |
618 | |
619 writel(((readl(mga_mmio_base + C2CTL) & ~0x03e00000) + (cregs.c2ctl & 0x03e00000)), mga_mmio_base + C2CTL); | |
620 writel(((readl(mga_mmio_base + C2DATACTL) & ~0x000000ff) + (cregs.c2datactl & 0x000000ff)), mga_mmio_base + C2DATACTL); | |
621 // ctrc2 | |
622 // disable CRTC2 acording to specs | |
623 // writel(cregs.c2ctl & 0xfffffff0, mga_mmio_base + C2CTL); | |
624 // je to treba ??? | |
625 // writeb((readb(mga_mmio_base + XMISCCTRL) & 0x19) | 0xa2, mga_mmio_base + XMISCCTRL); // MAFC - mfcsel & vdoutsel | |
626 // writeb((readb(mga_mmio_base + XMISCCTRL) & 0x19) | 0x92, mga_mmio_base + XMISCCTRL); | |
627 // writeb((readb(mga_mmio_base + XMISCCTRL) & ~0xe9) + 0xa2, mga_mmio_base + XMISCCTRL); | |
628 // writel(cregs.c2datactl, mga_mmio_base + C2DATACTL); | |
629 // writel(cregs.c2hparam, mga_mmio_base + C2HPARAM); | |
630 // writel(cregs.c2hsync, mga_mmio_base + C2HSYNC); | |
631 // writel(cregs.c2vparam, mga_mmio_base + C2VPARAM); | |
632 // writel(cregs.c2vsync, mga_mmio_base + C2VSYNC); | |
633 writel(cregs.c2misc, mga_mmio_base + C2MISC); | |
634 | |
5623 | 635 #ifdef MP_DEBUG |
2344 | 636 printk("c2offset = %d\n",cregs.c2offset); |
5623 | 637 #endif |
2344 | 638 |
639 writel(cregs.c2offset, mga_mmio_base + C2OFFSET); | |
640 writel(cregs.c2startadd0, mga_mmio_base + C2STARTADD0); | |
641 // writel(cregs.c2startadd1, mga_mmio_base + C2STARTADD1); | |
642 writel(cregs.c2pl2startadd0, mga_mmio_base + C2PL2STARTADD0); | |
643 // writel(cregs.c2pl2startadd1, mga_mmio_base + C2PL2STARTADD1); | |
644 writel(cregs.c2pl3startadd0, mga_mmio_base + C2PL3STARTADD0); | |
645 // writel(cregs.c2pl3startadd1, mga_mmio_base + C2PL3STARTADD1); | |
646 writel(cregs.c2spicstartadd0, mga_mmio_base + C2SPICSTARTADD0); | |
647 // writel(cregs.c2spicstartadd1, mga_mmio_base + C2SPICSTARTADD1); | |
648 // writel(cregs.c2subpiclut, mga_mmio_base + C2SUBPICLUT); | |
649 // writel(cregs.c2preload, mga_mmio_base + C2PRELOAD); | |
650 // finaly enable everything | |
651 // writel(cregs.c2ctl, mga_mmio_base + C2CTL); | |
652 // printk("c2ctl:0x%08x c2datactl:0x%08x\n",readl(mga_mmio_base + C2CTL),readl(mga_mmio_base + C2DATACTL)); | |
653 // printk("c2misc:0x%08x\n", readl(mga_mmio_base + C2MISC)); | |
654 #endif | |
1 | 655 } |
656 | |
657 static int mga_vid_set_config(mga_vid_config_t *config) | |
658 { | |
659 int x, y, sw, sh, dw, dh; | |
660 int besleft, bestop, ifactor, ofsleft, ofstop, baseadrofs, weight, weights; | |
57 | 661 int frame_size=config->frame_size; |
2344 | 662 #ifdef CRTC2 |
663 #define right_margin 0 | |
664 #define left_margin 18 | |
665 #define hsync_len 46 | |
666 #define lower_margin 10 | |
667 #define vsync_len 4 | |
668 #define upper_margin 39 | |
669 | |
670 unsigned int hdispend = (config->src_width + 31) & ~31; | |
671 unsigned int hsyncstart = hdispend + (right_margin & ~7); | |
672 unsigned int hsyncend = hsyncstart + (hsync_len & ~7); | |
673 unsigned int htotal = hsyncend + (left_margin & ~7); | |
674 unsigned int vdispend = config->src_height; | |
675 unsigned int vsyncstart = vdispend + lower_margin; | |
676 unsigned int vsyncend = vsyncstart + vsync_len; | |
677 unsigned int vtotal = vsyncend + upper_margin; | |
678 #endif | |
1 | 679 x = config->x_org; |
680 y = config->y_org; | |
681 sw = config->src_width; | |
682 sh = config->src_height; | |
683 dw = config->dest_width; | |
684 dh = config->dest_height; | |
685 | |
5623 | 686 #ifdef MP_DEBUG |
61 | 687 printk(KERN_DEBUG "mga_vid: Setting up a %dx%d+%d+%d video window (src %dx%d) format %X\n", |
1 | 688 dw, dh, x, y, sw, sh, config->format); |
5623 | 689 #endif |
1 | 690 |
3959 | 691 if(sw<4 || sh<4 || dw<4 || dh<4){ |
692 printk(KERN_ERR "mga_vid: Invalid src/dest dimenstions\n"); | |
693 return -1; | |
694 } | |
695 | |
1 | 696 //FIXME check that window is valid and inside desktop |
697 | |
698 //FIXME figure out a better way to allocate memory on card | |
699 //allocate 2 megs | |
700 //mga_src_base = mga_mem_base + (MGA_VIDMEM_SIZE-2) * 0x100000; | |
57 | 701 //mga_src_base = (MGA_VIDMEM_SIZE-3) * 0x100000; |
1 | 702 |
703 | |
704 //Setup the BES registers for a three plane 4:2:0 video source | |
705 | |
466 | 706 regs.besglobctl = 0; |
707 | |
1 | 708 switch(config->format){ |
709 case MGA_VID_FORMAT_YV12: | |
470 | 710 case MGA_VID_FORMAT_I420: |
711 case MGA_VID_FORMAT_IYUV: | |
1 | 712 regs.besctl = 1 // BES enabled |
713 + (0<<6) // even start polarity | |
714 + (1<<10) // x filtering enabled | |
715 + (1<<11) // y filtering enabled | |
716 + (1<<16) // chroma upsampling | |
717 + (1<<17) // 4:2:0 mode | |
718 + (1<<18); // dither enabled | |
466 | 719 #if 0 |
1 | 720 if(is_g400) |
721 { | |
722 //zoom disabled, zoom filter disabled, 420 3 plane format, proc amp | |
723 //disabled, rgb mode disabled | |
724 regs.besglobctl = (1<<5); | |
725 } | |
726 else | |
727 { | |
728 //zoom disabled, zoom filter disabled, Cb samples in 0246, Cr | |
729 //in 1357, BES register update on besvcnt | |
466 | 730 regs.besglobctl = 0; |
1 | 731 } |
466 | 732 #endif |
1 | 733 break; |
734 | |
735 case MGA_VID_FORMAT_YUY2: | |
736 regs.besctl = 1 // BES enabled | |
737 + (0<<6) // even start polarity | |
738 + (1<<10) // x filtering enabled | |
739 + (1<<11) // y filtering enabled | |
740 + (1<<16) // chroma upsampling | |
741 + (0<<17) // 4:2:2 mode | |
742 + (1<<18); // dither enabled | |
743 | |
744 regs.besglobctl = 0; // YUY2 format selected | |
745 break; | |
466 | 746 |
747 case MGA_VID_FORMAT_UYVY: | |
748 regs.besctl = 1 // BES enabled | |
749 + (0<<6) // even start polarity | |
750 + (1<<10) // x filtering enabled | |
751 + (1<<11) // y filtering enabled | |
752 + (1<<16) // chroma upsampling | |
753 + (0<<17) // 4:2:2 mode | |
754 + (1<<18); // dither enabled | |
755 | |
756 regs.besglobctl = 1<<6; // UYVY format selected | |
757 break; | |
758 | |
1 | 759 default: |
61 | 760 printk(KERN_ERR "mga_vid: Unsupported pixel format: 0x%X\n",config->format); |
1 | 761 return -1; |
762 } | |
763 | |
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764 // setting black&white mode |
4484 | 765 regs.besctl|=(regs.blackie<<20); |
1 | 766 |
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767 //Enable contrast and brightness control |
466 | 768 regs.besglobctl |= (1<<5) + (1<<7); |
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|
769 |
6798 | 770 // brightness (-128..127) && contrast (0..255) |
771 regs.beslumactl = (mga_brightness << 16) | ((mga_contrast+0x80)&0xFFFF); | |
1 | 772 |
773 //Setup destination window boundaries | |
774 besleft = x > 0 ? x : 0; | |
775 bestop = y > 0 ? y : 0; | |
776 regs.beshcoord = (besleft<<16) + (x + dw-1); | |
777 regs.besvcoord = (bestop<<16) + (y + dh-1); | |
778 | |
779 //Setup source dimensions | |
780 regs.beshsrclst = (sw - 1) << 16; | |
781 regs.bespitch = (sw + 31) & ~31 ; | |
782 | |
783 //Setup horizontal scaling | |
784 ifactor = ((sw-1)<<14)/(dw-1); | |
785 ofsleft = besleft - x; | |
786 | |
787 regs.beshiscal = ifactor<<2; | |
788 regs.beshsrcst = (ofsleft*ifactor)<<2; | |
789 regs.beshsrcend = regs.beshsrcst + (((dw - ofsleft - 1) * ifactor) << 2); | |
790 | |
791 //Setup vertical scaling | |
792 ifactor = ((sh-1)<<14)/(dh-1); | |
793 ofstop = bestop - y; | |
794 | |
795 regs.besviscal = ifactor<<2; | |
796 | |
797 baseadrofs = ((ofstop*regs.besviscal)>>16)*regs.bespitch; | |
57 | 798 //frame_size = ((sw + 31) & ~31) * sh + (((sw + 31) & ~31) * sh) / 2; |
1 | 799 regs.besa1org = (uint32_t) mga_src_base + baseadrofs; |
48 | 800 regs.besa2org = (uint32_t) mga_src_base + baseadrofs + 1*frame_size; |
801 regs.besb1org = (uint32_t) mga_src_base + baseadrofs + 2*frame_size; | |
802 regs.besb2org = (uint32_t) mga_src_base + baseadrofs + 3*frame_size; | |
1 | 803 |
470 | 804 if(config->format==MGA_VID_FORMAT_YV12 |
805 ||config->format==MGA_VID_FORMAT_IYUV | |
806 ||config->format==MGA_VID_FORMAT_I420 | |
807 ){ | |
57 | 808 // planar YUV frames: |
1 | 809 if (is_g400) |
810 baseadrofs = (((ofstop*regs.besviscal)/4)>>16)*regs.bespitch; | |
811 else | |
812 baseadrofs = (((ofstop*regs.besviscal)/2)>>16)*regs.bespitch; | |
813 | |
5336 | 814 if(config->format==MGA_VID_FORMAT_YV12 || !is_g400){ |
1 | 815 regs.besa1corg = (uint32_t) mga_src_base + baseadrofs + regs.bespitch * sh ; |
48 | 816 regs.besa2corg = (uint32_t) mga_src_base + baseadrofs + 1*frame_size + regs.bespitch * sh; |
817 regs.besb1corg = (uint32_t) mga_src_base + baseadrofs + 2*frame_size + regs.bespitch * sh; | |
818 regs.besb2corg = (uint32_t) mga_src_base + baseadrofs + 3*frame_size + regs.bespitch * sh; | |
1 | 819 regs.besa1c3org = regs.besa1corg + ((regs.bespitch * sh) / 4); |
48 | 820 regs.besa2c3org = regs.besa2corg + ((regs.bespitch * sh) / 4); |
1 | 821 regs.besb1c3org = regs.besb1corg + ((regs.bespitch * sh) / 4); |
48 | 822 regs.besb2c3org = regs.besb2corg + ((regs.bespitch * sh) / 4); |
470 | 823 } else { |
824 regs.besa1c3org = (uint32_t) mga_src_base + baseadrofs + regs.bespitch * sh ; | |
825 regs.besa2c3org = (uint32_t) mga_src_base + baseadrofs + 1*frame_size + regs.bespitch * sh; | |
826 regs.besb1c3org = (uint32_t) mga_src_base + baseadrofs + 2*frame_size + regs.bespitch * sh; | |
827 regs.besb2c3org = (uint32_t) mga_src_base + baseadrofs + 3*frame_size + regs.bespitch * sh; | |
828 regs.besa1corg = regs.besa1c3org + ((regs.bespitch * sh) / 4); | |
829 regs.besa2corg = regs.besa2c3org + ((regs.bespitch * sh) / 4); | |
830 regs.besb1corg = regs.besb1c3org + ((regs.bespitch * sh) / 4); | |
831 regs.besb2corg = regs.besb2c3org + ((regs.bespitch * sh) / 4); | |
832 } | |
833 | |
57 | 834 } |
1 | 835 |
836 weight = ofstop * (regs.besviscal >> 2); | |
837 weights = weight < 0 ? 1 : 0; | |
48 | 838 regs.besv2wght = regs.besv1wght = (weights << 16) + ((weight & 0x3FFF) << 2); |
839 regs.besv2srclst = regs.besv1srclst = sh - 1 - (((ofstop * regs.besviscal) >> 16) & 0x03FF); | |
1 | 840 |
2344 | 841 #ifdef CRTC2 |
842 // pridat hlavni registry - tj. casovani ... | |
843 | |
844 | |
845 switch(config->format){ | |
846 case MGA_VID_FORMAT_YV12: | |
847 case MGA_VID_FORMAT_I420: | |
848 case MGA_VID_FORMAT_IYUV: | |
849 cregs.c2ctl = 1 // CRTC2 enabled | |
850 + (1<<1) // external clock | |
851 + (0<<2) // external clock | |
852 + (1<<3) // pixel clock enable - not needed ??? | |
853 + (0<<4) // high prioryty req | |
854 + (1<<5) // high prioryty req | |
855 + (0<<6) // high prioryty req | |
856 + (1<<8) // high prioryty req max | |
857 + (0<<9) // high prioryty req max | |
858 + (0<<10) // high prioryty req max | |
859 + (0<<20) // CRTC1 to DAC | |
860 + (1<<21) // 420 mode | |
861 + (1<<22) // 420 mode | |
862 + (1<<23) // 420 mode | |
863 + (0<<24) // single chroma line for 420 mode - need to be corrected | |
864 + (0<<25) /*/ interlace mode - need to be corrected*/ | |
865 + (0<<26) // field legth polariry | |
866 + (0<<27) // field identification polariry | |
867 + (1<<28) // VIDRST detection mode | |
868 + (0<<29) // VIDRST detection mode | |
869 + (1<<30) // Horizontal counter preload | |
870 + (1<<31) // Vertical counter preload | |
871 ; | |
872 cregs.c2datactl = 1 // disable dither - propably not needed, we are already in YUV mode | |
873 + (1<<1) // Y filter enable | |
874 + (1<<2) // CbCr filter enable | |
875 + (0<<3) // subpicture enable (disabled) | |
876 + (0<<4) // NTSC enable (disabled - PAL) | |
877 + (0<<5) // C2 static subpicture enable (disabled) | |
878 + (0<<6) // C2 subpicture offset division (disabled) | |
879 + (0<<7) // 422 subformat selection ! | |
880 /* + (0<<8) // 15 bpp high alpha | |
881 + (0<<9) // 15 bpp high alpha | |
882 + (0<<10) // 15 bpp high alpha | |
883 + (0<<11) // 15 bpp high alpha | |
884 + (0<<12) // 15 bpp high alpha | |
885 + (0<<13) // 15 bpp high alpha | |
886 + (0<<14) // 15 bpp high alpha | |
887 + (0<<15) // 15 bpp high alpha | |
888 + (0<<16) // 15 bpp low alpha | |
889 + (0<<17) // 15 bpp low alpha | |
890 + (0<<18) // 15 bpp low alpha | |
891 + (0<<19) // 15 bpp low alpha | |
892 + (0<<20) // 15 bpp low alpha | |
893 + (0<<21) // 15 bpp low alpha | |
894 + (0<<22) // 15 bpp low alpha | |
895 + (0<<23) // 15 bpp low alpha | |
896 + (0<<24) // static subpicture key | |
897 + (0<<25) // static subpicture key | |
898 + (0<<26) // static subpicture key | |
899 + (0<<27) // static subpicture key | |
900 + (0<<28) // static subpicture key | |
901 */ ; | |
902 break; | |
903 | |
904 case MGA_VID_FORMAT_YUY2: | |
905 cregs.c2ctl = 1 // CRTC2 enabled | |
906 + (1<<1) // external clock | |
907 + (0<<2) // external clock | |
908 + (1<<3) // pixel clock enable - not needed ??? | |
909 + (0<<4) // high prioryty req - acc to spec | |
910 + (1<<5) // high prioryty req | |
911 + (0<<6) // high prioryty req | |
912 // 7 reserved | |
913 + (1<<8) // high prioryty req max | |
914 + (0<<9) // high prioryty req max | |
915 + (0<<10) // high prioryty req max | |
916 // 11-19 reserved | |
917 + (0<<20) // CRTC1 to DAC | |
918 + (1<<21) // 422 mode | |
919 + (0<<22) // 422 mode | |
920 + (1<<23) // 422 mode | |
921 + (0<<24) // single chroma line for 420 mode - need to be corrected | |
922 + (0<<25) /*/ interlace mode - need to be corrected*/ | |
923 + (0<<26) // field legth polariry | |
924 + (0<<27) // field identification polariry | |
925 + (1<<28) // VIDRST detection mode | |
926 + (0<<29) // VIDRST detection mode | |
927 + (1<<30) // Horizontal counter preload | |
928 + (1<<31) // Vertical counter preload | |
929 ; | |
930 cregs.c2datactl = 1 // disable dither - propably not needed, we are already in YUV mode | |
931 + (1<<1) // Y filter enable | |
932 + (1<<2) // CbCr filter enable | |
933 + (0<<3) // subpicture enable (disabled) | |
934 + (0<<4) // NTSC enable (disabled - PAL) | |
935 + (0<<5) // C2 static subpicture enable (disabled) | |
936 + (0<<6) // C2 subpicture offset division (disabled) | |
937 + (0<<7) // 422 subformat selection ! | |
938 /* + (0<<8) // 15 bpp high alpha | |
939 + (0<<9) // 15 bpp high alpha | |
940 + (0<<10) // 15 bpp high alpha | |
941 + (0<<11) // 15 bpp high alpha | |
942 + (0<<12) // 15 bpp high alpha | |
943 + (0<<13) // 15 bpp high alpha | |
944 + (0<<14) // 15 bpp high alpha | |
945 + (0<<15) // 15 bpp high alpha | |
946 + (0<<16) // 15 bpp low alpha | |
947 + (0<<17) // 15 bpp low alpha | |
948 + (0<<18) // 15 bpp low alpha | |
949 + (0<<19) // 15 bpp low alpha | |
950 + (0<<20) // 15 bpp low alpha | |
951 + (0<<21) // 15 bpp low alpha | |
952 + (0<<22) // 15 bpp low alpha | |
953 + (0<<23) // 15 bpp low alpha | |
954 + (0<<24) // static subpicture key | |
955 + (0<<25) // static subpicture key | |
956 + (0<<26) // static subpicture key | |
957 + (0<<27) // static subpicture key | |
958 + (0<<28) // static subpicture key | |
959 */ ; | |
960 break; | |
961 | |
962 case MGA_VID_FORMAT_UYVY: | |
963 cregs.c2ctl = 1 // CRTC2 enabled | |
964 + (1<<1) // external clock | |
965 + (0<<2) // external clock | |
966 + (1<<3) // pixel clock enable - not needed ??? | |
967 + (0<<4) // high prioryty req | |
968 + (1<<5) // high prioryty req | |
969 + (0<<6) // high prioryty req | |
970 + (1<<8) // high prioryty req max | |
971 + (0<<9) // high prioryty req max | |
972 + (0<<10) // high prioryty req max | |
973 + (0<<20) // CRTC1 to DAC | |
974 + (1<<21) // 422 mode | |
975 + (0<<22) // 422 mode | |
976 + (1<<23) // 422 mode | |
977 + (1<<24) // single chroma line for 420 mode - need to be corrected | |
978 + (1<<25) /*/ interlace mode - need to be corrected*/ | |
979 + (0<<26) // field legth polariry | |
980 + (0<<27) // field identification polariry | |
981 + (1<<28) // VIDRST detection mode | |
982 + (0<<29) // VIDRST detection mode | |
983 + (1<<30) // Horizontal counter preload | |
984 + (1<<31) // Vertical counter preload | |
985 ; | |
986 cregs.c2datactl = 0 // enable dither - propably not needed, we are already in YUV mode | |
987 + (1<<1) // Y filter enable | |
988 + (1<<2) // CbCr filter enable | |
989 + (0<<3) // subpicture enable (disabled) | |
990 + (0<<4) // NTSC enable (disabled - PAL) | |
991 + (0<<5) // C2 static subpicture enable (disabled) | |
992 + (0<<6) // C2 subpicture offset division (disabled) | |
993 + (1<<7) // 422 subformat selection ! | |
994 /* + (0<<8) // 15 bpp high alpha | |
995 + (0<<9) // 15 bpp high alpha | |
996 + (0<<10) // 15 bpp high alpha | |
997 + (0<<11) // 15 bpp high alpha | |
998 + (0<<12) // 15 bpp high alpha | |
999 + (0<<13) // 15 bpp high alpha | |
1000 + (0<<14) // 15 bpp high alpha | |
1001 + (0<<15) // 15 bpp high alpha | |
1002 + (0<<16) // 15 bpp low alpha | |
1003 + (0<<17) // 15 bpp low alpha | |
1004 + (0<<18) // 15 bpp low alpha | |
1005 + (0<<19) // 15 bpp low alpha | |
1006 + (0<<20) // 15 bpp low alpha | |
1007 + (0<<21) // 15 bpp low alpha | |
1008 + (0<<22) // 15 bpp low alpha | |
1009 + (0<<23) // 15 bpp low alpha | |
1010 + (0<<24) // static subpicture key | |
1011 + (0<<25) // static subpicture key | |
1012 + (0<<26) // static subpicture key | |
1013 + (0<<27) // static subpicture key | |
1014 + (0<<28) // static subpicture key | |
1015 */ ; | |
1016 break; | |
1017 | |
1018 default: | |
1019 printk(KERN_ERR "mga_vid: Unsupported pixel format: 0x%X\n",config->format); | |
1020 return -1; | |
1021 } | |
1022 | |
1023 cregs.c2hparam=((hdispend - 8) << 16) | (htotal - 8); | |
1024 cregs.c2hsync=((hsyncend - 8) << 16) | (hsyncstart - 8); | |
1025 | |
1026 cregs.c2misc=0 // CRTCV2 656 togg f0 | |
1027 +(0<<1) // CRTCV2 656 togg f0 | |
1028 +(0<<2) // CRTCV2 656 togg f0 | |
1029 +(0<<4) // CRTCV2 656 togg f1 | |
1030 +(0<<5) // CRTCV2 656 togg f1 | |
1031 +(0<<6) // CRTCV2 656 togg f1 | |
1032 +(0<<8) // Hsync active high | |
1033 +(0<<9) // Vsync active high | |
1034 // 16-27 c2vlinecomp - nevim co tam dat | |
1035 ; | |
1036 cregs.c2offset=(regs.bespitch << 1); | |
1037 | |
1038 cregs.c2pl2startadd0=regs.besa1corg; | |
1039 // cregs.c2pl2startadd1=regs.besa2corg; | |
1040 cregs.c2pl3startadd0=regs.besa1c3org; | |
1041 // cregs.c2pl3startadd1=regs.besa2c3org; | |
1042 | |
1043 cregs.c2preload=(vsyncstart << 16) | (hsyncstart); // from | |
1044 | |
1045 cregs.c2spicstartadd0=0; // not used | |
1046 // cregs.c2spicstartadd1=0; // not used | |
1047 | |
1048 cregs.c2startadd0=regs.besa1org; | |
1049 // cregs.c2startadd1=regs.besa2org; | |
1050 | |
1051 cregs.c2subpiclut=0; //not used | |
1052 | |
1053 cregs.c2vparam=((vdispend - 1) << 16) | (vtotal - 1); | |
1054 cregs.c2vsync=((vsyncend - 1) << 16) | (vsyncstart - 1); | |
1055 | |
1056 | |
1057 #endif | |
1058 | |
2086 | 1059 mga_vid_write_regs(0); |
1 | 1060 return 0; |
1061 } | |
1062 | |
68 | 1063 #ifdef MGA_ALLOW_IRQ |
1064 | |
48 | 1065 static void enable_irq(){ |
1066 long int cc; | |
1067 | |
1068 cc = readl(mga_mmio_base + IEN); | |
63 | 1069 // printk(KERN_ALERT "*** !!! IRQREG = %d\n", (int)(cc&0xff)); |
48 | 1070 |
1071 writeb( 0x11, mga_mmio_base + CRTCX); | |
1072 | |
1073 writeb(0x20, mga_mmio_base + CRTCD ); /* clear 0, enable off */ | |
1074 writeb(0x00, mga_mmio_base + CRTCD ); /* enable on */ | |
1075 writeb(0x10, mga_mmio_base + CRTCD ); /* clear = 1 */ | |
1076 | |
1077 writel( regs.besglobctl , mga_mmio_base + BESGLOBCTL); | |
1078 | |
1079 } | |
1080 | |
1081 static void disable_irq(){ | |
1082 | |
1083 writeb( 0x11, mga_mmio_base + CRTCX); | |
1084 writeb(0x20, mga_mmio_base + CRTCD ); /* clear 0, enable off */ | |
1085 | |
1086 } | |
1087 | |
5884 | 1088 static void mga_handle_irq(int irq, void *dev_id, struct pt_regs *pregs) { |
48 | 1089 // static int frame=0; |
854
76ca00724e12
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parents:
662
diff
changeset
|
1090 // static int counter=0; |
48 | 1091 long int cc; |
1092 // if ( ! mga_enabled_flag ) return; | |
1093 | |
68 | 1094 // printk(KERN_DEBUG "vcount = %d\n",readl(mga_mmio_base + VCOUNT)); |
1095 | |
48 | 1096 //printk("mga_interrupt #%d\n", irq); |
1097 | |
1098 if ( irq != -1 ) { | |
1099 | |
1100 cc = readl(mga_mmio_base + STATUS); | |
1101 if ( ! (cc & 0x10) ) return; /* vsyncpen */ | |
1102 // debug_irqcnt++; | |
1103 } | |
1104 | |
1105 // if ( debug_irqignore ) { | |
1106 // debug_irqignore = 0; | |
1107 | |
1108 | |
1109 /* | |
1110 if ( mga_conf_deinterlace ) { | |
1111 if ( mga_first_field ) { | |
1112 // printk("mga_interrupt first field\n"); | |
1113 if ( syncfb_interrupt() ) | |
1114 mga_first_field = 0; | |
1115 } else { | |
1116 // printk("mga_interrupt second field\n"); | |
1117 mga_select_buffer( mga_current_field | 2 ); | |
1118 mga_first_field = 1; | |
1119 } | |
1120 } else { | |
1121 syncfb_interrupt(); | |
1122 } | |
1123 */ | |
1124 | |
1125 // frame=(frame+1)&1; | |
1126 regs.besctl = (regs.besctl & ~0x07000000) + (mga_next_frame << 25); | |
1127 writel( regs.besctl, mga_mmio_base + BESCTL ); | |
2344 | 1128 |
1129 #ifdef CRTC2 | |
1130 // sem pridat vyber obrazku !!!! | |
1131 crtc2_frame_sel(mga_next_frame); | |
1132 #endif | |
48 | 1133 |
1134 #if 0 | |
1135 ++counter; | |
1136 if(!(counter&63)){ | |
1137 printk("mga irq counter = %d\n",counter); | |
1138 } | |
1139 #endif | |
1140 | |
1141 // } else { | |
1142 // debug_irqignore = 1; | |
1143 // } | |
1144 | |
1145 if ( irq != -1 ) { | |
1146 writeb( 0x11, mga_mmio_base + CRTCX); | |
1147 writeb( 0, mga_mmio_base + CRTCD ); | |
1148 writeb( 0x10, mga_mmio_base + CRTCD ); | |
1149 } | |
1150 | |
1151 // writel( regs.besglobctl, mga_mmio_base + BESGLOBCTL); | |
1152 | |
1153 | |
1154 return; | |
1155 | |
1156 } | |
1157 | |
68 | 1158 #endif |
1 | 1159 |
1160 static int mga_vid_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) | |
1161 { | |
1162 int frame; | |
5013
52c008dd6e93
min() moved out of #if, applied brightness/contrast patch by Brian J. Murrell
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parents:
4728
diff
changeset
|
1163 uint32_t tmp; |
52c008dd6e93
min() moved out of #if, applied brightness/contrast patch by Brian J. Murrell
arpi
parents:
4728
diff
changeset
|
1164 |
1 | 1165 |
1166 switch(cmd) | |
1167 { | |
1168 case MGA_VID_CONFIG: | |
1169 //FIXME remove | |
68 | 1170 // printk(KERN_DEBUG "vcount = %d\n",readl(mga_mmio_base + VCOUNT)); |
5623 | 1171 #ifdef MP_DEBUG |
61 | 1172 printk(KERN_DEBUG "mga_mmio_base = %p\n",mga_mmio_base); |
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diff
changeset
|
1173 printk(KERN_DEBUG "mga_mem_base = %08x\n",mga_mem_base); |
1 | 1174 //FIXME remove |
1175 | |
61 | 1176 printk(KERN_DEBUG "mga_vid: Received configuration\n"); |
5623 | 1177 #endif |
1 | 1178 |
1179 if(copy_from_user(&mga_config,(mga_vid_config_t*) arg,sizeof(mga_vid_config_t))) | |
1180 { | |
61 | 1181 printk(KERN_ERR "mga_vid: failed copy from userspace\n"); |
1 | 1182 return(-EFAULT); |
1183 } | |
57 | 1184 if(mga_config.version != MGA_VID_VERSION){ |
61 | 1185 printk(KERN_ERR "mga_vid: incompatible version! driver: %X requested: %X\n",MGA_VID_VERSION,mga_config.version); |
57 | 1186 return(-EFAULT); |
1187 } | |
1188 | |
1189 if(mga_config.frame_size==0 || mga_config.frame_size>1024*768*2){ | |
61 | 1190 printk(KERN_ERR "mga_vid: illegal frame_size: %d\n",mga_config.frame_size); |
57 | 1191 return(-EFAULT); |
1192 } | |
1193 | |
1194 if(mga_config.num_frames<1 || mga_config.num_frames>4){ | |
61 | 1195 printk(KERN_ERR "mga_vid: illegal num_frames: %d\n",mga_config.num_frames); |
57 | 1196 return(-EFAULT); |
1197 } | |
1198 | |
4559
5dc383bb1c82
added mga_top_reserved module parameter to skip a configurable amount
rfelker
parents:
4527
diff
changeset
|
1199 mga_src_base = (mga_ram_size*0x100000-mga_config.num_frames*mga_config.frame_size-mga_top_reserved); |
57 | 1200 if(mga_src_base<0){ |
61 | 1201 printk(KERN_ERR "mga_vid: not enough memory for frames!\n"); |
57 | 1202 return(-EFAULT); |
1203 } | |
1204 mga_src_base &= (~0xFFFF); // 64k boundary | |
5623 | 1205 #ifdef MP_DEBUG |
61 | 1206 printk(KERN_DEBUG "mga YUV buffer base: 0x%X\n", mga_src_base); |
5623 | 1207 #endif |
57 | 1208 |
1 | 1209 if (is_g400) |
1210 mga_config.card_type = MGA_G400; | |
1211 else | |
1212 mga_config.card_type = MGA_G200; | |
1213 | |
1214 mga_config.ram_size = mga_ram_size; | |
1215 | |
1216 if (copy_to_user((mga_vid_config_t *) arg, &mga_config, sizeof(mga_vid_config_t))) | |
1217 { | |
61 | 1218 printk(KERN_ERR "mga_vid: failed copy to userspace\n"); |
1 | 1219 return(-EFAULT); |
1220 } | |
1221 return mga_vid_set_config(&mga_config); | |
1222 break; | |
1223 | |
1224 case MGA_VID_ON: | |
5623 | 1225 #ifdef MP_DEBUG |
61 | 1226 printk(KERN_DEBUG "mga_vid: Video ON\n"); |
5623 | 1227 #endif |
1 | 1228 vid_src_ready = 1; |
1229 if(vid_overlay_on) | |
1230 { | |
1231 regs.besctl |= 1; | |
2086 | 1232 mga_vid_write_regs(0); |
1 | 1233 } |
68 | 1234 #ifdef MGA_ALLOW_IRQ |
48 | 1235 if ( mga_irq != -1 ) enable_irq(); |
68 | 1236 #endif |
48 | 1237 mga_next_frame=0; |
1 | 1238 break; |
1239 | |
1240 case MGA_VID_OFF: | |
5623 | 1241 #ifdef MP_DEBUG |
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1242 printk(KERN_DEBUG "mga_vid: Video OFF (ioctl)\n"); |
5623 | 1243 #endif |
1 | 1244 vid_src_ready = 0; |
68 | 1245 #ifdef MGA_ALLOW_IRQ |
48 | 1246 if ( mga_irq != -1 ) disable_irq(); |
68 | 1247 #endif |
1 | 1248 regs.besctl &= ~1; |
466 | 1249 regs.besglobctl &= ~(1<<6); // UYVY format selected |
2086 | 1250 mga_vid_write_regs(0); |
1 | 1251 break; |
1252 | |
1253 case MGA_VID_FSEL: | |
1254 if(copy_from_user(&frame,(int *) arg,sizeof(int))) | |
1255 { | |
61 | 1256 printk(KERN_ERR "mga_vid: FSEL failed copy from userspace\n"); |
1 | 1257 return(-EFAULT); |
1258 } | |
1259 | |
1260 mga_vid_frame_sel(frame); | |
1261 break; | |
1262 | |
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1263 case MGA_VID_GET_LUMA: |
6798 | 1264 //tmp = regs.beslumactl; |
1265 //tmp = (tmp&0xFFFF0000) | (((tmp&0xFFFF) - 0x80)&0xFFFF); | |
1266 tmp = (mga_brightness << 16) | (mga_contrast&0xFFFF); | |
1267 | |
5013
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1268 if (copy_to_user((uint32_t *) arg, &tmp, sizeof(uint32_t))) |
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1269 { |
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1270 printk(KERN_ERR "mga_vid: failed copy %p to userspace %p\n", |
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1271 &tmp, (uint32_t *) arg); |
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1272 return(-EFAULT); |
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1273 } |
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1274 break; |
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1275 |
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1276 case MGA_VID_SET_LUMA: |
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1277 tmp = arg; |
6798 | 1278 mga_brightness=tmp>>16; mga_contrast=tmp&0xFFFF; |
1279 //regs.beslumactl = (tmp&0xFFFF0000) | ((tmp + 0x80)&0xFFFF); | |
1280 regs.beslumactl = (mga_brightness << 16) | ((mga_contrast+0x80)&0xFFFF); | |
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1281 mga_vid_write_regs(0); |
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1282 break; |
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1283 |
1 | 1284 default: |
61 | 1285 printk(KERN_ERR "mga_vid: Invalid ioctl\n"); |
1 | 1286 return (-EINVAL); |
1287 } | |
1288 | |
1289 return 0; | |
1290 } | |
1291 | |
1292 | |
1293 static int mga_vid_find_card(void) | |
1294 { | |
1295 struct pci_dev *dev = NULL; | |
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1296 unsigned int card_option; |
1 | 1297 |
1989 | 1298 if((dev = pci_find_device(PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, NULL))) |
1299 { | |
1300 is_g400 = 1; | |
1301 printk(KERN_INFO "mga_vid: Found MGA G550\n"); | |
1302 } | |
1303 else if((dev = pci_find_device(PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, NULL))) | |
1 | 1304 { |
1305 is_g400 = 1; | |
77 | 1306 printk(KERN_INFO "mga_vid: Found MGA G400/G450\n"); |
1 | 1307 } |
1308 else if((dev = pci_find_device(PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, NULL))) | |
1309 { | |
1310 is_g400 = 0; | |
63 | 1311 printk(KERN_INFO "mga_vid: Found MGA G200 AGP\n"); |
1 | 1312 } |
1313 else if((dev = pci_find_device(PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, NULL))) | |
1314 { | |
1315 is_g400 = 0; | |
63 | 1316 printk(KERN_INFO "mga_vid: Found MGA G200 PCI\n"); |
1 | 1317 } |
1318 else | |
1319 { | |
61 | 1320 printk(KERN_ERR "mga_vid: No supported cards found\n"); |
1 | 1321 return FALSE; |
1322 } | |
1323 | |
1324 pci_dev = dev; | |
48 | 1325 |
1326 mga_irq = pci_dev->irq; | |
1 | 1327 |
1328 #if LINUX_VERSION_CODE >= 0x020300 | |
1329 mga_mmio_base = ioremap_nocache(dev->resource[1].start,0x4000); | |
1330 mga_mem_base = dev->resource[0].start; | |
1331 #else | |
1332 mga_mmio_base = ioremap_nocache(dev->base_address[1] & PCI_BASE_ADDRESS_MEM_MASK,0x4000); | |
1333 mga_mem_base = dev->base_address[0] & PCI_BASE_ADDRESS_MEM_MASK; | |
1334 #endif | |
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1335 printk(KERN_INFO "mga_vid: MMIO at 0x%p IRQ: %d framebuffer: 0x%08X\n", mga_mmio_base, mga_irq, mga_mem_base); |
1 | 1336 |
1337 pci_read_config_dword(dev, 0x40, &card_option); | |
77 | 1338 printk(KERN_INFO "mga_vid: OPTION word: 0x%08X mem: 0x%02X %s\n", card_option, |
1339 (card_option>>10)&0x17, ((card_option>>14)&1)?"SGRAM":"SDRAM"); | |
1 | 1340 |
57 | 1341 // temp = (card_option >> 10) & 0x17; |
1342 | |
95 | 1343 if (mga_ram_size) { |
1344 printk(KERN_INFO "mga_vid: RAMSIZE forced to %d MB\n", mga_ram_size); | |
91 | 1345 } else { |
90 | 1346 |
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1347 #ifdef MGA_MEMORY_SIZE |
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1348 mga_ram_size = MGA_MEMORY_SIZE; |
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1349 printk(KERN_INFO "mga_vid: hard-coded RAMSIZE is %d MB\n", (unsigned int) mga_ram_size); |
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1350 |
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1351 #else |
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1352 |
95 | 1353 if (is_g400){ |
75 | 1354 switch((card_option>>10)&0x17){ |
1355 // SDRAM: | |
1356 case 0x00: | |
1357 case 0x04: mga_ram_size = 16; break; | |
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1358 case 0x03: |
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1359 case 0x05: mga_ram_size = 32; break; |
75 | 1360 // SGRAM: |
1361 case 0x10: | |
1362 case 0x14: mga_ram_size = 32; break; | |
1363 case 0x11: | |
1364 case 0x12: mga_ram_size = 16; break; | |
1365 default: | |
1366 mga_ram_size = 16; | |
1367 printk(KERN_INFO "mga_vid: Couldn't detect RAMSIZE, assuming 16MB!"); | |
1368 } | |
95 | 1369 }else{ |
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1370 switch((card_option>>10)&0x17){ |
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1371 // case 0x10: |
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1372 // case 0x13: mga_ram_size = 8; break; |
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1373 default: mga_ram_size = 8; |
64 | 1374 } |
95 | 1375 } |
64 | 1376 #if 0 |
95 | 1377 // printk("List resources -----------\n"); |
1378 for(temp=0;temp<DEVICE_COUNT_RESOURCE;temp++){ | |
1379 struct resource *res=&pci_dev->resource[temp]; | |
1380 if(res->flags){ | |
1381 int size=(1+res->end-res->start)>>20; | |
1382 printk(KERN_DEBUG "res %d: start: 0x%X end: 0x%X (%d MB) flags=0x%X\n",temp,res->start,res->end,size,res->flags); | |
1383 if(res->flags&(IORESOURCE_MEM|IORESOURCE_PREFETCH)){ | |
1384 if(size>mga_ram_size && size<=64) mga_ram_size=size; | |
1385 } | |
1386 } | |
57 | 1387 } |
64 | 1388 #endif |
95 | 1389 printk(KERN_INFO "mga_vid: detected RAMSIZE is %d MB\n", (unsigned int) mga_ram_size); |
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1390 #endif |
95 | 1391 } |
57 | 1392 |
48 | 1393 |
68 | 1394 #ifdef MGA_ALLOW_IRQ |
48 | 1395 if ( mga_irq != -1 ) { |
1396 int tmp = request_irq(mga_irq, mga_handle_irq, SA_INTERRUPT | SA_SHIRQ, "Syncfb Time Base", &mga_irq); | |
1397 if ( tmp ) { | |
61 | 1398 printk(KERN_INFO "syncfb (mga): cannot register irq %d (Err: %d)\n", mga_irq, tmp); |
48 | 1399 mga_irq=-1; |
1400 } else { | |
61 | 1401 printk(KERN_DEBUG "syncfb (mga): registered irq %d\n", mga_irq); |
48 | 1402 } |
1403 } else { | |
61 | 1404 printk(KERN_INFO "syncfb (mga): No valid irq was found\n"); |
48 | 1405 mga_irq=-1; |
1406 } | |
68 | 1407 #else |
1408 printk(KERN_INFO "syncfb (mga): IRQ disabled in mga_vid.c\n"); | |
1409 mga_irq=-1; | |
1410 #endif | |
48 | 1411 |
1 | 1412 return TRUE; |
1413 } | |
1414 | |
4484 | 1415 static void mga_param_buff_fill( void ) |
1416 { | |
1417 unsigned len; | |
1418 len = 0; | |
1419 len += sprintf(&mga_param_buff[len],"Interface version: %04X\n",MGA_VID_VERSION); | |
4527 | 1420 len += sprintf(&mga_param_buff[len],"Memory: %x:%dM\n",mga_mem_base,(unsigned int) mga_ram_size); |
4484 | 1421 len += sprintf(&mga_param_buff[len],"MMIO: %p\n",mga_mmio_base); |
1422 len += sprintf(&mga_param_buff[len],"Configurable stuff:\n"); | |
1423 len += sprintf(&mga_param_buff[len],"~~~~~~~~~~~~~~~~~~~\n"); | |
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1424 len += sprintf(&mga_param_buff[len],PARAM_BRIGHTNESS"%d\n",mga_brightness); |
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1425 len += sprintf(&mga_param_buff[len],PARAM_CONTRAST"%d\n",mga_contrast); |
4484 | 1426 len += sprintf(&mga_param_buff[len],PARAM_BLACKIE"%s\n",regs.blackie?"on":"off"); |
1427 mga_param_buff_len = len; | |
4527 | 1428 // check boundaries of mga_param_buff before writing to it!!! |
4484 | 1429 } |
1430 | |
1 | 1431 |
1432 static ssize_t mga_vid_read(struct file *file, char *buf, size_t count, loff_t *ppos) | |
1433 { | |
4484 | 1434 uint32_t size; |
1435 if(!mga_param_buff) return -ESPIPE; | |
1436 if(!(*ppos)) mga_param_buff_fill(); | |
1437 if(*ppos >= mga_param_buff_len) return 0; | |
1438 size = min(count,mga_param_buff_len-(uint32_t)(*ppos)); | |
1439 memcpy(buf,mga_param_buff,size); | |
1440 *ppos += size; | |
1441 return size; | |
1 | 1442 } |
1443 | |
1444 static ssize_t mga_vid_write(struct file *file, const char *buf, size_t count, loff_t *ppos) | |
1445 { | |
4483
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1446 if(memcmp(buf,PARAM_BRIGHTNESS,min(count,strlen(PARAM_BRIGHTNESS))) == 0) |
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1447 { |
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1448 short brightness; |
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1449 brightness=simple_strtol(&buf[strlen(PARAM_BRIGHTNESS)],NULL,10); |
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1450 if (brightness>127 || brightness<-128) { brightness=0;} |
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1451 // printk(KERN_DEBUG "mga_vid: brightness modified ( %d ) \n",brightness); |
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1452 mga_brightness=brightness; |
4483
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1453 } else |
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Attila's Linux 2.2 patch, and contrast control applied
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1454 if(memcmp(buf,PARAM_CONTRAST,min(count,strlen(PARAM_CONTRAST))) == 0) |
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1455 { |
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1456 short contrast; |
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1457 contrast=simple_strtol(&buf[strlen(PARAM_CONTRAST)],NULL,10); |
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1458 if (contrast>127 || contrast<-128) { contrast=0;} |
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1459 // printk(KERN_DEBUG "mga_vid: contrast modified ( %d ) \n",contrast); |
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1460 mga_contrast=contrast; |
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1461 } else |
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1462 |
4483
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1463 if(memcmp(buf,PARAM_BLACKIE,min(count,strlen(PARAM_BLACKIE))) == 0) |
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1464 { |
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1465 short blackie; |
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1466 blackie=simple_strtol(&buf[strlen(PARAM_BLACKIE)],NULL,10); |
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1467 // printk(KERN_DEBUG "mga_vid: shadow mode: ( %d ) \n",blackie); |
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1468 regs.blackie=(blackie>0)?1:0; |
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1469 } else count = -EIO; |
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1470 // TODO: reset settings |
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1471 return count; |
1 | 1472 } |
1473 | |
1474 static int mga_vid_mmap(struct file *file, struct vm_area_struct *vma) | |
1475 { | |
1476 | |
5623 | 1477 #ifdef MP_DEBUG |
61 | 1478 printk(KERN_DEBUG "mga_vid: mapping video memory into userspace\n"); |
5623 | 1479 #endif |
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1480 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,3) |
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1481 if(remap_page_range(vma, vma->vm_start, mga_mem_base + mga_src_base, |
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1482 vma->vm_end - vma->vm_start, vma->vm_page_prot)) |
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1483 #else |
57 | 1484 if(remap_page_range(vma->vm_start, mga_mem_base + mga_src_base, |
1 | 1485 vma->vm_end - vma->vm_start, vma->vm_page_prot)) |
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1486 #endif |
1 | 1487 { |
63 | 1488 printk(KERN_ERR "mga_vid: error mapping video memory\n"); |
1 | 1489 return(-EAGAIN); |
1490 } | |
1491 | |
1492 return(0); | |
1493 } | |
1494 | |
1495 static int mga_vid_release(struct inode *inode, struct file *file) | |
1496 { | |
1497 //Close the window just in case | |
5623 | 1498 #ifdef MP_DEBUG |
94
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1499 printk(KERN_DEBUG "mga_vid: Video OFF (release)\n"); |
5623 | 1500 #endif |
94
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1501 |
1 | 1502 vid_src_ready = 0; |
1503 regs.besctl &= ~1; | |
466 | 1504 regs.besglobctl &= ~(1<<6); // UYVY format selected |
2086 | 1505 // mga_config.colkey_on=0; //!!! |
1506 mga_vid_write_regs(1); | |
1 | 1507 mga_vid_in_use = 0; |
1508 | |
93 | 1509 MOD_DEC_USE_COUNT; |
1 | 1510 return 0; |
1511 } | |
1512 | |
1513 static long long mga_vid_lseek(struct file *file, long long offset, int origin) | |
1514 { | |
1515 return -ESPIPE; | |
1516 } | |
1517 | |
1518 static int mga_vid_open(struct inode *inode, struct file *file) | |
1519 { | |
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1520 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,2) |
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1521 int minor = MINOR(inode->i_rdev.value); |
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1522 #else |
1 | 1523 int minor = MINOR(inode->i_rdev); |
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1524 #endif |
1 | 1525 |
1526 if(minor != 0) | |
1527 return(-ENXIO); | |
1528 | |
1529 if(mga_vid_in_use == 1) | |
1530 return(-EBUSY); | |
1531 | |
1532 mga_vid_in_use = 1; | |
93 | 1533 MOD_INC_USE_COUNT; |
1 | 1534 return(0); |
1535 } | |
1536 | |
1537 #if LINUX_VERSION_CODE >= 0x020400 | |
1538 static struct file_operations mga_vid_fops = | |
1539 { | |
1540 llseek: mga_vid_lseek, | |
1541 read: mga_vid_read, | |
1542 write: mga_vid_write, | |
1543 ioctl: mga_vid_ioctl, | |
1544 mmap: mga_vid_mmap, | |
1545 open: mga_vid_open, | |
1546 release: mga_vid_release | |
1547 }; | |
1548 #else | |
1549 static struct file_operations mga_vid_fops = | |
1550 { | |
1551 mga_vid_lseek, | |
1552 mga_vid_read, | |
1553 mga_vid_write, | |
1554 NULL, | |
1555 NULL, | |
1556 mga_vid_ioctl, | |
1557 mga_vid_mmap, | |
1558 mga_vid_open, | |
1559 NULL, | |
1560 mga_vid_release | |
1561 }; | |
1562 #endif | |
1563 | |
1564 | |
1565 /* | |
1566 * Main Initialization Function | |
1567 */ | |
1568 | |
1569 static int mga_vid_initialize(void) | |
1570 { | |
1571 mga_vid_in_use = 0; | |
1572 | |
77 | 1573 // printk(KERN_INFO "Matrox MGA G200/G400 YUV Video interface v0.01 (c) Aaron Holtzman \n"); |
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1574 printk(KERN_INFO "Matrox MGA G200/G400/G450/G550 YUV Video interface v2.01 (c) Aaron Holtzman & A'rpi\n"); |
90 | 1575 |
95 | 1576 if (mga_ram_size) { |
1577 if (mga_ram_size<4 || mga_ram_size>64) { | |
1578 printk(KERN_ERR "mga_vid: invalid RAMSIZE: %d MB\n", mga_ram_size); | |
90 | 1579 return -EINVAL; |
1580 } | |
1581 } | |
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1582 #ifdef CONFIG_DEVFS_FS |
5682 | 1583 /* |
1584 from 2.4.17/2.4.18 linux/devfs_fs_kernel.h: | |
1585 extern devfs_handle_t devfs_register (devfs_handle_t dir, const char *name, | |
1586 unsigned int flags, | |
1587 unsigned int major, unsigned int minor, | |
1588 umode_t mode, void *ops, void *info); | |
1589 */ | |
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1590 if ((dev_handle = devfs_register( |
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1591 NULL, |
5682 | 1592 "mga_vid", DEVFS_FL_NONE, |
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1593 MGA_VID_MAJOR, 0, |
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1594 S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP | S_IFCHR, |
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1595 &mga_vid_fops, NULL)) == NULL) |
5764 | 1596 { |
6086 | 1597 printk(KERN_ERR "mga_vid: unable to get major: %d (devfs) => fallback to non-devfs mode\n", MGA_VID_MAJOR); |
1598 // return -EIO; | |
5764 | 1599 } |
1600 #endif | |
1 | 1601 if(register_chrdev(MGA_VID_MAJOR, "mga_vid", &mga_vid_fops)) |
1602 { | |
61 | 1603 printk(KERN_ERR "mga_vid: unable to get major: %d\n", MGA_VID_MAJOR); |
1 | 1604 return -EIO; |
1605 } | |
1606 | |
1607 if (!mga_vid_find_card()) | |
1608 { | |
61 | 1609 printk(KERN_ERR "mga_vid: no supported devices found\n"); |
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1610 #ifdef CONFIG_DEVFS_FS |
6086 | 1611 if(dev_handle) devfs_unregister(dev_handle); |
5764 | 1612 #endif |
1 | 1613 unregister_chrdev(MGA_VID_MAJOR, "mga_vid"); |
1614 return -EINVAL; | |
1615 } | |
4484 | 1616 mga_param_buff = kmalloc(PARAM_BUFF_SIZE,GFP_KERNEL); |
1617 if(mga_param_buff) mga_param_buff_size = PARAM_BUFF_SIZE; | |
1 | 1618 |
1619 return(0); | |
1620 } | |
1621 | |
1622 int init_module(void) | |
1623 { | |
1624 return mga_vid_initialize(); | |
1625 } | |
1626 | |
1627 void cleanup_module(void) | |
1628 { | |
48 | 1629 |
68 | 1630 #ifdef MGA_ALLOW_IRQ |
48 | 1631 if ( mga_irq != -1) |
1632 free_irq(mga_irq, &mga_irq); | |
68 | 1633 #endif |
48 | 1634 |
1 | 1635 if(mga_mmio_base) |
1636 iounmap(mga_mmio_base); | |
4520 | 1637 if(mga_param_buff) |
1638 kfree(mga_param_buff); | |
1 | 1639 |
1640 //FIXME turn off BES | |
63 | 1641 printk(KERN_INFO "mga_vid: Cleaning up module\n"); |
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1642 #ifdef CONFIG_DEVFS_FS |
6086 | 1643 if(dev_handle) devfs_unregister(dev_handle); |
5764 | 1644 #endif |
1 | 1645 unregister_chrdev(MGA_VID_MAJOR, "mga_vid"); |
1646 } | |
1647 |