Mercurial > mplayer.hg
annotate drivers/mga_vid.c @ 5999:792d58595767
fix -fs and 'f'
author | pontscho |
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date | Mon, 06 May 2002 16:56:41 +0000 |
parents | e20ef52a4e3f |
children | ad794ccafc55 |
rev | line source |
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2345 | 1 //#define CRTC2 |
2 | |
1 | 3 // YUY2 support (see config.format) added by A'rpi/ESP-team |
57 | 4 // double buffering added by A'rpi/ESP-team |
5623 | 5 // brightness/contrast introduced by eyck |
57 | 6 |
7 // Set this value, if autodetection fails! (video ram size in megabytes) | |
91 | 8 // #define MGA_MEMORY_SIZE 16 |
1 | 9 |
68 | 10 //#define MGA_ALLOW_IRQ |
11 | |
12 #define MGA_VSYNC_POS 2 | |
13 | |
1 | 14 /* |
15 * | |
16 * mga_vid.c | |
17 * | |
18 * Copyright (C) 1999 Aaron Holtzman | |
19 * | |
20 * Module skeleton based on gutted agpgart module by Jeff Hartmann | |
21 * <slicer@ionet.net> | |
22 * | |
23 * Matrox MGA G200/G400 YUV Video Interface module Version 0.1.0 | |
24 * | |
25 * BES == Back End Scaler | |
26 * | |
27 * This software has been released under the terms of the GNU Public | |
28 * license. See http://www.gnu.org/copyleft/gpl.html for details. | |
29 */ | |
30 | |
31 //It's entirely possible this major conflicts with something else | |
32 /* mknod /dev/mga_vid c 178 0 */ | |
33 | |
34 #include <linux/config.h> | |
35 #include <linux/version.h> | |
36 #include <linux/module.h> | |
37 #include <linux/types.h> | |
38 #include <linux/kernel.h> | |
39 #include <linux/sched.h> | |
40 #include <linux/mm.h> | |
41 #include <linux/string.h> | |
42 #include <linux/errno.h> | |
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43 |
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44 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,10) |
1 | 45 #include <linux/malloc.h> |
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46 #else |
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47 #include <linux/slab.h> |
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48 #endif |
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49 |
1 | 50 #include <linux/pci.h> |
63 | 51 #include <linux/ioport.h> |
1 | 52 #include <linux/init.h> |
53 | |
54 #include "mga_vid.h" | |
55 | |
56 #ifdef CONFIG_MTRR | |
57 #include <asm/mtrr.h> | |
58 #endif | |
59 | |
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60 #ifdef CONFIG_DEVFS_FS |
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61 #include <linux/devfs_fs_kernel.h> |
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62 #endif |
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63 |
1 | 64 #include <asm/uaccess.h> |
65 #include <asm/system.h> | |
66 #include <asm/io.h> | |
67 | |
68 #define TRUE 1 | |
69 #define FALSE 0 | |
70 | |
71 #define MGA_VID_MAJOR 178 | |
72 | |
57 | 73 //#define MGA_VIDMEM_SIZE mga_ram_size |
1 | 74 |
75 #ifndef PCI_DEVICE_ID_MATROX_G200_PCI | |
76 #define PCI_DEVICE_ID_MATROX_G200_PCI 0x0520 | |
77 #endif | |
78 | |
79 #ifndef PCI_DEVICE_ID_MATROX_G200_AGP | |
80 #define PCI_DEVICE_ID_MATROX_G200_AGP 0x0521 | |
81 #endif | |
82 | |
83 #ifndef PCI_DEVICE_ID_MATROX_G400 | |
84 #define PCI_DEVICE_ID_MATROX_G400 0x0525 | |
85 #endif | |
86 | |
1989 | 87 #ifndef PCI_DEVICE_ID_MATROX_G550 |
88 #define PCI_DEVICE_ID_MATROX_G550 0x2527 | |
89 #endif | |
90 | |
1 | 91 MODULE_AUTHOR("Aaron Holtzman <aholtzma@engr.uvic.ca>"); |
2262 | 92 #ifdef MODULE_LICENSE |
93 MODULE_LICENSE("GPL"); | |
94 #endif | |
1 | 95 |
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96 #define PARAM_BRIGHTNESS "brightness=" |
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97 #define PARAM_CONTRAST "contrast=" |
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98 #define PARAM_BLACKIE "blackie=" |
4484 | 99 |
100 #define PARAM_BUFF_SIZE 4096 | |
101 static uint8_t *mga_param_buff = NULL; | |
102 static uint32_t mga_param_buff_size=0; | |
103 static uint32_t mga_param_buff_len=0; | |
104 | |
5764 | 105 #ifndef min |
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106 #define min(x,y) (((x)<(y))?(x):(y)) |
5764 | 107 #endif |
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108 |
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109 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0) |
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110 #include <linux/ctype.h> |
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111 |
5884 | 112 static unsigned long simple_strtoul(const char *cp,char **endp,unsigned int base) |
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113 { |
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114 unsigned long result = 0,value; |
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115 |
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116 if (!base) { |
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117 base = 10; |
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118 if (*cp == '0') { |
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119 base = 8; |
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120 cp++; |
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121 if ((*cp == 'x') && isxdigit(cp[1])) { |
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122 cp++; |
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123 base = 16; |
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124 } |
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125 } |
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126 } |
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127 while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp) |
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128 ? toupper(*cp) : *cp)-'A'+10) < base) { |
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129 result = result*base + value; |
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130 cp++; |
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131 } |
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132 if (endp) |
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133 *endp = (char *)cp; |
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134 return result; |
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135 } |
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136 |
5884 | 137 static long simple_strtol(const char *cp,char **endp,unsigned int base) |
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138 { |
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139 if(*cp=='-') |
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140 return -simple_strtoul(cp+1,endp,base); |
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141 return simple_strtoul(cp,endp,base); |
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142 } |
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143 #endif |
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144 |
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145 |
1 | 146 typedef struct bes_registers_s |
147 { | |
148 //BES Control | |
149 uint32_t besctl; | |
150 //BES Global control | |
151 uint32_t besglobctl; | |
152 //Luma control (brightness and contrast) | |
153 uint32_t beslumactl; | |
154 //Line pitch | |
155 uint32_t bespitch; | |
156 | |
157 //Buffer A-1 Chroma 3 plane org | |
158 uint32_t besa1c3org; | |
159 //Buffer A-1 Chroma org | |
160 uint32_t besa1corg; | |
161 //Buffer A-1 Luma org | |
162 uint32_t besa1org; | |
163 | |
164 //Buffer A-2 Chroma 3 plane org | |
165 uint32_t besa2c3org; | |
166 //Buffer A-2 Chroma org | |
167 uint32_t besa2corg; | |
168 //Buffer A-2 Luma org | |
169 uint32_t besa2org; | |
170 | |
171 //Buffer B-1 Chroma 3 plane org | |
172 uint32_t besb1c3org; | |
173 //Buffer B-1 Chroma org | |
174 uint32_t besb1corg; | |
175 //Buffer B-1 Luma org | |
176 uint32_t besb1org; | |
177 | |
178 //Buffer B-2 Chroma 3 plane org | |
179 uint32_t besb2c3org; | |
180 //Buffer B-2 Chroma org | |
181 uint32_t besb2corg; | |
182 //Buffer B-2 Luma org | |
183 uint32_t besb2org; | |
184 | |
185 //BES Horizontal coord | |
186 uint32_t beshcoord; | |
187 //BES Horizontal inverse scaling [5.14] | |
188 uint32_t beshiscal; | |
189 //BES Horizontal source start [10.14] (for scaling) | |
190 uint32_t beshsrcst; | |
191 //BES Horizontal source ending [10.14] (for scaling) | |
192 uint32_t beshsrcend; | |
193 //BES Horizontal source last | |
194 uint32_t beshsrclst; | |
195 | |
196 | |
197 //BES Vertical coord | |
198 uint32_t besvcoord; | |
199 //BES Vertical inverse scaling [5.14] | |
200 uint32_t besviscal; | |
201 //BES Field 1 vertical source last position | |
202 uint32_t besv1srclst; | |
203 //BES Field 1 weight start | |
204 uint32_t besv1wght; | |
205 //BES Field 2 vertical source last position | |
206 uint32_t besv2srclst; | |
207 //BES Field 2 weight start | |
208 uint32_t besv2wght; | |
209 | |
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210 |
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211 //configurable stuff |
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212 int blackie; |
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213 |
1 | 214 } bes_registers_t; |
215 | |
216 static bes_registers_t regs; | |
2344 | 217 #ifdef CRTC2 |
218 typedef struct crtc2_registers_s | |
219 { | |
220 uint32_t c2ctl; | |
221 uint32_t c2datactl; | |
222 uint32_t c2misc; | |
223 uint32_t c2hparam; | |
224 uint32_t c2hsync; | |
225 uint32_t c2offset; | |
226 uint32_t c2pl2startadd0; | |
227 uint32_t c2pl2startadd1; | |
228 uint32_t c2pl3startadd0; | |
229 uint32_t c2pl3startadd1; | |
230 uint32_t c2preload; | |
231 uint32_t c2spicstartadd0; | |
232 uint32_t c2spicstartadd1; | |
233 uint32_t c2startadd0; | |
234 uint32_t c2startadd1; | |
235 uint32_t c2subpiclut; | |
236 uint32_t c2vcount; | |
237 uint32_t c2vparam; | |
238 uint32_t c2vsync; | |
239 } crtc2_registers_t; | |
240 static crtc2_registers_t cregs; | |
241 #endif | |
1 | 242 static uint32_t mga_vid_in_use = 0; |
243 static uint32_t is_g400 = 0; | |
244 static uint32_t vid_src_ready = 0; | |
245 static uint32_t vid_overlay_on = 0; | |
246 | |
247 static uint8_t *mga_mmio_base = 0; | |
248 static uint32_t mga_mem_base = 0; | |
249 | |
57 | 250 static int mga_src_base = 0; // YUV buffer position in video memory |
251 | |
252 static uint32_t mga_ram_size = 0; // how much megabytes videoram we have | |
1 | 253 |
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254 static uint32_t mga_top_reserved = 0; // reserved space for console font (matroxfb + fastfont) |
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255 |
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256 static int mga_brightness = 0; // initial brightness |
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257 static int mga_contrast = 0; // initial contrast |
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258 |
95 | 259 //static int mga_force_memsize = 0; |
90 | 260 |
95 | 261 MODULE_PARM(mga_ram_size, "i"); |
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262 MODULE_PARM(mga_top_reserved, "i"); |
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263 MODULE_PARM(mga_brightness, "i"); |
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264 MODULE_PARM(mga_contrast, "i"); |
90 | 265 |
1 | 266 static struct pci_dev *pci_dev; |
267 | |
268 static mga_vid_config_t mga_config; | |
269 | |
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270 #ifdef CONFIG_DEVFS_FS |
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271 static devfs_handle_t dev_handle = NULL; |
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272 #endif |
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273 |
2086 | 274 static int colkey_saved=0; |
275 static int colkey_on=0; | |
276 static unsigned char colkey_color[4]; | |
277 static unsigned char colkey_mask[4]; | |
278 | |
48 | 279 static int mga_irq = -1; |
1 | 280 |
281 //All register offsets are converted to word aligned offsets (32 bit) | |
282 //because we want all our register accesses to be 32 bits | |
283 #define VCOUNT 0x1e20 | |
284 | |
285 #define PALWTADD 0x3c00 // Index register for X_DATAREG port | |
286 #define X_DATAREG 0x3c0a | |
287 | |
288 #define XMULCTRL 0x19 | |
289 #define BPP_8 0x00 | |
290 #define BPP_15 0x01 | |
291 #define BPP_16 0x02 | |
292 #define BPP_24 0x03 | |
293 #define BPP_32_DIR 0x04 | |
294 #define BPP_32_PAL 0x07 | |
295 | |
296 #define XCOLMSK 0x40 | |
297 #define X_COLKEY 0x42 | |
298 #define XKEYOPMODE 0x51 | |
299 #define XCOLMSK0RED 0x52 | |
300 #define XCOLMSK0GREEN 0x53 | |
301 #define XCOLMSK0BLUE 0x54 | |
302 #define XCOLKEY0RED 0x55 | |
303 #define XCOLKEY0GREEN 0x56 | |
304 #define XCOLKEY0BLUE 0x57 | |
305 | |
2344 | 306 #ifdef CRTC2 |
307 | |
308 /*CRTC2 registers*/ | |
309 #define XMISCCTRL 0x1e | |
310 #define C2CTL 0x3c10 | |
311 #define C2DATACTL 0x3c4c | |
312 #define C2MISC 0x3c44 | |
313 #define C2HPARAM 0x3c14 | |
314 #define C2HSYNC 0x3c18 | |
315 #define C2OFFSET 0x3c40 | |
316 #define C2PL2STARTADD0 0x3c30 // like BESA1CORG | |
317 #define C2PL2STARTADD1 0x3c34 // like BESA2CORG | |
318 #define C2PL3STARTADD0 0x3c38 // like BESA1C3ORG | |
319 #define C2PL3STARTADD1 0x3c3c // like BESA2C3ORG | |
320 #define C2PRELOAD 0x3c24 | |
321 #define C2SPICSTARTADD0 0x3c54 | |
322 #define C2SPICSTARTADD1 0x3c58 | |
323 #define C2STARTADD0 0x3c28 // like BESA1ORG | |
324 #define C2STARTADD1 0x3c2c // like BESA2ORG | |
325 #define C2SUBPICLUT 0x3c50 | |
326 #define C2VCOUNT 0x3c48 | |
327 #define C2VPARAM 0x3c1c | |
328 #define C2VSYNC 0x3c20 | |
329 | |
330 #endif | |
331 | |
1 | 332 // Backend Scaler registers |
333 #define BESCTL 0x3d20 | |
334 #define BESGLOBCTL 0x3dc0 | |
335 #define BESLUMACTL 0x3d40 | |
336 #define BESPITCH 0x3d24 | |
48 | 337 |
1 | 338 #define BESA1C3ORG 0x3d60 |
339 #define BESA1CORG 0x3d10 | |
340 #define BESA1ORG 0x3d00 | |
48 | 341 |
1 | 342 #define BESA2C3ORG 0x3d64 |
343 #define BESA2CORG 0x3d14 | |
344 #define BESA2ORG 0x3d04 | |
48 | 345 |
1 | 346 #define BESB1C3ORG 0x3d68 |
347 #define BESB1CORG 0x3d18 | |
348 #define BESB1ORG 0x3d08 | |
48 | 349 |
1 | 350 #define BESB2C3ORG 0x3d6C |
351 #define BESB2CORG 0x3d1C | |
352 #define BESB2ORG 0x3d0C | |
48 | 353 |
1 | 354 #define BESHCOORD 0x3d28 |
355 #define BESHISCAL 0x3d30 | |
356 #define BESHSRCEND 0x3d3C | |
357 #define BESHSRCLST 0x3d50 | |
358 #define BESHSRCST 0x3d38 | |
359 #define BESV1WGHT 0x3d48 | |
360 #define BESV2WGHT 0x3d4c | |
361 #define BESV1SRCLST 0x3d54 | |
362 #define BESV2SRCLST 0x3d58 | |
363 #define BESVISCAL 0x3d34 | |
364 #define BESVCOORD 0x3d2c | |
365 #define BESSTATUS 0x3dc4 | |
366 | |
48 | 367 #define CRTCX 0x1fd4 |
368 #define CRTCD 0x1fd5 | |
369 #define IEN 0x1e1c | |
370 #define ICLEAR 0x1e18 | |
371 #define STATUS 0x1e14 | |
372 | |
373 static int mga_next_frame=0; | |
1 | 374 |
2344 | 375 #ifdef CRTC2 |
376 static void crtc2_frame_sel(int frame) | |
377 { | |
378 switch(frame) { | |
379 case 0: | |
380 cregs.c2pl2startadd0=regs.besa1corg; | |
381 cregs.c2pl3startadd0=regs.besa1c3org; | |
382 cregs.c2startadd0=regs.besa1org; | |
383 break; | |
384 case 1: | |
385 cregs.c2pl2startadd0=regs.besa2corg; | |
386 cregs.c2pl3startadd0=regs.besa2c3org; | |
387 cregs.c2startadd0=regs.besa2org; | |
388 break; | |
389 case 2: | |
390 cregs.c2pl2startadd0=regs.besb1corg; | |
391 cregs.c2pl3startadd0=regs.besb1c3org; | |
392 cregs.c2startadd0=regs.besb1org; | |
393 break; | |
394 case 3: | |
395 cregs.c2pl2startadd0=regs.besb2corg; | |
396 cregs.c2pl3startadd0=regs.besb2c3org; | |
397 cregs.c2startadd0=regs.besb2org; | |
398 break; | |
399 } | |
400 writel(cregs.c2startadd0, mga_mmio_base + C2STARTADD0); | |
401 writel(cregs.c2pl2startadd0, mga_mmio_base + C2PL2STARTADD0); | |
402 writel(cregs.c2pl3startadd0, mga_mmio_base + C2PL3STARTADD0); | |
403 } | |
404 #endif | |
405 | |
1 | 406 static void mga_vid_frame_sel(int frame) |
407 { | |
48 | 408 if ( mga_irq != -1 ) { |
409 mga_next_frame=frame; | |
410 } else { | |
411 | |
1 | 412 //we don't need the vcount protection as we're only hitting |
413 //one register (and it doesn't seem to be double buffered) | |
414 regs.besctl = (regs.besctl & ~0x07000000) + (frame << 25); | |
415 writel( regs.besctl, mga_mmio_base + BESCTL ); | |
68 | 416 |
417 // writel( regs.besglobctl + ((readl(mga_mmio_base + VCOUNT)+2)<<16), | |
418 writel( regs.besglobctl + (MGA_VSYNC_POS<<16), | |
419 mga_mmio_base + BESGLOBCTL); | |
2344 | 420 #ifdef CRTC2 |
421 crtc2_frame_sel(frame); | |
422 #endif | |
68 | 423 |
48 | 424 } |
1 | 425 } |
426 | |
427 | |
2086 | 428 static void mga_vid_write_regs(int restore) |
1 | 429 { |
430 //Make sure internal registers don't get updated until we're done | |
431 writel( (readl(mga_mmio_base + VCOUNT)-1)<<16, | |
432 mga_mmio_base + BESGLOBCTL); | |
433 | |
434 // color or coordinate keying | |
2086 | 435 |
436 if(restore && colkey_saved){ | |
437 // restore it | |
438 colkey_saved=0; | |
439 | |
5623 | 440 #ifdef MP_DEBUG |
2086 | 441 printk("mga_vid: Restoring colorkey (ON: %d %02X:%02X:%02X)\n", |
442 colkey_on,colkey_color[0],colkey_color[1],colkey_color[2]); | |
5623 | 443 #endif |
2086 | 444 |
445 // Set color key registers: | |
446 writeb( XKEYOPMODE, mga_mmio_base + PALWTADD); | |
447 writeb( colkey_on, mga_mmio_base + X_DATAREG); | |
448 | |
449 writeb( XCOLKEY0RED, mga_mmio_base + PALWTADD); | |
450 writeb( colkey_color[0], mga_mmio_base + X_DATAREG); | |
451 writeb( XCOLKEY0GREEN, mga_mmio_base + PALWTADD); | |
452 writeb( colkey_color[1], mga_mmio_base + X_DATAREG); | |
453 writeb( XCOLKEY0BLUE, mga_mmio_base + PALWTADD); | |
454 writeb( colkey_color[2], mga_mmio_base + X_DATAREG); | |
455 writeb( X_COLKEY, mga_mmio_base + PALWTADD); | |
456 writeb( colkey_color[3], mga_mmio_base + X_DATAREG); | |
457 | |
458 writeb( XCOLMSK0RED, mga_mmio_base + PALWTADD); | |
459 writeb( colkey_mask[0], mga_mmio_base + X_DATAREG); | |
460 writeb( XCOLMSK0GREEN, mga_mmio_base + PALWTADD); | |
461 writeb( colkey_mask[1], mga_mmio_base + X_DATAREG); | |
462 writeb( XCOLMSK0BLUE, mga_mmio_base + PALWTADD); | |
463 writeb( colkey_mask[2], mga_mmio_base + X_DATAREG); | |
464 writeb( XCOLMSK, mga_mmio_base + PALWTADD); | |
465 writeb( colkey_mask[3], mga_mmio_base + X_DATAREG); | |
466 | |
467 } else if(!colkey_saved){ | |
468 // save it | |
469 colkey_saved=1; | |
470 // Get color key registers: | |
471 writeb( XKEYOPMODE, mga_mmio_base + PALWTADD); | |
472 colkey_on=(unsigned char)readb(mga_mmio_base + X_DATAREG) & 1; | |
473 | |
474 writeb( XCOLKEY0RED, mga_mmio_base + PALWTADD); | |
475 colkey_color[0]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
476 writeb( XCOLKEY0GREEN, mga_mmio_base + PALWTADD); | |
477 colkey_color[1]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
478 writeb( XCOLKEY0BLUE, mga_mmio_base + PALWTADD); | |
479 colkey_color[2]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
480 writeb( X_COLKEY, mga_mmio_base + PALWTADD); | |
481 colkey_color[3]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
482 | |
483 writeb( XCOLMSK0RED, mga_mmio_base + PALWTADD); | |
484 colkey_mask[0]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
485 writeb( XCOLMSK0GREEN, mga_mmio_base + PALWTADD); | |
486 colkey_mask[1]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
487 writeb( XCOLMSK0BLUE, mga_mmio_base + PALWTADD); | |
488 colkey_mask[2]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
489 writeb( XCOLMSK, mga_mmio_base + PALWTADD); | |
490 colkey_mask[3]=(unsigned char)readb(mga_mmio_base + X_DATAREG); | |
491 | |
5623 | 492 #ifdef MP_DEBUG |
2086 | 493 printk("mga_vid: Saved colorkey (ON: %d %02X:%02X:%02X)\n", |
494 colkey_on,colkey_color[0],colkey_color[1],colkey_color[2]); | |
5623 | 495 #endif |
2086 | 496 |
497 } | |
498 | |
499 if(!restore){ | |
1 | 500 writeb( XKEYOPMODE, mga_mmio_base + PALWTADD); |
501 writeb( mga_config.colkey_on, mga_mmio_base + X_DATAREG); | |
502 if ( mga_config.colkey_on ) | |
503 { | |
504 uint32_t r=0, g=0, b=0; | |
505 | |
506 writeb( XMULCTRL, mga_mmio_base + PALWTADD); | |
507 switch (readb (mga_mmio_base + X_DATAREG)) | |
508 { | |
509 case BPP_8: | |
510 /* Need to look up the color index, just using | |
511 color 0 for now. */ | |
512 break; | |
513 | |
514 case BPP_15: | |
515 r = mga_config.colkey_red >> 3; | |
516 g = mga_config.colkey_green >> 3; | |
517 b = mga_config.colkey_blue >> 3; | |
518 break; | |
519 | |
520 case BPP_16: | |
521 r = mga_config.colkey_red >> 3; | |
522 g = mga_config.colkey_green >> 2; | |
523 b = mga_config.colkey_blue >> 3; | |
524 break; | |
525 | |
526 case BPP_24: | |
527 case BPP_32_DIR: | |
528 case BPP_32_PAL: | |
529 r = mga_config.colkey_red; | |
530 g = mga_config.colkey_green; | |
531 b = mga_config.colkey_blue; | |
532 break; | |
533 } | |
534 | |
535 // Disable color keying on alpha channel | |
536 writeb( XCOLMSK, mga_mmio_base + PALWTADD); | |
537 writeb( 0x00, mga_mmio_base + X_DATAREG); | |
538 writeb( X_COLKEY, mga_mmio_base + PALWTADD); | |
539 writeb( 0x00, mga_mmio_base + X_DATAREG); | |
540 | |
2086 | 541 |
1 | 542 // Set up color key registers |
543 writeb( XCOLKEY0RED, mga_mmio_base + PALWTADD); | |
544 writeb( r, mga_mmio_base + X_DATAREG); | |
545 writeb( XCOLKEY0GREEN, mga_mmio_base + PALWTADD); | |
546 writeb( g, mga_mmio_base + X_DATAREG); | |
547 writeb( XCOLKEY0BLUE, mga_mmio_base + PALWTADD); | |
548 writeb( b, mga_mmio_base + X_DATAREG); | |
549 | |
550 // Set up color key mask registers | |
551 writeb( XCOLMSK0RED, mga_mmio_base + PALWTADD); | |
552 writeb( 0xff, mga_mmio_base + X_DATAREG); | |
553 writeb( XCOLMSK0GREEN, mga_mmio_base + PALWTADD); | |
554 writeb( 0xff, mga_mmio_base + X_DATAREG); | |
555 writeb( XCOLMSK0BLUE, mga_mmio_base + PALWTADD); | |
556 writeb( 0xff, mga_mmio_base + X_DATAREG); | |
557 } | |
558 | |
2086 | 559 } |
560 | |
1 | 561 // Backend Scaler |
562 writel( regs.besctl, mga_mmio_base + BESCTL); | |
563 if(is_g400) | |
564 writel( regs.beslumactl, mga_mmio_base + BESLUMACTL); | |
565 writel( regs.bespitch, mga_mmio_base + BESPITCH); | |
566 | |
567 writel( regs.besa1org, mga_mmio_base + BESA1ORG); | |
568 writel( regs.besa1corg, mga_mmio_base + BESA1CORG); | |
48 | 569 writel( regs.besa2org, mga_mmio_base + BESA2ORG); |
570 writel( regs.besa2corg, mga_mmio_base + BESA2CORG); | |
1 | 571 writel( regs.besb1org, mga_mmio_base + BESB1ORG); |
572 writel( regs.besb1corg, mga_mmio_base + BESB1CORG); | |
48 | 573 writel( regs.besb2org, mga_mmio_base + BESB2ORG); |
574 writel( regs.besb2corg, mga_mmio_base + BESB2CORG); | |
1 | 575 if(is_g400) |
576 { | |
577 writel( regs.besa1c3org, mga_mmio_base + BESA1C3ORG); | |
48 | 578 writel( regs.besa2c3org, mga_mmio_base + BESA2C3ORG); |
1 | 579 writel( regs.besb1c3org, mga_mmio_base + BESB1C3ORG); |
48 | 580 writel( regs.besb2c3org, mga_mmio_base + BESB2C3ORG); |
1 | 581 } |
582 | |
583 writel( regs.beshcoord, mga_mmio_base + BESHCOORD); | |
584 writel( regs.beshiscal, mga_mmio_base + BESHISCAL); | |
585 writel( regs.beshsrcst, mga_mmio_base + BESHSRCST); | |
586 writel( regs.beshsrcend, mga_mmio_base + BESHSRCEND); | |
587 writel( regs.beshsrclst, mga_mmio_base + BESHSRCLST); | |
588 | |
589 writel( regs.besvcoord, mga_mmio_base + BESVCOORD); | |
590 writel( regs.besviscal, mga_mmio_base + BESVISCAL); | |
48 | 591 |
1 | 592 writel( regs.besv1srclst, mga_mmio_base + BESV1SRCLST); |
593 writel( regs.besv1wght, mga_mmio_base + BESV1WGHT); | |
48 | 594 writel( regs.besv2srclst, mga_mmio_base + BESV2SRCLST); |
595 writel( regs.besv2wght, mga_mmio_base + BESV2WGHT); | |
1 | 596 |
597 //update the registers somewhere between 1 and 2 frames from now. | |
598 writel( regs.besglobctl + ((readl(mga_mmio_base + VCOUNT)+2)<<16), | |
599 mga_mmio_base + BESGLOBCTL); | |
600 | |
77 | 601 #if 0 |
61 | 602 printk(KERN_DEBUG "mga_vid: wrote BES registers\n"); |
603 printk(KERN_DEBUG "mga_vid: BESCTL = 0x%08x\n", | |
1 | 604 readl(mga_mmio_base + BESCTL)); |
61 | 605 printk(KERN_DEBUG "mga_vid: BESGLOBCTL = 0x%08x\n", |
1 | 606 readl(mga_mmio_base + BESGLOBCTL)); |
61 | 607 printk(KERN_DEBUG "mga_vid: BESSTATUS= 0x%08x\n", |
1 | 608 readl(mga_mmio_base + BESSTATUS)); |
77 | 609 #endif |
2344 | 610 #ifdef CRTC2 |
611 // printk("c2ctl:0x%08x c2datactl:0x%08x\n",readl(mga_mmio_base + C2CTL),readl(mga_mmio_base + C2DATACTL)); | |
612 // printk("c2misc:0x%08x\n",readl(mga_mmio_base + C2MISC)); | |
613 // printk("c2ctl:0x%08x c2datactl:0x%08x\n",cregs.c2ctl,cregs.c2datactl); | |
614 | |
615 // writel(cregs.c2ctl, mga_mmio_base + C2CTL); | |
616 | |
617 writel(((readl(mga_mmio_base + C2CTL) & ~0x03e00000) + (cregs.c2ctl & 0x03e00000)), mga_mmio_base + C2CTL); | |
618 writel(((readl(mga_mmio_base + C2DATACTL) & ~0x000000ff) + (cregs.c2datactl & 0x000000ff)), mga_mmio_base + C2DATACTL); | |
619 // ctrc2 | |
620 // disable CRTC2 acording to specs | |
621 // writel(cregs.c2ctl & 0xfffffff0, mga_mmio_base + C2CTL); | |
622 // je to treba ??? | |
623 // writeb((readb(mga_mmio_base + XMISCCTRL) & 0x19) | 0xa2, mga_mmio_base + XMISCCTRL); // MAFC - mfcsel & vdoutsel | |
624 // writeb((readb(mga_mmio_base + XMISCCTRL) & 0x19) | 0x92, mga_mmio_base + XMISCCTRL); | |
625 // writeb((readb(mga_mmio_base + XMISCCTRL) & ~0xe9) + 0xa2, mga_mmio_base + XMISCCTRL); | |
626 // writel(cregs.c2datactl, mga_mmio_base + C2DATACTL); | |
627 // writel(cregs.c2hparam, mga_mmio_base + C2HPARAM); | |
628 // writel(cregs.c2hsync, mga_mmio_base + C2HSYNC); | |
629 // writel(cregs.c2vparam, mga_mmio_base + C2VPARAM); | |
630 // writel(cregs.c2vsync, mga_mmio_base + C2VSYNC); | |
631 writel(cregs.c2misc, mga_mmio_base + C2MISC); | |
632 | |
5623 | 633 #ifdef MP_DEBUG |
2344 | 634 printk("c2offset = %d\n",cregs.c2offset); |
5623 | 635 #endif |
2344 | 636 |
637 writel(cregs.c2offset, mga_mmio_base + C2OFFSET); | |
638 writel(cregs.c2startadd0, mga_mmio_base + C2STARTADD0); | |
639 // writel(cregs.c2startadd1, mga_mmio_base + C2STARTADD1); | |
640 writel(cregs.c2pl2startadd0, mga_mmio_base + C2PL2STARTADD0); | |
641 // writel(cregs.c2pl2startadd1, mga_mmio_base + C2PL2STARTADD1); | |
642 writel(cregs.c2pl3startadd0, mga_mmio_base + C2PL3STARTADD0); | |
643 // writel(cregs.c2pl3startadd1, mga_mmio_base + C2PL3STARTADD1); | |
644 writel(cregs.c2spicstartadd0, mga_mmio_base + C2SPICSTARTADD0); | |
645 // writel(cregs.c2spicstartadd1, mga_mmio_base + C2SPICSTARTADD1); | |
646 // writel(cregs.c2subpiclut, mga_mmio_base + C2SUBPICLUT); | |
647 // writel(cregs.c2preload, mga_mmio_base + C2PRELOAD); | |
648 // finaly enable everything | |
649 // writel(cregs.c2ctl, mga_mmio_base + C2CTL); | |
650 // printk("c2ctl:0x%08x c2datactl:0x%08x\n",readl(mga_mmio_base + C2CTL),readl(mga_mmio_base + C2DATACTL)); | |
651 // printk("c2misc:0x%08x\n", readl(mga_mmio_base + C2MISC)); | |
652 #endif | |
1 | 653 } |
654 | |
655 static int mga_vid_set_config(mga_vid_config_t *config) | |
656 { | |
657 int x, y, sw, sh, dw, dh; | |
658 int besleft, bestop, ifactor, ofsleft, ofstop, baseadrofs, weight, weights; | |
57 | 659 int frame_size=config->frame_size; |
2344 | 660 #ifdef CRTC2 |
661 #define right_margin 0 | |
662 #define left_margin 18 | |
663 #define hsync_len 46 | |
664 #define lower_margin 10 | |
665 #define vsync_len 4 | |
666 #define upper_margin 39 | |
667 | |
668 unsigned int hdispend = (config->src_width + 31) & ~31; | |
669 unsigned int hsyncstart = hdispend + (right_margin & ~7); | |
670 unsigned int hsyncend = hsyncstart + (hsync_len & ~7); | |
671 unsigned int htotal = hsyncend + (left_margin & ~7); | |
672 unsigned int vdispend = config->src_height; | |
673 unsigned int vsyncstart = vdispend + lower_margin; | |
674 unsigned int vsyncend = vsyncstart + vsync_len; | |
675 unsigned int vtotal = vsyncend + upper_margin; | |
676 #endif | |
1 | 677 x = config->x_org; |
678 y = config->y_org; | |
679 sw = config->src_width; | |
680 sh = config->src_height; | |
681 dw = config->dest_width; | |
682 dh = config->dest_height; | |
683 | |
5623 | 684 #ifdef MP_DEBUG |
61 | 685 printk(KERN_DEBUG "mga_vid: Setting up a %dx%d+%d+%d video window (src %dx%d) format %X\n", |
1 | 686 dw, dh, x, y, sw, sh, config->format); |
5623 | 687 #endif |
1 | 688 |
3959 | 689 if(sw<4 || sh<4 || dw<4 || dh<4){ |
690 printk(KERN_ERR "mga_vid: Invalid src/dest dimenstions\n"); | |
691 return -1; | |
692 } | |
693 | |
1 | 694 //FIXME check that window is valid and inside desktop |
695 | |
696 //FIXME figure out a better way to allocate memory on card | |
697 //allocate 2 megs | |
698 //mga_src_base = mga_mem_base + (MGA_VIDMEM_SIZE-2) * 0x100000; | |
57 | 699 //mga_src_base = (MGA_VIDMEM_SIZE-3) * 0x100000; |
1 | 700 |
701 | |
702 //Setup the BES registers for a three plane 4:2:0 video source | |
703 | |
466 | 704 regs.besglobctl = 0; |
705 | |
1 | 706 switch(config->format){ |
707 case MGA_VID_FORMAT_YV12: | |
470 | 708 case MGA_VID_FORMAT_I420: |
709 case MGA_VID_FORMAT_IYUV: | |
1 | 710 regs.besctl = 1 // BES enabled |
711 + (0<<6) // even start polarity | |
712 + (1<<10) // x filtering enabled | |
713 + (1<<11) // y filtering enabled | |
714 + (1<<16) // chroma upsampling | |
715 + (1<<17) // 4:2:0 mode | |
716 + (1<<18); // dither enabled | |
466 | 717 #if 0 |
1 | 718 if(is_g400) |
719 { | |
720 //zoom disabled, zoom filter disabled, 420 3 plane format, proc amp | |
721 //disabled, rgb mode disabled | |
722 regs.besglobctl = (1<<5); | |
723 } | |
724 else | |
725 { | |
726 //zoom disabled, zoom filter disabled, Cb samples in 0246, Cr | |
727 //in 1357, BES register update on besvcnt | |
466 | 728 regs.besglobctl = 0; |
1 | 729 } |
466 | 730 #endif |
1 | 731 break; |
732 | |
733 case MGA_VID_FORMAT_YUY2: | |
734 regs.besctl = 1 // BES enabled | |
735 + (0<<6) // even start polarity | |
736 + (1<<10) // x filtering enabled | |
737 + (1<<11) // y filtering enabled | |
738 + (1<<16) // chroma upsampling | |
739 + (0<<17) // 4:2:2 mode | |
740 + (1<<18); // dither enabled | |
741 | |
742 regs.besglobctl = 0; // YUY2 format selected | |
743 break; | |
466 | 744 |
745 case MGA_VID_FORMAT_UYVY: | |
746 regs.besctl = 1 // BES enabled | |
747 + (0<<6) // even start polarity | |
748 + (1<<10) // x filtering enabled | |
749 + (1<<11) // y filtering enabled | |
750 + (1<<16) // chroma upsampling | |
751 + (0<<17) // 4:2:2 mode | |
752 + (1<<18); // dither enabled | |
753 | |
754 regs.besglobctl = 1<<6; // UYVY format selected | |
755 break; | |
756 | |
1 | 757 default: |
61 | 758 printk(KERN_ERR "mga_vid: Unsupported pixel format: 0x%X\n",config->format); |
1 | 759 return -1; |
760 } | |
761 | |
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762 // setting black&white mode |
4484 | 763 regs.besctl|=(regs.blackie<<20); |
1 | 764 |
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765 //Enable contrast and brightness control |
466 | 766 regs.besglobctl |= (1<<5) + (1<<7); |
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767 |
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768 // brightness ; default is 0x7f; |
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769 regs.beslumactl = (mga_brightness << 16); |
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770 // contrast: |
4728
dab19bd91cde
Add module parameters: contrast and brightness, so when you need those permanently
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changeset
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771 regs.beslumactl|= ((mga_contrast+0x80)<<0); |
1 | 772 |
773 //Setup destination window boundaries | |
774 besleft = x > 0 ? x : 0; | |
775 bestop = y > 0 ? y : 0; | |
776 regs.beshcoord = (besleft<<16) + (x + dw-1); | |
777 regs.besvcoord = (bestop<<16) + (y + dh-1); | |
778 | |
779 //Setup source dimensions | |
780 regs.beshsrclst = (sw - 1) << 16; | |
781 regs.bespitch = (sw + 31) & ~31 ; | |
782 | |
783 //Setup horizontal scaling | |
784 ifactor = ((sw-1)<<14)/(dw-1); | |
785 ofsleft = besleft - x; | |
786 | |
787 regs.beshiscal = ifactor<<2; | |
788 regs.beshsrcst = (ofsleft*ifactor)<<2; | |
789 regs.beshsrcend = regs.beshsrcst + (((dw - ofsleft - 1) * ifactor) << 2); | |
790 | |
791 //Setup vertical scaling | |
792 ifactor = ((sh-1)<<14)/(dh-1); | |
793 ofstop = bestop - y; | |
794 | |
795 regs.besviscal = ifactor<<2; | |
796 | |
797 baseadrofs = ((ofstop*regs.besviscal)>>16)*regs.bespitch; | |
57 | 798 //frame_size = ((sw + 31) & ~31) * sh + (((sw + 31) & ~31) * sh) / 2; |
1 | 799 regs.besa1org = (uint32_t) mga_src_base + baseadrofs; |
48 | 800 regs.besa2org = (uint32_t) mga_src_base + baseadrofs + 1*frame_size; |
801 regs.besb1org = (uint32_t) mga_src_base + baseadrofs + 2*frame_size; | |
802 regs.besb2org = (uint32_t) mga_src_base + baseadrofs + 3*frame_size; | |
1 | 803 |
470 | 804 if(config->format==MGA_VID_FORMAT_YV12 |
805 ||config->format==MGA_VID_FORMAT_IYUV | |
806 ||config->format==MGA_VID_FORMAT_I420 | |
807 ){ | |
57 | 808 // planar YUV frames: |
1 | 809 if (is_g400) |
810 baseadrofs = (((ofstop*regs.besviscal)/4)>>16)*regs.bespitch; | |
811 else | |
812 baseadrofs = (((ofstop*regs.besviscal)/2)>>16)*regs.bespitch; | |
813 | |
5336 | 814 if(config->format==MGA_VID_FORMAT_YV12 || !is_g400){ |
1 | 815 regs.besa1corg = (uint32_t) mga_src_base + baseadrofs + regs.bespitch * sh ; |
48 | 816 regs.besa2corg = (uint32_t) mga_src_base + baseadrofs + 1*frame_size + regs.bespitch * sh; |
817 regs.besb1corg = (uint32_t) mga_src_base + baseadrofs + 2*frame_size + regs.bespitch * sh; | |
818 regs.besb2corg = (uint32_t) mga_src_base + baseadrofs + 3*frame_size + regs.bespitch * sh; | |
1 | 819 regs.besa1c3org = regs.besa1corg + ((regs.bespitch * sh) / 4); |
48 | 820 regs.besa2c3org = regs.besa2corg + ((regs.bespitch * sh) / 4); |
1 | 821 regs.besb1c3org = regs.besb1corg + ((regs.bespitch * sh) / 4); |
48 | 822 regs.besb2c3org = regs.besb2corg + ((regs.bespitch * sh) / 4); |
470 | 823 } else { |
824 regs.besa1c3org = (uint32_t) mga_src_base + baseadrofs + regs.bespitch * sh ; | |
825 regs.besa2c3org = (uint32_t) mga_src_base + baseadrofs + 1*frame_size + regs.bespitch * sh; | |
826 regs.besb1c3org = (uint32_t) mga_src_base + baseadrofs + 2*frame_size + regs.bespitch * sh; | |
827 regs.besb2c3org = (uint32_t) mga_src_base + baseadrofs + 3*frame_size + regs.bespitch * sh; | |
828 regs.besa1corg = regs.besa1c3org + ((regs.bespitch * sh) / 4); | |
829 regs.besa2corg = regs.besa2c3org + ((regs.bespitch * sh) / 4); | |
830 regs.besb1corg = regs.besb1c3org + ((regs.bespitch * sh) / 4); | |
831 regs.besb2corg = regs.besb2c3org + ((regs.bespitch * sh) / 4); | |
832 } | |
833 | |
57 | 834 } |
1 | 835 |
836 weight = ofstop * (regs.besviscal >> 2); | |
837 weights = weight < 0 ? 1 : 0; | |
48 | 838 regs.besv2wght = regs.besv1wght = (weights << 16) + ((weight & 0x3FFF) << 2); |
839 regs.besv2srclst = regs.besv1srclst = sh - 1 - (((ofstop * regs.besviscal) >> 16) & 0x03FF); | |
1 | 840 |
2344 | 841 #ifdef CRTC2 |
842 // pridat hlavni registry - tj. casovani ... | |
843 | |
844 | |
845 switch(config->format){ | |
846 case MGA_VID_FORMAT_YV12: | |
847 case MGA_VID_FORMAT_I420: | |
848 case MGA_VID_FORMAT_IYUV: | |
849 cregs.c2ctl = 1 // CRTC2 enabled | |
850 + (1<<1) // external clock | |
851 + (0<<2) // external clock | |
852 + (1<<3) // pixel clock enable - not needed ??? | |
853 + (0<<4) // high prioryty req | |
854 + (1<<5) // high prioryty req | |
855 + (0<<6) // high prioryty req | |
856 + (1<<8) // high prioryty req max | |
857 + (0<<9) // high prioryty req max | |
858 + (0<<10) // high prioryty req max | |
859 + (0<<20) // CRTC1 to DAC | |
860 + (1<<21) // 420 mode | |
861 + (1<<22) // 420 mode | |
862 + (1<<23) // 420 mode | |
863 + (0<<24) // single chroma line for 420 mode - need to be corrected | |
864 + (0<<25) /*/ interlace mode - need to be corrected*/ | |
865 + (0<<26) // field legth polariry | |
866 + (0<<27) // field identification polariry | |
867 + (1<<28) // VIDRST detection mode | |
868 + (0<<29) // VIDRST detection mode | |
869 + (1<<30) // Horizontal counter preload | |
870 + (1<<31) // Vertical counter preload | |
871 ; | |
872 cregs.c2datactl = 1 // disable dither - propably not needed, we are already in YUV mode | |
873 + (1<<1) // Y filter enable | |
874 + (1<<2) // CbCr filter enable | |
875 + (0<<3) // subpicture enable (disabled) | |
876 + (0<<4) // NTSC enable (disabled - PAL) | |
877 + (0<<5) // C2 static subpicture enable (disabled) | |
878 + (0<<6) // C2 subpicture offset division (disabled) | |
879 + (0<<7) // 422 subformat selection ! | |
880 /* + (0<<8) // 15 bpp high alpha | |
881 + (0<<9) // 15 bpp high alpha | |
882 + (0<<10) // 15 bpp high alpha | |
883 + (0<<11) // 15 bpp high alpha | |
884 + (0<<12) // 15 bpp high alpha | |
885 + (0<<13) // 15 bpp high alpha | |
886 + (0<<14) // 15 bpp high alpha | |
887 + (0<<15) // 15 bpp high alpha | |
888 + (0<<16) // 15 bpp low alpha | |
889 + (0<<17) // 15 bpp low alpha | |
890 + (0<<18) // 15 bpp low alpha | |
891 + (0<<19) // 15 bpp low alpha | |
892 + (0<<20) // 15 bpp low alpha | |
893 + (0<<21) // 15 bpp low alpha | |
894 + (0<<22) // 15 bpp low alpha | |
895 + (0<<23) // 15 bpp low alpha | |
896 + (0<<24) // static subpicture key | |
897 + (0<<25) // static subpicture key | |
898 + (0<<26) // static subpicture key | |
899 + (0<<27) // static subpicture key | |
900 + (0<<28) // static subpicture key | |
901 */ ; | |
902 break; | |
903 | |
904 case MGA_VID_FORMAT_YUY2: | |
905 cregs.c2ctl = 1 // CRTC2 enabled | |
906 + (1<<1) // external clock | |
907 + (0<<2) // external clock | |
908 + (1<<3) // pixel clock enable - not needed ??? | |
909 + (0<<4) // high prioryty req - acc to spec | |
910 + (1<<5) // high prioryty req | |
911 + (0<<6) // high prioryty req | |
912 // 7 reserved | |
913 + (1<<8) // high prioryty req max | |
914 + (0<<9) // high prioryty req max | |
915 + (0<<10) // high prioryty req max | |
916 // 11-19 reserved | |
917 + (0<<20) // CRTC1 to DAC | |
918 + (1<<21) // 422 mode | |
919 + (0<<22) // 422 mode | |
920 + (1<<23) // 422 mode | |
921 + (0<<24) // single chroma line for 420 mode - need to be corrected | |
922 + (0<<25) /*/ interlace mode - need to be corrected*/ | |
923 + (0<<26) // field legth polariry | |
924 + (0<<27) // field identification polariry | |
925 + (1<<28) // VIDRST detection mode | |
926 + (0<<29) // VIDRST detection mode | |
927 + (1<<30) // Horizontal counter preload | |
928 + (1<<31) // Vertical counter preload | |
929 ; | |
930 cregs.c2datactl = 1 // disable dither - propably not needed, we are already in YUV mode | |
931 + (1<<1) // Y filter enable | |
932 + (1<<2) // CbCr filter enable | |
933 + (0<<3) // subpicture enable (disabled) | |
934 + (0<<4) // NTSC enable (disabled - PAL) | |
935 + (0<<5) // C2 static subpicture enable (disabled) | |
936 + (0<<6) // C2 subpicture offset division (disabled) | |
937 + (0<<7) // 422 subformat selection ! | |
938 /* + (0<<8) // 15 bpp high alpha | |
939 + (0<<9) // 15 bpp high alpha | |
940 + (0<<10) // 15 bpp high alpha | |
941 + (0<<11) // 15 bpp high alpha | |
942 + (0<<12) // 15 bpp high alpha | |
943 + (0<<13) // 15 bpp high alpha | |
944 + (0<<14) // 15 bpp high alpha | |
945 + (0<<15) // 15 bpp high alpha | |
946 + (0<<16) // 15 bpp low alpha | |
947 + (0<<17) // 15 bpp low alpha | |
948 + (0<<18) // 15 bpp low alpha | |
949 + (0<<19) // 15 bpp low alpha | |
950 + (0<<20) // 15 bpp low alpha | |
951 + (0<<21) // 15 bpp low alpha | |
952 + (0<<22) // 15 bpp low alpha | |
953 + (0<<23) // 15 bpp low alpha | |
954 + (0<<24) // static subpicture key | |
955 + (0<<25) // static subpicture key | |
956 + (0<<26) // static subpicture key | |
957 + (0<<27) // static subpicture key | |
958 + (0<<28) // static subpicture key | |
959 */ ; | |
960 break; | |
961 | |
962 case MGA_VID_FORMAT_UYVY: | |
963 cregs.c2ctl = 1 // CRTC2 enabled | |
964 + (1<<1) // external clock | |
965 + (0<<2) // external clock | |
966 + (1<<3) // pixel clock enable - not needed ??? | |
967 + (0<<4) // high prioryty req | |
968 + (1<<5) // high prioryty req | |
969 + (0<<6) // high prioryty req | |
970 + (1<<8) // high prioryty req max | |
971 + (0<<9) // high prioryty req max | |
972 + (0<<10) // high prioryty req max | |
973 + (0<<20) // CRTC1 to DAC | |
974 + (1<<21) // 422 mode | |
975 + (0<<22) // 422 mode | |
976 + (1<<23) // 422 mode | |
977 + (1<<24) // single chroma line for 420 mode - need to be corrected | |
978 + (1<<25) /*/ interlace mode - need to be corrected*/ | |
979 + (0<<26) // field legth polariry | |
980 + (0<<27) // field identification polariry | |
981 + (1<<28) // VIDRST detection mode | |
982 + (0<<29) // VIDRST detection mode | |
983 + (1<<30) // Horizontal counter preload | |
984 + (1<<31) // Vertical counter preload | |
985 ; | |
986 cregs.c2datactl = 0 // enable dither - propably not needed, we are already in YUV mode | |
987 + (1<<1) // Y filter enable | |
988 + (1<<2) // CbCr filter enable | |
989 + (0<<3) // subpicture enable (disabled) | |
990 + (0<<4) // NTSC enable (disabled - PAL) | |
991 + (0<<5) // C2 static subpicture enable (disabled) | |
992 + (0<<6) // C2 subpicture offset division (disabled) | |
993 + (1<<7) // 422 subformat selection ! | |
994 /* + (0<<8) // 15 bpp high alpha | |
995 + (0<<9) // 15 bpp high alpha | |
996 + (0<<10) // 15 bpp high alpha | |
997 + (0<<11) // 15 bpp high alpha | |
998 + (0<<12) // 15 bpp high alpha | |
999 + (0<<13) // 15 bpp high alpha | |
1000 + (0<<14) // 15 bpp high alpha | |
1001 + (0<<15) // 15 bpp high alpha | |
1002 + (0<<16) // 15 bpp low alpha | |
1003 + (0<<17) // 15 bpp low alpha | |
1004 + (0<<18) // 15 bpp low alpha | |
1005 + (0<<19) // 15 bpp low alpha | |
1006 + (0<<20) // 15 bpp low alpha | |
1007 + (0<<21) // 15 bpp low alpha | |
1008 + (0<<22) // 15 bpp low alpha | |
1009 + (0<<23) // 15 bpp low alpha | |
1010 + (0<<24) // static subpicture key | |
1011 + (0<<25) // static subpicture key | |
1012 + (0<<26) // static subpicture key | |
1013 + (0<<27) // static subpicture key | |
1014 + (0<<28) // static subpicture key | |
1015 */ ; | |
1016 break; | |
1017 | |
1018 default: | |
1019 printk(KERN_ERR "mga_vid: Unsupported pixel format: 0x%X\n",config->format); | |
1020 return -1; | |
1021 } | |
1022 | |
1023 cregs.c2hparam=((hdispend - 8) << 16) | (htotal - 8); | |
1024 cregs.c2hsync=((hsyncend - 8) << 16) | (hsyncstart - 8); | |
1025 | |
1026 cregs.c2misc=0 // CRTCV2 656 togg f0 | |
1027 +(0<<1) // CRTCV2 656 togg f0 | |
1028 +(0<<2) // CRTCV2 656 togg f0 | |
1029 +(0<<4) // CRTCV2 656 togg f1 | |
1030 +(0<<5) // CRTCV2 656 togg f1 | |
1031 +(0<<6) // CRTCV2 656 togg f1 | |
1032 +(0<<8) // Hsync active high | |
1033 +(0<<9) // Vsync active high | |
1034 // 16-27 c2vlinecomp - nevim co tam dat | |
1035 ; | |
1036 cregs.c2offset=(regs.bespitch << 1); | |
1037 | |
1038 cregs.c2pl2startadd0=regs.besa1corg; | |
1039 // cregs.c2pl2startadd1=regs.besa2corg; | |
1040 cregs.c2pl3startadd0=regs.besa1c3org; | |
1041 // cregs.c2pl3startadd1=regs.besa2c3org; | |
1042 | |
1043 cregs.c2preload=(vsyncstart << 16) | (hsyncstart); // from | |
1044 | |
1045 cregs.c2spicstartadd0=0; // not used | |
1046 // cregs.c2spicstartadd1=0; // not used | |
1047 | |
1048 cregs.c2startadd0=regs.besa1org; | |
1049 // cregs.c2startadd1=regs.besa2org; | |
1050 | |
1051 cregs.c2subpiclut=0; //not used | |
1052 | |
1053 cregs.c2vparam=((vdispend - 1) << 16) | (vtotal - 1); | |
1054 cregs.c2vsync=((vsyncend - 1) << 16) | (vsyncstart - 1); | |
1055 | |
1056 | |
1057 #endif | |
1058 | |
2086 | 1059 mga_vid_write_regs(0); |
1 | 1060 return 0; |
1061 } | |
1062 | |
68 | 1063 #ifdef MGA_ALLOW_IRQ |
1064 | |
48 | 1065 static void enable_irq(){ |
1066 long int cc; | |
1067 | |
1068 cc = readl(mga_mmio_base + IEN); | |
63 | 1069 // printk(KERN_ALERT "*** !!! IRQREG = %d\n", (int)(cc&0xff)); |
48 | 1070 |
1071 writeb( 0x11, mga_mmio_base + CRTCX); | |
1072 | |
1073 writeb(0x20, mga_mmio_base + CRTCD ); /* clear 0, enable off */ | |
1074 writeb(0x00, mga_mmio_base + CRTCD ); /* enable on */ | |
1075 writeb(0x10, mga_mmio_base + CRTCD ); /* clear = 1 */ | |
1076 | |
1077 writel( regs.besglobctl , mga_mmio_base + BESGLOBCTL); | |
1078 | |
1079 } | |
1080 | |
1081 static void disable_irq(){ | |
1082 | |
1083 writeb( 0x11, mga_mmio_base + CRTCX); | |
1084 writeb(0x20, mga_mmio_base + CRTCD ); /* clear 0, enable off */ | |
1085 | |
1086 } | |
1087 | |
5884 | 1088 static void mga_handle_irq(int irq, void *dev_id, struct pt_regs *pregs) { |
48 | 1089 // static int frame=0; |
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1090 // static int counter=0; |
48 | 1091 long int cc; |
1092 // if ( ! mga_enabled_flag ) return; | |
1093 | |
68 | 1094 // printk(KERN_DEBUG "vcount = %d\n",readl(mga_mmio_base + VCOUNT)); |
1095 | |
48 | 1096 //printk("mga_interrupt #%d\n", irq); |
1097 | |
1098 if ( irq != -1 ) { | |
1099 | |
1100 cc = readl(mga_mmio_base + STATUS); | |
1101 if ( ! (cc & 0x10) ) return; /* vsyncpen */ | |
1102 // debug_irqcnt++; | |
1103 } | |
1104 | |
1105 // if ( debug_irqignore ) { | |
1106 // debug_irqignore = 0; | |
1107 | |
1108 | |
1109 /* | |
1110 if ( mga_conf_deinterlace ) { | |
1111 if ( mga_first_field ) { | |
1112 // printk("mga_interrupt first field\n"); | |
1113 if ( syncfb_interrupt() ) | |
1114 mga_first_field = 0; | |
1115 } else { | |
1116 // printk("mga_interrupt second field\n"); | |
1117 mga_select_buffer( mga_current_field | 2 ); | |
1118 mga_first_field = 1; | |
1119 } | |
1120 } else { | |
1121 syncfb_interrupt(); | |
1122 } | |
1123 */ | |
1124 | |
1125 // frame=(frame+1)&1; | |
1126 regs.besctl = (regs.besctl & ~0x07000000) + (mga_next_frame << 25); | |
1127 writel( regs.besctl, mga_mmio_base + BESCTL ); | |
2344 | 1128 |
1129 #ifdef CRTC2 | |
1130 // sem pridat vyber obrazku !!!! | |
1131 crtc2_frame_sel(mga_next_frame); | |
1132 #endif | |
48 | 1133 |
1134 #if 0 | |
1135 ++counter; | |
1136 if(!(counter&63)){ | |
1137 printk("mga irq counter = %d\n",counter); | |
1138 } | |
1139 #endif | |
1140 | |
1141 // } else { | |
1142 // debug_irqignore = 1; | |
1143 // } | |
1144 | |
1145 if ( irq != -1 ) { | |
1146 writeb( 0x11, mga_mmio_base + CRTCX); | |
1147 writeb( 0, mga_mmio_base + CRTCD ); | |
1148 writeb( 0x10, mga_mmio_base + CRTCD ); | |
1149 } | |
1150 | |
1151 // writel( regs.besglobctl, mga_mmio_base + BESGLOBCTL); | |
1152 | |
1153 | |
1154 return; | |
1155 | |
1156 } | |
1157 | |
68 | 1158 #endif |
1 | 1159 |
1160 static int mga_vid_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) | |
1161 { | |
1162 int frame; | |
5013
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1163 uint32_t tmp; |
52c008dd6e93
min() moved out of #if, applied brightness/contrast patch by Brian J. Murrell
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1164 |
1 | 1165 |
1166 switch(cmd) | |
1167 { | |
1168 case MGA_VID_CONFIG: | |
1169 //FIXME remove | |
68 | 1170 // printk(KERN_DEBUG "vcount = %d\n",readl(mga_mmio_base + VCOUNT)); |
5623 | 1171 #ifdef MP_DEBUG |
61 | 1172 printk(KERN_DEBUG "mga_mmio_base = %p\n",mga_mmio_base); |
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1173 printk(KERN_DEBUG "mga_mem_base = %08x\n",mga_mem_base); |
1 | 1174 //FIXME remove |
1175 | |
61 | 1176 printk(KERN_DEBUG "mga_vid: Received configuration\n"); |
5623 | 1177 #endif |
1 | 1178 |
1179 if(copy_from_user(&mga_config,(mga_vid_config_t*) arg,sizeof(mga_vid_config_t))) | |
1180 { | |
61 | 1181 printk(KERN_ERR "mga_vid: failed copy from userspace\n"); |
1 | 1182 return(-EFAULT); |
1183 } | |
57 | 1184 if(mga_config.version != MGA_VID_VERSION){ |
61 | 1185 printk(KERN_ERR "mga_vid: incompatible version! driver: %X requested: %X\n",MGA_VID_VERSION,mga_config.version); |
57 | 1186 return(-EFAULT); |
1187 } | |
1188 | |
1189 if(mga_config.frame_size==0 || mga_config.frame_size>1024*768*2){ | |
61 | 1190 printk(KERN_ERR "mga_vid: illegal frame_size: %d\n",mga_config.frame_size); |
57 | 1191 return(-EFAULT); |
1192 } | |
1193 | |
1194 if(mga_config.num_frames<1 || mga_config.num_frames>4){ | |
61 | 1195 printk(KERN_ERR "mga_vid: illegal num_frames: %d\n",mga_config.num_frames); |
57 | 1196 return(-EFAULT); |
1197 } | |
1198 | |
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1199 mga_src_base = (mga_ram_size*0x100000-mga_config.num_frames*mga_config.frame_size-mga_top_reserved); |
57 | 1200 if(mga_src_base<0){ |
61 | 1201 printk(KERN_ERR "mga_vid: not enough memory for frames!\n"); |
57 | 1202 return(-EFAULT); |
1203 } | |
1204 mga_src_base &= (~0xFFFF); // 64k boundary | |
5623 | 1205 #ifdef MP_DEBUG |
61 | 1206 printk(KERN_DEBUG "mga YUV buffer base: 0x%X\n", mga_src_base); |
5623 | 1207 #endif |
57 | 1208 |
1 | 1209 if (is_g400) |
1210 mga_config.card_type = MGA_G400; | |
1211 else | |
1212 mga_config.card_type = MGA_G200; | |
1213 | |
1214 mga_config.ram_size = mga_ram_size; | |
1215 | |
1216 if (copy_to_user((mga_vid_config_t *) arg, &mga_config, sizeof(mga_vid_config_t))) | |
1217 { | |
61 | 1218 printk(KERN_ERR "mga_vid: failed copy to userspace\n"); |
1 | 1219 return(-EFAULT); |
1220 } | |
1221 return mga_vid_set_config(&mga_config); | |
1222 break; | |
1223 | |
1224 case MGA_VID_ON: | |
5623 | 1225 #ifdef MP_DEBUG |
61 | 1226 printk(KERN_DEBUG "mga_vid: Video ON\n"); |
5623 | 1227 #endif |
1 | 1228 vid_src_ready = 1; |
1229 if(vid_overlay_on) | |
1230 { | |
1231 regs.besctl |= 1; | |
2086 | 1232 mga_vid_write_regs(0); |
1 | 1233 } |
68 | 1234 #ifdef MGA_ALLOW_IRQ |
48 | 1235 if ( mga_irq != -1 ) enable_irq(); |
68 | 1236 #endif |
48 | 1237 mga_next_frame=0; |
1 | 1238 break; |
1239 | |
1240 case MGA_VID_OFF: | |
5623 | 1241 #ifdef MP_DEBUG |
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1242 printk(KERN_DEBUG "mga_vid: Video OFF (ioctl)\n"); |
5623 | 1243 #endif |
1 | 1244 vid_src_ready = 0; |
68 | 1245 #ifdef MGA_ALLOW_IRQ |
48 | 1246 if ( mga_irq != -1 ) disable_irq(); |
68 | 1247 #endif |
1 | 1248 regs.besctl &= ~1; |
466 | 1249 regs.besglobctl &= ~(1<<6); // UYVY format selected |
2086 | 1250 mga_vid_write_regs(0); |
1 | 1251 break; |
1252 | |
1253 case MGA_VID_FSEL: | |
1254 if(copy_from_user(&frame,(int *) arg,sizeof(int))) | |
1255 { | |
61 | 1256 printk(KERN_ERR "mga_vid: FSEL failed copy from userspace\n"); |
1 | 1257 return(-EFAULT); |
1258 } | |
1259 | |
1260 mga_vid_frame_sel(frame); | |
1261 break; | |
1262 | |
5013
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1263 case MGA_VID_GET_LUMA: |
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|
1264 tmp = regs.beslumactl - 0x80; |
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1265 if (copy_to_user((uint32_t *) arg, &tmp, sizeof(uint32_t))) |
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1266 { |
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1267 printk(KERN_ERR "mga_vid: failed copy %p to userspace %p\n", |
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1268 &tmp, (uint32_t *) arg); |
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1269 return(-EFAULT); |
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1270 } |
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1271 break; |
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1272 |
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1273 case MGA_VID_SET_LUMA: |
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1274 tmp = arg; |
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1275 regs.beslumactl = tmp + 0x80; |
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1276 mga_vid_write_regs(0); |
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1277 break; |
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1278 |
1 | 1279 default: |
61 | 1280 printk(KERN_ERR "mga_vid: Invalid ioctl\n"); |
1 | 1281 return (-EINVAL); |
1282 } | |
1283 | |
1284 return 0; | |
1285 } | |
1286 | |
1287 | |
1288 static int mga_vid_find_card(void) | |
1289 { | |
1290 struct pci_dev *dev = NULL; | |
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1291 unsigned int card_option; |
1 | 1292 |
1989 | 1293 if((dev = pci_find_device(PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, NULL))) |
1294 { | |
1295 is_g400 = 1; | |
1296 printk(KERN_INFO "mga_vid: Found MGA G550\n"); | |
1297 } | |
1298 else if((dev = pci_find_device(PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, NULL))) | |
1 | 1299 { |
1300 is_g400 = 1; | |
77 | 1301 printk(KERN_INFO "mga_vid: Found MGA G400/G450\n"); |
1 | 1302 } |
1303 else if((dev = pci_find_device(PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, NULL))) | |
1304 { | |
1305 is_g400 = 0; | |
63 | 1306 printk(KERN_INFO "mga_vid: Found MGA G200 AGP\n"); |
1 | 1307 } |
1308 else if((dev = pci_find_device(PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, NULL))) | |
1309 { | |
1310 is_g400 = 0; | |
63 | 1311 printk(KERN_INFO "mga_vid: Found MGA G200 PCI\n"); |
1 | 1312 } |
1313 else | |
1314 { | |
61 | 1315 printk(KERN_ERR "mga_vid: No supported cards found\n"); |
1 | 1316 return FALSE; |
1317 } | |
1318 | |
1319 pci_dev = dev; | |
48 | 1320 |
1321 mga_irq = pci_dev->irq; | |
1 | 1322 |
1323 #if LINUX_VERSION_CODE >= 0x020300 | |
1324 mga_mmio_base = ioremap_nocache(dev->resource[1].start,0x4000); | |
1325 mga_mem_base = dev->resource[0].start; | |
1326 #else | |
1327 mga_mmio_base = ioremap_nocache(dev->base_address[1] & PCI_BASE_ADDRESS_MEM_MASK,0x4000); | |
1328 mga_mem_base = dev->base_address[0] & PCI_BASE_ADDRESS_MEM_MASK; | |
1329 #endif | |
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1330 printk(KERN_INFO "mga_vid: MMIO at 0x%p IRQ: %d framebuffer: 0x%08X\n", mga_mmio_base, mga_irq, mga_mem_base); |
1 | 1331 |
1332 pci_read_config_dword(dev, 0x40, &card_option); | |
77 | 1333 printk(KERN_INFO "mga_vid: OPTION word: 0x%08X mem: 0x%02X %s\n", card_option, |
1334 (card_option>>10)&0x17, ((card_option>>14)&1)?"SGRAM":"SDRAM"); | |
1 | 1335 |
57 | 1336 // temp = (card_option >> 10) & 0x17; |
1337 | |
95 | 1338 if (mga_ram_size) { |
1339 printk(KERN_INFO "mga_vid: RAMSIZE forced to %d MB\n", mga_ram_size); | |
91 | 1340 } else { |
90 | 1341 |
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1342 #ifdef MGA_MEMORY_SIZE |
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1343 mga_ram_size = MGA_MEMORY_SIZE; |
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1344 printk(KERN_INFO "mga_vid: hard-coded RAMSIZE is %d MB\n", (unsigned int) mga_ram_size); |
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1345 |
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1346 #else |
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1347 |
95 | 1348 if (is_g400){ |
75 | 1349 switch((card_option>>10)&0x17){ |
1350 // SDRAM: | |
1351 case 0x00: | |
1352 case 0x04: mga_ram_size = 16; break; | |
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1353 case 0x03: |
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1354 case 0x05: mga_ram_size = 32; break; |
75 | 1355 // SGRAM: |
1356 case 0x10: | |
1357 case 0x14: mga_ram_size = 32; break; | |
1358 case 0x11: | |
1359 case 0x12: mga_ram_size = 16; break; | |
1360 default: | |
1361 mga_ram_size = 16; | |
1362 printk(KERN_INFO "mga_vid: Couldn't detect RAMSIZE, assuming 16MB!"); | |
1363 } | |
95 | 1364 }else{ |
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1365 switch((card_option>>10)&0x17){ |
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1366 // case 0x10: |
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1367 // case 0x13: mga_ram_size = 8; break; |
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1368 default: mga_ram_size = 8; |
64 | 1369 } |
95 | 1370 } |
64 | 1371 #if 0 |
95 | 1372 // printk("List resources -----------\n"); |
1373 for(temp=0;temp<DEVICE_COUNT_RESOURCE;temp++){ | |
1374 struct resource *res=&pci_dev->resource[temp]; | |
1375 if(res->flags){ | |
1376 int size=(1+res->end-res->start)>>20; | |
1377 printk(KERN_DEBUG "res %d: start: 0x%X end: 0x%X (%d MB) flags=0x%X\n",temp,res->start,res->end,size,res->flags); | |
1378 if(res->flags&(IORESOURCE_MEM|IORESOURCE_PREFETCH)){ | |
1379 if(size>mga_ram_size && size<=64) mga_ram_size=size; | |
1380 } | |
1381 } | |
57 | 1382 } |
64 | 1383 #endif |
95 | 1384 printk(KERN_INFO "mga_vid: detected RAMSIZE is %d MB\n", (unsigned int) mga_ram_size); |
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1385 #endif |
95 | 1386 } |
57 | 1387 |
48 | 1388 |
68 | 1389 #ifdef MGA_ALLOW_IRQ |
48 | 1390 if ( mga_irq != -1 ) { |
1391 int tmp = request_irq(mga_irq, mga_handle_irq, SA_INTERRUPT | SA_SHIRQ, "Syncfb Time Base", &mga_irq); | |
1392 if ( tmp ) { | |
61 | 1393 printk(KERN_INFO "syncfb (mga): cannot register irq %d (Err: %d)\n", mga_irq, tmp); |
48 | 1394 mga_irq=-1; |
1395 } else { | |
61 | 1396 printk(KERN_DEBUG "syncfb (mga): registered irq %d\n", mga_irq); |
48 | 1397 } |
1398 } else { | |
61 | 1399 printk(KERN_INFO "syncfb (mga): No valid irq was found\n"); |
48 | 1400 mga_irq=-1; |
1401 } | |
68 | 1402 #else |
1403 printk(KERN_INFO "syncfb (mga): IRQ disabled in mga_vid.c\n"); | |
1404 mga_irq=-1; | |
1405 #endif | |
48 | 1406 |
1 | 1407 return TRUE; |
1408 } | |
1409 | |
4484 | 1410 static void mga_param_buff_fill( void ) |
1411 { | |
1412 unsigned len; | |
1413 len = 0; | |
1414 len += sprintf(&mga_param_buff[len],"Interface version: %04X\n",MGA_VID_VERSION); | |
4527 | 1415 len += sprintf(&mga_param_buff[len],"Memory: %x:%dM\n",mga_mem_base,(unsigned int) mga_ram_size); |
4484 | 1416 len += sprintf(&mga_param_buff[len],"MMIO: %p\n",mga_mmio_base); |
1417 len += sprintf(&mga_param_buff[len],"Configurable stuff:\n"); | |
1418 len += sprintf(&mga_param_buff[len],"~~~~~~~~~~~~~~~~~~~\n"); | |
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1419 len += sprintf(&mga_param_buff[len],PARAM_BRIGHTNESS"%d\n",mga_brightness); |
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1420 len += sprintf(&mga_param_buff[len],PARAM_CONTRAST"%d\n",mga_contrast); |
4484 | 1421 len += sprintf(&mga_param_buff[len],PARAM_BLACKIE"%s\n",regs.blackie?"on":"off"); |
1422 mga_param_buff_len = len; | |
4527 | 1423 // check boundaries of mga_param_buff before writing to it!!! |
4484 | 1424 } |
1425 | |
1 | 1426 |
1427 static ssize_t mga_vid_read(struct file *file, char *buf, size_t count, loff_t *ppos) | |
1428 { | |
4484 | 1429 uint32_t size; |
1430 if(!mga_param_buff) return -ESPIPE; | |
1431 if(!(*ppos)) mga_param_buff_fill(); | |
1432 if(*ppos >= mga_param_buff_len) return 0; | |
1433 size = min(count,mga_param_buff_len-(uint32_t)(*ppos)); | |
1434 memcpy(buf,mga_param_buff,size); | |
1435 *ppos += size; | |
1436 return size; | |
1 | 1437 } |
1438 | |
1439 static ssize_t mga_vid_write(struct file *file, const char *buf, size_t count, loff_t *ppos) | |
1440 { | |
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1441 if(memcmp(buf,PARAM_BRIGHTNESS,min(count,strlen(PARAM_BRIGHTNESS))) == 0) |
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1442 { |
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1443 short brightness; |
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1444 brightness=simple_strtol(&buf[strlen(PARAM_BRIGHTNESS)],NULL,10); |
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1445 if (brightness>127 || brightness<-128) { brightness=0;} |
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1446 // printk(KERN_DEBUG "mga_vid: brightness modified ( %d ) \n",brightness); |
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1447 mga_brightness=brightness; |
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1448 } else |
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1449 if(memcmp(buf,PARAM_CONTRAST,min(count,strlen(PARAM_CONTRAST))) == 0) |
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1450 { |
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1451 short contrast; |
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1452 contrast=simple_strtol(&buf[strlen(PARAM_CONTRAST)],NULL,10); |
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1453 if (contrast>127 || contrast<-128) { contrast=0;} |
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1454 // printk(KERN_DEBUG "mga_vid: contrast modified ( %d ) \n",contrast); |
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1455 mga_contrast=contrast; |
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1456 } else |
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1457 |
4483
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1458 if(memcmp(buf,PARAM_BLACKIE,min(count,strlen(PARAM_BLACKIE))) == 0) |
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1459 { |
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1460 short blackie; |
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1461 blackie=simple_strtol(&buf[strlen(PARAM_BLACKIE)],NULL,10); |
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1462 // printk(KERN_DEBUG "mga_vid: shadow mode: ( %d ) \n",blackie); |
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1463 regs.blackie=(blackie>0)?1:0; |
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1464 } else count = -EIO; |
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1465 // TODO: reset settings |
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1466 return count; |
1 | 1467 } |
1468 | |
1469 static int mga_vid_mmap(struct file *file, struct vm_area_struct *vma) | |
1470 { | |
1471 | |
5623 | 1472 #ifdef MP_DEBUG |
61 | 1473 printk(KERN_DEBUG "mga_vid: mapping video memory into userspace\n"); |
5623 | 1474 #endif |
57 | 1475 if(remap_page_range(vma->vm_start, mga_mem_base + mga_src_base, |
1 | 1476 vma->vm_end - vma->vm_start, vma->vm_page_prot)) |
1477 { | |
63 | 1478 printk(KERN_ERR "mga_vid: error mapping video memory\n"); |
1 | 1479 return(-EAGAIN); |
1480 } | |
1481 | |
1482 return(0); | |
1483 } | |
1484 | |
1485 static int mga_vid_release(struct inode *inode, struct file *file) | |
1486 { | |
1487 //Close the window just in case | |
5623 | 1488 #ifdef MP_DEBUG |
94
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1489 printk(KERN_DEBUG "mga_vid: Video OFF (release)\n"); |
5623 | 1490 #endif |
94
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1491 |
1 | 1492 vid_src_ready = 0; |
1493 regs.besctl &= ~1; | |
466 | 1494 regs.besglobctl &= ~(1<<6); // UYVY format selected |
2086 | 1495 // mga_config.colkey_on=0; //!!! |
1496 mga_vid_write_regs(1); | |
1 | 1497 mga_vid_in_use = 0; |
1498 | |
93 | 1499 MOD_DEC_USE_COUNT; |
1 | 1500 return 0; |
1501 } | |
1502 | |
1503 static long long mga_vid_lseek(struct file *file, long long offset, int origin) | |
1504 { | |
1505 return -ESPIPE; | |
1506 } | |
1507 | |
1508 static int mga_vid_open(struct inode *inode, struct file *file) | |
1509 { | |
1510 int minor = MINOR(inode->i_rdev); | |
1511 | |
1512 if(minor != 0) | |
1513 return(-ENXIO); | |
1514 | |
1515 if(mga_vid_in_use == 1) | |
1516 return(-EBUSY); | |
1517 | |
1518 mga_vid_in_use = 1; | |
93 | 1519 MOD_INC_USE_COUNT; |
1 | 1520 return(0); |
1521 } | |
1522 | |
1523 #if LINUX_VERSION_CODE >= 0x020400 | |
1524 static struct file_operations mga_vid_fops = | |
1525 { | |
1526 llseek: mga_vid_lseek, | |
1527 read: mga_vid_read, | |
1528 write: mga_vid_write, | |
1529 ioctl: mga_vid_ioctl, | |
1530 mmap: mga_vid_mmap, | |
1531 open: mga_vid_open, | |
1532 release: mga_vid_release | |
1533 }; | |
1534 #else | |
1535 static struct file_operations mga_vid_fops = | |
1536 { | |
1537 mga_vid_lseek, | |
1538 mga_vid_read, | |
1539 mga_vid_write, | |
1540 NULL, | |
1541 NULL, | |
1542 mga_vid_ioctl, | |
1543 mga_vid_mmap, | |
1544 mga_vid_open, | |
1545 NULL, | |
1546 mga_vid_release | |
1547 }; | |
1548 #endif | |
1549 | |
1550 | |
1551 /* | |
1552 * Main Initialization Function | |
1553 */ | |
1554 | |
1555 static int mga_vid_initialize(void) | |
1556 { | |
1557 mga_vid_in_use = 0; | |
1558 | |
77 | 1559 // printk(KERN_INFO "Matrox MGA G200/G400 YUV Video interface v0.01 (c) Aaron Holtzman \n"); |
4594
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1560 printk(KERN_INFO "Matrox MGA G200/G400/G450/G550 YUV Video interface v2.01 (c) Aaron Holtzman & A'rpi\n"); |
90 | 1561 |
95 | 1562 if (mga_ram_size) { |
1563 if (mga_ram_size<4 || mga_ram_size>64) { | |
1564 printk(KERN_ERR "mga_vid: invalid RAMSIZE: %d MB\n", mga_ram_size); | |
90 | 1565 return -EINVAL; |
1566 } | |
1567 } | |
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1568 #ifdef CONFIG_DEVFS_FS |
5682 | 1569 /* |
1570 from 2.4.17/2.4.18 linux/devfs_fs_kernel.h: | |
1571 extern devfs_handle_t devfs_register (devfs_handle_t dir, const char *name, | |
1572 unsigned int flags, | |
1573 unsigned int major, unsigned int minor, | |
1574 umode_t mode, void *ops, void *info); | |
1575 */ | |
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1576 if ((dev_handle = devfs_register( |
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1577 NULL, |
5682 | 1578 "mga_vid", DEVFS_FL_NONE, |
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1579 MGA_VID_MAJOR, 0, |
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1580 S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP | S_IFCHR, |
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1581 &mga_vid_fops, NULL)) == NULL) |
5764 | 1582 { |
1583 printk(KERN_ERR "mga_vid: unable to get major: %d (devfs)\n", MGA_VID_MAJOR); | |
1584 return -EIO; | |
1585 } | |
1586 #endif | |
1 | 1587 if(register_chrdev(MGA_VID_MAJOR, "mga_vid", &mga_vid_fops)) |
1588 { | |
61 | 1589 printk(KERN_ERR "mga_vid: unable to get major: %d\n", MGA_VID_MAJOR); |
1 | 1590 return -EIO; |
1591 } | |
1592 | |
1593 if (!mga_vid_find_card()) | |
1594 { | |
61 | 1595 printk(KERN_ERR "mga_vid: no supported devices found\n"); |
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1596 #ifdef CONFIG_DEVFS_FS |
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1597 devfs_unregister(dev_handle); |
5764 | 1598 #endif |
1 | 1599 unregister_chrdev(MGA_VID_MAJOR, "mga_vid"); |
1600 return -EINVAL; | |
1601 } | |
4484 | 1602 mga_param_buff = kmalloc(PARAM_BUFF_SIZE,GFP_KERNEL); |
1603 if(mga_param_buff) mga_param_buff_size = PARAM_BUFF_SIZE; | |
1 | 1604 |
1605 return(0); | |
1606 } | |
1607 | |
1608 int init_module(void) | |
1609 { | |
1610 return mga_vid_initialize(); | |
1611 } | |
1612 | |
1613 void cleanup_module(void) | |
1614 { | |
48 | 1615 |
68 | 1616 #ifdef MGA_ALLOW_IRQ |
48 | 1617 if ( mga_irq != -1) |
1618 free_irq(mga_irq, &mga_irq); | |
68 | 1619 #endif |
48 | 1620 |
1 | 1621 if(mga_mmio_base) |
1622 iounmap(mga_mmio_base); | |
4520 | 1623 if(mga_param_buff) |
1624 kfree(mga_param_buff); | |
1 | 1625 |
1626 //FIXME turn off BES | |
63 | 1627 printk(KERN_INFO "mga_vid: Cleaning up module\n"); |
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1628 #ifdef CONFIG_DEVFS_FS |
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1629 devfs_unregister(dev_handle); |
5764 | 1630 #endif |
1 | 1631 unregister_chrdev(MGA_VID_MAJOR, "mga_vid"); |
1632 } | |
1633 |