annotate common.h @ 370:0eca28d16cbd libavcodec

clamp intra matrix to 8bit for mjpeg (workaround for qscale>=25)
author al3x
date Tue, 07 May 2002 17:55:02 +0000
parents df0736462b9f
children 48e08d9871da
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1 #ifndef COMMON_H
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2 #define COMMON_H
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3
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4 #define FFMPEG_VERSION_INT 0x000406
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5 #define FFMPEG_VERSION "0.4.6"
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6
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7 #if defined(WIN32) && !defined(__MINGW32__) && !defined(__CYGWIN__)
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8 #define CONFIG_WIN32
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9 #endif
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10
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11 //#define ALT_BITSTREAM_WRITER
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12 //#define ALIGNED_BITSTREAM_WRITER
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13 //#define ALT_BITSTREAM_READER
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14 //#define ALIGNED_BITSTREAM
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15 #define FAST_GET_FIRST_VLC
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16 //#define DUMP_STREAM // only works with the ALT_BITSTREAM_READER
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18 #ifdef HAVE_AV_CONFIG_H
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19 /* only include the following when compiling package */
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20 #include "../config.h"
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21
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22 #include <stdlib.h>
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23 #include <stdio.h>
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24 #include <string.h>
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25 #include <errno.h>
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26
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27 #ifndef ENODATA
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28 #define ENODATA 61
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29 #endif
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31 #endif
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32
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33 #ifdef CONFIG_WIN32
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34
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35 /* windows */
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36
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37 typedef unsigned short UINT16;
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38 typedef signed short INT16;
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39 typedef unsigned char UINT8;
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40 typedef unsigned int UINT32;
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41 typedef unsigned __int64 UINT64;
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42 typedef signed char INT8;
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43 typedef signed int INT32;
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44 typedef signed __int64 INT64;
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45
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46 typedef UINT8 uint8_t;
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47 typedef INT8 int8_t;
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48 typedef UINT16 uint16_t;
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49 typedef INT16 int16_t;
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50 typedef UINT32 uint32_t;
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51 typedef INT32 int32_t;
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52
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53 #ifndef __MINGW32__
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54 #define INT64_C(c) (c ## i64)
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55 #define UINT64_C(c) (c ## i64)
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56
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57 #define inline __inline
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58
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59 /*
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60 Disable warning messages:
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61 warning C4244: '=' : conversion from 'double' to 'float', possible loss of data
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62 warning C4305: 'argument' : truncation from 'const double' to 'float'
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63 */
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64 #pragma warning( disable : 4244 )
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65 #pragma warning( disable : 4305 )
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66
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67 #else
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68 #define INT64_C(c) (c ## LL)
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69 #define UINT64_C(c) (c ## ULL)
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70 #endif /* __MINGW32__ */
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71
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72 #define M_PI 3.14159265358979323846
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73 #define M_SQRT2 1.41421356237309504880 /* sqrt(2) */
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74
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75 #ifdef _DEBUG
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76 #define DEBUG
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77 #endif
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78
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79 // code from bits/byteswap.h (C) 1997, 1998 Free Software Foundation, Inc.
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80 #define bswap_32(x) \
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81 ((((x) & 0xff000000) >> 24) | (((x) & 0x00ff0000) >> 8) | \
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82 (((x) & 0x0000ff00) << 8) | (((x) & 0x000000ff) << 24))
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83 #define be2me_32(x) bswap_32(x)
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84
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85 #define snprintf _snprintf
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86
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87 #ifndef __MINGW32__
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88 /* no config.h with VC */
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89 #define CONFIG_ENCODERS 1
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90 #define CONFIG_DECODERS 1
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91 #define CONFIG_AC3 1
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92 #endif
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93
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94 #else
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95
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96 /* unix */
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97
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98 #include <inttypes.h>
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99
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100 #ifndef __WINE_WINDEF16_H
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101 /* workaround for typedef conflict in MPlayer (wine typedefs) */
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102 typedef unsigned short UINT16;
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103 typedef signed short INT16;
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104 #endif
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105
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106 typedef unsigned char UINT8;
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107 typedef unsigned int UINT32;
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108 typedef unsigned long long UINT64;
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109 typedef signed char INT8;
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110 typedef signed int INT32;
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111 typedef signed long long INT64;
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112
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113 #ifdef HAVE_AV_CONFIG_H
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114
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115 #ifdef __FreeBSD__
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116 #include <sys/param.h>
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117 #endif
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118
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119 #ifndef INT64_C
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120 #define INT64_C(c) (c ## LL)
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121 #define UINT64_C(c) (c ## ULL)
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122 #endif
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123
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124 #include "../bswap.h"
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125
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126 #ifdef USE_FASTMEMCPY
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127 #include "fastmemcpy.h"
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128 #endif
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129
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130 #endif /* HAVE_AV_CONFIG_H */
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131
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132 #endif /* !CONFIG_WIN32 */
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133
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135 /* debug stuff */
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136 #ifdef HAVE_AV_CONFIG_H
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137
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138 #ifndef DEBUG
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139 #define NDEBUG
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140 #endif
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141 #include <assert.h>
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142
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143 /* dprintf macros */
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144 #if defined(CONFIG_WIN32) && !defined(__MINGW32__)
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145
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146 inline void dprintf(const char* fmt,...) {}
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147
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148 #else
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149
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150 #ifdef DEBUG
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151 #define dprintf(fmt,args...) printf(fmt, ## args)
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152 #else
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153 #define dprintf(fmt,args...)
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154 #endif
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155
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156 #endif /* !CONFIG_WIN32 */
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157
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158 #endif /* HAVE_AV_CONFIG_H */
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159
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160 /* assume b>0 */
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161 #define ROUNDED_DIV(a,b) (((a)>0 ? (a) + ((b)>>1) : (a) - ((b)>>1))/(b))
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162 #define ABS(a) ((a) >= 0 ? (a) : (-(a)))
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163
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164 /* bit output */
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165
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166 struct PutBitContext;
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167
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168 typedef void (*WriteDataFunc)(void *, UINT8 *, int);
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169
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170 typedef struct PutBitContext {
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171 #ifdef ALT_BITSTREAM_WRITER
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172 UINT8 *buf, *buf_end;
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173 int index;
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174 #else
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175 UINT32 bit_buf;
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176 int bit_left;
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177 UINT8 *buf, *buf_ptr, *buf_end;
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178 #endif
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179 INT64 data_out_size; /* in bytes */
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180 } PutBitContext;
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181
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182 void init_put_bits(PutBitContext *s,
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183 UINT8 *buffer, int buffer_size,
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184 void *opaque,
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185 void (*write_data)(void *, UINT8 *, int));
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186
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187 INT64 get_bit_count(PutBitContext *s); /* XXX: change function name */
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188 void align_put_bits(PutBitContext *s);
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189 void flush_put_bits(PutBitContext *s);
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190 void put_string(PutBitContext * pbc, char *s);
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191
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192 /* jpeg specific put_bits */
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193 void jflush_put_bits(PutBitContext *s);
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194
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195 /* bit input */
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196
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197 typedef struct GetBitContext {
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198 #ifdef ALT_BITSTREAM_READER
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199 int index;
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200 UINT8 *buffer;
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201 #else
20
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202 UINT32 bit_buf;
0
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203 int bit_cnt;
20
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204 UINT8 *buf, *buf_ptr, *buf_end;
192
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205 #endif
277
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206 int size;
0
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207 } GetBitContext;
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208
290
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209 static inline int get_bits_count(GetBitContext *s);
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210
0
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211 typedef struct VLC {
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212 int bits;
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213 INT16 *table_codes;
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214 INT8 *table_bits;
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215 int table_size, table_allocated;
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216 } VLC;
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217
193
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218 /* used to avoid missaligned exceptions on some archs (alpha, ...) */
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219 #ifdef ARCH_X86
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220 #define unaligned32(a) (*(UINT32*)(a))
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221 #else
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222 #ifdef __GNUC__
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223 static inline uint32_t unaligned32(const void *v) {
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224 struct Unaligned {
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225 uint32_t i;
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226 } __attribute__((packed));
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227
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228 return ((const struct Unaligned *) v)->i;
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229 }
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230 #elif defined(__DECC)
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231 static inline uint32_t unaligned32(const void *v) {
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232 return *(const __unaligned uint32_t *) v;
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233 }
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234 #else
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235 static inline uint32_t unaligned32(const void *v) {
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236 return *(const uint32_t *) v;
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237 }
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238 #endif
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239 #endif //!ARCH_X86
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240
238
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241 #ifndef ALT_BITSTREAM_WRITER
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242 static inline void put_bits(PutBitContext *s, int n, unsigned int value)
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243 {
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244 unsigned int bit_buf;
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245 int bit_left;
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246
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247 #ifdef STATS
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248 st_out_bit_counts[st_current_index] += n;
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249 #endif
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250 // printf("put_bits=%d %x\n", n, value);
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251 assert(n == 32 || value < (1U << n));
306
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252
238
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253 bit_buf = s->bit_buf;
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254 bit_left = s->bit_left;
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255
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256 // printf("n=%d value=%x cnt=%d buf=%x\n", n, value, bit_cnt, bit_buf);
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257 /* XXX: optimize */
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258 if (n < bit_left) {
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259 bit_buf = (bit_buf<<n) | value;
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260 bit_left-=n;
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261 } else {
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262 bit_buf<<=bit_left;
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263 bit_buf |= value >> (n - bit_left);
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264 *(UINT32 *)s->buf_ptr = be2me_32(bit_buf);
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265 //printf("bitbuf = %08x\n", bit_buf);
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266 s->buf_ptr+=4;
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267 bit_left+=32 - n;
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268 bit_buf = value;
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269 }
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270
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271 s->bit_buf = bit_buf;
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272 s->bit_left = bit_left;
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273 }
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274 #endif
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275
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276
234
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277 #ifdef ALT_BITSTREAM_WRITER
235
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278 static inline void put_bits(PutBitContext *s, int n, unsigned int value)
234
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279 {
235
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280 #ifdef ALIGNED_BITSTREAM_WRITER
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281 #ifdef ARCH_X86
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282 asm volatile(
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283 "movl %0, %%ecx \n\t"
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284 "xorl %%eax, %%eax \n\t"
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285 "shrdl %%cl, %1, %%eax \n\t"
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286 "shrl %%cl, %1 \n\t"
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287 "movl %0, %%ecx \n\t"
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288 "shrl $3, %%ecx \n\t"
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289 "andl $0xFFFFFFFC, %%ecx \n\t"
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290 "bswapl %1 \n\t"
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291 "orl %1, (%2, %%ecx) \n\t"
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292 "bswapl %%eax \n\t"
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293 "addl %3, %0 \n\t"
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294 "movl %%eax, 4(%2, %%ecx) \n\t"
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295 : "=&r" (s->index), "=&r" (value)
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296 : "r" (s->buf), "r" (n), "0" (s->index), "1" (value<<(-n))
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297 : "%eax", "%ecx"
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298 );
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299 #else
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300 int index= s->index;
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301 uint32_t *ptr= ((uint32_t *)s->buf)+(index>>5);
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302
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303 value<<= 32-n;
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304
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305 ptr[0] |= be2me_32(value>>(index&31));
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306 ptr[1] = be2me_32(value<<(32-(index&31)));
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307 //if(n>24) printf("%d %d\n", n, value);
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308 index+= n;
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309 s->index= index;
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310 #endif
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311 #else //ALIGNED_BITSTREAM_WRITER
234
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312 #ifdef ARCH_X86
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313 asm volatile(
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314 "movl $7, %%ecx \n\t"
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315 "andl %0, %%ecx \n\t"
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316 "addl %3, %%ecx \n\t"
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317 "negl %%ecx \n\t"
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318 "shll %%cl, %1 \n\t"
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319 "bswapl %1 \n\t"
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320 "movl %0, %%ecx \n\t"
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diff changeset
321 "shrl $3, %%ecx \n\t"
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322 "orl %1, (%%ecx, %2) \n\t"
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diff changeset
323 "addl %3, %0 \n\t"
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324 "movl $0, 4(%%ecx, %2) \n\t"
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325 : "=&r" (s->index), "=&r" (value)
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326 : "r" (s->buf), "r" (n), "0" (s->index), "1" (value)
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327 : "%ecx"
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328 );
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329 #else
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330 int index= s->index;
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331 uint32_t *ptr= (uint32_t*)(((uint8_t *)s->buf)+(index>>3));
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diff changeset
332
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parents: 213
diff changeset
333 ptr[0] |= be2me_32(value<<(32-n-(index&7) ));
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
334 ptr[1] = 0;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
335 //if(n>24) printf("%d %d\n", n, value);
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
336 index+= n;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
337 s->index= index;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
338 #endif
235
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
339 #endif //!ALIGNED_BITSTREAM_WRITER
234
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
340 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
341 #endif
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
342
238
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
343 #ifndef ALT_BITSTREAM_WRITER
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
344 /* for jpeg : escape 0xff with 0x00 after it */
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
345 static inline void jput_bits(PutBitContext *s, int n, unsigned int value)
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
346 {
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
347 unsigned int bit_buf, b;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
348 int bit_left, i;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
349
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
350 assert(n == 32 || value < (1U << n));
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
351
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
352 bit_buf = s->bit_buf;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
353 bit_left = s->bit_left;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
354
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
355 //printf("n=%d value=%x cnt=%d buf=%x\n", n, value, bit_cnt, bit_buf);
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
356 /* XXX: optimize */
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
357 if (n < bit_left) {
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
358 bit_buf = (bit_buf<<n) | value;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
359 bit_left-=n;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
360 } else {
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
361 bit_buf<<=bit_left;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
362 bit_buf |= value >> (n - bit_left);
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
363 /* handle escape */
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
364 for(i=0;i<4;i++) {
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
365 b = (bit_buf >> 24);
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
366 *(s->buf_ptr++) = b;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
367 if (b == 0xff)
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
368 *(s->buf_ptr++) = 0;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
369 bit_buf <<= 8;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
370 }
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
371
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
372 bit_left+= 32 - n;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
373 bit_buf = value;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
374 }
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
375
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
376 s->bit_buf = bit_buf;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
377 s->bit_left = bit_left;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
378 }
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
379 #endif
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
380
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
381
234
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
382 #ifdef ALT_BITSTREAM_WRITER
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
383 static inline void jput_bits(PutBitContext *s, int n, int value)
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
384 {
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
385 int index= s->index;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
386 uint32_t *ptr= (uint32_t*)(((uint8_t *)s->buf)+(index>>3));
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
387 int v= ptr[0];
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
388 //if(n>24) printf("%d %d\n", n, value);
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
389
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
390 v |= be2me_32(value<<(32-n-(index&7) ));
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
391 if(((v+0x01010101)^0xFFFFFFFF)&v&0x80808080)
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
392 {
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
393 /* handle idiotic (m)jpeg escapes */
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
394 uint8_t *bPtr= (uint8_t*)ptr;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
395 int numChecked= ((index+n)>>3) - (index>>3);
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
396
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
397 v= be2me_32(v);
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
398
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
399 *(bPtr++)= v>>24;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
400 if((v&0xFF000000)==0xFF000000 && numChecked>0){
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
401 *(bPtr++)= 0x00;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
402 index+=8;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
403 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
404 *(bPtr++)= (v>>16)&0xFF;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
405 if((v&0x00FF0000)==0x00FF0000 && numChecked>1){
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
406 *(bPtr++)= 0x00;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
407 index+=8;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
408 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
409 *(bPtr++)= (v>>8)&0xFF;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
410 if((v&0x0000FF00)==0x0000FF00 && numChecked>2){
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
411 *(bPtr++)= 0x00;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
412 index+=8;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
413 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
414 *(bPtr++)= v&0xFF;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
415 if((v&0x000000FF)==0x000000FF && numChecked>3){
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
416 *(bPtr++)= 0x00;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
417 index+=8;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
418 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
419 *((uint32_t*)bPtr)= 0;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
420 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
421 else
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
422 {
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
423 ptr[0] = v;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
424 ptr[1] = 0;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
425 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
426
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
427 index+= n;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
428 s->index= index;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
429 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
430 #endif
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
431
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
432
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
433 static inline uint8_t* pbBufPtr(PutBitContext *s)
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
434 {
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
435 #ifdef ALT_BITSTREAM_WRITER
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
436 return s->buf + (s->index>>3);
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
437 #else
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
438 return s->buf_ptr;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
439 #endif
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
440 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
441
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
442 void init_get_bits(GetBitContext *s,
986e461dc072 Initial revision
glantau
parents:
diff changeset
443 UINT8 *buffer, int buffer_size);
986e461dc072 Initial revision
glantau
parents:
diff changeset
444
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
445 #ifndef ALT_BITSTREAM_READER
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
446 unsigned int get_bits_long(GetBitContext *s, int n);
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
447 unsigned int show_bits_long(GetBitContext *s, int n);
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
448 #endif
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
449
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
450 static inline unsigned int get_bits(GetBitContext *s, int n){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
451 #ifdef ALT_BITSTREAM_READER
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
452 #ifdef ALIGNED_BITSTREAM
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
453 int index= s->index;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
454 uint32_t result1= be2me_32( ((uint32_t *)s->buffer)[index>>5] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
455 uint32_t result2= be2me_32( ((uint32_t *)s->buffer)[(index>>5) + 1] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
456 #ifdef ARCH_X86
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
457 asm ("shldl %%cl, %2, %0\n\t"
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
458 : "=r" (result1)
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
459 : "0" (result1), "r" (result2), "c" (index));
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
460 #else
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
461 result1<<= (index&0x1F);
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
462 result2= (result2>>1) >> (31-(index&0x1F));
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
463 result1|= result2;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
464 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
465 result1>>= 32 - n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
466 index+= n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
467 s->index= index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
468
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
469 return result1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
470 #else //ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
471 int index= s->index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
472 uint32_t result= be2me_32( unaligned32( ((uint8_t *)s->buffer)+(index>>3) ) );
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
473
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
474 result<<= (index&0x07);
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
475 result>>= 32 - n;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
476 index+= n;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
477 s->index= index;
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
478 #ifdef DUMP_STREAM
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
479 while(n){
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
480 printf("%d", (result>>(n-1))&1);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
481 n--;
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
482 }
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
483 printf(" ");
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
484 #endif
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
485 return result;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
486 #endif //!ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
487 #else //ALT_BITSTREAM_READER
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
488 if(s->bit_cnt>=n){
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
489 /* most common case here */
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
490 unsigned int val = s->bit_buf >> (32 - n);
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
491 s->bit_buf <<= n;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
492 s->bit_cnt -= n;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
493 #ifdef STATS
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
494 st_bit_counts[st_current_index] += n;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
495 #endif
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
496 return val;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
497 }
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
498 return get_bits_long(s,n);
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
499 #endif //!ALT_BITSTREAM_READER
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
500 }
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
501
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
502 static inline unsigned int get_bits1(GetBitContext *s){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
503 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
504 int index= s->index;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
505 uint8_t result= s->buffer[ index>>3 ];
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
506 result<<= (index&0x07);
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
507 result>>= 8 - 1;
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
508 index++;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
509 s->index= index;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
510
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
511 #ifdef DUMP_STREAM
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
512 printf("%d ", result);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
513 #endif
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
514 return result;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
515 #else
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
516 if(s->bit_cnt>0){
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
517 /* most common case here */
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
518 unsigned int val = s->bit_buf >> 31;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
519 s->bit_buf <<= 1;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
520 s->bit_cnt--;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
521 #ifdef STATS
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
522 st_bit_counts[st_current_index]++;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
523 #endif
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
524 return val;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
525 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
526 return get_bits_long(s,1);
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
527 #endif
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
528 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
529
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
530 /* This function is identical to get_bits(), the only */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
531 /* diference is that it doesn't touch the buffer */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
532 /* it is usefull to see the buffer. */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
533 static inline unsigned int show_bits(GetBitContext *s, int n)
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
534 {
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
535 #ifdef ALT_BITSTREAM_READER
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
536 #ifdef ALIGNED_BITSTREAM
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
537 int index= s->index;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
538 uint32_t result1= be2me_32( ((uint32_t *)s->buffer)[index>>5] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
539 uint32_t result2= be2me_32( ((uint32_t *)s->buffer)[(index>>5) + 1] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
540 #ifdef ARCH_X86
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
541 asm ("shldl %%cl, %2, %0\n\t"
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
542 : "=r" (result1)
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
543 : "0" (result1), "r" (result2), "c" (index));
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
544 #else
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
545 result1<<= (index&0x1F);
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
546 result2= (result2>>1) >> (31-(index&0x1F));
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
547 result1|= result2;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
548 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
549 result1>>= 32 - n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
550
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
551 return result1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
552 #else //ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
553 int index= s->index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
554 uint32_t result= be2me_32( unaligned32( ((uint8_t *)s->buffer)+(index>>3) ) );
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
555
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
556 result<<= (index&0x07);
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
557 result>>= 32 - n;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
558
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
559 return result;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
560 #endif //!ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
561 #else //ALT_BITSTREAM_READER
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
562 if(s->bit_cnt>=n) {
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
563 /* most common case here */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
564 unsigned int val = s->bit_buf >> (32 - n);
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
565 return val;
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
566 }
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
567 return show_bits_long(s,n);
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
568 #endif //!ALT_BITSTREAM_READER
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
569 }
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
570
290
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
571 static inline int show_aligned_bits(GetBitContext *s, int offset, int n)
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
572 {
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
573 #ifdef ALT_BITSTREAM_READER
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
574 #ifdef ALIGNED_BITSTREAM
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
575 int index= (s->index + offset + 7)&(~7);
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
576 uint32_t result1= be2me_32( ((uint32_t *)s->buffer)[index>>5] );
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
577 uint32_t result2= be2me_32( ((uint32_t *)s->buffer)[(index>>5) + 1] );
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
578 #ifdef ARCH_X86
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
579 asm ("shldl %%cl, %2, %0\n\t"
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
580 : "=r" (result1)
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
581 : "0" (result1), "r" (result2), "c" (index));
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
582 #else
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
583 result1<<= (index&0x1F);
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
584 result2= (result2>>1) >> (31-(index&0x1F));
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
585 result1|= result2;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
586 #endif
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
587 result1>>= 32 - n;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
588
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
589 return result1;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
590 #else //ALIGNED_BITSTREAM
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
591 int index= (s->index + offset + 7)>>3;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
592 uint32_t result= be2me_32( unaligned32( ((uint8_t *)s->buffer)+index ) );
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
593
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
594 result>>= 32 - n;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
595
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
596 return result;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
597 #endif //!ALIGNED_BITSTREAM
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
598 #else //ALT_BITSTREAM_READER
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
599 int index= (get_bits_count(s) + offset + 7)>>3;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
600 uint32_t result= be2me_32( unaligned32( ((uint8_t *)s->buf)+index ) );
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
601
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
602 result>>= 32 - n;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
603 //printf(" %X %X %d \n", (int)(((uint8_t *)s->buf)+index ), (int)s->buf_ptr, s->bit_cnt);
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
604 return result;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
605 #endif //!ALT_BITSTREAM_READER
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
606 }
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
607
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
608 static inline void skip_bits(GetBitContext *s, int n){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
609 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
610 s->index+= n;
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
611 #ifdef DUMP_STREAM
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
612 {
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
613 int result;
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
614 s->index-= n;
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
615 result= get_bits(s, n);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
616 }
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
617 #endif
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
618
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
619 #else
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
620 if(s->bit_cnt>=n){
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
621 /* most common case here */
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
622 s->bit_buf <<= n;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
623 s->bit_cnt -= n;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
624 #ifdef STATS
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
625 st_bit_counts[st_current_index] += n;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
626 #endif
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
627 } else {
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
628 get_bits_long(s,n);
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
629 }
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
630 #endif
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
631 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
632
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
633 static inline void skip_bits1(GetBitContext *s){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
634 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
635 s->index++;
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
636 #ifdef DUMP_STREAM
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
637 s->index--;
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
638 printf("%d ", get_bits1(s));
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
639 #endif
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
640 #else
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
641 if(s->bit_cnt>0){
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
642 /* most common case here */
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
643 s->bit_buf <<= 1;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
644 s->bit_cnt--;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
645 #ifdef STATS
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
646 st_bit_counts[st_current_index]++;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
647 #endif
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
648 } else {
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
649 get_bits_long(s,1);
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
650 }
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
651 #endif
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
652 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
653
85
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
654 static inline int get_bits_count(GetBitContext *s)
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
655 {
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
656 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
657 return s->index;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
658 #else
85
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
659 return (s->buf_ptr - s->buf) * 8 - s->bit_cnt;
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
660 #endif
85
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
661 }
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
662
264
28c5c62b1c4c support decoding (with mplayer) of 3 .mp4 files from mphq
michaelni
parents: 238
diff changeset
663 int check_marker(GetBitContext *s, char *msg);
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
664 void align_get_bits(GetBitContext *s);
986e461dc072 Initial revision
glantau
parents:
diff changeset
665 int init_vlc(VLC *vlc, int nb_bits, int nb_codes,
986e461dc072 Initial revision
glantau
parents:
diff changeset
666 const void *bits, int bits_wrap, int bits_size,
986e461dc072 Initial revision
glantau
parents:
diff changeset
667 const void *codes, int codes_wrap, int codes_size);
986e461dc072 Initial revision
glantau
parents:
diff changeset
668 void free_vlc(VLC *vlc);
986e461dc072 Initial revision
glantau
parents:
diff changeset
669
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
670 #ifdef ALT_BITSTREAM_READER
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
671 #ifdef ALIGNED_BITSTREAM
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
672 #ifdef ARCH_X86
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
673 #define SHOW_BITS(s, val, n) \
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
674 val= be2me_32( ((uint32_t *)(s)->buffer)[bit_cnt>>5] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
675 {uint32_t result2= be2me_32( ((uint32_t *)(s)->buffer)[(bit_cnt>>5) + 1] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
676 asm ("shldl %%cl, %2, %0\n\t"\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
677 : "=r" (val)\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
678 : "0" (val), "r" (result2), "c" (bit_cnt));\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
679 ((uint32_t)val)>>= 32 - n;}
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
680 #else //ARCH_X86
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
681 #define SHOW_BITS(s, val, n) \
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
682 val= be2me_32( ((uint32_t *)(s)->buffer)[bit_cnt>>5] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
683 {uint32_t result2= be2me_32( ((uint32_t *)(s)->buffer)[(bit_cnt>>5) + 1] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
684 val<<= (bit_cnt&0x1F);\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
685 result2= (result2>>1) >> (31-(bit_cnt&0x1F));\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
686 val|= result2;\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
687 ((uint32_t)val)>>= 32 - n;}
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
688 #endif //!ARCH_X86
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
689 #else //ALIGNED_BITSTREAM
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
690 #define SHOW_BITS(s, val, n) \
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
691 val= be2me_32( unaligned32( ((uint8_t *)(s)->buffer)+(bit_cnt>>3) ) );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
692 val<<= (bit_cnt&0x07);\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
693 ((uint32_t)val)>>= 32 - n;
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
694 #endif // !ALIGNED_BITSTREAM
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
695 #define FLUSH_BITS(n) bit_cnt+=n;
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
696 #define SAVE_BITS(s) bit_cnt= (s)->index;
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
697 #define RESTORE_BITS(s) (s)->index= bit_cnt;
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
698 #else
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
699
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
700 /* macro to go faster */
986e461dc072 Initial revision
glantau
parents:
diff changeset
701 /* n must be <= 24 */
986e461dc072 Initial revision
glantau
parents:
diff changeset
702 /* XXX: optimize buffer end test */
986e461dc072 Initial revision
glantau
parents:
diff changeset
703 #define SHOW_BITS(s, val, n)\
986e461dc072 Initial revision
glantau
parents:
diff changeset
704 {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
705 if (bit_cnt < n && buf_ptr < (s)->buf_end) {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
706 bit_buf |= *buf_ptr++ << (24 - bit_cnt);\
986e461dc072 Initial revision
glantau
parents:
diff changeset
707 bit_cnt += 8;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
708 if (bit_cnt < n && buf_ptr < (s)->buf_end) {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
709 bit_buf |= *buf_ptr++ << (24 - bit_cnt);\
986e461dc072 Initial revision
glantau
parents:
diff changeset
710 bit_cnt += 8;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
711 if (bit_cnt < n && buf_ptr < (s)->buf_end) {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
712 bit_buf |= *buf_ptr++ << (24 - bit_cnt);\
986e461dc072 Initial revision
glantau
parents:
diff changeset
713 bit_cnt += 8;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
714 }\
986e461dc072 Initial revision
glantau
parents:
diff changeset
715 }\
986e461dc072 Initial revision
glantau
parents:
diff changeset
716 }\
986e461dc072 Initial revision
glantau
parents:
diff changeset
717 val = bit_buf >> (32 - n);\
986e461dc072 Initial revision
glantau
parents:
diff changeset
718 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
719
986e461dc072 Initial revision
glantau
parents:
diff changeset
720 /* SHOW_BITS with n1 >= n must be been done before */
986e461dc072 Initial revision
glantau
parents:
diff changeset
721 #define FLUSH_BITS(n)\
986e461dc072 Initial revision
glantau
parents:
diff changeset
722 {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
723 bit_buf <<= n;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
724 bit_cnt -= n;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
725 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
726
986e461dc072 Initial revision
glantau
parents:
diff changeset
727 #define SAVE_BITS(s) \
986e461dc072 Initial revision
glantau
parents:
diff changeset
728 {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
729 bit_cnt = (s)->bit_cnt;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
730 bit_buf = (s)->bit_buf;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
731 buf_ptr = (s)->buf_ptr;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
732 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
733
986e461dc072 Initial revision
glantau
parents:
diff changeset
734 #define RESTORE_BITS(s) \
986e461dc072 Initial revision
glantau
parents:
diff changeset
735 {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
736 (s)->buf_ptr = buf_ptr;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
737 (s)->bit_buf = bit_buf;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
738 (s)->bit_cnt = bit_cnt;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
739 }
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
740 #endif // !ALT_BITSTREAM_READER
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
741
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
742 static inline int get_vlc(GetBitContext *s, VLC *vlc)
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
743 {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
744 int code, n, nb_bits, index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
745 INT16 *table_codes;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
746 INT8 *table_bits;
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
747 int bit_cnt;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
748 #ifndef ALT_BITSTREAM_READER
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
749 UINT32 bit_buf;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
750 UINT8 *buf_ptr;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
751 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
752
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
753 SAVE_BITS(s);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
754 nb_bits = vlc->bits;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
755 table_codes = vlc->table_codes;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
756 table_bits = vlc->table_bits;
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
757
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
758 #ifdef FAST_GET_FIRST_VLC
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
759 SHOW_BITS(s, index, nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
760 code = table_codes[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
761 n = table_bits[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
762 if (n > 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
763 /* most common case (90%)*/
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
764 FLUSH_BITS(n);
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
765 #ifdef DUMP_STREAM
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
766 {
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
767 int n= bit_cnt - s->index;
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
768 skip_bits(s, n);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
769 RESTORE_BITS(s);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
770 }
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
771 #endif
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
772 RESTORE_BITS(s);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
773 return code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
774 } else if (n == 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
775 return -1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
776 } else {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
777 FLUSH_BITS(nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
778 nb_bits = -n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
779 table_codes = vlc->table_codes + code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
780 table_bits = vlc->table_bits + code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
781 }
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
782 #endif
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
783 for(;;) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
784 SHOW_BITS(s, index, nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
785 code = table_codes[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
786 n = table_bits[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
787 if (n > 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
788 /* most common case */
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
789 FLUSH_BITS(n);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
790 #ifdef STATS
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
791 st_bit_counts[st_current_index] += n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
792 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
793 break;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
794 } else if (n == 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
795 return -1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
796 } else {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
797 FLUSH_BITS(nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
798 #ifdef STATS
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
799 st_bit_counts[st_current_index] += nb_bits;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
800 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
801 nb_bits = -n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
802 table_codes = vlc->table_codes + code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
803 table_bits = vlc->table_bits + code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
804 }
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
805 }
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
806 #ifdef DUMP_STREAM
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
807 {
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
808 int n= bit_cnt - s->index;
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
809 skip_bits(s, n);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
810 RESTORE_BITS(s);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
811 }
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
812 #endif
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
813 RESTORE_BITS(s);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
814 return code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
815 }
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
816
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
817
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
818 /* define it to include statistics code (useful only for optimizing
986e461dc072 Initial revision
glantau
parents:
diff changeset
819 codec efficiency */
986e461dc072 Initial revision
glantau
parents:
diff changeset
820 //#define STATS
986e461dc072 Initial revision
glantau
parents:
diff changeset
821
986e461dc072 Initial revision
glantau
parents:
diff changeset
822 #ifdef STATS
986e461dc072 Initial revision
glantau
parents:
diff changeset
823
986e461dc072 Initial revision
glantau
parents:
diff changeset
824 enum {
986e461dc072 Initial revision
glantau
parents:
diff changeset
825 ST_UNKNOWN,
986e461dc072 Initial revision
glantau
parents:
diff changeset
826 ST_DC,
986e461dc072 Initial revision
glantau
parents:
diff changeset
827 ST_INTRA_AC,
986e461dc072 Initial revision
glantau
parents:
diff changeset
828 ST_INTER_AC,
986e461dc072 Initial revision
glantau
parents:
diff changeset
829 ST_INTRA_MB,
986e461dc072 Initial revision
glantau
parents:
diff changeset
830 ST_INTER_MB,
986e461dc072 Initial revision
glantau
parents:
diff changeset
831 ST_MV,
986e461dc072 Initial revision
glantau
parents:
diff changeset
832 ST_NB,
986e461dc072 Initial revision
glantau
parents:
diff changeset
833 };
986e461dc072 Initial revision
glantau
parents:
diff changeset
834
986e461dc072 Initial revision
glantau
parents:
diff changeset
835 extern int st_current_index;
986e461dc072 Initial revision
glantau
parents:
diff changeset
836 extern unsigned int st_bit_counts[ST_NB];
986e461dc072 Initial revision
glantau
parents:
diff changeset
837 extern unsigned int st_out_bit_counts[ST_NB];
986e461dc072 Initial revision
glantau
parents:
diff changeset
838
986e461dc072 Initial revision
glantau
parents:
diff changeset
839 void print_stats(void);
986e461dc072 Initial revision
glantau
parents:
diff changeset
840 #endif
986e461dc072 Initial revision
glantau
parents:
diff changeset
841
986e461dc072 Initial revision
glantau
parents:
diff changeset
842 /* misc math functions */
986e461dc072 Initial revision
glantau
parents:
diff changeset
843
151
ae0516eadae2 fixed gcc-3.0.x compilation (by Michael Niedermayer)
nickols_k
parents: 144
diff changeset
844 static inline int av_log2(unsigned int v)
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
845 {
986e461dc072 Initial revision
glantau
parents:
diff changeset
846 int n;
986e461dc072 Initial revision
glantau
parents:
diff changeset
847
986e461dc072 Initial revision
glantau
parents:
diff changeset
848 n = 0;
986e461dc072 Initial revision
glantau
parents:
diff changeset
849 if (v & 0xffff0000) {
986e461dc072 Initial revision
glantau
parents:
diff changeset
850 v >>= 16;
986e461dc072 Initial revision
glantau
parents:
diff changeset
851 n += 16;
986e461dc072 Initial revision
glantau
parents:
diff changeset
852 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
853 if (v & 0xff00) {
986e461dc072 Initial revision
glantau
parents:
diff changeset
854 v >>= 8;
986e461dc072 Initial revision
glantau
parents:
diff changeset
855 n += 8;
986e461dc072 Initial revision
glantau
parents:
diff changeset
856 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
857 if (v & 0xf0) {
986e461dc072 Initial revision
glantau
parents:
diff changeset
858 v >>= 4;
986e461dc072 Initial revision
glantau
parents:
diff changeset
859 n += 4;
986e461dc072 Initial revision
glantau
parents:
diff changeset
860 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
861 if (v & 0xc) {
986e461dc072 Initial revision
glantau
parents:
diff changeset
862 v >>= 2;
986e461dc072 Initial revision
glantau
parents:
diff changeset
863 n += 2;
986e461dc072 Initial revision
glantau
parents:
diff changeset
864 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
865 if (v & 0x2) {
986e461dc072 Initial revision
glantau
parents:
diff changeset
866 n++;
986e461dc072 Initial revision
glantau
parents:
diff changeset
867 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
868 return n;
986e461dc072 Initial revision
glantau
parents:
diff changeset
869 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
870
277
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
871 /* median of 3 */
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
872 static inline int mid_pred(int a, int b, int c)
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
873 {
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
874 int vmin, vmax;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
875 vmax = vmin = a;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
876 if (b < vmin)
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
877 vmin = b;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
878 else
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
879 vmax = b;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
880
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
881 if (c < vmin)
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
882 vmin = c;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
883 else if (c > vmax)
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
884 vmax = c;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
885
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
886 return a + b + c - vmin - vmax;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
887 }
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
888
327
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
889 static inline int clip(int a, int amin, int amax)
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
890 {
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
891 if (a < amin)
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
892 return amin;
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
893 else if (a > amax)
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
894 return amax;
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
895 else
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
896 return a;
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
897 }
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
898
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
899 /* memory */
986e461dc072 Initial revision
glantau
parents:
diff changeset
900 void *av_mallocz(int size);
986e461dc072 Initial revision
glantau
parents:
diff changeset
901
324
9c6f056f0e41 fixed mpeg4 time stuff on encoding
michaelni
parents: 306
diff changeset
902 /* math */
9c6f056f0e41 fixed mpeg4 time stuff on encoding
michaelni
parents: 306
diff changeset
903 int ff_gcd(int a, int b);
9c6f056f0e41 fixed mpeg4 time stuff on encoding
michaelni
parents: 306
diff changeset
904
370
0eca28d16cbd clamp intra matrix to 8bit for mjpeg (workaround for qscale>=25)
al3x
parents: 359
diff changeset
905 #define CLAMP_TO_8BIT(d) ((d > 0xff) ? 0xff : (d < 0) ? 0 : d)
0eca28d16cbd clamp intra matrix to 8bit for mjpeg (workaround for qscale>=25)
al3x
parents: 359
diff changeset
906
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
907 #endif