Mercurial > mplayer.hg
annotate vidix/drivers/mach64_vid.c @ 4861:601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
wrong vertical scaling fixed if video expansion on rage mobility like "cards"
author | michael |
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date | Mon, 25 Feb 2002 14:21:26 +0000 |
parents | 2853640cea58 |
children | 8a5f63217419 |
rev | line source |
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4691 | 1 /* |
2 mach64_vid - VIDIX based video driver for Mach64 and 3DRage chips | |
3 Copyrights 2002 Nick Kurshev. This file is based on sources from | |
4 GATOS (gatos.sf.net) and X11 (www.xfree86.org) | |
5 Licence: GPL | |
4721 | 6 WARNING: THIS DRIVER IS IN BETTA STAGE AND DOESN'T WORK WITH PLANAR FOURCCS! |
4691 | 7 */ |
8 #include <errno.h> | |
9 #include <stdio.h> | |
10 #include <stdlib.h> | |
11 #include <string.h> | |
12 #include <math.h> | |
13 #include <inttypes.h> | |
14 #include <fcntl.h> | |
15 | |
16 #include "../vidix.h" | |
17 #include "../fourcc.h" | |
18 #include "../../libdha/libdha.h" | |
19 #include "../../libdha/pci_ids.h" | |
20 #include "../../libdha/pci_names.h" | |
21 | |
22 #include "mach64.h" | |
23 | |
24 #define UNUSED(x) ((void)(x)) /**< Removes warning about unused arguments */ | |
25 | |
26 static void *mach64_mmio_base = 0; | |
27 static void *mach64_mem_base = 0; | |
4721 | 28 static int32_t mach64_overlay_offset = 0; |
4691 | 29 static uint32_t mach64_ram_size = 0; |
30 | |
31 pciinfo_t pci_info; | |
32 static int probed = 0; | |
33 static int __verbose = 0; | |
4721 | 34 |
4758 | 35 #define VERBOSE_LEVEL 1 |
36 | |
4721 | 37 typedef struct bes_registers_s |
38 { | |
39 /* base address of yuv framebuffer */ | |
40 uint32_t yuv_base; | |
41 uint32_t fourcc; | |
42 /* YUV BES registers */ | |
43 uint32_t reg_load_cntl; | |
44 uint32_t scale_inc; | |
45 uint32_t y_x_start; | |
46 uint32_t y_x_end; | |
47 uint32_t vid_buf_pitch; | |
48 uint32_t height_width; | |
49 uint32_t vid_buf0_base_adrs; | |
50 uint32_t vid_buf1_base_adrs; | |
51 uint32_t vid_buf2_base_adrs; | |
52 uint32_t vid_buf3_base_adrs; | |
53 uint32_t vid_buf4_base_adrs; | |
54 uint32_t vid_buf5_base_adrs; | |
55 | |
56 uint32_t scale_cntl; | |
57 uint32_t exclusive_horz; | |
58 uint32_t auto_flip_cntl; | |
59 uint32_t filter_cntl; | |
60 uint32_t key_cntl; | |
61 uint32_t test; | |
62 /* Configurable stuff */ | |
63 int double_buff; | |
64 | |
65 int brightness; | |
66 int saturation; | |
67 | |
68 int ckey_on; | |
69 uint32_t graphics_key_clr; | |
70 uint32_t graphics_key_msk; | |
71 | |
72 int deinterlace_on; | |
73 uint32_t deinterlace_pattern; | |
74 | |
75 } bes_registers_t; | |
76 | |
77 static bes_registers_t besr; | |
78 | |
79 typedef struct video_registers_s | |
80 { | |
81 const char * sname; | |
82 uint32_t name; | |
83 uint32_t value; | |
84 }video_registers_t; | |
85 | |
86 static bes_registers_t besr; | |
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87 |
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88 /* Graphic keys */ |
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89 static vidix_grkey_t mach64_grkey; |
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90 |
4721 | 91 #define DECLARE_VREG(name) { #name, name, 0 } |
92 static video_registers_t vregs[] = | |
93 { | |
94 DECLARE_VREG(OVERLAY_SCALE_INC), | |
95 DECLARE_VREG(OVERLAY_Y_X_START), | |
96 DECLARE_VREG(OVERLAY_Y_X_END), | |
97 DECLARE_VREG(OVERLAY_SCALE_CNTL), | |
98 DECLARE_VREG(OVERLAY_EXCLUSIVE_HORZ), | |
99 DECLARE_VREG(OVERLAY_EXCLUSIVE_VERT), | |
100 DECLARE_VREG(OVERLAY_TEST), | |
101 DECLARE_VREG(SCALER_BUF_PITCH), | |
102 DECLARE_VREG(SCALER_HEIGHT_WIDTH), | |
103 DECLARE_VREG(SCALER_BUF0_OFFSET), | |
104 DECLARE_VREG(SCALER_BUF0_OFFSET_U), | |
105 DECLARE_VREG(SCALER_BUF0_OFFSET_V), | |
106 DECLARE_VREG(SCALER_BUF1_OFFSET), | |
107 DECLARE_VREG(SCALER_BUF1_OFFSET_U), | |
108 DECLARE_VREG(SCALER_BUF1_OFFSET_V), | |
109 DECLARE_VREG(SCALER_H_COEFF0), | |
110 DECLARE_VREG(SCALER_H_COEFF1), | |
111 DECLARE_VREG(SCALER_H_COEFF2), | |
112 DECLARE_VREG(SCALER_H_COEFF3), | |
113 DECLARE_VREG(SCALER_H_COEFF4), | |
114 DECLARE_VREG(SCALER_COLOUR_CNTL), | |
115 DECLARE_VREG(SCALER_THRESHOLD), | |
116 DECLARE_VREG(VIDEO_FORMAT), | |
117 DECLARE_VREG(VIDEO_CONFIG), | |
118 DECLARE_VREG(VIDEO_SYNC_TEST), | |
119 DECLARE_VREG(VIDEO_SYNC_TEST_B) | |
120 }; | |
121 | |
4691 | 122 /* VIDIX exports */ |
123 | |
124 /* MMIO space*/ | |
125 #define GETREG(TYPE,PTR,OFFZ) (*((volatile TYPE*)((PTR)+(OFFZ)))) | |
126 #define SETREG(TYPE,PTR,OFFZ,VAL) (*((volatile TYPE*)((PTR)+(OFFZ))))=VAL | |
127 | |
4721 | 128 #define INREG8(addr) GETREG(uint8_t,(uint32_t)mach64_mmio_base,((addr)^0x100)<<2) |
129 #define OUTREG8(addr,val) SETREG(uint8_t,(uint32_t)mach64_mmio_base,((addr)^0x100)<<2,val) | |
130 #define INREG(addr) GETREG(uint32_t,(uint32_t)mach64_mmio_base,((addr)^0x100)<<2) | |
131 #define OUTREG(addr,val) SETREG(uint32_t,(uint32_t)mach64_mmio_base,((addr)^0x100)<<2,val) | |
4691 | 132 |
133 #define OUTREGP(addr,val,mask) \ | |
134 do { \ | |
135 unsigned int _tmp = INREG(addr); \ | |
136 _tmp &= (mask); \ | |
137 _tmp |= (val); \ | |
138 OUTREG(addr, _tmp); \ | |
139 } while (0) | |
140 | |
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141 static __inline__ int ATIGetMach64LCDReg(int _Index) |
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142 { |
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143 OUTREG8(LCD_INDEX, _Index); |
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144 return INREG(LCD_DATA); |
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145 } |
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146 |
4691 | 147 static __inline__ uint32_t INPLL(uint32_t addr) |
148 { | |
4721 | 149 uint32_t res; |
150 | |
151 /* write addr byte */ | |
152 OUTREG8(CLOCK_CNTL + 1, (addr << 2)); | |
153 /* read the register value */ | |
154 res = INREG(CLOCK_CNTL + 2); | |
155 return res; | |
4691 | 156 } |
157 | |
4721 | 158 static __inline__ void OUTPLL(uint32_t addr,uint32_t val) |
159 { | |
160 /* write addr byte */ | |
161 OUTREG8(CLOCK_CNTL + 1, (addr << 2) | PLL_WR_EN); | |
162 /* write the register value */ | |
163 OUTREG(CLOCK_CNTL + 2, val); | |
164 OUTREG8(CLOCK_CNTL + 1, (addr << 2) & ~PLL_WR_EN); | |
165 } | |
166 | |
4691 | 167 #define OUTPLLP(addr,val,mask) \ |
168 do { \ | |
169 unsigned int _tmp = INPLL(addr); \ | |
170 _tmp &= (mask); \ | |
171 _tmp |= (val); \ | |
172 OUTPLL(addr, _tmp); \ | |
173 } while (0) | |
174 | |
4721 | 175 static void mach64_fifo_wait(unsigned n) |
176 { | |
177 while ((INREG(FIFO_STAT) & 0xffff) > ((uint32_t)(0x8000 >> n))); | |
178 } | |
179 | |
180 static void mach64_wait_for_idle( void ) | |
181 { | |
182 mach64_fifo_wait(16); | |
183 while ((INREG(GUI_STAT) & 1)!= 0); | |
184 } | |
185 | |
4691 | 186 static vidix_capability_t mach64_cap = |
187 { | |
188 "BES driver for Mach64/3DRage cards", | |
189 "Nick Kurshev", | |
190 TYPE_OUTPUT, | |
191 { 0, 0, 0, 0 }, | |
192 2048, | |
193 2048, | |
194 4, | |
195 4, | |
196 -1, | |
197 FLAG_UPSCALER|FLAG_DOWNSCALER, | |
198 VENDOR_ATI, | |
199 -1, | |
200 { 0, 0, 0, 0 } | |
201 }; | |
202 | |
4721 | 203 static uint32_t mach64_vid_get_dbpp( void ) |
204 { | |
205 uint32_t dbpp,retval; | |
206 dbpp = (INREG(CRTC_GEN_CNTL)>>8)& 0x7; | |
207 switch(dbpp) | |
208 { | |
209 case 1: retval = 4; break; | |
210 case 2: retval = 8; break; | |
211 case 3: retval = 15; break; | |
212 case 4: retval = 16; break; | |
213 case 5: retval = 24; break; | |
214 default: retval=32; break; | |
215 } | |
216 return retval; | |
217 } | |
218 | |
219 static int mach64_is_dbl_scan( void ) | |
220 { | |
221 return INREG(CRTC_GEN_CNTL) & CRTC_DBL_SCAN_EN; | |
222 } | |
223 | |
224 static int mach64_is_interlace( void ) | |
225 { | |
226 return INREG(CRTC_GEN_CNTL) & CRTC_INTERLACE_EN; | |
227 } | |
228 | |
229 static uint32_t mach64_get_xres( void ) | |
230 { | |
231 /* FIXME: currently we extract that from CRTC!!!*/ | |
232 uint32_t xres,h_total; | |
233 h_total = INREG(CRTC_H_TOTAL_DISP); | |
234 xres = (h_total >> 16) & 0xffff; | |
235 return (xres + 1)*8; | |
236 } | |
237 | |
238 static uint32_t mach64_get_yres( void ) | |
239 { | |
240 /* FIXME: currently we extract that from CRTC!!!*/ | |
241 uint32_t yres,v_total; | |
242 v_total = INREG(CRTC_V_TOTAL_DISP); | |
243 yres = (v_total >> 16) & 0xffff; | |
244 return yres + 1; | |
245 } | |
246 | |
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247 // returns the verical stretch factor in 16.16 |
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248 static int mach64_get_vert_stretch(void) |
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249 { |
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250 int lcd_index; |
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251 int lcd_gen_ctrl; |
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252 int vert_stretching; |
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253 int ext_vert_stretch; |
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254 int ret; |
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255 int yres= mach64_get_yres(); |
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256 |
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257 //FIXME check for mobility & co |
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258 |
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259 lcd_index= INREG(LCD_INDEX); |
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260 |
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261 vert_stretching= ATIGetMach64LCDReg(LCD_VERT_STRETCHING); |
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262 if(!(vert_stretching&VERT_STRETCH_EN)) ret= 1<<16; |
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263 else |
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264 { |
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265 int panel_size; |
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266 |
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267 ext_vert_stretch= ATIGetMach64LCDReg(LCD_EXT_VERT_STRETCH); |
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268 panel_size= (ext_vert_stretch&VERT_PANEL_SIZE)>>11; |
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269 panel_size++; |
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270 |
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271 ret= ((yres<<16) + (panel_size>>1))/panel_size; |
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272 } |
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273 |
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274 // lcd_gen_ctrl = ATIGetMach64LCDReg(LCD_GEN_CNTL); |
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275 |
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276 OUTREG(LCD_INDEX, lcd_index); |
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277 |
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278 return ret; |
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279 } |
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280 |
4721 | 281 static void mach64_vid_make_default() |
282 { | |
283 mach64_fifo_wait(2); | |
4761 | 284 OUTREG(SCALER_COLOUR_CNTL,0x00101000); |
4721 | 285 } |
286 | |
287 static void mach64_vid_dump_regs( void ) | |
288 { | |
289 size_t i; | |
290 printf("[mach64] *** Begin of DRIVER variables dump ***\n"); | |
291 printf("[mach64] mach64_mmio_base=%p\n",mach64_mmio_base); | |
292 printf("[mach64] mach64_mem_base=%p\n",mach64_mem_base); | |
293 printf("[mach64] mach64_overlay_off=%08X\n",mach64_overlay_offset); | |
294 printf("[mach64] mach64_ram_size=%08X\n",mach64_ram_size); | |
295 printf("[mach64] video mode: %ux%u@%u\n",mach64_get_xres(),mach64_get_yres(),mach64_vid_get_dbpp()); | |
296 printf("[mach64] *** Begin of OV0 registers dump ***\n"); | |
297 for(i=0;i<sizeof(vregs)/sizeof(video_registers_t);i++) | |
298 { | |
299 mach64_wait_for_idle(); | |
300 printf("[mach64] %s = %08X\n",vregs[i].sname,INREG(vregs[i].name)); | |
301 } | |
302 printf("[mach64] *** End of OV0 registers dump ***\n"); | |
303 } | |
304 | |
305 | |
4691 | 306 unsigned int vixGetVersion(void) |
307 { | |
308 return(VIDIX_VERSION); | |
309 } | |
310 | |
311 static unsigned short ati_card_ids[] = | |
312 { | |
313 DEVICE_ATI_215CT_MACH64_CT, | |
314 DEVICE_ATI_210888CX_MACH64_CX, | |
315 DEVICE_ATI_210888ET_MACH64_ET, | |
316 DEVICE_ATI_MACH64_VT, | |
317 DEVICE_ATI_210888GX_MACH64_GX, | |
318 DEVICE_ATI_264LT_MACH64_LT, | |
319 DEVICE_ATI_264VT_MACH64_VT, | |
320 DEVICE_ATI_264VT3_MACH64_VT3, | |
321 DEVICE_ATI_264VT4_MACH64_VT4, | |
322 /**/ | |
323 DEVICE_ATI_3D_RAGE_PRO, | |
324 DEVICE_ATI_3D_RAGE_PRO2, | |
325 DEVICE_ATI_3D_RAGE_PRO3, | |
326 DEVICE_ATI_3D_RAGE_PRO4, | |
327 DEVICE_ATI_RAGE_XC, | |
328 DEVICE_ATI_RAGE_XL_AGP, | |
329 DEVICE_ATI_RAGE_XC_AGP, | |
330 DEVICE_ATI_RAGE_XL, | |
331 DEVICE_ATI_3D_RAGE_PRO5, | |
332 DEVICE_ATI_3D_RAGE_PRO6, | |
333 DEVICE_ATI_RAGE_XL2, | |
334 DEVICE_ATI_RAGE_XC2, | |
335 DEVICE_ATI_3D_RAGE_I_II, | |
336 DEVICE_ATI_3D_RAGE_II, | |
337 DEVICE_ATI_3D_RAGE_IIC, | |
338 DEVICE_ATI_3D_RAGE_IIC2, | |
339 DEVICE_ATI_3D_RAGE_IIC3, | |
340 DEVICE_ATI_3D_RAGE_IIC4, | |
341 DEVICE_ATI_3D_RAGE_LT, | |
342 DEVICE_ATI_3D_RAGE_LT2, | |
343 DEVICE_ATI_RAGE_MOBILITY_M3, | |
344 DEVICE_ATI_RAGE_MOBILITY_M32, | |
345 DEVICE_ATI_3D_RAGE_LT_G, | |
346 DEVICE_ATI_3D_RAGE_LT3, | |
347 DEVICE_ATI_RAGE_MOBILITY_P_M, | |
348 DEVICE_ATI_RAGE_MOBILITY_L, | |
349 DEVICE_ATI_3D_RAGE_LT4, | |
350 DEVICE_ATI_3D_RAGE_LT5, | |
351 DEVICE_ATI_RAGE_MOBILITY_P_M2, | |
352 DEVICE_ATI_RAGE_MOBILITY_L2 | |
353 }; | |
354 | |
355 static int find_chip(unsigned chip_id) | |
356 { | |
357 unsigned i; | |
358 for(i = 0;i < sizeof(ati_card_ids)/sizeof(unsigned short);i++) | |
359 { | |
360 if(chip_id == ati_card_ids[i]) return i; | |
361 } | |
362 return -1; | |
363 } | |
364 | |
365 int vixProbe(int verbose,int force) | |
366 { | |
367 pciinfo_t lst[MAX_PCI_DEVICES]; | |
368 unsigned i,num_pci; | |
369 int err; | |
370 __verbose = verbose; | |
371 err = pci_scan(lst,&num_pci); | |
372 if(err) | |
373 { | |
374 printf("[mach64] Error occured during pci scan: %s\n",strerror(err)); | |
375 return err; | |
376 } | |
377 else | |
378 { | |
379 err = ENXIO; | |
380 for(i=0;i<num_pci;i++) | |
381 { | |
382 if(lst[i].vendor == VENDOR_ATI) | |
383 { | |
384 int idx; | |
385 const char *dname; | |
386 idx = find_chip(lst[i].device); | |
387 if(idx == -1 && force == PROBE_NORMAL) continue; | |
388 dname = pci_device_name(VENDOR_ATI,lst[i].device); | |
389 dname = dname ? dname : "Unknown chip"; | |
390 printf("[mach64] Found chip: %s\n",dname); | |
391 if(force > PROBE_NORMAL) | |
392 { | |
393 printf("[mach64] Driver was forced. Was found %sknown chip\n",idx == -1 ? "un" : ""); | |
394 if(idx == -1) | |
395 printf("[mach64] Assuming it as Mach64\n"); | |
396 } | |
397 mach64_cap.device_id = lst[i].device; | |
398 err = 0; | |
399 memcpy(&pci_info,&lst[i],sizeof(pciinfo_t)); | |
400 probed=1; | |
401 break; | |
402 } | |
403 } | |
404 } | |
405 if(err && verbose) printf("[mach64] Can't find chip\n"); | |
406 return err; | |
407 } | |
408 | |
4721 | 409 static void reset_regs( void ) |
410 { | |
411 size_t i; | |
412 for(i=0;i<sizeof(vregs)/sizeof(video_registers_t);i++) | |
413 { | |
414 mach64_fifo_wait(2); | |
4758 | 415 OUTREG(vregs[i].name,0); |
4721 | 416 } |
417 } | |
418 | |
419 | |
4691 | 420 int vixInit(void) |
421 { | |
422 int err; | |
423 if(!probed) | |
424 { | |
425 printf("[mach64] Driver was not probed but is being initializing\n"); | |
426 return EINTR; | |
427 } | |
4721 | 428 if((mach64_mmio_base = map_phys_mem(pci_info.base2,0x4000))==(void *)-1) return ENOMEM; |
429 mach64_wait_for_idle(); | |
4691 | 430 mach64_ram_size = INREG(MEM_CNTL) & CTL_MEM_SIZEB; |
431 if (mach64_ram_size < 8) mach64_ram_size = (mach64_ram_size + 1) * 512; | |
432 else if (mach64_ram_size < 12) mach64_ram_size = (mach64_ram_size - 3) * 1024; | |
433 else mach64_ram_size = (mach64_ram_size - 7) * 2048; | |
434 mach64_ram_size *= 0x400; /* KB -> bytes */ | |
435 if((mach64_mem_base = map_phys_mem(pci_info.base0,mach64_ram_size))==(void *)-1) return ENOMEM; | |
4758 | 436 memset(&besr,0,sizeof(bes_registers_t)); |
4691 | 437 printf("[mach64] Video memory = %uMb\n",mach64_ram_size/0x100000); |
438 err = mtrr_set_type(pci_info.base0,mach64_ram_size,MTRR_TYPE_WRCOMB); | |
439 if(!err) printf("[mach64] Set write-combining type of video memory\n"); | |
4721 | 440 reset_regs(); |
4761 | 441 mach64_vid_make_default(); |
4758 | 442 if(__verbose > VERBOSE_LEVEL) mach64_vid_dump_regs(); |
4691 | 443 return 0; |
444 } | |
445 | |
446 void vixDestroy(void) | |
447 { | |
448 unmap_phys_mem(mach64_mem_base,mach64_ram_size); | |
4721 | 449 unmap_phys_mem(mach64_mmio_base,0x4000); |
4691 | 450 } |
451 | |
452 int vixGetCapability(vidix_capability_t *to) | |
453 { | |
454 memcpy(to, &mach64_cap, sizeof(vidix_capability_t)); | |
455 return 0; | |
456 } | |
457 | |
4721 | 458 static unsigned mach64_query_pitch(unsigned fourcc,const vidix_yuv_t *spitch) |
459 { | |
460 unsigned pitch,spy,spv,spu; | |
461 spy = spv = spu = 0; | |
462 switch(spitch->y) | |
463 { | |
464 case 16: | |
465 case 32: | |
466 case 64: | |
467 case 128: | |
468 case 256: spy = spitch->y; break; | |
469 default: break; | |
470 } | |
471 switch(spitch->u) | |
472 { | |
473 case 16: | |
474 case 32: | |
475 case 64: | |
476 case 128: | |
477 case 256: spu = spitch->u; break; | |
478 default: break; | |
479 } | |
480 switch(spitch->v) | |
481 { | |
482 case 16: | |
483 case 32: | |
484 case 64: | |
485 case 128: | |
486 case 256: spv = spitch->v; break; | |
487 default: break; | |
488 } | |
489 switch(fourcc) | |
490 { | |
491 /* 4:2:0 */ | |
492 case IMGFMT_IYUV: | |
493 case IMGFMT_YV12: | |
494 case IMGFMT_I420: | |
495 if(spy > 16 && spu == spy/2 && spv == spy/2) pitch = spy; | |
496 else pitch = 32; | |
497 break; | |
498 default: | |
4722
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nick
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4721
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|
499 if(spy >= 16) pitch = spy; |
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|
500 else pitch = 16; |
4721 | 501 break; |
502 } | |
503 return pitch; | |
504 } | |
505 | |
506 static void mach64_compute_framesize(vidix_playback_t *info) | |
507 { | |
508 unsigned pitch,awidth; | |
509 pitch = mach64_query_pitch(info->fourcc,&info->src.pitch); | |
510 switch(info->fourcc) | |
511 { | |
512 case IMGFMT_I420: | |
513 case IMGFMT_YV12: | |
514 case IMGFMT_IYUV: | |
515 awidth = (info->src.w + (pitch-1)) & ~(pitch-1); | |
516 info->frame_size = awidth*(info->src.h+info->src.h/2); | |
517 break; | |
518 case IMGFMT_RGB32: | |
519 case IMGFMT_BGR32: | |
520 awidth = (info->src.w*4 + (pitch-1)) & ~(pitch-1); | |
521 info->frame_size = (awidth*info->src.h); | |
522 break; | |
523 /* YUY2 YVYU, RGB15, RGB16 */ | |
524 default: | |
525 awidth = (info->src.w*2 + (pitch-1)) & ~(pitch-1); | |
526 info->frame_size = (awidth*info->src.h); | |
527 break; | |
528 } | |
529 } | |
530 | |
531 static void mach64_vid_stop_video( void ) | |
532 { | |
533 mach64_fifo_wait(14); | |
534 OUTREG(OVERLAY_SCALE_CNTL, 0x80000000); | |
535 OUTREG(OVERLAY_EXCLUSIVE_HORZ, 0); | |
536 OUTREG(OVERLAY_EXCLUSIVE_VERT, 0); | |
537 OUTREG(SCALER_H_COEFF0, 0x00002000); | |
538 OUTREG(SCALER_H_COEFF1, 0x0D06200D); | |
539 OUTREG(SCALER_H_COEFF2, 0x0D0A1C0D); | |
540 OUTREG(SCALER_H_COEFF3, 0x0C0E1A0C); | |
541 OUTREG(SCALER_H_COEFF4, 0x0C14140C); | |
542 OUTREG(VIDEO_FORMAT, 0xB000B); | |
543 OUTREG(OVERLAY_GRAPHICS_KEY_MSK, 0); | |
544 OUTREG(OVERLAY_GRAPHICS_KEY_CLR, 0); | |
545 OUTREG(OVERLAY_KEY_CNTL, 0x50); | |
546 OUTREG(OVERLAY_TEST, 0x0); | |
547 } | |
548 | |
549 static void mach64_vid_display_video( void ) | |
550 { | |
551 uint32_t vf; | |
552 mach64_fifo_wait(14); | |
553 | |
554 OUTREG(OVERLAY_Y_X_START, besr.y_x_start); | |
555 OUTREG(OVERLAY_Y_X_END, besr.y_x_end); | |
556 OUTREG(OVERLAY_SCALE_INC, besr.scale_inc); | |
557 OUTREG(SCALER_BUF_PITCH, besr.vid_buf_pitch); | |
558 OUTREG(SCALER_HEIGHT_WIDTH, besr.height_width); | |
559 OUTREG(SCALER_BUF0_OFFSET, besr.vid_buf0_base_adrs); | |
560 OUTREG(SCALER_BUF0_OFFSET_U, besr.vid_buf1_base_adrs); | |
561 OUTREG(SCALER_BUF0_OFFSET_V, besr.vid_buf2_base_adrs); | |
562 OUTREG(SCALER_BUF1_OFFSET, besr.vid_buf3_base_adrs); | |
563 OUTREG(SCALER_BUF1_OFFSET_U, besr.vid_buf4_base_adrs); | |
564 OUTREG(SCALER_BUF1_OFFSET_V, besr.vid_buf5_base_adrs); | |
4758 | 565 OUTREG(OVERLAY_SCALE_CNTL, 0xC4000003); |
4760 | 566 // OVERLAY_SCALE_CNTL bits & what they seem to affect |
567 // bit 0 no effect | |
568 // bit 1 yuv2rgb coeff related | |
569 // bit 2 horizontal interpolation if 0 | |
570 // bit 3 vertical interpolation if 0 | |
4847 | 571 // bit 4 chroma encoding (0-> 128=neutral / 1-> 0->neutral) |
4760 | 572 // bit 5-6 gamma correction |
573 // bit 7 nothing visible if set | |
574 // bit 8-27 no effect | |
575 // bit 28-31 nothing interresting just crashed my system when i played with them :( | |
4847 | 576 |
4851 | 577 mach64_fifo_wait(3); |
4861
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
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changeset
|
578 OUTREG(OVERLAY_GRAPHICS_KEY_MSK, besr.graphics_key_msk); |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
579 OUTREG(OVERLAY_GRAPHICS_KEY_CLR, besr.graphics_key_clr); |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
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changeset
|
580 OUTREG(OVERLAY_KEY_CNTL,0x50); |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
581 |
4721 | 582 mach64_wait_for_idle(); |
583 vf = INREG(VIDEO_FORMAT); | |
4751 | 584 |
585 // Bits 16-19 seem to select the format | |
4769 | 586 // 0x0 dunno behaves strange |
587 // 0x1 dunno behaves strange | |
588 // 0x2 dunno behaves strange | |
589 // 0x3 BGR15 | |
590 // 0x4 BGR16 | |
591 // 0x5 BGR16 (hmm, that need investigation, 2 BGR16 formats, i guess 1 will have only 5bits for green) | |
592 // 0x6 BGR32 | |
593 // 0x7 BGR32 with somehow mixed even / odd pixels ? | |
594 // 0x8 YYYYUVUV | |
595 // 0x9 YVU9 | |
596 // 0xA YV12 | |
597 // 0xB YUY2 | |
598 // 0xC UYVY | |
4847 | 599 // 0xD UYVY (no difference is visible if i switch between C/D for every even/odd frame) |
4769 | 600 // 0xE dunno behaves strange |
601 // 0xF dunno behaves strange | |
602 // Bit 28 all values are assumed to be 7 bit with chroma=64 for black (tested with YV12 & YUY2) | |
4751 | 603 // the remaining bits seem to have no effect |
604 | |
4769 | 605 |
4721 | 606 switch(besr.fourcc) |
607 { | |
4769 | 608 /* BGR formats */ |
609 case IMGFMT_BGR15: OUTREG(VIDEO_FORMAT, 0x00030000); break; | |
610 case IMGFMT_BGR16: OUTREG(VIDEO_FORMAT, 0x00040000); break; | |
611 case IMGFMT_BGR32: OUTREG(VIDEO_FORMAT, 0x00060000); break; | |
4721 | 612 /* 4:2:0 */ |
613 case IMGFMT_IYUV: | |
614 case IMGFMT_I420: | |
4769 | 615 case IMGFMT_YV12: OUTREG(VIDEO_FORMAT, 0x000A0000); break; |
4721 | 616 /* 4:2:2 */ |
617 case IMGFMT_YVYU: | |
4769 | 618 case IMGFMT_UYVY: OUTREG(VIDEO_FORMAT, 0x000C0000); break; |
4721 | 619 case IMGFMT_YUY2: |
4769 | 620 default: OUTREG(VIDEO_FORMAT, 0x000B0000); break; |
4721 | 621 } |
4758 | 622 if(__verbose > VERBOSE_LEVEL) mach64_vid_dump_regs(); |
4721 | 623 } |
624 | |
625 static int mach64_vid_init_video( vidix_playback_t *config ) | |
626 { | |
4758 | 627 uint32_t src_w,src_h,dest_w,dest_h,pitch,h_inc,v_inc,left,leftUV,top,ecp,y_pos; |
4721 | 628 int is_420,best_pitch,mpitch; |
629 mach64_vid_stop_video(); | |
630 left = config->src.x << 16; | |
631 top = config->src.y << 16; | |
632 src_h = config->src.h; | |
633 src_w = config->src.w; | |
634 is_420 = 0; | |
635 if(config->fourcc == IMGFMT_YV12 || | |
636 config->fourcc == IMGFMT_I420 || | |
637 config->fourcc == IMGFMT_IYUV) is_420 = 1; | |
638 best_pitch = mach64_query_pitch(config->fourcc,&config->src.pitch); | |
639 mpitch = best_pitch-1; | |
640 switch(config->fourcc) | |
641 { | |
642 /* 4:2:0 */ | |
643 case IMGFMT_IYUV: | |
644 case IMGFMT_YV12: | |
645 case IMGFMT_I420: pitch = (src_w + mpitch) & ~mpitch; | |
646 config->dest.pitch.y = | |
647 config->dest.pitch.u = | |
648 config->dest.pitch.v = best_pitch; | |
4769 | 649 besr.vid_buf_pitch= pitch; |
4721 | 650 break; |
651 /* RGB 4:4:4:4 */ | |
652 case IMGFMT_RGB32: | |
653 case IMGFMT_BGR32: pitch = (src_w*4 + mpitch) & ~mpitch; | |
654 config->dest.pitch.y = | |
655 config->dest.pitch.u = | |
656 config->dest.pitch.v = best_pitch; | |
4769 | 657 besr.vid_buf_pitch= pitch>>2; |
4721 | 658 break; |
659 /* 4:2:2 */ | |
660 default: /* RGB15, RGB16, YVYU, UYVY, YUY2 */ | |
661 pitch = ((src_w*2) + mpitch) & ~mpitch; | |
662 config->dest.pitch.y = | |
663 config->dest.pitch.u = | |
664 config->dest.pitch.v = best_pitch; | |
4769 | 665 besr.vid_buf_pitch= pitch>>1; |
4721 | 666 break; |
667 } | |
668 dest_w = config->dest.w; | |
669 dest_h = config->dest.h; | |
670 besr.fourcc = config->fourcc; | |
671 ecp = (INPLL(PLL_VCLK_CNTL) & PLL_ECP_DIV) >> 4; | |
4861
601e8a796c38
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michael
parents:
4853
diff
changeset
|
672 v_inc = src_h * mach64_get_vert_stretch(); |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
673 |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
674 if(mach64_is_interlace()) v_inc<<=1; |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
675 if(mach64_is_dbl_scan() ) v_inc>>=1; |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
676 v_inc>>=4; // convert 16.16 -> 20.12 |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
677 v_inc/= dest_h; |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
678 |
4721 | 679 h_inc = (src_w << (12+ecp)) / dest_w; |
680 /* keep everything in 16.16 */ | |
681 config->offsets[0] = 0; | |
682 config->offsets[1] = config->frame_size; | |
683 if(is_420) | |
684 { | |
685 uint32_t d1line,d2line,d3line; | |
686 d1line = top*pitch; | |
687 d2line = src_h*pitch+(d1line>>2); | |
688 d3line = d2line+((src_h*pitch)>>2); | |
689 d1line += (left >> 16) & ~15; | |
690 d2line += (left >> 17) & ~15; | |
691 d3line += (left >> 17) & ~15; | |
692 config->offset.y = d1line & ~15; | |
693 config->offset.v = d2line & ~15; | |
694 config->offset.u = d3line & ~15; | |
695 besr.vid_buf0_base_adrs=((mach64_overlay_offset+config->offsets[0]+config->offset.y)&~15); | |
696 besr.vid_buf1_base_adrs=((mach64_overlay_offset+config->offsets[0]+config->offset.v)&~15); | |
697 besr.vid_buf2_base_adrs=((mach64_overlay_offset+config->offsets[0]+config->offset.u)&~15); | |
698 besr.vid_buf3_base_adrs=((mach64_overlay_offset+config->offsets[1]+config->offset.y)&~15); | |
699 besr.vid_buf4_base_adrs=((mach64_overlay_offset+config->offsets[1]+config->offset.v)&~15); | |
700 besr.vid_buf5_base_adrs=((mach64_overlay_offset+config->offsets[1]+config->offset.u)&~15); | |
701 config->offset.y = ((besr.vid_buf0_base_adrs)&~15) - mach64_overlay_offset; | |
702 config->offset.v = ((besr.vid_buf1_base_adrs)&~15) - mach64_overlay_offset; | |
703 config->offset.u = ((besr.vid_buf2_base_adrs)&~15) - mach64_overlay_offset; | |
704 if(besr.fourcc == IMGFMT_I420 || besr.fourcc == IMGFMT_IYUV) | |
705 { | |
706 uint32_t tmp; | |
707 tmp = config->offset.u; | |
708 config->offset.u = config->offset.v; | |
709 config->offset.v = tmp; | |
710 } | |
711 } | |
712 else | |
713 { | |
714 besr.vid_buf0_base_adrs = mach64_overlay_offset; | |
715 config->offset.y = config->offset.u = config->offset.v = ((left & ~7) << 1)&~15; | |
716 besr.vid_buf0_base_adrs += config->offset.y; | |
717 besr.vid_buf1_base_adrs = besr.vid_buf0_base_adrs; | |
718 besr.vid_buf2_base_adrs = besr.vid_buf0_base_adrs; | |
719 besr.vid_buf3_base_adrs = besr.vid_buf0_base_adrs+config->frame_size; | |
720 besr.vid_buf4_base_adrs = besr.vid_buf0_base_adrs+config->frame_size; | |
721 besr.vid_buf5_base_adrs = besr.vid_buf0_base_adrs+config->frame_size; | |
722 } | |
723 | |
724 leftUV = (left >> 17) & 15; | |
725 left = (left >> 16) & 15; | |
726 besr.scale_inc = ( h_inc << 16 ) | v_inc; | |
4758 | 727 y_pos = config->dest.y; |
728 if(mach64_is_dbl_scan()) y_pos*=2; | |
729 else | |
730 if(mach64_is_interlace()) y_pos/=2; | |
731 besr.y_x_start = y_pos | (config->dest.x << 16); | |
732 y_pos =config->dest.y + dest_h; | |
733 if(mach64_is_dbl_scan()) y_pos*=2; | |
734 else | |
735 if(mach64_is_interlace()) y_pos/=2; | |
736 besr.y_x_end = y_pos | ((config->dest.x + dest_w) << 16); | |
4721 | 737 besr.height_width = ((src_w - left)<<16) | (src_h - top); |
4769 | 738 |
4861
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
739 if(mach64_grkey.ckey.op == CKEY_TRUE) |
601e8a796c38
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michael
parents:
4853
diff
changeset
|
740 { |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
741 besr.ckey_on=1; |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
742 |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
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743 switch(mach64_vid_get_dbpp()) |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
744 { |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
745 case 15: |
601e8a796c38
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michael
parents:
4853
diff
changeset
|
746 besr.graphics_key_msk=0x7FFF; |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
747 besr.graphics_key_clr= |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
748 ((mach64_grkey.ckey.blue &0xF8)>>3) |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
749 | ((mach64_grkey.ckey.green&0xF8)<<2) |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
750 | ((mach64_grkey.ckey.red &0xF8)<<7); |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
751 break; |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
752 case 16: |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
753 besr.graphics_key_msk=0xFFFF; |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
754 besr.graphics_key_clr= |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
755 ((mach64_grkey.ckey.blue &0xF8)>>3) |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
756 | ((mach64_grkey.ckey.green&0xFC)<<3) |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
757 | ((mach64_grkey.ckey.red &0xF8)<<8); |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
758 break; |
601e8a796c38
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michael
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4853
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|
759 case 24: |
601e8a796c38
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760 besr.graphics_key_msk=0xFFFFFF; |
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761 besr.graphics_key_clr= |
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762 ((mach64_grkey.ckey.blue &0xFF)) |
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763 | ((mach64_grkey.ckey.green&0xFF)<<8) |
601e8a796c38
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764 | ((mach64_grkey.ckey.red &0xFF)<<16); |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
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|
765 break; |
601e8a796c38
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|
766 case 32: |
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767 besr.graphics_key_msk=0xFFFFFF; |
601e8a796c38
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changeset
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768 besr.graphics_key_clr= |
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|
769 ((mach64_grkey.ckey.blue &0xFF)) |
601e8a796c38
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changeset
|
770 | ((mach64_grkey.ckey.green&0xFF)<<8) |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
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changeset
|
771 | ((mach64_grkey.ckey.red &0xFF)<<16); |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
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4853
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|
772 default: |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
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diff
changeset
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773 besr.ckey_on=0; |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
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parents:
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774 besr.graphics_key_msk=0; |
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colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
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|
775 besr.graphics_key_clr=0; |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
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|
776 } |
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777 } |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
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|
778 else |
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779 { |
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colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
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780 besr.ckey_on=0; |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
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781 besr.graphics_key_msk=0; |
601e8a796c38
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782 besr.graphics_key_clr=0; |
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783 } |
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784 |
4721 | 785 return 0; |
786 } | |
787 | |
788 | |
789 uint32_t supported_fourcc[] = | |
790 { | |
791 IMGFMT_YV12, IMGFMT_I420, IMGFMT_IYUV, | |
4769 | 792 IMGFMT_UYVY, IMGFMT_YUY2, IMGFMT_YVYU, |
793 IMGFMT_BGR15,IMGFMT_BGR16,IMGFMT_BGR32 | |
4721 | 794 }; |
795 | |
796 __inline__ static int is_supported_fourcc(uint32_t fourcc) | |
797 { | |
798 unsigned i; | |
799 for(i=0;i<sizeof(supported_fourcc)/sizeof(uint32_t);i++) | |
800 { | |
801 if(fourcc==supported_fourcc[i]) return 1; | |
802 } | |
803 return 0; | |
804 } | |
805 | |
4691 | 806 int vixQueryFourcc(vidix_fourcc_t *to) |
807 { | |
4721 | 808 if(is_supported_fourcc(to->fourcc)) |
809 { | |
810 to->depth = VID_DEPTH_1BPP | VID_DEPTH_2BPP | | |
811 VID_DEPTH_4BPP | VID_DEPTH_8BPP | | |
812 VID_DEPTH_12BPP| VID_DEPTH_15BPP| | |
813 VID_DEPTH_16BPP| VID_DEPTH_24BPP| | |
814 VID_DEPTH_32BPP; | |
4861
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815 to->flags = VID_CAP_EXPAND | VID_CAP_SHRINK | VID_CAP_COLORKEY; |
4721 | 816 return 0; |
817 } | |
818 else to->depth = to->flags = 0; | |
4691 | 819 return ENOSYS; |
820 } | |
821 | |
822 int vixConfigPlayback(vidix_playback_t *info) | |
823 { | |
4721 | 824 if(!is_supported_fourcc(info->fourcc)) return ENOSYS; |
825 if(info->num_frames>2) info->num_frames=2; | |
826 if(info->num_frames==1) besr.double_buff=0; | |
827 else besr.double_buff=1; | |
828 mach64_compute_framesize(info); | |
829 mach64_overlay_offset = mach64_ram_size - info->frame_size*info->num_frames; | |
830 mach64_overlay_offset &= 0xffff0000; | |
831 if(mach64_overlay_offset < 0) return EINVAL; | |
832 info->dga_addr = (char *)mach64_mem_base + mach64_overlay_offset; | |
833 mach64_vid_init_video(info); | |
834 return 0; | |
4691 | 835 } |
836 | |
837 int vixPlaybackOn(void) | |
838 { | |
4721 | 839 mach64_vid_display_video(); |
840 return 0; | |
4691 | 841 } |
842 | |
843 int vixPlaybackOff(void) | |
844 { | |
4721 | 845 mach64_vid_stop_video(); |
846 return 0; | |
847 } | |
848 | |
849 static void mach64_wait_vsync( void ) | |
850 { | |
4847 | 851 int i; |
852 | |
853 for(i=0; i<2000000; i++) | |
854 if( (INREG(CRTC_INT_CNTL)&CRTC_VBLANK)==0 ) break; | |
855 for(i=0; i<2000000; i++) | |
856 if( (INREG(CRTC_INT_CNTL)&CRTC_VBLANK) ) break; | |
857 | |
4691 | 858 } |
859 | |
860 int vixPlaybackFrameSelect(unsigned int frame) | |
861 { | |
4721 | 862 uint32_t off[6]; |
863 /* | |
864 buf3-5 always should point onto second buffer for better | |
865 deinterlacing and TV-in | |
866 */ | |
867 if(!besr.double_buff) return 0; | |
868 if((frame%2)) | |
869 { | |
870 off[0] = besr.vid_buf3_base_adrs; | |
871 off[1] = besr.vid_buf4_base_adrs; | |
872 off[2] = besr.vid_buf5_base_adrs; | |
873 off[3] = besr.vid_buf0_base_adrs; | |
874 off[4] = besr.vid_buf1_base_adrs; | |
875 off[5] = besr.vid_buf2_base_adrs; | |
876 } | |
877 else | |
878 { | |
879 off[0] = besr.vid_buf0_base_adrs; | |
880 off[1] = besr.vid_buf1_base_adrs; | |
881 off[2] = besr.vid_buf2_base_adrs; | |
882 off[3] = besr.vid_buf3_base_adrs; | |
883 off[4] = besr.vid_buf4_base_adrs; | |
884 off[5] = besr.vid_buf5_base_adrs; | |
4769 | 885 #if 0 // debuging code, can be removed |
886 { | |
887 int x,y; | |
888 char *buf0= (char *)mach64_mem_base + mach64_overlay_offset; | |
889 char *buf1= (char *)mach64_mem_base + mach64_overlay_offset; | |
890 char *buf2= (char *)mach64_mem_base + mach64_overlay_offset; | |
891 buf0 += ((besr.vid_buf0_base_adrs)&~15) - mach64_overlay_offset; | |
892 buf1 += ((besr.vid_buf1_base_adrs)&~15) - mach64_overlay_offset; | |
893 buf2 += ((besr.vid_buf2_base_adrs)&~15) - mach64_overlay_offset; | |
894 /*for(y=0; y<480/4; y++) | |
895 { | |
896 for(x=0; x<640/4; x++) | |
897 { | |
898 buf1[x + y*160]= 0; // buf1[2*x + y*160*4]; | |
899 buf2[x + y*160]= 0; //buf2[2*x + y*160*4]; | |
900 } | |
901 }*/ | |
902 /*)for(y=479; y>0; y--) | |
903 { | |
904 for(x=0; x<640; x++) | |
905 { | |
906 buf0[x*2 + y*1280+1]= | |
907 buf0[x*2 + y*1280]= buf0[x + y*640]; | |
908 } | |
909 }*/ | |
910 for(y=0; y<480; y++) | |
911 { | |
4847 | 912 for(x=0; x<1280; x++) buf0[x + y*1280]=0; |
913 for(x=0; x<1280/2; x++) buf0[x*2 + y*1280]=128; | |
914 for(x=0; x<1280/24; x++) | |
4769 | 915 { |
916 // 1-> gray0 | |
917 // buf0[x*2 + y*1280 +0] ^= buf0[x*2 + y*1280 +1]; | |
918 // buf0[x*2 + y*1280 +1] ^= buf0[x*2 + y*1280 +0]; | |
919 // buf0[x*2 + y*1280 +0] ^= buf0[x*2 + y*1280 +1]; | |
920 | |
4847 | 921 buf0[x*24 + y*1280 +0] =128; |
922 buf0[x*24 + y*1280 +1] =x; //buf0[x*4 + y*1280 +0]>>1; | |
923 buf0[x*24 + y*1280 +2] =128; | |
924 buf0[x*24 + y*1280 +3] =x; //buf0[x*4 + y*1280 +2]>>1; | |
4769 | 925 |
926 // buf0[x*8 + y*1280 +0]= 1; | |
927 // buf0[x*2 + y*1280 +1]= 7; | |
928 // buf0[x*2 + y*1280+6 ]= 255; | |
929 } | |
930 // Y, Y, Y, Y, U, V, U, V | |
931 } | |
932 /*for(y=0; y<480; y++) | |
933 { | |
934 // for(x=0; x<1280; x++) buf0[x + y*1280]=128; | |
935 for(x=0; x<640; x++) | |
936 { | |
4847 | 937 // buf0[x + y*640 ]=255;//>>=1; |
938 // buf0[x + y*640 ]|=128; | |
4769 | 939 } |
940 } | |
941 for(y=0; y<480/2; y++) | |
942 { | |
943 // for(x=0; x<1280; x++) buf0[x + y*1280]=128; | |
944 for(x=0; x<640/2; x++) | |
945 { | |
4847 | 946 buf1[x + y*320 ]+=128 ;//>>=1; |
947 buf2[x + y*320 ]+=128 ;//>>=1; | |
4769 | 948 } |
949 }*/ | |
950 } | |
951 #endif | |
4721 | 952 } |
4847 | 953 #if 0 // delay routine so the individual frames can be ssen better |
954 { | |
955 volatile int i=0; | |
956 for(i=0; i<10000000; i++); | |
957 } | |
958 #endif | |
4721 | 959 |
960 mach64_wait_for_idle(); | |
961 mach64_fifo_wait(7); | |
4847 | 962 |
4721 | 963 OUTREG(SCALER_BUF0_OFFSET, off[0]); |
964 OUTREG(SCALER_BUF0_OFFSET_U, off[1]); | |
965 OUTREG(SCALER_BUF0_OFFSET_V, off[2]); | |
966 OUTREG(SCALER_BUF1_OFFSET, off[3]); | |
967 OUTREG(SCALER_BUF1_OFFSET_U, off[4]); | |
968 OUTREG(SCALER_BUF1_OFFSET_V, off[5]); | |
4847 | 969 mach64_wait_vsync(); |
970 | |
4758 | 971 if(__verbose > VERBOSE_LEVEL) mach64_vid_dump_regs(); |
4721 | 972 return 0; |
4691 | 973 } |
4721 | 974 |
975 vidix_video_eq_t equal = | |
976 { | |
977 VEQ_CAP_BRIGHTNESS | VEQ_CAP_SATURATION | |
978 , | |
979 0, 0, 0, 0, 0, 0, 0, 0 }; | |
980 | |
981 int vixPlaybackGetEq( vidix_video_eq_t * eq) | |
982 { | |
983 memcpy(eq,&equal,sizeof(vidix_video_eq_t)); | |
984 return 0; | |
985 } | |
986 | |
987 int vixPlaybackSetEq( const vidix_video_eq_t * eq) | |
988 { | |
989 int br,sat; | |
990 if(eq->cap & VEQ_CAP_BRIGHTNESS) equal.brightness = eq->brightness; | |
991 if(eq->cap & VEQ_CAP_CONTRAST) equal.contrast = eq->contrast; | |
992 if(eq->cap & VEQ_CAP_SATURATION) equal.saturation = eq->saturation; | |
993 if(eq->cap & VEQ_CAP_HUE) equal.hue = eq->hue; | |
994 if(eq->cap & VEQ_CAP_RGB_INTENSITY) | |
995 { | |
996 equal.red_intensity = eq->red_intensity; | |
997 equal.green_intensity = eq->green_intensity; | |
998 equal.blue_intensity = eq->blue_intensity; | |
999 } | |
1000 equal.flags = eq->flags; | |
1001 br = equal.brightness * 64 / 1000; | |
1002 if(br < -64) br = -64; if(br > 63) br = 63; | |
1003 sat = (equal.saturation + 1000) * 16 / 1000; | |
1004 if(sat < 0) sat = 0; if(sat > 31) sat = 31; | |
1005 OUTREG(SCALER_COLOUR_CNTL, (br & 0x7f) | (sat << 8) | (sat << 16)); | |
1006 return 0; | |
1007 } | |
4861
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1008 |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
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1009 int vixGetGrKeys(vidix_grkey_t *grkey) |
601e8a796c38
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1010 { |
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michael
parents:
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diff
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1011 memcpy(grkey, &mach64_grkey, sizeof(vidix_grkey_t)); |
601e8a796c38
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1012 return(0); |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
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|
1013 } |
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1014 |
601e8a796c38
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1015 int vixSetGrKeys(const vidix_grkey_t *grkey) |
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1016 { |
601e8a796c38
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1017 memcpy(&mach64_grkey, grkey, sizeof(vidix_grkey_t)); |
601e8a796c38
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1018 return(0); |
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1019 } |