Mercurial > mplayer.hg
annotate cpudetect.c @ 3815:622a9ade4517
updated
author | alex |
---|---|
date | Thu, 27 Dec 2001 23:52:48 +0000 |
parents | 91f801a94a59 |
children | 6659db99f200 |
rev | line source |
---|---|
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
1 #include "config.h" |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
2 #include "cpudetect.h" |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
3 |
3146
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
4 CpuCaps gCpuCaps; |
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
5 |
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
6 #ifdef ARCH_X86 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
7 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
8 #include <stdio.h> |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
9 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
10 #ifdef __FreeBSD__ |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
11 #include <sys/types.h> |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
12 #include <sys/sysctl.h> |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
13 #endif |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
14 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
15 #ifdef __linux__ |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
16 #include <signal.h> |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
17 #endif |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
18 |
2272 | 19 //#define X86_FXSR_MAGIC |
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
20 /* Thanks to the FreeBSD project for some of this cpuid code, and |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
21 * help understanding how to use it. Thanks to the Mesa |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
22 * team for SSE support detection and more cpu detect code. |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
23 */ |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
24 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
25 /* I believe this code works. However, it has only been used on a PII and PIII */ |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
26 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
27 static void check_os_katmai_support( void ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
28 |
2272 | 29 #if 1 |
30 // return TRUE if cpuid supported | |
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
31 static int has_cpuid() |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
32 { |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
33 int a, c; |
2272 | 34 |
35 // code from libavcodec: | |
36 __asm__ __volatile__ ( | |
37 /* See if CPUID instruction is supported ... */ | |
38 /* ... Get copies of EFLAGS into eax and ecx */ | |
39 "pushf\n\t" | |
40 "popl %0\n\t" | |
41 "movl %0, %1\n\t" | |
42 | |
43 /* ... Toggle the ID bit in one copy and store */ | |
44 /* to the EFLAGS reg */ | |
45 "xorl $0x200000, %0\n\t" | |
46 "push %0\n\t" | |
47 "popf\n\t" | |
48 | |
49 /* ... Get the (hopefully modified) EFLAGS */ | |
50 "pushf\n\t" | |
51 "popl %0\n\t" | |
52 : "=a" (a), "=c" (c) | |
53 : | |
54 : "cc" | |
55 ); | |
56 | |
57 return (a!=c); | |
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
58 } |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
59 #endif |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
60 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
61 static void |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
62 do_cpuid(unsigned int ax, unsigned int *p) |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
63 { |
2272 | 64 #if 0 |
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
65 __asm __volatile( |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
66 "cpuid;" |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
67 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3]) |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
68 : "0" (ax) |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
69 ); |
2272 | 70 #else |
71 // code from libavcodec: | |
72 __asm __volatile | |
73 ("movl %%ebx, %%esi\n\t" | |
74 "cpuid\n\t" | |
75 "xchgl %%ebx, %%esi" | |
3403 | 76 : "=a" (p[0]), "=S" (p[1]), |
2272 | 77 "=c" (p[2]), "=d" (p[3]) |
78 : "0" (ax)); | |
79 #endif | |
80 | |
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
81 } |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
82 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
83 void GetCpuCaps( CpuCaps *caps) |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
84 { |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
85 unsigned int regs[4]; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
86 unsigned int regs2[4]; |
3146
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
87 |
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
88 caps->isX86=1; |
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
89 |
3700 | 90 memset(caps, 0, sizeof(*caps)); |
2288 | 91 if (!has_cpuid()) { |
92 printf("CPUID not supported!???\n"); | |
93 return; | |
94 } | |
95 do_cpuid(0x00000000, regs); // get _max_ cpuid level and vendor name | |
96 printf("CPU vendor name: %.4s%.4s%.4s max cpuid level: %d\n",®s[1],®s[3],®s[2],regs[0]); | |
97 if (regs[0]>=0x00000001) | |
2280 | 98 { |
2303 | 99 char *tmpstr; |
3146
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
100 |
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
101 do_cpuid(0x00000001, regs2); |
2301 | 102 |
2303 | 103 tmpstr=GetCpuFriendlyName(regs, regs2); |
3403 | 104 printf("CPU: %s ",tmpstr); |
2303 | 105 free(tmpstr); |
2301 | 106 |
2288 | 107 caps->cpuType=(regs2[0] >> 8)&0xf; |
108 if(caps->cpuType==0xf){ | |
109 // use extended family (P4, IA64) | |
110 caps->cpuType=8+((regs2[0]>>20)&255); | |
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
111 } |
3403 | 112 caps->cpuStepping=regs2[0] & 0xf; |
113 printf("(Type: %d, Stepping: %d)\n", | |
114 caps->cpuType, caps->cpuStepping); | |
2288 | 115 |
116 // general feature flags: | |
2272 | 117 caps->hasMMX = (regs2[3] & (1 << 23 )) >> 23; // 0x0800000 |
118 caps->hasSSE = (regs2[3] & (1 << 25 )) >> 25; // 0x2000000 | |
119 caps->hasSSE2 = (regs2[3] & (1 << 26 )) >> 26; // 0x4000000 | |
2288 | 120 caps->hasMMX2 = caps->hasSSE; // SSE cpus supports mmxext too |
121 } | |
122 do_cpuid(0x80000000, regs); | |
123 if (regs[0]>=0x80000001) { | |
124 printf("extended cpuid-level: %d\n",regs[0]&0x7FFFFFFF); | |
125 do_cpuid(0x80000001, regs2); | |
126 caps->hasMMX = (regs2[3] & (1 << 23 )) >> 23; // 0x0800000 | |
127 caps->hasMMX2 = (regs2[3] & (1 << 22 )) >> 22; // 0x400000 | |
128 caps->has3DNow = (regs2[3] & (1 << 31 )) >> 31; //0x80000000 | |
129 caps->has3DNowExt = (regs2[3] & (1 << 30 )) >> 30; | |
130 } | |
131 #if 0 | |
132 printf("cpudetect: MMX=%d MMX2=%d SSE=%d SSE2=%d 3DNow=%d 3DNowExt=%d\n", | |
133 gCpuCaps.hasMMX, | |
134 gCpuCaps.hasMMX2, | |
135 gCpuCaps.hasSSE, | |
136 gCpuCaps.hasSSE2, | |
137 gCpuCaps.has3DNow, | |
138 gCpuCaps.has3DNowExt ); | |
139 #endif | |
140 | |
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
141 /* FIXME: Does SSE2 need more OS support, too? */ |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
142 #if defined(__linux__) || defined(__FreeBSD__) |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
143 if (caps->hasSSE) |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
144 check_os_katmai_support(); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
145 if (!caps->hasSSE) |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
146 caps->hasSSE2 = 0; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
147 #else |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
148 caps->hasSSE=0; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
149 caps->hasSSE2 = 0; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
150 #endif |
3146
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
151 // caps->has3DNow=1; |
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
152 // caps->hasMMX2 = 0; |
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
153 // caps->hasMMX = 0; |
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
154 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
155 } |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
156 |
2301 | 157 |
158 #define CPUID_EXTFAMILY ((regs2[0] >> 20)&0xFF) /* 27..20 */ | |
159 #define CPUID_EXTMODEL ((regs2[0] >> 16)&0x0F) /* 19..16 */ | |
160 #define CPUID_TYPE ((regs2[0] >> 12)&0x04) /* 13..12 */ | |
161 #define CPUID_FAMILY ((regs2[0] >> 8)&0x0F) /* 11..08 */ | |
162 #define CPUID_MODEL ((regs2[0] >> 4)&0x0F) /* 07..04 */ | |
163 #define CPUID_STEPPING ((regs2[0] >> 0)&0x0F) /* 03..00 */ | |
164 | |
165 char *GetCpuFriendlyName(unsigned int regs[], unsigned int regs2[]){ | |
166 #include "cputable.h" /* get cpuname and cpuvendors */ | |
167 char vendor[17]; | |
2303 | 168 char *retname; |
2301 | 169 int i; |
170 | |
2417 | 171 if (NULL==(retname=(char*)malloc(256))) { |
2303 | 172 printf("Error: GetCpuFriendlyName() not enough memory\n"); |
173 exit(1); | |
174 } | |
175 | |
2301 | 176 sprintf(vendor,"%.4s%.4s%.4s",®s[1],®s[3],®s[2]); |
3146
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
177 |
2301 | 178 for(i=0; i<MAX_VENDORS; i++){ |
179 if(!strcmp(cpuvendors[i].string,vendor)){ | |
180 if(cpuname[i][CPUID_FAMILY][CPUID_MODEL]){ | |
2303 | 181 snprintf(retname,255,"%s %s",cpuvendors[i].name,cpuname[i][CPUID_FAMILY][CPUID_MODEL]); |
2301 | 182 } else { |
2303 | 183 snprintf(retname,255,"unknown %s %d. Generation CPU",cpuvendors[i].name,CPUID_FAMILY); |
2301 | 184 printf("unknown %s CPU:\n",cpuvendors[i].name); |
185 printf("Vendor: %s\n",cpuvendors[i].string); | |
186 printf("Type: %d\n",CPUID_TYPE); | |
187 printf("Family: %d (ext: %d)\n",CPUID_FAMILY,CPUID_EXTFAMILY); | |
188 printf("Model: %d (ext: %d)\n",CPUID_MODEL,CPUID_EXTMODEL); | |
189 printf("Stepping: %d\n",CPUID_STEPPING); | |
190 printf("Please send the above info along with the exact CPU name" | |
191 "to the MPlayer-Developers, so we can add it to the list!\n"); | |
192 } | |
193 } | |
194 } | |
195 | |
196 //printf("Detected CPU: %s\n", retname); | |
197 return retname; | |
198 } | |
199 | |
200 #undef CPUID_EXTFAMILY | |
201 #undef CPUID_EXTMODEL | |
202 #undef CPUID_TYPE | |
203 #undef CPUID_FAMILY | |
204 #undef CPUID_MODEL | |
205 #undef CPUID_STEPPING | |
206 | |
207 | |
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
208 #if defined(__linux__) && defined(_POSIX_SOURCE) && defined(X86_FXSR_MAGIC) |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
209 static void sigill_handler_sse( int signal, struct sigcontext sc ) |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
210 { |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
211 printf( "SIGILL, " ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
212 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
213 /* Both the "xorps %%xmm0,%%xmm0" and "divps %xmm0,%%xmm1" |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
214 * instructions are 3 bytes long. We must increment the instruction |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
215 * pointer manually to avoid repeated execution of the offending |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
216 * instruction. |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
217 * |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
218 * If the SIGILL is caused by a divide-by-zero when unmasked |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
219 * exceptions aren't supported, the SIMD FPU status and control |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
220 * word will be restored at the end of the test, so we don't need |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
221 * to worry about doing it here. Besides, we may not be able to... |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
222 */ |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
223 sc.eip += 3; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
224 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
225 gCpuCaps.hasSSE=0; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
226 } |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
227 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
228 static void sigfpe_handler_sse( int signal, struct sigcontext sc ) |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
229 { |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
230 printf( "SIGFPE, " ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
231 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
232 if ( sc.fpstate->magic != 0xffff ) { |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
233 /* Our signal context has the extended FPU state, so reset the |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
234 * divide-by-zero exception mask and clear the divide-by-zero |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
235 * exception bit. |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
236 */ |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
237 sc.fpstate->mxcsr |= 0x00000200; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
238 sc.fpstate->mxcsr &= 0xfffffffb; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
239 } else { |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
240 /* If we ever get here, we're completely hosed. |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
241 */ |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
242 printf( "\n\n" ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
243 printf( "SSE enabling test failed badly!" ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
244 } |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
245 } |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
246 #endif /* __linux__ && _POSIX_SOURCE && X86_FXSR_MAGIC */ |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
247 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
248 /* If we're running on a processor that can do SSE, let's see if we |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
249 * are allowed to or not. This will catch 2.4.0 or later kernels that |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
250 * haven't been configured for a Pentium III but are running on one, |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
251 * and RedHat patched 2.2 kernels that have broken exception handling |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
252 * support for user space apps that do SSE. |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
253 */ |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
254 static void check_os_katmai_support( void ) |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
255 { |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
256 #if defined(__FreeBSD__) |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
257 int has_sse=0, ret; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
258 size_t len=sizeof(has_sse); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
259 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
260 ret = sysctlbyname("hw.instruction_sse", &has_sse, &len, NULL, 0); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
261 if (ret || !has_sse) |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
262 gCpuCaps.hasSSE=0; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
263 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
264 #elif defined(__linux__) |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
265 #if defined(_POSIX_SOURCE) && defined(X86_FXSR_MAGIC) |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
266 struct sigaction saved_sigill; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
267 struct sigaction saved_sigfpe; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
268 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
269 /* Save the original signal handlers. |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
270 */ |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
271 sigaction( SIGILL, NULL, &saved_sigill ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
272 sigaction( SIGFPE, NULL, &saved_sigfpe ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
273 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
274 signal( SIGILL, (void (*)(int))sigill_handler_sse ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
275 signal( SIGFPE, (void (*)(int))sigfpe_handler_sse ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
276 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
277 /* Emulate test for OSFXSR in CR4. The OS will set this bit if it |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
278 * supports the extended FPU save and restore required for SSE. If |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
279 * we execute an SSE instruction on a PIII and get a SIGILL, the OS |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
280 * doesn't support Streaming SIMD Exceptions, even if the processor |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
281 * does. |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
282 */ |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
283 if ( gCpuCaps.hasSSE ) { |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
284 printf( "Testing OS support for SSE... " ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
285 |
2272 | 286 // __asm __volatile ("xorps %%xmm0, %%xmm0"); |
287 __asm __volatile ("xorps %xmm0, %xmm0"); | |
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
288 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
289 if ( gCpuCaps.hasSSE ) { |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
290 printf( "yes.\n" ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
291 } else { |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
292 printf( "no!\n" ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
293 } |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
294 } |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
295 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
296 /* Emulate test for OSXMMEXCPT in CR4. The OS will set this bit if |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
297 * it supports unmasked SIMD FPU exceptions. If we unmask the |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
298 * exceptions, do a SIMD divide-by-zero and get a SIGILL, the OS |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
299 * doesn't support unmasked SIMD FPU exceptions. If we get a SIGFPE |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
300 * as expected, we're okay but we need to clean up after it. |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
301 * |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
302 * Are we being too stringent in our requirement that the OS support |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
303 * unmasked exceptions? Certain RedHat 2.2 kernels enable SSE by |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
304 * setting CR4.OSFXSR but don't support unmasked exceptions. Win98 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
305 * doesn't even support them. We at least know the user-space SSE |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
306 * support is good in kernels that do support unmasked exceptions, |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
307 * and therefore to be safe I'm going to leave this test in here. |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
308 */ |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
309 if ( gCpuCaps.hasSSE ) { |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
310 printf( "Testing OS support for SSE unmasked exceptions... " ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
311 |
2272 | 312 // test_os_katmai_exception_support(); |
2268
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
313 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
314 if ( gCpuCaps.hasSSE ) { |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
315 printf( "yes.\n" ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
316 } else { |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
317 printf( "no!\n" ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
318 } |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
319 } |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
320 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
321 /* Restore the original signal handlers. |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
322 */ |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
323 sigaction( SIGILL, &saved_sigill, NULL ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
324 sigaction( SIGFPE, &saved_sigfpe, NULL ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
325 |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
326 /* If we've gotten to here and the XMM CPUID bit is still set, we're |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
327 * safe to go ahead and hook out the SSE code throughout Mesa. |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
328 */ |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
329 if ( gCpuCaps.hasSSE ) { |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
330 printf( "Tests of OS support for SSE passed.\n" ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
331 } else { |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
332 printf( "Tests of OS support for SSE failed!\n" ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
333 } |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
334 #else |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
335 /* We can't use POSIX signal handling to test the availability of |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
336 * SSE, so we disable it by default. |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
337 */ |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
338 printf( "Cannot test OS support for SSE, disabling to be safe.\n" ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
339 gCpuCaps.hasSSE=0; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
340 #endif /* _POSIX_SOURCE && X86_FXSR_MAGIC */ |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
341 #else |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
342 /* Do nothing on other platforms for now. |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
343 */ |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
344 message( "Not testing OS support for SSE, leaving disabled.\n" ); |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
345 gCpuCaps.hasSSE=0; |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
346 #endif /* __linux__ */ |
72ff2179d396
cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff
changeset
|
347 } |
3146
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
348 #else /* ARCH_X86 */ |
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
349 |
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
350 void GetCpuCaps( CpuCaps *caps) |
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
351 { |
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
352 caps->cpuType=0; |
3403 | 353 caps->cpuStepping=0; |
3146
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
354 caps->hasMMX=0; |
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
355 caps->hasMMX2=0; |
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
356 caps->has3DNow=0; |
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
357 caps->has3DNowExt=0; |
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
358 caps->hasSSE=0; |
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
359 caps->hasSSE2=0; |
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
360 caps->isX86=0; |
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
361 } |
3164eaa93396
non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents:
2417
diff
changeset
|
362 #endif /* !ARCH_X86 */ |