Mercurial > mplayer.hg
annotate cpudetect.c @ 2662:994b95f443f2
avoids spitting bad compilation messages at the user when sthg does not work
author | pl |
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date | Sat, 03 Nov 2001 23:15:44 +0000 |
parents | 6b4952e00ad0 |
children | 3164eaa93396 |
rev | line source |
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1 #include "config.h" |
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2 #include "cpudetect.h" |
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3 |
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4 #ifdef ARCH_X86 |
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5 |
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6 #include <stdio.h> |
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7 |
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8 #ifdef __FreeBSD__ |
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9 #include <sys/types.h> |
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10 #include <sys/sysctl.h> |
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11 #endif |
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12 |
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13 #ifdef __linux__ |
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14 #include <signal.h> |
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15 #endif |
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16 |
2272 | 17 //#define X86_FXSR_MAGIC |
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18 /* Thanks to the FreeBSD project for some of this cpuid code, and |
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19 * help understanding how to use it. Thanks to the Mesa |
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20 * team for SSE support detection and more cpu detect code. |
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21 */ |
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22 |
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23 /* I believe this code works. However, it has only been used on a PII and PIII */ |
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24 |
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25 CpuCaps gCpuCaps; |
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26 static void check_os_katmai_support( void ); |
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27 |
2272 | 28 #if 1 |
29 // return TRUE if cpuid supported | |
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30 static int has_cpuid() |
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31 { |
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32 int a, c; |
2272 | 33 |
34 // code from libavcodec: | |
35 __asm__ __volatile__ ( | |
36 /* See if CPUID instruction is supported ... */ | |
37 /* ... Get copies of EFLAGS into eax and ecx */ | |
38 "pushf\n\t" | |
39 "popl %0\n\t" | |
40 "movl %0, %1\n\t" | |
41 | |
42 /* ... Toggle the ID bit in one copy and store */ | |
43 /* to the EFLAGS reg */ | |
44 "xorl $0x200000, %0\n\t" | |
45 "push %0\n\t" | |
46 "popf\n\t" | |
47 | |
48 /* ... Get the (hopefully modified) EFLAGS */ | |
49 "pushf\n\t" | |
50 "popl %0\n\t" | |
51 : "=a" (a), "=c" (c) | |
52 : | |
53 : "cc" | |
54 ); | |
55 | |
56 return (a!=c); | |
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57 } |
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58 #endif |
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59 |
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60 static void |
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61 do_cpuid(unsigned int ax, unsigned int *p) |
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62 { |
2272 | 63 #if 0 |
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64 __asm __volatile( |
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65 "cpuid;" |
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66 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3]) |
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67 : "0" (ax) |
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68 ); |
2272 | 69 #else |
70 // code from libavcodec: | |
71 __asm __volatile | |
72 ("movl %%ebx, %%esi\n\t" | |
73 "cpuid\n\t" | |
74 "xchgl %%ebx, %%esi" | |
75 : "=a" (p[0]), "=S" (p[1]), | |
76 "=c" (p[2]), "=d" (p[3]) | |
77 : "0" (ax)); | |
78 #endif | |
79 | |
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80 } |
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81 |
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82 void GetCpuCaps( CpuCaps *caps) |
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83 { |
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84 unsigned int regs[4]; |
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85 unsigned int regs2[4]; |
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86 |
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87 bzero(caps, sizeof(*caps)); |
2288 | 88 if (!has_cpuid()) { |
89 printf("CPUID not supported!???\n"); | |
90 return; | |
91 } | |
92 do_cpuid(0x00000000, regs); // get _max_ cpuid level and vendor name | |
93 printf("CPU vendor name: %.4s%.4s%.4s max cpuid level: %d\n",®s[1],®s[3],®s[2],regs[0]); | |
94 if (regs[0]>=0x00000001) | |
2280 | 95 { |
2303 | 96 char *tmpstr; |
97 | |
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98 do_cpuid(0x00000001, regs2); |
2301 | 99 |
2303 | 100 tmpstr=GetCpuFriendlyName(regs, regs2); |
101 printf("CPU: %s\n",tmpstr); | |
102 free(tmpstr); | |
2301 | 103 |
2288 | 104 caps->cpuType=(regs2[0] >> 8)&0xf; |
105 if(caps->cpuType==0xf){ | |
106 // use extended family (P4, IA64) | |
107 caps->cpuType=8+((regs2[0]>>20)&255); | |
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108 } |
2288 | 109 |
110 // general feature flags: | |
2272 | 111 caps->hasMMX = (regs2[3] & (1 << 23 )) >> 23; // 0x0800000 |
112 caps->hasSSE = (regs2[3] & (1 << 25 )) >> 25; // 0x2000000 | |
113 caps->hasSSE2 = (regs2[3] & (1 << 26 )) >> 26; // 0x4000000 | |
2288 | 114 caps->hasMMX2 = caps->hasSSE; // SSE cpus supports mmxext too |
115 } | |
116 do_cpuid(0x80000000, regs); | |
117 if (regs[0]>=0x80000001) { | |
118 printf("extended cpuid-level: %d\n",regs[0]&0x7FFFFFFF); | |
119 do_cpuid(0x80000001, regs2); | |
120 caps->hasMMX = (regs2[3] & (1 << 23 )) >> 23; // 0x0800000 | |
121 caps->hasMMX2 = (regs2[3] & (1 << 22 )) >> 22; // 0x400000 | |
122 caps->has3DNow = (regs2[3] & (1 << 31 )) >> 31; //0x80000000 | |
123 caps->has3DNowExt = (regs2[3] & (1 << 30 )) >> 30; | |
124 } | |
125 #if 0 | |
126 printf("cpudetect: MMX=%d MMX2=%d SSE=%d SSE2=%d 3DNow=%d 3DNowExt=%d\n", | |
127 gCpuCaps.hasMMX, | |
128 gCpuCaps.hasMMX2, | |
129 gCpuCaps.hasSSE, | |
130 gCpuCaps.hasSSE2, | |
131 gCpuCaps.has3DNow, | |
132 gCpuCaps.has3DNowExt ); | |
133 #endif | |
134 | |
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135 /* FIXME: Does SSE2 need more OS support, too? */ |
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136 #if defined(__linux__) || defined(__FreeBSD__) |
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137 if (caps->hasSSE) |
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138 check_os_katmai_support(); |
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139 if (!caps->hasSSE) |
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140 caps->hasSSE2 = 0; |
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141 #else |
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142 caps->hasSSE=0; |
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143 caps->hasSSE2 = 0; |
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144 #endif |
2288 | 145 |
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146 |
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147 } |
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148 |
2301 | 149 |
150 #define CPUID_EXTFAMILY ((regs2[0] >> 20)&0xFF) /* 27..20 */ | |
151 #define CPUID_EXTMODEL ((regs2[0] >> 16)&0x0F) /* 19..16 */ | |
152 #define CPUID_TYPE ((regs2[0] >> 12)&0x04) /* 13..12 */ | |
153 #define CPUID_FAMILY ((regs2[0] >> 8)&0x0F) /* 11..08 */ | |
154 #define CPUID_MODEL ((regs2[0] >> 4)&0x0F) /* 07..04 */ | |
155 #define CPUID_STEPPING ((regs2[0] >> 0)&0x0F) /* 03..00 */ | |
156 | |
157 char *GetCpuFriendlyName(unsigned int regs[], unsigned int regs2[]){ | |
158 #include "cputable.h" /* get cpuname and cpuvendors */ | |
159 char vendor[17]; | |
2303 | 160 char *retname; |
2301 | 161 int i; |
162 | |
2417 | 163 if (NULL==(retname=(char*)malloc(256))) { |
2303 | 164 printf("Error: GetCpuFriendlyName() not enough memory\n"); |
165 exit(1); | |
166 } | |
167 | |
2301 | 168 sprintf(vendor,"%.4s%.4s%.4s",®s[1],®s[3],®s[2]); |
169 | |
170 for(i=0; i<MAX_VENDORS; i++){ | |
171 if(!strcmp(cpuvendors[i].string,vendor)){ | |
172 if(cpuname[i][CPUID_FAMILY][CPUID_MODEL]){ | |
2303 | 173 snprintf(retname,255,"%s %s",cpuvendors[i].name,cpuname[i][CPUID_FAMILY][CPUID_MODEL]); |
2301 | 174 } else { |
2303 | 175 snprintf(retname,255,"unknown %s %d. Generation CPU",cpuvendors[i].name,CPUID_FAMILY); |
2301 | 176 printf("unknown %s CPU:\n",cpuvendors[i].name); |
177 printf("Vendor: %s\n",cpuvendors[i].string); | |
178 printf("Type: %d\n",CPUID_TYPE); | |
179 printf("Family: %d (ext: %d)\n",CPUID_FAMILY,CPUID_EXTFAMILY); | |
180 printf("Model: %d (ext: %d)\n",CPUID_MODEL,CPUID_EXTMODEL); | |
181 printf("Stepping: %d\n",CPUID_STEPPING); | |
182 printf("Please send the above info along with the exact CPU name" | |
183 "to the MPlayer-Developers, so we can add it to the list!\n"); | |
184 } | |
185 } | |
186 } | |
187 | |
188 //printf("Detected CPU: %s\n", retname); | |
189 return retname; | |
190 } | |
191 | |
192 #undef CPUID_EXTFAMILY | |
193 #undef CPUID_EXTMODEL | |
194 #undef CPUID_TYPE | |
195 #undef CPUID_FAMILY | |
196 #undef CPUID_MODEL | |
197 #undef CPUID_STEPPING | |
198 | |
199 | |
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200 #if defined(__linux__) && defined(_POSIX_SOURCE) && defined(X86_FXSR_MAGIC) |
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201 static void sigill_handler_sse( int signal, struct sigcontext sc ) |
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202 { |
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203 printf( "SIGILL, " ); |
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204 |
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205 /* Both the "xorps %%xmm0,%%xmm0" and "divps %xmm0,%%xmm1" |
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206 * instructions are 3 bytes long. We must increment the instruction |
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207 * pointer manually to avoid repeated execution of the offending |
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208 * instruction. |
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209 * |
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210 * If the SIGILL is caused by a divide-by-zero when unmasked |
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211 * exceptions aren't supported, the SIMD FPU status and control |
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212 * word will be restored at the end of the test, so we don't need |
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213 * to worry about doing it here. Besides, we may not be able to... |
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214 */ |
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215 sc.eip += 3; |
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216 |
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217 gCpuCaps.hasSSE=0; |
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218 } |
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219 |
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220 static void sigfpe_handler_sse( int signal, struct sigcontext sc ) |
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221 { |
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222 printf( "SIGFPE, " ); |
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223 |
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224 if ( sc.fpstate->magic != 0xffff ) { |
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225 /* Our signal context has the extended FPU state, so reset the |
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226 * divide-by-zero exception mask and clear the divide-by-zero |
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227 * exception bit. |
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228 */ |
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229 sc.fpstate->mxcsr |= 0x00000200; |
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230 sc.fpstate->mxcsr &= 0xfffffffb; |
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231 } else { |
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232 /* If we ever get here, we're completely hosed. |
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233 */ |
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234 printf( "\n\n" ); |
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235 printf( "SSE enabling test failed badly!" ); |
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236 } |
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237 } |
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238 #endif /* __linux__ && _POSIX_SOURCE && X86_FXSR_MAGIC */ |
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239 |
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240 /* If we're running on a processor that can do SSE, let's see if we |
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241 * are allowed to or not. This will catch 2.4.0 or later kernels that |
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242 * haven't been configured for a Pentium III but are running on one, |
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243 * and RedHat patched 2.2 kernels that have broken exception handling |
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244 * support for user space apps that do SSE. |
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245 */ |
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246 static void check_os_katmai_support( void ) |
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247 { |
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248 #if defined(__FreeBSD__) |
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249 int has_sse=0, ret; |
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250 size_t len=sizeof(has_sse); |
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251 |
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252 ret = sysctlbyname("hw.instruction_sse", &has_sse, &len, NULL, 0); |
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253 if (ret || !has_sse) |
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254 gCpuCaps.hasSSE=0; |
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255 |
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256 #elif defined(__linux__) |
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257 #if defined(_POSIX_SOURCE) && defined(X86_FXSR_MAGIC) |
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258 struct sigaction saved_sigill; |
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259 struct sigaction saved_sigfpe; |
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260 |
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261 /* Save the original signal handlers. |
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262 */ |
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263 sigaction( SIGILL, NULL, &saved_sigill ); |
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264 sigaction( SIGFPE, NULL, &saved_sigfpe ); |
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265 |
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266 signal( SIGILL, (void (*)(int))sigill_handler_sse ); |
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267 signal( SIGFPE, (void (*)(int))sigfpe_handler_sse ); |
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268 |
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269 /* Emulate test for OSFXSR in CR4. The OS will set this bit if it |
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270 * supports the extended FPU save and restore required for SSE. If |
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271 * we execute an SSE instruction on a PIII and get a SIGILL, the OS |
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272 * doesn't support Streaming SIMD Exceptions, even if the processor |
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273 * does. |
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274 */ |
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275 if ( gCpuCaps.hasSSE ) { |
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276 printf( "Testing OS support for SSE... " ); |
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277 |
2272 | 278 // __asm __volatile ("xorps %%xmm0, %%xmm0"); |
279 __asm __volatile ("xorps %xmm0, %xmm0"); | |
2268
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280 |
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281 if ( gCpuCaps.hasSSE ) { |
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282 printf( "yes.\n" ); |
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283 } else { |
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284 printf( "no!\n" ); |
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285 } |
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286 } |
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287 |
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288 /* Emulate test for OSXMMEXCPT in CR4. The OS will set this bit if |
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289 * it supports unmasked SIMD FPU exceptions. If we unmask the |
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290 * exceptions, do a SIMD divide-by-zero and get a SIGILL, the OS |
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291 * doesn't support unmasked SIMD FPU exceptions. If we get a SIGFPE |
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292 * as expected, we're okay but we need to clean up after it. |
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293 * |
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294 * Are we being too stringent in our requirement that the OS support |
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295 * unmasked exceptions? Certain RedHat 2.2 kernels enable SSE by |
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296 * setting CR4.OSFXSR but don't support unmasked exceptions. Win98 |
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297 * doesn't even support them. We at least know the user-space SSE |
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298 * support is good in kernels that do support unmasked exceptions, |
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299 * and therefore to be safe I'm going to leave this test in here. |
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300 */ |
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301 if ( gCpuCaps.hasSSE ) { |
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302 printf( "Testing OS support for SSE unmasked exceptions... " ); |
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303 |
2272 | 304 // test_os_katmai_exception_support(); |
2268
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305 |
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306 if ( gCpuCaps.hasSSE ) { |
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307 printf( "yes.\n" ); |
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308 } else { |
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309 printf( "no!\n" ); |
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310 } |
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311 } |
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312 |
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313 /* Restore the original signal handlers. |
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314 */ |
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315 sigaction( SIGILL, &saved_sigill, NULL ); |
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316 sigaction( SIGFPE, &saved_sigfpe, NULL ); |
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317 |
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318 /* If we've gotten to here and the XMM CPUID bit is still set, we're |
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319 * safe to go ahead and hook out the SSE code throughout Mesa. |
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320 */ |
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321 if ( gCpuCaps.hasSSE ) { |
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322 printf( "Tests of OS support for SSE passed.\n" ); |
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323 } else { |
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324 printf( "Tests of OS support for SSE failed!\n" ); |
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325 } |
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326 #else |
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327 /* We can't use POSIX signal handling to test the availability of |
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328 * SSE, so we disable it by default. |
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329 */ |
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330 printf( "Cannot test OS support for SSE, disabling to be safe.\n" ); |
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331 gCpuCaps.hasSSE=0; |
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332 #endif /* _POSIX_SOURCE && X86_FXSR_MAGIC */ |
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333 #else |
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334 /* Do nothing on other platforms for now. |
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335 */ |
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336 message( "Not testing OS support for SSE, leaving disabled.\n" ); |
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337 gCpuCaps.hasSSE=0; |
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338 #endif /* __linux__ */ |
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339 } |
2280 | 340 #endif /* ARCH_X86 */ |