annotate common.h @ 390:48e08d9871da libavcodec

added proper memory handling functions - fixed include paths
author glantau
date Sat, 18 May 2002 22:56:25 +0000
parents 0eca28d16cbd
children b0aed401a756
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
1 #ifndef COMMON_H
986e461dc072 Initial revision
glantau
parents:
diff changeset
2 #define COMMON_H
986e461dc072 Initial revision
glantau
parents:
diff changeset
3
86
5e0eb8a361b7 version change
glantau
parents: 85
diff changeset
4 #define FFMPEG_VERSION_INT 0x000406
5e0eb8a361b7 version change
glantau
parents: 85
diff changeset
5 #define FFMPEG_VERSION "0.4.6"
64
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
6
213
e80ad397d30e Cygwin's mangling by Felix Buenemann <atmosfear@users.sourceforge.net>
nickols_k
parents: 199
diff changeset
7 #if defined(WIN32) && !defined(__MINGW32__) && !defined(__CYGWIN__)
64
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
8 #define CONFIG_WIN32
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
9 #endif
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
10
234
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
11 //#define ALT_BITSTREAM_WRITER
235
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
12 //#define ALIGNED_BITSTREAM_WRITER
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
13 //#define ALT_BITSTREAM_READER
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
14 //#define ALIGNED_BITSTREAM
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
15 #define FAST_GET_FIRST_VLC
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
16 //#define DUMP_STREAM // only works with the ALT_BITSTREAM_READER
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
17
10
f439e6867cac added HAVE_AV_CONFIG_H
glantau
parents: 2
diff changeset
18 #ifdef HAVE_AV_CONFIG_H
64
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
19 /* only include the following when compiling package */
390
48e08d9871da added proper memory handling functions - fixed include paths
glantau
parents: 370
diff changeset
20 #include "config.h"
64
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
21
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
22 #include <stdlib.h>
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
23 #include <stdio.h>
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
24 #include <string.h>
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
25 #include <errno.h>
390
48e08d9871da added proper memory handling functions - fixed include paths
glantau
parents: 370
diff changeset
26 #include <math.h>
64
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
27
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
28 #ifndef ENODATA
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
29 #define ENODATA 61
10
f439e6867cac added HAVE_AV_CONFIG_H
glantau
parents: 2
diff changeset
30 #endif
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
31
390
48e08d9871da added proper memory handling functions - fixed include paths
glantau
parents: 370
diff changeset
32 #endif /* HAVE_AV_CONFIG_H */
64
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
33
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
34 #ifdef CONFIG_WIN32
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
35
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
36 /* windows */
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
37
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
38 typedef unsigned short UINT16;
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
39 typedef signed short INT16;
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
40 typedef unsigned char UINT8;
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
41 typedef unsigned int UINT32;
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
42 typedef unsigned __int64 UINT64;
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
43 typedef signed char INT8;
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
44 typedef signed int INT32;
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
45 typedef signed __int64 INT64;
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
46
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
47 typedef UINT8 uint8_t;
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
48 typedef INT8 int8_t;
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
49 typedef UINT16 uint16_t;
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
50 typedef INT16 int16_t;
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
51 typedef UINT32 uint32_t;
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
52 typedef INT32 int32_t;
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
53
76
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
54 #ifndef __MINGW32__
64
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
55 #define INT64_C(c) (c ## i64)
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
56 #define UINT64_C(c) (c ## i64)
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
57
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
58 #define inline __inline
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
59
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
60 /*
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
61 Disable warning messages:
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
62 warning C4244: '=' : conversion from 'double' to 'float', possible loss of data
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
63 warning C4305: 'argument' : truncation from 'const double' to 'float'
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
64 */
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
65 #pragma warning( disable : 4244 )
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
66 #pragma warning( disable : 4305 )
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
67
76
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
68 #else
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
69 #define INT64_C(c) (c ## LL)
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
70 #define UINT64_C(c) (c ## ULL)
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
71 #endif /* __MINGW32__ */
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
72
64
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
73 #define M_PI 3.14159265358979323846
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
74 #define M_SQRT2 1.41421356237309504880 /* sqrt(2) */
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
75
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
76 #ifdef _DEBUG
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
77 #define DEBUG
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
78 #endif
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
79
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
80 // code from bits/byteswap.h (C) 1997, 1998 Free Software Foundation, Inc.
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
81 #define bswap_32(x) \
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
82 ((((x) & 0xff000000) >> 24) | (((x) & 0x00ff0000) >> 8) | \
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
83 (((x) & 0x0000ff00) << 8) | (((x) & 0x000000ff) << 24))
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
84 #define be2me_32(x) bswap_32(x)
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
85
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
86 #define snprintf _snprintf
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
87
76
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
88 #ifndef __MINGW32__
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
89 /* no config.h with VC */
64
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
90 #define CONFIG_ENCODERS 1
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
91 #define CONFIG_DECODERS 1
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
92 #define CONFIG_AC3 1
76
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
93 #endif
64
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
94
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
95 #else
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
96
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
97 /* unix */
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
98
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
99 #include <inttypes.h>
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
100
2
2e2c46c87460 fixed config for direct mplayer build compatibility
glantau
parents: 0
diff changeset
101 #ifndef __WINE_WINDEF16_H
2e2c46c87460 fixed config for direct mplayer build compatibility
glantau
parents: 0
diff changeset
102 /* workaround for typedef conflict in MPlayer (wine typedefs) */
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
103 typedef unsigned short UINT16;
986e461dc072 Initial revision
glantau
parents:
diff changeset
104 typedef signed short INT16;
986e461dc072 Initial revision
glantau
parents:
diff changeset
105 #endif
986e461dc072 Initial revision
glantau
parents:
diff changeset
106
986e461dc072 Initial revision
glantau
parents:
diff changeset
107 typedef unsigned char UINT8;
986e461dc072 Initial revision
glantau
parents:
diff changeset
108 typedef unsigned int UINT32;
986e461dc072 Initial revision
glantau
parents:
diff changeset
109 typedef unsigned long long UINT64;
986e461dc072 Initial revision
glantau
parents:
diff changeset
110 typedef signed char INT8;
986e461dc072 Initial revision
glantau
parents:
diff changeset
111 typedef signed int INT32;
986e461dc072 Initial revision
glantau
parents:
diff changeset
112 typedef signed long long INT64;
986e461dc072 Initial revision
glantau
parents:
diff changeset
113
64
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
114 #ifdef HAVE_AV_CONFIG_H
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
115
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
116 #ifdef __FreeBSD__
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
117 #include <sys/param.h>
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
118 #endif
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
119
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
120 #ifndef INT64_C
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
121 #define INT64_C(c) (c ## LL)
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
122 #define UINT64_C(c) (c ## ULL)
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
123 #endif
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
124
390
48e08d9871da added proper memory handling functions - fixed include paths
glantau
parents: 370
diff changeset
125 #include "bswap.h"
64
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
126
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
127 #ifdef USE_FASTMEMCPY
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
128 #include "fastmemcpy.h"
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
129 #endif
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
130
76
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
131 #endif /* HAVE_AV_CONFIG_H */
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
132
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
133 #endif /* !CONFIG_WIN32 */
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
134
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
135
76
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
136 /* debug stuff */
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
137 #ifdef HAVE_AV_CONFIG_H
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
138
64
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
139 #ifndef DEBUG
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
140 #define NDEBUG
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
141 #endif
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
142 #include <assert.h>
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
143
76
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
144 /* dprintf macros */
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
145 #if defined(CONFIG_WIN32) && !defined(__MINGW32__)
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
146
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
147 inline void dprintf(const char* fmt,...) {}
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
148
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
149 #else
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
150
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
151 #ifdef DEBUG
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
152 #define dprintf(fmt,args...) printf(fmt, ## args)
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
153 #else
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
154 #define dprintf(fmt,args...)
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
155 #endif
64
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
156
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
157 #endif /* !CONFIG_WIN32 */
5aa6292a1660 win32 fixes
glantau
parents: 21
diff changeset
158
76
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
159 #endif /* HAVE_AV_CONFIG_H */
0b09bd08ef4b win32 fixes
glantau
parents: 66
diff changeset
160
344
9f6071a87e17 fixed msmpeg4 infinite loop if buggy stream
michaelni
parents: 327
diff changeset
161 /* assume b>0 */
9f6071a87e17 fixed msmpeg4 infinite loop if buggy stream
michaelni
parents: 327
diff changeset
162 #define ROUNDED_DIV(a,b) (((a)>0 ? (a) + ((b)>>1) : (a) - ((b)>>1))/(b))
359
df0736462b9f move ABS() to common.h
michaelni
parents: 358
diff changeset
163 #define ABS(a) ((a) >= 0 ? (a) : (-(a)))
344
9f6071a87e17 fixed msmpeg4 infinite loop if buggy stream
michaelni
parents: 327
diff changeset
164
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
165 /* bit output */
986e461dc072 Initial revision
glantau
parents:
diff changeset
166
986e461dc072 Initial revision
glantau
parents:
diff changeset
167 struct PutBitContext;
986e461dc072 Initial revision
glantau
parents:
diff changeset
168
986e461dc072 Initial revision
glantau
parents:
diff changeset
169 typedef void (*WriteDataFunc)(void *, UINT8 *, int);
986e461dc072 Initial revision
glantau
parents:
diff changeset
170
986e461dc072 Initial revision
glantau
parents:
diff changeset
171 typedef struct PutBitContext {
234
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
172 #ifdef ALT_BITSTREAM_WRITER
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
173 UINT8 *buf, *buf_end;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
174 int index;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
175 #else
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
176 UINT32 bit_buf;
238
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
177 int bit_left;
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
178 UINT8 *buf, *buf_ptr, *buf_end;
234
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
179 #endif
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
180 INT64 data_out_size; /* in bytes */
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
181 } PutBitContext;
986e461dc072 Initial revision
glantau
parents:
diff changeset
182
986e461dc072 Initial revision
glantau
parents:
diff changeset
183 void init_put_bits(PutBitContext *s,
986e461dc072 Initial revision
glantau
parents:
diff changeset
184 UINT8 *buffer, int buffer_size,
986e461dc072 Initial revision
glantau
parents:
diff changeset
185 void *opaque,
986e461dc072 Initial revision
glantau
parents:
diff changeset
186 void (*write_data)(void *, UINT8 *, int));
234
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
187
85
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
188 INT64 get_bit_count(PutBitContext *s); /* XXX: change function name */
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
189 void align_put_bits(PutBitContext *s);
986e461dc072 Initial revision
glantau
parents:
diff changeset
190 void flush_put_bits(PutBitContext *s);
358
2066dc543be4 move put_string() to common.{c,h}
michaelni
parents: 344
diff changeset
191 void put_string(PutBitContext * pbc, char *s);
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
192
986e461dc072 Initial revision
glantau
parents:
diff changeset
193 /* jpeg specific put_bits */
986e461dc072 Initial revision
glantau
parents:
diff changeset
194 void jflush_put_bits(PutBitContext *s);
986e461dc072 Initial revision
glantau
parents:
diff changeset
195
986e461dc072 Initial revision
glantau
parents:
diff changeset
196 /* bit input */
986e461dc072 Initial revision
glantau
parents:
diff changeset
197
986e461dc072 Initial revision
glantau
parents:
diff changeset
198 typedef struct GetBitContext {
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
199 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
200 int index;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
201 UINT8 *buffer;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
202 #else
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
203 UINT32 bit_buf;
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
204 int bit_cnt;
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
205 UINT8 *buf, *buf_ptr, *buf_end;
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
206 #endif
277
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
207 int size;
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
208 } GetBitContext;
986e461dc072 Initial revision
glantau
parents:
diff changeset
209
290
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
210 static inline int get_bits_count(GetBitContext *s);
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
211
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
212 typedef struct VLC {
986e461dc072 Initial revision
glantau
parents:
diff changeset
213 int bits;
986e461dc072 Initial revision
glantau
parents:
diff changeset
214 INT16 *table_codes;
986e461dc072 Initial revision
glantau
parents:
diff changeset
215 INT8 *table_bits;
986e461dc072 Initial revision
glantau
parents:
diff changeset
216 int table_size, table_allocated;
986e461dc072 Initial revision
glantau
parents:
diff changeset
217 } VLC;
986e461dc072 Initial revision
glantau
parents:
diff changeset
218
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
219 /* used to avoid missaligned exceptions on some archs (alpha, ...) */
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
220 #ifdef ARCH_X86
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
221 #define unaligned32(a) (*(UINT32*)(a))
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
222 #else
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
223 #ifdef __GNUC__
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
224 static inline uint32_t unaligned32(const void *v) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
225 struct Unaligned {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
226 uint32_t i;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
227 } __attribute__((packed));
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
228
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
229 return ((const struct Unaligned *) v)->i;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
230 }
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
231 #elif defined(__DECC)
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
232 static inline uint32_t unaligned32(const void *v) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
233 return *(const __unaligned uint32_t *) v;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
234 }
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
235 #else
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
236 static inline uint32_t unaligned32(const void *v) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
237 return *(const uint32_t *) v;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
238 }
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
239 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
240 #endif //!ARCH_X86
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
241
238
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
242 #ifndef ALT_BITSTREAM_WRITER
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
243 static inline void put_bits(PutBitContext *s, int n, unsigned int value)
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
244 {
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
245 unsigned int bit_buf;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
246 int bit_left;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
247
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
248 #ifdef STATS
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
249 st_out_bit_counts[st_current_index] += n;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
250 #endif
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
251 // printf("put_bits=%d %x\n", n, value);
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
252 assert(n == 32 || value < (1U << n));
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
253
238
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
254 bit_buf = s->bit_buf;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
255 bit_left = s->bit_left;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
256
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
257 // printf("n=%d value=%x cnt=%d buf=%x\n", n, value, bit_cnt, bit_buf);
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
258 /* XXX: optimize */
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
259 if (n < bit_left) {
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
260 bit_buf = (bit_buf<<n) | value;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
261 bit_left-=n;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
262 } else {
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
263 bit_buf<<=bit_left;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
264 bit_buf |= value >> (n - bit_left);
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
265 *(UINT32 *)s->buf_ptr = be2me_32(bit_buf);
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
266 //printf("bitbuf = %08x\n", bit_buf);
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
267 s->buf_ptr+=4;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
268 bit_left+=32 - n;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
269 bit_buf = value;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
270 }
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
271
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
272 s->bit_buf = bit_buf;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
273 s->bit_left = bit_left;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
274 }
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
275 #endif
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
276
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
277
234
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
278 #ifdef ALT_BITSTREAM_WRITER
235
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
279 static inline void put_bits(PutBitContext *s, int n, unsigned int value)
234
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
280 {
235
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
281 #ifdef ALIGNED_BITSTREAM_WRITER
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
282 #ifdef ARCH_X86
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
283 asm volatile(
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
284 "movl %0, %%ecx \n\t"
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
285 "xorl %%eax, %%eax \n\t"
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
286 "shrdl %%cl, %1, %%eax \n\t"
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
287 "shrl %%cl, %1 \n\t"
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
288 "movl %0, %%ecx \n\t"
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
289 "shrl $3, %%ecx \n\t"
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
290 "andl $0xFFFFFFFC, %%ecx \n\t"
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
291 "bswapl %1 \n\t"
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
292 "orl %1, (%2, %%ecx) \n\t"
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
293 "bswapl %%eax \n\t"
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
294 "addl %3, %0 \n\t"
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
295 "movl %%eax, 4(%2, %%ecx) \n\t"
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
296 : "=&r" (s->index), "=&r" (value)
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
297 : "r" (s->buf), "r" (n), "0" (s->index), "1" (value<<(-n))
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
298 : "%eax", "%ecx"
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
299 );
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
300 #else
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
301 int index= s->index;
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
302 uint32_t *ptr= ((uint32_t *)s->buf)+(index>>5);
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
303
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
304 value<<= 32-n;
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
305
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
306 ptr[0] |= be2me_32(value>>(index&31));
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
307 ptr[1] = be2me_32(value<<(32-(index&31)));
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
308 //if(n>24) printf("%d %d\n", n, value);
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
309 index+= n;
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
310 s->index= index;
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
311 #endif
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
312 #else //ALIGNED_BITSTREAM_WRITER
234
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
313 #ifdef ARCH_X86
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
314 asm volatile(
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
315 "movl $7, %%ecx \n\t"
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
316 "andl %0, %%ecx \n\t"
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
317 "addl %3, %%ecx \n\t"
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
318 "negl %%ecx \n\t"
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
319 "shll %%cl, %1 \n\t"
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
320 "bswapl %1 \n\t"
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
321 "movl %0, %%ecx \n\t"
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
322 "shrl $3, %%ecx \n\t"
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
323 "orl %1, (%%ecx, %2) \n\t"
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
324 "addl %3, %0 \n\t"
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
325 "movl $0, 4(%%ecx, %2) \n\t"
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
326 : "=&r" (s->index), "=&r" (value)
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
327 : "r" (s->buf), "r" (n), "0" (s->index), "1" (value)
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
328 : "%ecx"
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
329 );
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
330 #else
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
331 int index= s->index;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
332 uint32_t *ptr= (uint32_t*)(((uint8_t *)s->buf)+(index>>3));
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
333
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
334 ptr[0] |= be2me_32(value<<(32-n-(index&7) ));
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
335 ptr[1] = 0;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
336 //if(n>24) printf("%d %d\n", n, value);
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
337 index+= n;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
338 s->index= index;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
339 #endif
235
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
340 #endif //!ALIGNED_BITSTREAM_WRITER
234
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
341 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
342 #endif
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
343
238
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
344 #ifndef ALT_BITSTREAM_WRITER
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
345 /* for jpeg : escape 0xff with 0x00 after it */
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
346 static inline void jput_bits(PutBitContext *s, int n, unsigned int value)
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
347 {
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
348 unsigned int bit_buf, b;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
349 int bit_left, i;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
350
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
351 assert(n == 32 || value < (1U << n));
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
352
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
353 bit_buf = s->bit_buf;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
354 bit_left = s->bit_left;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
355
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
356 //printf("n=%d value=%x cnt=%d buf=%x\n", n, value, bit_cnt, bit_buf);
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
357 /* XXX: optimize */
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
358 if (n < bit_left) {
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
359 bit_buf = (bit_buf<<n) | value;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
360 bit_left-=n;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
361 } else {
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
362 bit_buf<<=bit_left;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
363 bit_buf |= value >> (n - bit_left);
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
364 /* handle escape */
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
365 for(i=0;i<4;i++) {
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
366 b = (bit_buf >> 24);
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
367 *(s->buf_ptr++) = b;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
368 if (b == 0xff)
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
369 *(s->buf_ptr++) = 0;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
370 bit_buf <<= 8;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
371 }
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
372
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
373 bit_left+= 32 - n;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
374 bit_buf = value;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
375 }
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
376
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
377 s->bit_buf = bit_buf;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
378 s->bit_left = bit_left;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
379 }
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
380 #endif
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
381
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
382
234
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
383 #ifdef ALT_BITSTREAM_WRITER
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
384 static inline void jput_bits(PutBitContext *s, int n, int value)
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
385 {
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
386 int index= s->index;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
387 uint32_t *ptr= (uint32_t*)(((uint8_t *)s->buf)+(index>>3));
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
388 int v= ptr[0];
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
389 //if(n>24) printf("%d %d\n", n, value);
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
390
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
391 v |= be2me_32(value<<(32-n-(index&7) ));
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
392 if(((v+0x01010101)^0xFFFFFFFF)&v&0x80808080)
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
393 {
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
394 /* handle idiotic (m)jpeg escapes */
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
395 uint8_t *bPtr= (uint8_t*)ptr;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
396 int numChecked= ((index+n)>>3) - (index>>3);
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
397
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
398 v= be2me_32(v);
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
399
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
400 *(bPtr++)= v>>24;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
401 if((v&0xFF000000)==0xFF000000 && numChecked>0){
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
402 *(bPtr++)= 0x00;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
403 index+=8;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
404 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
405 *(bPtr++)= (v>>16)&0xFF;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
406 if((v&0x00FF0000)==0x00FF0000 && numChecked>1){
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
407 *(bPtr++)= 0x00;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
408 index+=8;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
409 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
410 *(bPtr++)= (v>>8)&0xFF;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
411 if((v&0x0000FF00)==0x0000FF00 && numChecked>2){
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
412 *(bPtr++)= 0x00;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
413 index+=8;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
414 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
415 *(bPtr++)= v&0xFF;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
416 if((v&0x000000FF)==0x000000FF && numChecked>3){
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
417 *(bPtr++)= 0x00;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
418 index+=8;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
419 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
420 *((uint32_t*)bPtr)= 0;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
421 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
422 else
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
423 {
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
424 ptr[0] = v;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
425 ptr[1] = 0;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
426 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
427
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
428 index+= n;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
429 s->index= index;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
430 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
431 #endif
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
432
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
433
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
434 static inline uint8_t* pbBufPtr(PutBitContext *s)
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
435 {
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
436 #ifdef ALT_BITSTREAM_WRITER
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
437 return s->buf + (s->index>>3);
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
438 #else
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
439 return s->buf_ptr;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
440 #endif
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
441 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
442
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
443 void init_get_bits(GetBitContext *s,
986e461dc072 Initial revision
glantau
parents:
diff changeset
444 UINT8 *buffer, int buffer_size);
986e461dc072 Initial revision
glantau
parents:
diff changeset
445
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
446 #ifndef ALT_BITSTREAM_READER
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
447 unsigned int get_bits_long(GetBitContext *s, int n);
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
448 unsigned int show_bits_long(GetBitContext *s, int n);
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
449 #endif
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
450
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
451 static inline unsigned int get_bits(GetBitContext *s, int n){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
452 #ifdef ALT_BITSTREAM_READER
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
453 #ifdef ALIGNED_BITSTREAM
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
454 int index= s->index;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
455 uint32_t result1= be2me_32( ((uint32_t *)s->buffer)[index>>5] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
456 uint32_t result2= be2me_32( ((uint32_t *)s->buffer)[(index>>5) + 1] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
457 #ifdef ARCH_X86
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
458 asm ("shldl %%cl, %2, %0\n\t"
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
459 : "=r" (result1)
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
460 : "0" (result1), "r" (result2), "c" (index));
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
461 #else
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
462 result1<<= (index&0x1F);
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
463 result2= (result2>>1) >> (31-(index&0x1F));
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
464 result1|= result2;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
465 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
466 result1>>= 32 - n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
467 index+= n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
468 s->index= index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
469
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
470 return result1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
471 #else //ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
472 int index= s->index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
473 uint32_t result= be2me_32( unaligned32( ((uint8_t *)s->buffer)+(index>>3) ) );
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
474
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
475 result<<= (index&0x07);
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
476 result>>= 32 - n;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
477 index+= n;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
478 s->index= index;
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
479 #ifdef DUMP_STREAM
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
480 while(n){
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
481 printf("%d", (result>>(n-1))&1);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
482 n--;
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
483 }
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
484 printf(" ");
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
485 #endif
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
486 return result;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
487 #endif //!ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
488 #else //ALT_BITSTREAM_READER
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
489 if(s->bit_cnt>=n){
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
490 /* most common case here */
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
491 unsigned int val = s->bit_buf >> (32 - n);
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
492 s->bit_buf <<= n;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
493 s->bit_cnt -= n;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
494 #ifdef STATS
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
495 st_bit_counts[st_current_index] += n;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
496 #endif
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
497 return val;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
498 }
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
499 return get_bits_long(s,n);
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
500 #endif //!ALT_BITSTREAM_READER
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
501 }
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
502
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
503 static inline unsigned int get_bits1(GetBitContext *s){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
504 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
505 int index= s->index;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
506 uint8_t result= s->buffer[ index>>3 ];
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
507 result<<= (index&0x07);
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
508 result>>= 8 - 1;
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
509 index++;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
510 s->index= index;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
511
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
512 #ifdef DUMP_STREAM
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
513 printf("%d ", result);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
514 #endif
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
515 return result;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
516 #else
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
517 if(s->bit_cnt>0){
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
518 /* most common case here */
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
519 unsigned int val = s->bit_buf >> 31;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
520 s->bit_buf <<= 1;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
521 s->bit_cnt--;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
522 #ifdef STATS
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
523 st_bit_counts[st_current_index]++;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
524 #endif
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
525 return val;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
526 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
527 return get_bits_long(s,1);
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
528 #endif
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
529 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
530
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
531 /* This function is identical to get_bits(), the only */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
532 /* diference is that it doesn't touch the buffer */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
533 /* it is usefull to see the buffer. */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
534 static inline unsigned int show_bits(GetBitContext *s, int n)
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
535 {
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
536 #ifdef ALT_BITSTREAM_READER
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
537 #ifdef ALIGNED_BITSTREAM
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
538 int index= s->index;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
539 uint32_t result1= be2me_32( ((uint32_t *)s->buffer)[index>>5] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
540 uint32_t result2= be2me_32( ((uint32_t *)s->buffer)[(index>>5) + 1] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
541 #ifdef ARCH_X86
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
542 asm ("shldl %%cl, %2, %0\n\t"
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
543 : "=r" (result1)
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
544 : "0" (result1), "r" (result2), "c" (index));
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
545 #else
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
546 result1<<= (index&0x1F);
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
547 result2= (result2>>1) >> (31-(index&0x1F));
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
548 result1|= result2;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
549 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
550 result1>>= 32 - n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
551
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
552 return result1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
553 #else //ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
554 int index= s->index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
555 uint32_t result= be2me_32( unaligned32( ((uint8_t *)s->buffer)+(index>>3) ) );
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
556
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
557 result<<= (index&0x07);
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
558 result>>= 32 - n;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
559
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
560 return result;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
561 #endif //!ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
562 #else //ALT_BITSTREAM_READER
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
563 if(s->bit_cnt>=n) {
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
564 /* most common case here */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
565 unsigned int val = s->bit_buf >> (32 - n);
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
566 return val;
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
567 }
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
568 return show_bits_long(s,n);
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
569 #endif //!ALT_BITSTREAM_READER
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
570 }
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
571
290
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
572 static inline int show_aligned_bits(GetBitContext *s, int offset, int n)
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
573 {
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
574 #ifdef ALT_BITSTREAM_READER
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
575 #ifdef ALIGNED_BITSTREAM
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
576 int index= (s->index + offset + 7)&(~7);
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
577 uint32_t result1= be2me_32( ((uint32_t *)s->buffer)[index>>5] );
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
578 uint32_t result2= be2me_32( ((uint32_t *)s->buffer)[(index>>5) + 1] );
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
579 #ifdef ARCH_X86
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
580 asm ("shldl %%cl, %2, %0\n\t"
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
581 : "=r" (result1)
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
582 : "0" (result1), "r" (result2), "c" (index));
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
583 #else
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
584 result1<<= (index&0x1F);
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
585 result2= (result2>>1) >> (31-(index&0x1F));
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
586 result1|= result2;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
587 #endif
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
588 result1>>= 32 - n;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
589
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
590 return result1;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
591 #else //ALIGNED_BITSTREAM
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
592 int index= (s->index + offset + 7)>>3;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
593 uint32_t result= be2me_32( unaligned32( ((uint8_t *)s->buffer)+index ) );
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
594
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
595 result>>= 32 - n;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
596
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
597 return result;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
598 #endif //!ALIGNED_BITSTREAM
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
599 #else //ALT_BITSTREAM_READER
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
600 int index= (get_bits_count(s) + offset + 7)>>3;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
601 uint32_t result= be2me_32( unaligned32( ((uint8_t *)s->buf)+index ) );
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
602
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
603 result>>= 32 - n;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
604 //printf(" %X %X %d \n", (int)(((uint8_t *)s->buf)+index ), (int)s->buf_ptr, s->bit_cnt);
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
605 return result;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
606 #endif //!ALT_BITSTREAM_READER
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
607 }
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
608
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
609 static inline void skip_bits(GetBitContext *s, int n){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
610 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
611 s->index+= n;
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
612 #ifdef DUMP_STREAM
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
613 {
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
614 int result;
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
615 s->index-= n;
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
616 result= get_bits(s, n);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
617 }
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
618 #endif
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
619
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
620 #else
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
621 if(s->bit_cnt>=n){
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
622 /* most common case here */
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
623 s->bit_buf <<= n;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
624 s->bit_cnt -= n;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
625 #ifdef STATS
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
626 st_bit_counts[st_current_index] += n;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
627 #endif
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
628 } else {
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
629 get_bits_long(s,n);
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
630 }
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
631 #endif
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
632 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
633
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
634 static inline void skip_bits1(GetBitContext *s){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
635 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
636 s->index++;
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
637 #ifdef DUMP_STREAM
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
638 s->index--;
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
639 printf("%d ", get_bits1(s));
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
640 #endif
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
641 #else
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
642 if(s->bit_cnt>0){
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
643 /* most common case here */
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
644 s->bit_buf <<= 1;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
645 s->bit_cnt--;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
646 #ifdef STATS
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
647 st_bit_counts[st_current_index]++;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
648 #endif
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
649 } else {
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
650 get_bits_long(s,1);
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
651 }
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
652 #endif
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
653 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
654
85
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
655 static inline int get_bits_count(GetBitContext *s)
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
656 {
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
657 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
658 return s->index;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
659 #else
85
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
660 return (s->buf_ptr - s->buf) * 8 - s->bit_cnt;
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
661 #endif
85
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
662 }
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
663
264
28c5c62b1c4c support decoding (with mplayer) of 3 .mp4 files from mphq
michaelni
parents: 238
diff changeset
664 int check_marker(GetBitContext *s, char *msg);
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
665 void align_get_bits(GetBitContext *s);
986e461dc072 Initial revision
glantau
parents:
diff changeset
666 int init_vlc(VLC *vlc, int nb_bits, int nb_codes,
986e461dc072 Initial revision
glantau
parents:
diff changeset
667 const void *bits, int bits_wrap, int bits_size,
986e461dc072 Initial revision
glantau
parents:
diff changeset
668 const void *codes, int codes_wrap, int codes_size);
986e461dc072 Initial revision
glantau
parents:
diff changeset
669 void free_vlc(VLC *vlc);
986e461dc072 Initial revision
glantau
parents:
diff changeset
670
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
671 #ifdef ALT_BITSTREAM_READER
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
672 #ifdef ALIGNED_BITSTREAM
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
673 #ifdef ARCH_X86
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
674 #define SHOW_BITS(s, val, n) \
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
675 val= be2me_32( ((uint32_t *)(s)->buffer)[bit_cnt>>5] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
676 {uint32_t result2= be2me_32( ((uint32_t *)(s)->buffer)[(bit_cnt>>5) + 1] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
677 asm ("shldl %%cl, %2, %0\n\t"\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
678 : "=r" (val)\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
679 : "0" (val), "r" (result2), "c" (bit_cnt));\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
680 ((uint32_t)val)>>= 32 - n;}
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
681 #else //ARCH_X86
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
682 #define SHOW_BITS(s, val, n) \
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
683 val= be2me_32( ((uint32_t *)(s)->buffer)[bit_cnt>>5] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
684 {uint32_t result2= be2me_32( ((uint32_t *)(s)->buffer)[(bit_cnt>>5) + 1] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
685 val<<= (bit_cnt&0x1F);\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
686 result2= (result2>>1) >> (31-(bit_cnt&0x1F));\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
687 val|= result2;\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
688 ((uint32_t)val)>>= 32 - n;}
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
689 #endif //!ARCH_X86
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
690 #else //ALIGNED_BITSTREAM
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
691 #define SHOW_BITS(s, val, n) \
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
692 val= be2me_32( unaligned32( ((uint8_t *)(s)->buffer)+(bit_cnt>>3) ) );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
693 val<<= (bit_cnt&0x07);\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
694 ((uint32_t)val)>>= 32 - n;
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
695 #endif // !ALIGNED_BITSTREAM
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
696 #define FLUSH_BITS(n) bit_cnt+=n;
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
697 #define SAVE_BITS(s) bit_cnt= (s)->index;
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
698 #define RESTORE_BITS(s) (s)->index= bit_cnt;
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
699 #else
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
700
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
701 /* macro to go faster */
986e461dc072 Initial revision
glantau
parents:
diff changeset
702 /* n must be <= 24 */
986e461dc072 Initial revision
glantau
parents:
diff changeset
703 /* XXX: optimize buffer end test */
986e461dc072 Initial revision
glantau
parents:
diff changeset
704 #define SHOW_BITS(s, val, n)\
986e461dc072 Initial revision
glantau
parents:
diff changeset
705 {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
706 if (bit_cnt < n && buf_ptr < (s)->buf_end) {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
707 bit_buf |= *buf_ptr++ << (24 - bit_cnt);\
986e461dc072 Initial revision
glantau
parents:
diff changeset
708 bit_cnt += 8;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
709 if (bit_cnt < n && buf_ptr < (s)->buf_end) {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
710 bit_buf |= *buf_ptr++ << (24 - bit_cnt);\
986e461dc072 Initial revision
glantau
parents:
diff changeset
711 bit_cnt += 8;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
712 if (bit_cnt < n && buf_ptr < (s)->buf_end) {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
713 bit_buf |= *buf_ptr++ << (24 - bit_cnt);\
986e461dc072 Initial revision
glantau
parents:
diff changeset
714 bit_cnt += 8;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
715 }\
986e461dc072 Initial revision
glantau
parents:
diff changeset
716 }\
986e461dc072 Initial revision
glantau
parents:
diff changeset
717 }\
986e461dc072 Initial revision
glantau
parents:
diff changeset
718 val = bit_buf >> (32 - n);\
986e461dc072 Initial revision
glantau
parents:
diff changeset
719 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
720
986e461dc072 Initial revision
glantau
parents:
diff changeset
721 /* SHOW_BITS with n1 >= n must be been done before */
986e461dc072 Initial revision
glantau
parents:
diff changeset
722 #define FLUSH_BITS(n)\
986e461dc072 Initial revision
glantau
parents:
diff changeset
723 {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
724 bit_buf <<= n;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
725 bit_cnt -= n;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
726 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
727
986e461dc072 Initial revision
glantau
parents:
diff changeset
728 #define SAVE_BITS(s) \
986e461dc072 Initial revision
glantau
parents:
diff changeset
729 {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
730 bit_cnt = (s)->bit_cnt;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
731 bit_buf = (s)->bit_buf;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
732 buf_ptr = (s)->buf_ptr;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
733 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
734
986e461dc072 Initial revision
glantau
parents:
diff changeset
735 #define RESTORE_BITS(s) \
986e461dc072 Initial revision
glantau
parents:
diff changeset
736 {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
737 (s)->buf_ptr = buf_ptr;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
738 (s)->bit_buf = bit_buf;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
739 (s)->bit_cnt = bit_cnt;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
740 }
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
741 #endif // !ALT_BITSTREAM_READER
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
742
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
743 static inline int get_vlc(GetBitContext *s, VLC *vlc)
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
744 {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
745 int code, n, nb_bits, index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
746 INT16 *table_codes;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
747 INT8 *table_bits;
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
748 int bit_cnt;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
749 #ifndef ALT_BITSTREAM_READER
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
750 UINT32 bit_buf;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
751 UINT8 *buf_ptr;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
752 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
753
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
754 SAVE_BITS(s);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
755 nb_bits = vlc->bits;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
756 table_codes = vlc->table_codes;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
757 table_bits = vlc->table_bits;
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
758
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
759 #ifdef FAST_GET_FIRST_VLC
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
760 SHOW_BITS(s, index, nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
761 code = table_codes[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
762 n = table_bits[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
763 if (n > 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
764 /* most common case (90%)*/
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
765 FLUSH_BITS(n);
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
766 #ifdef DUMP_STREAM
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
767 {
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
768 int n= bit_cnt - s->index;
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
769 skip_bits(s, n);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
770 RESTORE_BITS(s);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
771 }
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
772 #endif
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
773 RESTORE_BITS(s);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
774 return code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
775 } else if (n == 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
776 return -1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
777 } else {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
778 FLUSH_BITS(nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
779 nb_bits = -n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
780 table_codes = vlc->table_codes + code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
781 table_bits = vlc->table_bits + code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
782 }
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
783 #endif
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
784 for(;;) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
785 SHOW_BITS(s, index, nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
786 code = table_codes[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
787 n = table_bits[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
788 if (n > 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
789 /* most common case */
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
790 FLUSH_BITS(n);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
791 #ifdef STATS
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
792 st_bit_counts[st_current_index] += n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
793 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
794 break;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
795 } else if (n == 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
796 return -1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
797 } else {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
798 FLUSH_BITS(nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
799 #ifdef STATS
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
800 st_bit_counts[st_current_index] += nb_bits;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
801 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
802 nb_bits = -n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
803 table_codes = vlc->table_codes + code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
804 table_bits = vlc->table_bits + code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
805 }
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
806 }
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
807 #ifdef DUMP_STREAM
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
808 {
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
809 int n= bit_cnt - s->index;
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
810 skip_bits(s, n);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
811 RESTORE_BITS(s);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
812 }
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
813 #endif
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
814 RESTORE_BITS(s);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
815 return code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
816 }
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
817
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
818
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
819 /* define it to include statistics code (useful only for optimizing
986e461dc072 Initial revision
glantau
parents:
diff changeset
820 codec efficiency */
986e461dc072 Initial revision
glantau
parents:
diff changeset
821 //#define STATS
986e461dc072 Initial revision
glantau
parents:
diff changeset
822
986e461dc072 Initial revision
glantau
parents:
diff changeset
823 #ifdef STATS
986e461dc072 Initial revision
glantau
parents:
diff changeset
824
986e461dc072 Initial revision
glantau
parents:
diff changeset
825 enum {
986e461dc072 Initial revision
glantau
parents:
diff changeset
826 ST_UNKNOWN,
986e461dc072 Initial revision
glantau
parents:
diff changeset
827 ST_DC,
986e461dc072 Initial revision
glantau
parents:
diff changeset
828 ST_INTRA_AC,
986e461dc072 Initial revision
glantau
parents:
diff changeset
829 ST_INTER_AC,
986e461dc072 Initial revision
glantau
parents:
diff changeset
830 ST_INTRA_MB,
986e461dc072 Initial revision
glantau
parents:
diff changeset
831 ST_INTER_MB,
986e461dc072 Initial revision
glantau
parents:
diff changeset
832 ST_MV,
986e461dc072 Initial revision
glantau
parents:
diff changeset
833 ST_NB,
986e461dc072 Initial revision
glantau
parents:
diff changeset
834 };
986e461dc072 Initial revision
glantau
parents:
diff changeset
835
986e461dc072 Initial revision
glantau
parents:
diff changeset
836 extern int st_current_index;
986e461dc072 Initial revision
glantau
parents:
diff changeset
837 extern unsigned int st_bit_counts[ST_NB];
986e461dc072 Initial revision
glantau
parents:
diff changeset
838 extern unsigned int st_out_bit_counts[ST_NB];
986e461dc072 Initial revision
glantau
parents:
diff changeset
839
986e461dc072 Initial revision
glantau
parents:
diff changeset
840 void print_stats(void);
986e461dc072 Initial revision
glantau
parents:
diff changeset
841 #endif
986e461dc072 Initial revision
glantau
parents:
diff changeset
842
986e461dc072 Initial revision
glantau
parents:
diff changeset
843 /* misc math functions */
986e461dc072 Initial revision
glantau
parents:
diff changeset
844
151
ae0516eadae2 fixed gcc-3.0.x compilation (by Michael Niedermayer)
nickols_k
parents: 144
diff changeset
845 static inline int av_log2(unsigned int v)
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
846 {
986e461dc072 Initial revision
glantau
parents:
diff changeset
847 int n;
986e461dc072 Initial revision
glantau
parents:
diff changeset
848
986e461dc072 Initial revision
glantau
parents:
diff changeset
849 n = 0;
986e461dc072 Initial revision
glantau
parents:
diff changeset
850 if (v & 0xffff0000) {
986e461dc072 Initial revision
glantau
parents:
diff changeset
851 v >>= 16;
986e461dc072 Initial revision
glantau
parents:
diff changeset
852 n += 16;
986e461dc072 Initial revision
glantau
parents:
diff changeset
853 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
854 if (v & 0xff00) {
986e461dc072 Initial revision
glantau
parents:
diff changeset
855 v >>= 8;
986e461dc072 Initial revision
glantau
parents:
diff changeset
856 n += 8;
986e461dc072 Initial revision
glantau
parents:
diff changeset
857 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
858 if (v & 0xf0) {
986e461dc072 Initial revision
glantau
parents:
diff changeset
859 v >>= 4;
986e461dc072 Initial revision
glantau
parents:
diff changeset
860 n += 4;
986e461dc072 Initial revision
glantau
parents:
diff changeset
861 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
862 if (v & 0xc) {
986e461dc072 Initial revision
glantau
parents:
diff changeset
863 v >>= 2;
986e461dc072 Initial revision
glantau
parents:
diff changeset
864 n += 2;
986e461dc072 Initial revision
glantau
parents:
diff changeset
865 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
866 if (v & 0x2) {
986e461dc072 Initial revision
glantau
parents:
diff changeset
867 n++;
986e461dc072 Initial revision
glantau
parents:
diff changeset
868 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
869 return n;
986e461dc072 Initial revision
glantau
parents:
diff changeset
870 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
871
277
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
872 /* median of 3 */
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
873 static inline int mid_pred(int a, int b, int c)
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
874 {
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
875 int vmin, vmax;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
876 vmax = vmin = a;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
877 if (b < vmin)
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
878 vmin = b;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
879 else
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
880 vmax = b;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
881
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
882 if (c < vmin)
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
883 vmin = c;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
884 else if (c > vmax)
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
885 vmax = c;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
886
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
887 return a + b + c - vmin - vmax;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
888 }
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
889
327
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
890 static inline int clip(int a, int amin, int amax)
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
891 {
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
892 if (a < amin)
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
893 return amin;
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
894 else if (a > amax)
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
895 return amax;
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
896 else
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
897 return a;
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
898 }
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
899
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
900 /* memory */
390
48e08d9871da added proper memory handling functions - fixed include paths
glantau
parents: 370
diff changeset
901 void *av_malloc(int size);
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
902 void *av_mallocz(int size);
390
48e08d9871da added proper memory handling functions - fixed include paths
glantau
parents: 370
diff changeset
903 void av_free(void *ptr);
48e08d9871da added proper memory handling functions - fixed include paths
glantau
parents: 370
diff changeset
904 #define av_freep(p) do { av_free(*p); *p = NULL; } while (0)
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
905
324
9c6f056f0e41 fixed mpeg4 time stuff on encoding
michaelni
parents: 306
diff changeset
906 /* math */
9c6f056f0e41 fixed mpeg4 time stuff on encoding
michaelni
parents: 306
diff changeset
907 int ff_gcd(int a, int b);
9c6f056f0e41 fixed mpeg4 time stuff on encoding
michaelni
parents: 306
diff changeset
908
370
0eca28d16cbd clamp intra matrix to 8bit for mjpeg (workaround for qscale>=25)
al3x
parents: 359
diff changeset
909 #define CLAMP_TO_8BIT(d) ((d > 0xff) ? 0xff : (d < 0) ? 0 : d)
0eca28d16cbd clamp intra matrix to 8bit for mjpeg (workaround for qscale>=25)
al3x
parents: 359
diff changeset
910
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
911 #endif