Mercurial > mplayer.hg
annotate vidix/drivers/mach64_vid.c @ 4872:995ee733e8d4
YVU9 support
fixing framesize & alignment
setting colorkey at a more correct place
author | michael |
---|---|
date | Tue, 26 Feb 2002 22:15:08 +0000 |
parents | 550e86ba0390 |
children | 5320e2e683e8 |
rev | line source |
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4691 | 1 /* |
2 mach64_vid - VIDIX based video driver for Mach64 and 3DRage chips | |
3 Copyrights 2002 Nick Kurshev. This file is based on sources from | |
4 GATOS (gatos.sf.net) and X11 (www.xfree86.org) | |
5 Licence: GPL | |
4866 | 6 WARNING: THIS DRIVER IS IN BETTA STAGE |
4691 | 7 */ |
8 #include <errno.h> | |
9 #include <stdio.h> | |
10 #include <stdlib.h> | |
11 #include <string.h> | |
12 #include <math.h> | |
13 #include <inttypes.h> | |
14 #include <fcntl.h> | |
15 | |
16 #include "../vidix.h" | |
17 #include "../fourcc.h" | |
18 #include "../../libdha/libdha.h" | |
19 #include "../../libdha/pci_ids.h" | |
20 #include "../../libdha/pci_names.h" | |
21 | |
22 #include "mach64.h" | |
23 | |
24 #define UNUSED(x) ((void)(x)) /**< Removes warning about unused arguments */ | |
25 | |
26 static void *mach64_mmio_base = 0; | |
27 static void *mach64_mem_base = 0; | |
4721 | 28 static int32_t mach64_overlay_offset = 0; |
4691 | 29 static uint32_t mach64_ram_size = 0; |
4866 | 30 static uint32_t mach64_buffer_base[10][3]; |
31 static int num_mach64_buffers=-1; | |
4691 | 32 |
33 pciinfo_t pci_info; | |
34 static int probed = 0; | |
35 static int __verbose = 0; | |
4721 | 36 |
4758 | 37 #define VERBOSE_LEVEL 1 |
38 | |
4721 | 39 typedef struct bes_registers_s |
40 { | |
41 /* base address of yuv framebuffer */ | |
42 uint32_t yuv_base; | |
43 uint32_t fourcc; | |
44 /* YUV BES registers */ | |
45 uint32_t reg_load_cntl; | |
46 uint32_t scale_inc; | |
47 uint32_t y_x_start; | |
48 uint32_t y_x_end; | |
49 uint32_t vid_buf_pitch; | |
50 uint32_t height_width; | |
51 | |
52 uint32_t scale_cntl; | |
53 uint32_t exclusive_horz; | |
54 uint32_t auto_flip_cntl; | |
55 uint32_t filter_cntl; | |
56 uint32_t key_cntl; | |
57 uint32_t test; | |
58 /* Configurable stuff */ | |
59 | |
60 int brightness; | |
61 int saturation; | |
62 | |
63 int ckey_on; | |
64 uint32_t graphics_key_clr; | |
65 uint32_t graphics_key_msk; | |
66 | |
67 int deinterlace_on; | |
68 uint32_t deinterlace_pattern; | |
69 | |
70 } bes_registers_t; | |
71 | |
72 static bes_registers_t besr; | |
73 | |
74 typedef struct video_registers_s | |
75 { | |
76 const char * sname; | |
77 uint32_t name; | |
78 uint32_t value; | |
79 }video_registers_t; | |
80 | |
81 static bes_registers_t besr; | |
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82 |
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83 /* Graphic keys */ |
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84 static vidix_grkey_t mach64_grkey; |
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85 |
4721 | 86 #define DECLARE_VREG(name) { #name, name, 0 } |
87 static video_registers_t vregs[] = | |
88 { | |
89 DECLARE_VREG(OVERLAY_SCALE_INC), | |
90 DECLARE_VREG(OVERLAY_Y_X_START), | |
91 DECLARE_VREG(OVERLAY_Y_X_END), | |
92 DECLARE_VREG(OVERLAY_SCALE_CNTL), | |
93 DECLARE_VREG(OVERLAY_EXCLUSIVE_HORZ), | |
94 DECLARE_VREG(OVERLAY_EXCLUSIVE_VERT), | |
95 DECLARE_VREG(OVERLAY_TEST), | |
96 DECLARE_VREG(SCALER_BUF_PITCH), | |
97 DECLARE_VREG(SCALER_HEIGHT_WIDTH), | |
98 DECLARE_VREG(SCALER_BUF0_OFFSET), | |
99 DECLARE_VREG(SCALER_BUF0_OFFSET_U), | |
100 DECLARE_VREG(SCALER_BUF0_OFFSET_V), | |
101 DECLARE_VREG(SCALER_BUF1_OFFSET), | |
102 DECLARE_VREG(SCALER_BUF1_OFFSET_U), | |
103 DECLARE_VREG(SCALER_BUF1_OFFSET_V), | |
104 DECLARE_VREG(SCALER_H_COEFF0), | |
105 DECLARE_VREG(SCALER_H_COEFF1), | |
106 DECLARE_VREG(SCALER_H_COEFF2), | |
107 DECLARE_VREG(SCALER_H_COEFF3), | |
108 DECLARE_VREG(SCALER_H_COEFF4), | |
109 DECLARE_VREG(SCALER_COLOUR_CNTL), | |
110 DECLARE_VREG(SCALER_THRESHOLD), | |
111 DECLARE_VREG(VIDEO_FORMAT), | |
112 DECLARE_VREG(VIDEO_CONFIG), | |
113 DECLARE_VREG(VIDEO_SYNC_TEST), | |
114 DECLARE_VREG(VIDEO_SYNC_TEST_B) | |
115 }; | |
116 | |
4691 | 117 /* VIDIX exports */ |
118 | |
119 /* MMIO space*/ | |
120 #define GETREG(TYPE,PTR,OFFZ) (*((volatile TYPE*)((PTR)+(OFFZ)))) | |
121 #define SETREG(TYPE,PTR,OFFZ,VAL) (*((volatile TYPE*)((PTR)+(OFFZ))))=VAL | |
122 | |
4721 | 123 #define INREG8(addr) GETREG(uint8_t,(uint32_t)mach64_mmio_base,((addr)^0x100)<<2) |
124 #define OUTREG8(addr,val) SETREG(uint8_t,(uint32_t)mach64_mmio_base,((addr)^0x100)<<2,val) | |
125 #define INREG(addr) GETREG(uint32_t,(uint32_t)mach64_mmio_base,((addr)^0x100)<<2) | |
126 #define OUTREG(addr,val) SETREG(uint32_t,(uint32_t)mach64_mmio_base,((addr)^0x100)<<2,val) | |
4691 | 127 |
128 #define OUTREGP(addr,val,mask) \ | |
129 do { \ | |
130 unsigned int _tmp = INREG(addr); \ | |
131 _tmp &= (mask); \ | |
132 _tmp |= (val); \ | |
133 OUTREG(addr, _tmp); \ | |
134 } while (0) | |
135 | |
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136 static __inline__ int ATIGetMach64LCDReg(int _Index) |
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137 { |
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138 OUTREG8(LCD_INDEX, _Index); |
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139 return INREG(LCD_DATA); |
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140 } |
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141 |
4691 | 142 static __inline__ uint32_t INPLL(uint32_t addr) |
143 { | |
4721 | 144 uint32_t res; |
145 | |
146 /* write addr byte */ | |
147 OUTREG8(CLOCK_CNTL + 1, (addr << 2)); | |
148 /* read the register value */ | |
149 res = INREG(CLOCK_CNTL + 2); | |
150 return res; | |
4691 | 151 } |
152 | |
4721 | 153 static __inline__ void OUTPLL(uint32_t addr,uint32_t val) |
154 { | |
155 /* write addr byte */ | |
156 OUTREG8(CLOCK_CNTL + 1, (addr << 2) | PLL_WR_EN); | |
157 /* write the register value */ | |
158 OUTREG(CLOCK_CNTL + 2, val); | |
159 OUTREG8(CLOCK_CNTL + 1, (addr << 2) & ~PLL_WR_EN); | |
160 } | |
161 | |
4691 | 162 #define OUTPLLP(addr,val,mask) \ |
163 do { \ | |
164 unsigned int _tmp = INPLL(addr); \ | |
165 _tmp &= (mask); \ | |
166 _tmp |= (val); \ | |
167 OUTPLL(addr, _tmp); \ | |
168 } while (0) | |
169 | |
4721 | 170 static void mach64_fifo_wait(unsigned n) |
171 { | |
172 while ((INREG(FIFO_STAT) & 0xffff) > ((uint32_t)(0x8000 >> n))); | |
173 } | |
174 | |
175 static void mach64_wait_for_idle( void ) | |
176 { | |
177 mach64_fifo_wait(16); | |
178 while ((INREG(GUI_STAT) & 1)!= 0); | |
179 } | |
180 | |
4691 | 181 static vidix_capability_t mach64_cap = |
182 { | |
183 "BES driver for Mach64/3DRage cards", | |
4872 | 184 "Nick Kurshev and Michael Niedermayer", |
4691 | 185 TYPE_OUTPUT, |
186 { 0, 0, 0, 0 }, | |
187 2048, | |
188 2048, | |
189 4, | |
190 4, | |
191 -1, | |
192 FLAG_UPSCALER|FLAG_DOWNSCALER, | |
193 VENDOR_ATI, | |
194 -1, | |
195 { 0, 0, 0, 0 } | |
196 }; | |
197 | |
4721 | 198 static uint32_t mach64_vid_get_dbpp( void ) |
199 { | |
200 uint32_t dbpp,retval; | |
201 dbpp = (INREG(CRTC_GEN_CNTL)>>8)& 0x7; | |
202 switch(dbpp) | |
203 { | |
204 case 1: retval = 4; break; | |
205 case 2: retval = 8; break; | |
206 case 3: retval = 15; break; | |
207 case 4: retval = 16; break; | |
208 case 5: retval = 24; break; | |
209 default: retval=32; break; | |
210 } | |
211 return retval; | |
212 } | |
213 | |
214 static int mach64_is_dbl_scan( void ) | |
215 { | |
216 return INREG(CRTC_GEN_CNTL) & CRTC_DBL_SCAN_EN; | |
217 } | |
218 | |
219 static int mach64_is_interlace( void ) | |
220 { | |
221 return INREG(CRTC_GEN_CNTL) & CRTC_INTERLACE_EN; | |
222 } | |
223 | |
224 static uint32_t mach64_get_xres( void ) | |
225 { | |
226 /* FIXME: currently we extract that from CRTC!!!*/ | |
227 uint32_t xres,h_total; | |
228 h_total = INREG(CRTC_H_TOTAL_DISP); | |
229 xres = (h_total >> 16) & 0xffff; | |
230 return (xres + 1)*8; | |
231 } | |
232 | |
233 static uint32_t mach64_get_yres( void ) | |
234 { | |
235 /* FIXME: currently we extract that from CRTC!!!*/ | |
236 uint32_t yres,v_total; | |
237 v_total = INREG(CRTC_V_TOTAL_DISP); | |
238 yres = (v_total >> 16) & 0xffff; | |
239 return yres + 1; | |
240 } | |
241 | |
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242 // returns the verical stretch factor in 16.16 |
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243 static int mach64_get_vert_stretch(void) |
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244 { |
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245 int lcd_index; |
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246 int lcd_gen_ctrl; |
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247 int vert_stretching; |
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248 int ext_vert_stretch; |
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249 int ret; |
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250 int yres= mach64_get_yres(); |
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251 |
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252 //FIXME check for mobility & co |
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253 |
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254 lcd_index= INREG(LCD_INDEX); |
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255 |
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256 vert_stretching= ATIGetMach64LCDReg(LCD_VERT_STRETCHING); |
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257 if(!(vert_stretching&VERT_STRETCH_EN)) ret= 1<<16; |
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258 else |
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259 { |
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260 int panel_size; |
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261 |
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262 ext_vert_stretch= ATIGetMach64LCDReg(LCD_EXT_VERT_STRETCH); |
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263 panel_size= (ext_vert_stretch&VERT_PANEL_SIZE)>>11; |
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264 panel_size++; |
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265 |
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266 ret= ((yres<<16) + (panel_size>>1))/panel_size; |
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267 } |
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268 |
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269 // lcd_gen_ctrl = ATIGetMach64LCDReg(LCD_GEN_CNTL); |
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270 |
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271 OUTREG(LCD_INDEX, lcd_index); |
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272 |
4872 | 273 if(__verbose>VERBOSE_LEVEL) printf("[mach64] vertical stretching factor= %d\n", ret); |
274 | |
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275 return ret; |
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276 } |
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277 |
4721 | 278 static void mach64_vid_make_default() |
279 { | |
4872 | 280 mach64_fifo_wait(5); |
4761 | 281 OUTREG(SCALER_COLOUR_CNTL,0x00101000); |
4872 | 282 |
283 besr.ckey_on=0; | |
284 besr.graphics_key_msk=0; | |
285 besr.graphics_key_clr=0; | |
286 | |
287 OUTREG(OVERLAY_GRAPHICS_KEY_MSK, besr.graphics_key_msk); | |
288 OUTREG(OVERLAY_GRAPHICS_KEY_CLR, besr.graphics_key_clr); | |
289 OUTREG(OVERLAY_KEY_CNTL,VIDEO_KEY_FN_TRUE|GRAPHIC_KEY_FN_EQ|CMP_MIX_AND); | |
290 | |
4721 | 291 } |
292 | |
293 static void mach64_vid_dump_regs( void ) | |
294 { | |
295 size_t i; | |
296 printf("[mach64] *** Begin of DRIVER variables dump ***\n"); | |
297 printf("[mach64] mach64_mmio_base=%p\n",mach64_mmio_base); | |
298 printf("[mach64] mach64_mem_base=%p\n",mach64_mem_base); | |
299 printf("[mach64] mach64_overlay_off=%08X\n",mach64_overlay_offset); | |
300 printf("[mach64] mach64_ram_size=%08X\n",mach64_ram_size); | |
301 printf("[mach64] video mode: %ux%u@%u\n",mach64_get_xres(),mach64_get_yres(),mach64_vid_get_dbpp()); | |
302 printf("[mach64] *** Begin of OV0 registers dump ***\n"); | |
303 for(i=0;i<sizeof(vregs)/sizeof(video_registers_t);i++) | |
304 { | |
305 mach64_wait_for_idle(); | |
306 printf("[mach64] %s = %08X\n",vregs[i].sname,INREG(vregs[i].name)); | |
307 } | |
308 printf("[mach64] *** End of OV0 registers dump ***\n"); | |
309 } | |
310 | |
311 | |
4691 | 312 unsigned int vixGetVersion(void) |
313 { | |
314 return(VIDIX_VERSION); | |
315 } | |
316 | |
317 static unsigned short ati_card_ids[] = | |
318 { | |
319 DEVICE_ATI_215CT_MACH64_CT, | |
320 DEVICE_ATI_210888CX_MACH64_CX, | |
321 DEVICE_ATI_210888ET_MACH64_ET, | |
322 DEVICE_ATI_MACH64_VT, | |
323 DEVICE_ATI_210888GX_MACH64_GX, | |
324 DEVICE_ATI_264LT_MACH64_LT, | |
325 DEVICE_ATI_264VT_MACH64_VT, | |
326 DEVICE_ATI_264VT3_MACH64_VT3, | |
327 DEVICE_ATI_264VT4_MACH64_VT4, | |
328 /**/ | |
329 DEVICE_ATI_3D_RAGE_PRO, | |
330 DEVICE_ATI_3D_RAGE_PRO2, | |
331 DEVICE_ATI_3D_RAGE_PRO3, | |
332 DEVICE_ATI_3D_RAGE_PRO4, | |
333 DEVICE_ATI_RAGE_XC, | |
334 DEVICE_ATI_RAGE_XL_AGP, | |
335 DEVICE_ATI_RAGE_XC_AGP, | |
336 DEVICE_ATI_RAGE_XL, | |
337 DEVICE_ATI_3D_RAGE_PRO5, | |
338 DEVICE_ATI_3D_RAGE_PRO6, | |
339 DEVICE_ATI_RAGE_XL2, | |
340 DEVICE_ATI_RAGE_XC2, | |
341 DEVICE_ATI_3D_RAGE_I_II, | |
342 DEVICE_ATI_3D_RAGE_II, | |
343 DEVICE_ATI_3D_RAGE_IIC, | |
344 DEVICE_ATI_3D_RAGE_IIC2, | |
345 DEVICE_ATI_3D_RAGE_IIC3, | |
346 DEVICE_ATI_3D_RAGE_IIC4, | |
347 DEVICE_ATI_3D_RAGE_LT, | |
348 DEVICE_ATI_3D_RAGE_LT2, | |
349 DEVICE_ATI_RAGE_MOBILITY_M3, | |
350 DEVICE_ATI_RAGE_MOBILITY_M32, | |
351 DEVICE_ATI_3D_RAGE_LT_G, | |
352 DEVICE_ATI_3D_RAGE_LT3, | |
353 DEVICE_ATI_RAGE_MOBILITY_P_M, | |
354 DEVICE_ATI_RAGE_MOBILITY_L, | |
355 DEVICE_ATI_3D_RAGE_LT4, | |
356 DEVICE_ATI_3D_RAGE_LT5, | |
357 DEVICE_ATI_RAGE_MOBILITY_P_M2, | |
358 DEVICE_ATI_RAGE_MOBILITY_L2 | |
359 }; | |
360 | |
361 static int find_chip(unsigned chip_id) | |
362 { | |
363 unsigned i; | |
364 for(i = 0;i < sizeof(ati_card_ids)/sizeof(unsigned short);i++) | |
365 { | |
366 if(chip_id == ati_card_ids[i]) return i; | |
367 } | |
368 return -1; | |
369 } | |
370 | |
371 int vixProbe(int verbose,int force) | |
372 { | |
373 pciinfo_t lst[MAX_PCI_DEVICES]; | |
374 unsigned i,num_pci; | |
375 int err; | |
376 __verbose = verbose; | |
377 err = pci_scan(lst,&num_pci); | |
378 if(err) | |
379 { | |
380 printf("[mach64] Error occured during pci scan: %s\n",strerror(err)); | |
381 return err; | |
382 } | |
383 else | |
384 { | |
385 err = ENXIO; | |
386 for(i=0;i<num_pci;i++) | |
387 { | |
388 if(lst[i].vendor == VENDOR_ATI) | |
389 { | |
390 int idx; | |
391 const char *dname; | |
392 idx = find_chip(lst[i].device); | |
393 if(idx == -1 && force == PROBE_NORMAL) continue; | |
394 dname = pci_device_name(VENDOR_ATI,lst[i].device); | |
395 dname = dname ? dname : "Unknown chip"; | |
396 printf("[mach64] Found chip: %s\n",dname); | |
397 if(force > PROBE_NORMAL) | |
398 { | |
399 printf("[mach64] Driver was forced. Was found %sknown chip\n",idx == -1 ? "un" : ""); | |
400 if(idx == -1) | |
401 printf("[mach64] Assuming it as Mach64\n"); | |
402 } | |
403 mach64_cap.device_id = lst[i].device; | |
404 err = 0; | |
405 memcpy(&pci_info,&lst[i],sizeof(pciinfo_t)); | |
406 probed=1; | |
407 break; | |
408 } | |
409 } | |
410 } | |
411 if(err && verbose) printf("[mach64] Can't find chip\n"); | |
412 return err; | |
413 } | |
414 | |
4721 | 415 static void reset_regs( void ) |
416 { | |
417 size_t i; | |
418 for(i=0;i<sizeof(vregs)/sizeof(video_registers_t);i++) | |
419 { | |
420 mach64_fifo_wait(2); | |
4758 | 421 OUTREG(vregs[i].name,0); |
4721 | 422 } |
423 } | |
424 | |
425 | |
4691 | 426 int vixInit(void) |
427 { | |
428 int err; | |
429 if(!probed) | |
430 { | |
431 printf("[mach64] Driver was not probed but is being initializing\n"); | |
432 return EINTR; | |
433 } | |
4721 | 434 if((mach64_mmio_base = map_phys_mem(pci_info.base2,0x4000))==(void *)-1) return ENOMEM; |
435 mach64_wait_for_idle(); | |
4691 | 436 mach64_ram_size = INREG(MEM_CNTL) & CTL_MEM_SIZEB; |
437 if (mach64_ram_size < 8) mach64_ram_size = (mach64_ram_size + 1) * 512; | |
438 else if (mach64_ram_size < 12) mach64_ram_size = (mach64_ram_size - 3) * 1024; | |
439 else mach64_ram_size = (mach64_ram_size - 7) * 2048; | |
440 mach64_ram_size *= 0x400; /* KB -> bytes */ | |
441 if((mach64_mem_base = map_phys_mem(pci_info.base0,mach64_ram_size))==(void *)-1) return ENOMEM; | |
4758 | 442 memset(&besr,0,sizeof(bes_registers_t)); |
4691 | 443 printf("[mach64] Video memory = %uMb\n",mach64_ram_size/0x100000); |
444 err = mtrr_set_type(pci_info.base0,mach64_ram_size,MTRR_TYPE_WRCOMB); | |
445 if(!err) printf("[mach64] Set write-combining type of video memory\n"); | |
4721 | 446 reset_regs(); |
4761 | 447 mach64_vid_make_default(); |
4758 | 448 if(__verbose > VERBOSE_LEVEL) mach64_vid_dump_regs(); |
4691 | 449 return 0; |
450 } | |
451 | |
452 void vixDestroy(void) | |
453 { | |
454 unmap_phys_mem(mach64_mem_base,mach64_ram_size); | |
4721 | 455 unmap_phys_mem(mach64_mmio_base,0x4000); |
4691 | 456 } |
457 | |
458 int vixGetCapability(vidix_capability_t *to) | |
459 { | |
460 memcpy(to, &mach64_cap, sizeof(vidix_capability_t)); | |
461 return 0; | |
462 } | |
463 | |
4721 | 464 static unsigned mach64_query_pitch(unsigned fourcc,const vidix_yuv_t *spitch) |
465 { | |
466 unsigned pitch,spy,spv,spu; | |
467 spy = spv = spu = 0; | |
468 switch(spitch->y) | |
469 { | |
470 case 16: | |
471 case 32: | |
472 case 64: | |
473 case 128: | |
474 case 256: spy = spitch->y; break; | |
475 default: break; | |
476 } | |
477 switch(spitch->u) | |
478 { | |
479 case 16: | |
480 case 32: | |
481 case 64: | |
482 case 128: | |
483 case 256: spu = spitch->u; break; | |
484 default: break; | |
485 } | |
486 switch(spitch->v) | |
487 { | |
488 case 16: | |
489 case 32: | |
490 case 64: | |
491 case 128: | |
492 case 256: spv = spitch->v; break; | |
493 default: break; | |
494 } | |
495 switch(fourcc) | |
496 { | |
497 /* 4:2:0 */ | |
498 case IMGFMT_IYUV: | |
499 case IMGFMT_YV12: | |
500 case IMGFMT_I420: | |
501 if(spy > 16 && spu == spy/2 && spv == spy/2) pitch = spy; | |
502 else pitch = 32; | |
503 break; | |
4872 | 504 case IMGFMT_YVU9: |
505 if(spy > 32 && spu == spy/4 && spv == spy/4) pitch = spy; | |
506 else pitch = 64; | |
507 break; | |
4721 | 508 default: |
4722
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509 if(spy >= 16) pitch = spy; |
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|
510 else pitch = 16; |
4721 | 511 break; |
512 } | |
513 return pitch; | |
514 } | |
515 | |
516 static void mach64_compute_framesize(vidix_playback_t *info) | |
517 { | |
518 unsigned pitch,awidth; | |
519 pitch = mach64_query_pitch(info->fourcc,&info->src.pitch); | |
520 switch(info->fourcc) | |
521 { | |
522 case IMGFMT_I420: | |
523 case IMGFMT_YV12: | |
524 case IMGFMT_IYUV: | |
525 awidth = (info->src.w + (pitch-1)) & ~(pitch-1); | |
526 info->frame_size = awidth*(info->src.h+info->src.h/2); | |
527 break; | |
4872 | 528 case IMGFMT_YVU9: |
529 awidth = (info->src.w + (pitch-1)) & ~(pitch-1); | |
530 info->frame_size = awidth*(info->src.h+info->src.h/8); | |
531 break; | |
532 // case IMGFMT_RGB32: | |
4721 | 533 case IMGFMT_BGR32: |
534 awidth = (info->src.w*4 + (pitch-1)) & ~(pitch-1); | |
535 info->frame_size = (awidth*info->src.h); | |
536 break; | |
537 /* YUY2 YVYU, RGB15, RGB16 */ | |
538 default: | |
539 awidth = (info->src.w*2 + (pitch-1)) & ~(pitch-1); | |
540 info->frame_size = (awidth*info->src.h); | |
541 break; | |
542 } | |
4872 | 543 info->frame_size+=256; // so we have some space for alignment & such |
544 info->frame_size&=~16; | |
4721 | 545 } |
546 | |
547 static void mach64_vid_stop_video( void ) | |
548 { | |
549 mach64_fifo_wait(14); | |
550 OUTREG(OVERLAY_SCALE_CNTL, 0x80000000); | |
551 OUTREG(OVERLAY_EXCLUSIVE_HORZ, 0); | |
552 OUTREG(OVERLAY_EXCLUSIVE_VERT, 0); | |
553 OUTREG(SCALER_H_COEFF0, 0x00002000); | |
554 OUTREG(SCALER_H_COEFF1, 0x0D06200D); | |
555 OUTREG(SCALER_H_COEFF2, 0x0D0A1C0D); | |
556 OUTREG(SCALER_H_COEFF3, 0x0C0E1A0C); | |
557 OUTREG(SCALER_H_COEFF4, 0x0C14140C); | |
558 OUTREG(VIDEO_FORMAT, 0xB000B); | |
559 OUTREG(OVERLAY_TEST, 0x0); | |
560 } | |
561 | |
562 static void mach64_vid_display_video( void ) | |
563 { | |
564 uint32_t vf; | |
565 mach64_fifo_wait(14); | |
566 | |
567 OUTREG(OVERLAY_Y_X_START, besr.y_x_start); | |
568 OUTREG(OVERLAY_Y_X_END, besr.y_x_end); | |
569 OUTREG(OVERLAY_SCALE_INC, besr.scale_inc); | |
570 OUTREG(SCALER_BUF_PITCH, besr.vid_buf_pitch); | |
571 OUTREG(SCALER_HEIGHT_WIDTH, besr.height_width); | |
4866 | 572 OUTREG(SCALER_BUF0_OFFSET, mach64_buffer_base[0][0]); |
573 OUTREG(SCALER_BUF0_OFFSET_U, mach64_buffer_base[0][1]); | |
574 OUTREG(SCALER_BUF0_OFFSET_V, mach64_buffer_base[0][2]); | |
575 OUTREG(SCALER_BUF1_OFFSET, mach64_buffer_base[0][0]); | |
576 OUTREG(SCALER_BUF1_OFFSET_U, mach64_buffer_base[0][1]); | |
577 OUTREG(SCALER_BUF1_OFFSET_V, mach64_buffer_base[0][2]); | |
4758 | 578 OUTREG(OVERLAY_SCALE_CNTL, 0xC4000003); |
4760 | 579 // OVERLAY_SCALE_CNTL bits & what they seem to affect |
580 // bit 0 no effect | |
581 // bit 1 yuv2rgb coeff related | |
582 // bit 2 horizontal interpolation if 0 | |
583 // bit 3 vertical interpolation if 0 | |
4847 | 584 // bit 4 chroma encoding (0-> 128=neutral / 1-> 0->neutral) |
4760 | 585 // bit 5-6 gamma correction |
586 // bit 7 nothing visible if set | |
587 // bit 8-27 no effect | |
588 // bit 28-31 nothing interresting just crashed my system when i played with them :( | |
4847 | 589 |
4721 | 590 mach64_wait_for_idle(); |
591 vf = INREG(VIDEO_FORMAT); | |
4751 | 592 |
593 // Bits 16-19 seem to select the format | |
4769 | 594 // 0x0 dunno behaves strange |
595 // 0x1 dunno behaves strange | |
596 // 0x2 dunno behaves strange | |
597 // 0x3 BGR15 | |
598 // 0x4 BGR16 | |
599 // 0x5 BGR16 (hmm, that need investigation, 2 BGR16 formats, i guess 1 will have only 5bits for green) | |
600 // 0x6 BGR32 | |
601 // 0x7 BGR32 with somehow mixed even / odd pixels ? | |
602 // 0x8 YYYYUVUV | |
603 // 0x9 YVU9 | |
604 // 0xA YV12 | |
605 // 0xB YUY2 | |
606 // 0xC UYVY | |
4847 | 607 // 0xD UYVY (no difference is visible if i switch between C/D for every even/odd frame) |
4769 | 608 // 0xE dunno behaves strange |
609 // 0xF dunno behaves strange | |
610 // Bit 28 all values are assumed to be 7 bit with chroma=64 for black (tested with YV12 & YUY2) | |
4751 | 611 // the remaining bits seem to have no effect |
612 | |
4769 | 613 |
4721 | 614 switch(besr.fourcc) |
615 { | |
4769 | 616 /* BGR formats */ |
617 case IMGFMT_BGR15: OUTREG(VIDEO_FORMAT, 0x00030000); break; | |
618 case IMGFMT_BGR16: OUTREG(VIDEO_FORMAT, 0x00040000); break; | |
619 case IMGFMT_BGR32: OUTREG(VIDEO_FORMAT, 0x00060000); break; | |
4721 | 620 /* 4:2:0 */ |
621 case IMGFMT_IYUV: | |
622 case IMGFMT_I420: | |
4769 | 623 case IMGFMT_YV12: OUTREG(VIDEO_FORMAT, 0x000A0000); break; |
4872 | 624 |
625 case IMGFMT_YVU9: OUTREG(VIDEO_FORMAT, 0x00090000); break; | |
4721 | 626 /* 4:2:2 */ |
627 case IMGFMT_YVYU: | |
4769 | 628 case IMGFMT_UYVY: OUTREG(VIDEO_FORMAT, 0x000C0000); break; |
4721 | 629 case IMGFMT_YUY2: |
4769 | 630 default: OUTREG(VIDEO_FORMAT, 0x000B0000); break; |
4721 | 631 } |
4758 | 632 if(__verbose > VERBOSE_LEVEL) mach64_vid_dump_regs(); |
4721 | 633 } |
634 | |
635 static int mach64_vid_init_video( vidix_playback_t *config ) | |
636 { | |
4758 | 637 uint32_t src_w,src_h,dest_w,dest_h,pitch,h_inc,v_inc,left,leftUV,top,ecp,y_pos; |
4721 | 638 int is_420,best_pitch,mpitch; |
4866 | 639 int src_offset_y, src_offset_u, src_offset_v; |
640 unsigned int i; | |
4872 | 641 |
4721 | 642 mach64_vid_stop_video(); |
4866 | 643 /* warning, if left or top are != 0 this will fail, as the framesize is too small then */ |
644 left = config->src.x; | |
645 top = config->src.y; | |
4721 | 646 src_h = config->src.h; |
647 src_w = config->src.w; | |
648 is_420 = 0; | |
649 if(config->fourcc == IMGFMT_YV12 || | |
650 config->fourcc == IMGFMT_I420 || | |
651 config->fourcc == IMGFMT_IYUV) is_420 = 1; | |
652 best_pitch = mach64_query_pitch(config->fourcc,&config->src.pitch); | |
653 mpitch = best_pitch-1; | |
654 switch(config->fourcc) | |
655 { | |
4872 | 656 case IMGFMT_YVU9: |
4721 | 657 /* 4:2:0 */ |
658 case IMGFMT_IYUV: | |
659 case IMGFMT_YV12: | |
660 case IMGFMT_I420: pitch = (src_w + mpitch) & ~mpitch; | |
661 config->dest.pitch.y = | |
662 config->dest.pitch.u = | |
663 config->dest.pitch.v = best_pitch; | |
4769 | 664 besr.vid_buf_pitch= pitch; |
4721 | 665 break; |
666 /* RGB 4:4:4:4 */ | |
667 case IMGFMT_RGB32: | |
668 case IMGFMT_BGR32: pitch = (src_w*4 + mpitch) & ~mpitch; | |
669 config->dest.pitch.y = | |
670 config->dest.pitch.u = | |
671 config->dest.pitch.v = best_pitch; | |
4769 | 672 besr.vid_buf_pitch= pitch>>2; |
4721 | 673 break; |
674 /* 4:2:2 */ | |
675 default: /* RGB15, RGB16, YVYU, UYVY, YUY2 */ | |
676 pitch = ((src_w*2) + mpitch) & ~mpitch; | |
677 config->dest.pitch.y = | |
678 config->dest.pitch.u = | |
679 config->dest.pitch.v = best_pitch; | |
4769 | 680 besr.vid_buf_pitch= pitch>>1; |
4721 | 681 break; |
682 } | |
683 dest_w = config->dest.w; | |
684 dest_h = config->dest.h; | |
685 besr.fourcc = config->fourcc; | |
686 ecp = (INPLL(PLL_VCLK_CNTL) & PLL_ECP_DIV) >> 4; | |
4861
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|
687 v_inc = src_h * mach64_get_vert_stretch(); |
601e8a796c38
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michael
parents:
4853
diff
changeset
|
688 |
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4853
diff
changeset
|
689 if(mach64_is_interlace()) v_inc<<=1; |
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michael
parents:
4853
diff
changeset
|
690 if(mach64_is_dbl_scan() ) v_inc>>=1; |
601e8a796c38
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diff
changeset
|
691 v_inc>>=4; // convert 16.16 -> 20.12 |
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michael
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4853
diff
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|
692 v_inc/= dest_h; |
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diff
changeset
|
693 |
4721 | 694 h_inc = (src_w << (12+ecp)) / dest_w; |
695 /* keep everything in 16.16 */ | |
696 config->offsets[0] = 0; | |
4866 | 697 for(i=1; i<config->num_frames; i++) |
698 config->offsets[i] = config->offsets[i-1] + config->frame_size; | |
699 | |
4872 | 700 /*FIXME the left / top stuff is broken (= zoom a src rectangle from a larger one) |
701 1. the framesize isnt known as the outer src rectangle dimensions arent known | |
702 2. the mach64 needs aligned addresses so it cant work anyway | |
703 -> so we could shift the outer buffer to compensate that but that would mean | |
704 alignment problems for the code which writes into it | |
705 */ | |
706 | |
4721 | 707 if(is_420) |
708 { | |
4866 | 709 config->offset.y= 0; |
4872 | 710 config->offset.u= (pitch*src_h + 15)&~15; |
711 config->offset.v= (config->offset.u + (pitch*src_h>>2) + 15)&~15; | |
712 | |
4866 | 713 src_offset_y= config->offset.y + top*pitch + left; |
714 src_offset_u= config->offset.u + (top*pitch>>2) + (left>>1); | |
715 src_offset_v= config->offset.v + (top*pitch>>2) + (left>>1); | |
4872 | 716 |
4721 | 717 if(besr.fourcc == IMGFMT_I420 || besr.fourcc == IMGFMT_IYUV) |
718 { | |
719 uint32_t tmp; | |
720 tmp = config->offset.u; | |
721 config->offset.u = config->offset.v; | |
722 config->offset.v = tmp; | |
723 } | |
724 } | |
4872 | 725 else if(besr.fourcc == IMGFMT_YVU9) |
726 { | |
727 config->offset.y= 0; | |
728 config->offset.u= (pitch*src_h + 15)&~15; | |
729 config->offset.v= (config->offset.u + (pitch*src_h>>4) + 15)&~15; | |
730 | |
731 src_offset_y= config->offset.y + top*pitch + left; | |
732 src_offset_u= config->offset.u + (top*pitch>>4) + (left>>1); | |
733 src_offset_v= config->offset.v + (top*pitch>>4) + (left>>1); | |
734 } | |
4866 | 735 else if(besr.fourcc == IMGFMT_BGR32) |
736 { | |
737 config->offset.y = config->offset.u = config->offset.v = 0; | |
4872 | 738 src_offset_y= src_offset_u= src_offset_v= top*pitch + (left << 2); |
4866 | 739 } |
4721 | 740 else |
741 { | |
4866 | 742 config->offset.y = config->offset.u = config->offset.v = 0; |
4872 | 743 src_offset_y= src_offset_u= src_offset_v= top*pitch + (left << 1); |
4866 | 744 } |
745 | |
746 num_mach64_buffers= config->num_frames; | |
747 for(i=0; i<config->num_frames; i++) | |
748 { | |
749 mach64_buffer_base[i][0]= (mach64_overlay_offset + config->offsets[i] + src_offset_y)&~15; | |
750 mach64_buffer_base[i][1]= (mach64_overlay_offset + config->offsets[i] + src_offset_u)&~15; | |
751 mach64_buffer_base[i][2]= (mach64_overlay_offset + config->offsets[i] + src_offset_v)&~15; | |
4721 | 752 } |
753 | |
754 leftUV = (left >> 17) & 15; | |
755 left = (left >> 16) & 15; | |
756 besr.scale_inc = ( h_inc << 16 ) | v_inc; | |
4758 | 757 y_pos = config->dest.y; |
758 if(mach64_is_dbl_scan()) y_pos*=2; | |
759 else | |
760 if(mach64_is_interlace()) y_pos/=2; | |
761 besr.y_x_start = y_pos | (config->dest.x << 16); | |
762 y_pos =config->dest.y + dest_h; | |
763 if(mach64_is_dbl_scan()) y_pos*=2; | |
764 else | |
765 if(mach64_is_interlace()) y_pos/=2; | |
766 besr.y_x_end = y_pos | ((config->dest.x + dest_w) << 16); | |
4721 | 767 besr.height_width = ((src_w - left)<<16) | (src_h - top); |
4769 | 768 |
4721 | 769 return 0; |
770 } | |
771 | |
772 | |
773 uint32_t supported_fourcc[] = | |
774 { | |
775 IMGFMT_YV12, IMGFMT_I420, IMGFMT_IYUV, | |
4872 | 776 IMGFMT_YVU9, |
777 IMGFMT_UYVY, IMGFMT_YUY2, | |
4769 | 778 IMGFMT_BGR15,IMGFMT_BGR16,IMGFMT_BGR32 |
4721 | 779 }; |
780 | |
781 __inline__ static int is_supported_fourcc(uint32_t fourcc) | |
782 { | |
783 unsigned i; | |
784 for(i=0;i<sizeof(supported_fourcc)/sizeof(uint32_t);i++) | |
785 { | |
786 if(fourcc==supported_fourcc[i]) return 1; | |
787 } | |
788 return 0; | |
789 } | |
790 | |
4691 | 791 int vixQueryFourcc(vidix_fourcc_t *to) |
792 { | |
4721 | 793 if(is_supported_fourcc(to->fourcc)) |
794 { | |
795 to->depth = VID_DEPTH_1BPP | VID_DEPTH_2BPP | | |
796 VID_DEPTH_4BPP | VID_DEPTH_8BPP | | |
797 VID_DEPTH_12BPP| VID_DEPTH_15BPP| | |
798 VID_DEPTH_16BPP| VID_DEPTH_24BPP| | |
799 VID_DEPTH_32BPP; | |
4861
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diff
changeset
|
800 to->flags = VID_CAP_EXPAND | VID_CAP_SHRINK | VID_CAP_COLORKEY; |
4721 | 801 return 0; |
802 } | |
803 else to->depth = to->flags = 0; | |
4691 | 804 return ENOSYS; |
805 } | |
806 | |
807 int vixConfigPlayback(vidix_playback_t *info) | |
808 { | |
4721 | 809 if(!is_supported_fourcc(info->fourcc)) return ENOSYS; |
4866 | 810 if(info->num_frames>3) info->num_frames=3; //more than 3 make no sense at the moment but they do work |
811 | |
4721 | 812 mach64_compute_framesize(info); |
813 mach64_overlay_offset = mach64_ram_size - info->frame_size*info->num_frames; | |
814 mach64_overlay_offset &= 0xffff0000; | |
815 if(mach64_overlay_offset < 0) return EINVAL; | |
816 info->dga_addr = (char *)mach64_mem_base + mach64_overlay_offset; | |
817 mach64_vid_init_video(info); | |
818 return 0; | |
4691 | 819 } |
820 | |
821 int vixPlaybackOn(void) | |
822 { | |
4721 | 823 mach64_vid_display_video(); |
824 return 0; | |
4691 | 825 } |
826 | |
827 int vixPlaybackOff(void) | |
828 { | |
4721 | 829 mach64_vid_stop_video(); |
830 return 0; | |
831 } | |
832 | |
833 static void mach64_wait_vsync( void ) | |
834 { | |
4847 | 835 int i; |
836 | |
837 for(i=0; i<2000000; i++) | |
838 if( (INREG(CRTC_INT_CNTL)&CRTC_VBLANK)==0 ) break; | |
839 for(i=0; i<2000000; i++) | |
840 if( (INREG(CRTC_INT_CNTL)&CRTC_VBLANK) ) break; | |
841 | |
4691 | 842 } |
843 | |
844 int vixPlaybackFrameSelect(unsigned int frame) | |
845 { | |
4721 | 846 uint32_t off[6]; |
4866 | 847 int i; |
848 int last_frame= (frame-1+num_mach64_buffers) % num_mach64_buffers; | |
849 //printf("Selecting frame %d\n", frame); | |
4721 | 850 /* |
851 buf3-5 always should point onto second buffer for better | |
852 deinterlacing and TV-in | |
853 */ | |
4866 | 854 if(num_mach64_buffers==1) return 0; |
855 | |
856 for(i=0; i<3; i++) | |
4721 | 857 { |
4866 | 858 off[i] = mach64_buffer_base[frame][i]; |
859 off[i+3]= mach64_buffer_base[last_frame][i]; | |
860 } | |
4769 | 861 |
4847 | 862 #if 0 // delay routine so the individual frames can be ssen better |
863 { | |
864 volatile int i=0; | |
865 for(i=0; i<10000000; i++); | |
866 } | |
867 #endif | |
4721 | 868 |
869 mach64_wait_for_idle(); | |
870 mach64_fifo_wait(7); | |
4847 | 871 |
4721 | 872 OUTREG(SCALER_BUF0_OFFSET, off[0]); |
873 OUTREG(SCALER_BUF0_OFFSET_U, off[1]); | |
874 OUTREG(SCALER_BUF0_OFFSET_V, off[2]); | |
875 OUTREG(SCALER_BUF1_OFFSET, off[3]); | |
876 OUTREG(SCALER_BUF1_OFFSET_U, off[4]); | |
877 OUTREG(SCALER_BUF1_OFFSET_V, off[5]); | |
4866 | 878 if(num_mach64_buffers==2) mach64_wait_vsync(); //only wait for vsync if we do double buffering |
879 | |
4758 | 880 if(__verbose > VERBOSE_LEVEL) mach64_vid_dump_regs(); |
4721 | 881 return 0; |
4691 | 882 } |
4721 | 883 |
884 vidix_video_eq_t equal = | |
885 { | |
886 VEQ_CAP_BRIGHTNESS | VEQ_CAP_SATURATION | |
887 , | |
888 0, 0, 0, 0, 0, 0, 0, 0 }; | |
889 | |
890 int vixPlaybackGetEq( vidix_video_eq_t * eq) | |
891 { | |
892 memcpy(eq,&equal,sizeof(vidix_video_eq_t)); | |
893 return 0; | |
894 } | |
895 | |
896 int vixPlaybackSetEq( const vidix_video_eq_t * eq) | |
897 { | |
898 int br,sat; | |
899 if(eq->cap & VEQ_CAP_BRIGHTNESS) equal.brightness = eq->brightness; | |
900 if(eq->cap & VEQ_CAP_CONTRAST) equal.contrast = eq->contrast; | |
901 if(eq->cap & VEQ_CAP_SATURATION) equal.saturation = eq->saturation; | |
902 if(eq->cap & VEQ_CAP_HUE) equal.hue = eq->hue; | |
903 if(eq->cap & VEQ_CAP_RGB_INTENSITY) | |
904 { | |
905 equal.red_intensity = eq->red_intensity; | |
906 equal.green_intensity = eq->green_intensity; | |
907 equal.blue_intensity = eq->blue_intensity; | |
908 } | |
909 equal.flags = eq->flags; | |
910 br = equal.brightness * 64 / 1000; | |
911 if(br < -64) br = -64; if(br > 63) br = 63; | |
912 sat = (equal.saturation + 1000) * 16 / 1000; | |
913 if(sat < 0) sat = 0; if(sat > 31) sat = 31; | |
914 OUTREG(SCALER_COLOUR_CNTL, (br & 0x7f) | (sat << 8) | (sat << 16)); | |
915 return 0; | |
916 } | |
4861
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
917 |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
918 int vixGetGrKeys(vidix_grkey_t *grkey) |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
919 { |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
920 memcpy(grkey, &mach64_grkey, sizeof(vidix_grkey_t)); |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
921 return(0); |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
922 } |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
923 |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
924 int vixSetGrKeys(const vidix_grkey_t *grkey) |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
925 { |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
926 memcpy(&mach64_grkey, grkey, sizeof(vidix_grkey_t)); |
4872 | 927 |
928 if(mach64_grkey.ckey.op == CKEY_TRUE) | |
929 { | |
930 besr.ckey_on=1; | |
931 | |
932 switch(mach64_vid_get_dbpp()) | |
933 { | |
934 case 15: | |
935 besr.graphics_key_msk=0x7FFF; | |
936 besr.graphics_key_clr= | |
937 ((mach64_grkey.ckey.blue &0xF8)>>3) | |
938 | ((mach64_grkey.ckey.green&0xF8)<<2) | |
939 | ((mach64_grkey.ckey.red &0xF8)<<7); | |
940 break; | |
941 case 16: | |
942 besr.graphics_key_msk=0xFFFF; | |
943 besr.graphics_key_clr= | |
944 ((mach64_grkey.ckey.blue &0xF8)>>3) | |
945 | ((mach64_grkey.ckey.green&0xFC)<<3) | |
946 | ((mach64_grkey.ckey.red &0xF8)<<8); | |
947 break; | |
948 case 24: | |
949 besr.graphics_key_msk=0xFFFFFF; | |
950 besr.graphics_key_clr= | |
951 ((mach64_grkey.ckey.blue &0xFF)) | |
952 | ((mach64_grkey.ckey.green&0xFF)<<8) | |
953 | ((mach64_grkey.ckey.red &0xFF)<<16); | |
954 break; | |
955 case 32: | |
956 besr.graphics_key_msk=0xFFFFFF; | |
957 besr.graphics_key_clr= | |
958 ((mach64_grkey.ckey.blue &0xFF)) | |
959 | ((mach64_grkey.ckey.green&0xFF)<<8) | |
960 | ((mach64_grkey.ckey.red &0xFF)<<16); | |
961 break; | |
962 default: | |
963 besr.ckey_on=0; | |
964 besr.graphics_key_msk=0; | |
965 besr.graphics_key_clr=0; | |
966 } | |
967 } | |
968 else | |
969 { | |
970 besr.ckey_on=0; | |
971 besr.graphics_key_msk=0; | |
972 besr.graphics_key_clr=0; | |
973 } | |
974 | |
975 mach64_fifo_wait(4); | |
976 OUTREG(OVERLAY_GRAPHICS_KEY_MSK, besr.graphics_key_msk); | |
977 OUTREG(OVERLAY_GRAPHICS_KEY_CLR, besr.graphics_key_clr); | |
978 // OUTREG(OVERLAY_VIDEO_KEY_MSK, 0); | |
979 // OUTREG(OVERLAY_VIDEO_KEY_CLR, 0); | |
980 if(besr.ckey_on) | |
981 OUTREG(OVERLAY_KEY_CNTL,VIDEO_KEY_FN_TRUE|GRAPHIC_KEY_FN_EQ|CMP_MIX_AND); | |
982 else | |
983 OUTREG(OVERLAY_KEY_CNTL,VIDEO_KEY_FN_TRUE|GRAPHIC_KEY_FN_TRUE|CMP_MIX_AND); | |
984 | |
4861
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
985 return(0); |
601e8a796c38
colorkey support fixed (thanks to nick for the mga_vid tip ... i should RTFS more)
michael
parents:
4853
diff
changeset
|
986 } |