annotate common.h @ 432:b245457fb912 libavcodec

fixed mangle issue
author bellard
date Sun, 26 May 2002 15:07:57 +0000
parents a69ba632a048
children 86f68813b97f
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1 #ifndef COMMON_H
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2 #define COMMON_H
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3
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4 #define FFMPEG_VERSION_INT 0x000406
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5 #define FFMPEG_VERSION "0.4.6"
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6
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7 #if defined(WIN32) && !defined(__MINGW32__) && !defined(__CYGWIN__)
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8 #define CONFIG_WIN32
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9 #endif
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10
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11 //#define ALT_BITSTREAM_WRITER
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12 //#define ALIGNED_BITSTREAM_WRITER
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13 //#define ALT_BITSTREAM_READER
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14 //#define ALIGNED_BITSTREAM
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15 #define FAST_GET_FIRST_VLC
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16 //#define DUMP_STREAM // only works with the ALT_BITSTREAM_READER
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17
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18 #ifdef HAVE_AV_CONFIG_H
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19 /* only include the following when compiling package */
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20 #include "config.h"
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21
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22 #include <stdlib.h>
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23 #include <stdio.h>
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24 #include <string.h>
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25 #include <errno.h>
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26 #include <math.h>
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27
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28 #ifndef ENODATA
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29 #define ENODATA 61
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30 #endif
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32 #endif /* HAVE_AV_CONFIG_H */
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33
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34 #ifdef CONFIG_WIN32
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35
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36 /* windows */
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37
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38 typedef unsigned short UINT16;
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39 typedef signed short INT16;
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40 typedef unsigned char UINT8;
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41 typedef unsigned int UINT32;
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42 typedef unsigned __int64 UINT64;
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43 typedef signed char INT8;
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44 typedef signed int INT32;
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45 typedef signed __int64 INT64;
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46
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47 typedef UINT8 uint8_t;
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48 typedef INT8 int8_t;
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49 typedef UINT16 uint16_t;
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50 typedef INT16 int16_t;
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51 typedef UINT32 uint32_t;
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52 typedef INT32 int32_t;
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53 typedef UINT64 uint64_t;
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54 typedef INT64 int64_t;
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55
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56 #ifndef __MINGW32__
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57 #define INT64_C(c) (c ## i64)
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58 #define UINT64_C(c) (c ## i64)
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59
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60 #define inline __inline
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61
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62 #else
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63 #define INT64_C(c) (c ## LL)
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64 #define UINT64_C(c) (c ## ULL)
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65 #endif /* __MINGW32__ */
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66
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67 #define M_PI 3.14159265358979323846
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68 #define M_SQRT2 1.41421356237309504880 /* sqrt(2) */
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69
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70 #ifdef _DEBUG
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71 #define DEBUG
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72 #endif
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73
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74 #define snprintf _snprintf
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76 #else /* CONFIG_WIN32 */
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78 /* unix */
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79
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80 #include <inttypes.h>
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81
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82 #ifndef __WINE_WINDEF16_H
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83 /* workaround for typedef conflict in MPlayer (wine typedefs) */
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84 typedef unsigned short UINT16;
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85 typedef signed short INT16;
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86 #endif
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87
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88 typedef unsigned char UINT8;
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89 typedef unsigned int UINT32;
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90 typedef unsigned long long UINT64;
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91 typedef signed char INT8;
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92 typedef signed int INT32;
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93 typedef signed long long INT64;
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94
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95 #ifdef HAVE_AV_CONFIG_H
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96
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97 #ifdef __FreeBSD__
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98 #include <sys/param.h>
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99 #endif
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100
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101 #ifndef INT64_C
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102 #define INT64_C(c) (c ## LL)
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103 #define UINT64_C(c) (c ## ULL)
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104 #endif
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105
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106 #ifdef USE_FASTMEMCPY
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107 #include "fastmemcpy.h"
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108 #endif
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109
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110 #endif /* HAVE_AV_CONFIG_H */
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111
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112 #endif /* !CONFIG_WIN32 */
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115 #ifdef HAVE_AV_CONFIG_H
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116
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117 #include "bswap.h"
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118
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119 #if defined(__MINGW32__) || defined(__CYGWIN__) || \
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120 defined(__OS2__) || defined (__OpenBSD__)
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121 #define MANGLE(a) "_" #a
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122 #else
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123 #define MANGLE(a) #a
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124 #endif
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125
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126 /* debug stuff */
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127
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128 #ifndef DEBUG
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129 #define NDEBUG
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130 #endif
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131 #include <assert.h>
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132
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133 /* dprintf macros */
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134 #if defined(CONFIG_WIN32) && !defined(__MINGW32__)
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135
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136 inline void dprintf(const char* fmt,...) {}
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137
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138 #else
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139
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140 #ifdef DEBUG
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141 #define dprintf(fmt,args...) printf(fmt, ## args)
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142 #else
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143 #define dprintf(fmt,args...)
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144 #endif
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145
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146 #endif /* !CONFIG_WIN32 */
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147
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148 #endif /* HAVE_AV_CONFIG_H */
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149
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150 #define av_abort() do { fprintf(stderr, "Abort at %s:%d\n", __FILE__, __LINE__); abort(); } while (0)
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152 /* assume b>0 */
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153 #define ROUNDED_DIV(a,b) (((a)>0 ? (a) + ((b)>>1) : (a) - ((b)>>1))/(b))
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154 #define ABS(a) ((a) >= 0 ? (a) : (-(a)))
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155
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156 /* bit output */
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157
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158 struct PutBitContext;
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159
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160 typedef void (*WriteDataFunc)(void *, UINT8 *, int);
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161
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162 typedef struct PutBitContext {
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163 #ifdef ALT_BITSTREAM_WRITER
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164 UINT8 *buf, *buf_end;
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165 int index;
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166 #else
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167 UINT32 bit_buf;
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168 int bit_left;
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169 UINT8 *buf, *buf_ptr, *buf_end;
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170 #endif
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171 INT64 data_out_size; /* in bytes */
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172 } PutBitContext;
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173
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174 void init_put_bits(PutBitContext *s,
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175 UINT8 *buffer, int buffer_size,
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176 void *opaque,
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177 void (*write_data)(void *, UINT8 *, int));
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178
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179 INT64 get_bit_count(PutBitContext *s); /* XXX: change function name */
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180 void align_put_bits(PutBitContext *s);
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181 void flush_put_bits(PutBitContext *s);
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182 void put_string(PutBitContext * pbc, char *s);
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183
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184 /* jpeg specific put_bits */
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185 void jflush_put_bits(PutBitContext *s);
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186
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187 /* bit input */
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188
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189 typedef struct GetBitContext {
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190 #ifdef ALT_BITSTREAM_READER
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191 int index;
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192 UINT8 *buffer;
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193 #else
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194 UINT32 bit_buf;
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195 int bit_cnt;
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196 UINT8 *buf, *buf_ptr, *buf_end;
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197 #endif
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198 int size;
0
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199 } GetBitContext;
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200
290
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201 static inline int get_bits_count(GetBitContext *s);
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202
0
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203 typedef struct VLC {
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204 int bits;
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205 INT16 *table_codes;
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206 INT8 *table_bits;
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207 int table_size, table_allocated;
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208 } VLC;
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209
193
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210 /* used to avoid missaligned exceptions on some archs (alpha, ...) */
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211 #ifdef ARCH_X86
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212 #define unaligned32(a) (*(UINT32*)(a))
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213 #else
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214 #ifdef __GNUC__
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215 static inline uint32_t unaligned32(const void *v) {
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216 struct Unaligned {
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217 uint32_t i;
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218 } __attribute__((packed));
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219
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220 return ((const struct Unaligned *) v)->i;
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221 }
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222 #elif defined(__DECC)
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223 static inline uint32_t unaligned32(const void *v) {
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224 return *(const __unaligned uint32_t *) v;
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225 }
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226 #else
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227 static inline uint32_t unaligned32(const void *v) {
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228 return *(const uint32_t *) v;
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229 }
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230 #endif
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231 #endif //!ARCH_X86
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232
238
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233 #ifndef ALT_BITSTREAM_WRITER
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234 static inline void put_bits(PutBitContext *s, int n, unsigned int value)
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235 {
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236 unsigned int bit_buf;
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237 int bit_left;
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238
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239 #ifdef STATS
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240 st_out_bit_counts[st_current_index] += n;
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241 #endif
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242 // printf("put_bits=%d %x\n", n, value);
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243 assert(n == 32 || value < (1U << n));
306
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244
238
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245 bit_buf = s->bit_buf;
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246 bit_left = s->bit_left;
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247
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248 // printf("n=%d value=%x cnt=%d buf=%x\n", n, value, bit_cnt, bit_buf);
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249 /* XXX: optimize */
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250 if (n < bit_left) {
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251 bit_buf = (bit_buf<<n) | value;
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252 bit_left-=n;
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253 } else {
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254 bit_buf<<=bit_left;
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255 bit_buf |= value >> (n - bit_left);
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256 *(UINT32 *)s->buf_ptr = be2me_32(bit_buf);
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257 //printf("bitbuf = %08x\n", bit_buf);
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258 s->buf_ptr+=4;
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259 bit_left+=32 - n;
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260 bit_buf = value;
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261 }
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262
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263 s->bit_buf = bit_buf;
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264 s->bit_left = bit_left;
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265 }
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266 #endif
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267
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268
234
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269 #ifdef ALT_BITSTREAM_WRITER
235
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270 static inline void put_bits(PutBitContext *s, int n, unsigned int value)
234
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271 {
235
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272 #ifdef ALIGNED_BITSTREAM_WRITER
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273 #ifdef ARCH_X86
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274 asm volatile(
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275 "movl %0, %%ecx \n\t"
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276 "xorl %%eax, %%eax \n\t"
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277 "shrdl %%cl, %1, %%eax \n\t"
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278 "shrl %%cl, %1 \n\t"
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279 "movl %0, %%ecx \n\t"
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280 "shrl $3, %%ecx \n\t"
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281 "andl $0xFFFFFFFC, %%ecx \n\t"
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282 "bswapl %1 \n\t"
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283 "orl %1, (%2, %%ecx) \n\t"
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284 "bswapl %%eax \n\t"
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285 "addl %3, %0 \n\t"
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286 "movl %%eax, 4(%2, %%ecx) \n\t"
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287 : "=&r" (s->index), "=&r" (value)
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288 : "r" (s->buf), "r" (n), "0" (s->index), "1" (value<<(-n))
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289 : "%eax", "%ecx"
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290 );
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291 #else
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292 int index= s->index;
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293 uint32_t *ptr= ((uint32_t *)s->buf)+(index>>5);
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294
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295 value<<= 32-n;
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296
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297 ptr[0] |= be2me_32(value>>(index&31));
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298 ptr[1] = be2me_32(value<<(32-(index&31)));
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299 //if(n>24) printf("%d %d\n", n, value);
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300 index+= n;
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301 s->index= index;
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302 #endif
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303 #else //ALIGNED_BITSTREAM_WRITER
234
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304 #ifdef ARCH_X86
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305 asm volatile(
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306 "movl $7, %%ecx \n\t"
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307 "andl %0, %%ecx \n\t"
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308 "addl %3, %%ecx \n\t"
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309 "negl %%ecx \n\t"
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310 "shll %%cl, %1 \n\t"
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311 "bswapl %1 \n\t"
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312 "movl %0, %%ecx \n\t"
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313 "shrl $3, %%ecx \n\t"
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314 "orl %1, (%%ecx, %2) \n\t"
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315 "addl %3, %0 \n\t"
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316 "movl $0, 4(%%ecx, %2) \n\t"
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317 : "=&r" (s->index), "=&r" (value)
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318 : "r" (s->buf), "r" (n), "0" (s->index), "1" (value)
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319 : "%ecx"
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320 );
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321 #else
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322 int index= s->index;
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323 uint32_t *ptr= (uint32_t*)(((uint8_t *)s->buf)+(index>>3));
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324
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325 ptr[0] |= be2me_32(value<<(32-n-(index&7) ));
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326 ptr[1] = 0;
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327 //if(n>24) printf("%d %d\n", n, value);
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328 index+= n;
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diff changeset
329 s->index= index;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
330 #endif
235
41f0ef2cd942 aligned bitstream writer (1% slower on p3 but perhaps its faster on p4?)
michaelni
parents: 234
diff changeset
331 #endif //!ALIGNED_BITSTREAM_WRITER
234
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
332 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
333 #endif
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
334
238
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
335 #ifndef ALT_BITSTREAM_WRITER
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
336 /* for jpeg : escape 0xff with 0x00 after it */
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
337 static inline void jput_bits(PutBitContext *s, int n, unsigned int value)
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
338 {
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
339 unsigned int bit_buf, b;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
340 int bit_left, i;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
341
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
342 assert(n == 32 || value < (1U << n));
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
343
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
344 bit_buf = s->bit_buf;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
345 bit_left = s->bit_left;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
346
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
347 //printf("n=%d value=%x cnt=%d buf=%x\n", n, value, bit_cnt, bit_buf);
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
348 /* XXX: optimize */
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
349 if (n < bit_left) {
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
350 bit_buf = (bit_buf<<n) | value;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
351 bit_left-=n;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
352 } else {
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
353 bit_buf<<=bit_left;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
354 bit_buf |= value >> (n - bit_left);
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
355 /* handle escape */
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
356 for(i=0;i<4;i++) {
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
357 b = (bit_buf >> 24);
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
358 *(s->buf_ptr++) = b;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
359 if (b == 0xff)
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
360 *(s->buf_ptr++) = 0;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
361 bit_buf <<= 8;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
362 }
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
363
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
364 bit_left+= 32 - n;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
365 bit_buf = value;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
366 }
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
367
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
368 s->bit_buf = bit_buf;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
369 s->bit_left = bit_left;
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
370 }
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
371 #endif
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
372
99a9f903f0e3 optimized the normal bitstream writer, its faster than the alternative one on p3 now ... lets hope its at least not slower on p4 & k7
michaelni
parents: 235
diff changeset
373
234
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
374 #ifdef ALT_BITSTREAM_WRITER
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
375 static inline void jput_bits(PutBitContext *s, int n, int value)
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
376 {
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
377 int index= s->index;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
378 uint32_t *ptr= (uint32_t*)(((uint8_t *)s->buf)+(index>>3));
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
379 int v= ptr[0];
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
380 //if(n>24) printf("%d %d\n", n, value);
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
381
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
382 v |= be2me_32(value<<(32-n-(index&7) ));
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
383 if(((v+0x01010101)^0xFFFFFFFF)&v&0x80808080)
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
384 {
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
385 /* handle idiotic (m)jpeg escapes */
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
386 uint8_t *bPtr= (uint8_t*)ptr;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
387 int numChecked= ((index+n)>>3) - (index>>3);
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
388
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
389 v= be2me_32(v);
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
390
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
391 *(bPtr++)= v>>24;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
392 if((v&0xFF000000)==0xFF000000 && numChecked>0){
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
393 *(bPtr++)= 0x00;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
394 index+=8;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
395 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
396 *(bPtr++)= (v>>16)&0xFF;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
397 if((v&0x00FF0000)==0x00FF0000 && numChecked>1){
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
398 *(bPtr++)= 0x00;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
399 index+=8;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
400 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
401 *(bPtr++)= (v>>8)&0xFF;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
402 if((v&0x0000FF00)==0x0000FF00 && numChecked>2){
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
403 *(bPtr++)= 0x00;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
404 index+=8;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
405 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
406 *(bPtr++)= v&0xFF;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
407 if((v&0x000000FF)==0x000000FF && numChecked>3){
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
408 *(bPtr++)= 0x00;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
409 index+=8;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
410 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
411 *((uint32_t*)bPtr)= 0;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
412 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
413 else
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
414 {
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
415 ptr[0] = v;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
416 ptr[1] = 0;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
417 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
418
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
419 index+= n;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
420 s->index= index;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
421 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
422 #endif
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
423
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
424
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
425 static inline uint8_t* pbBufPtr(PutBitContext *s)
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
426 {
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
427 #ifdef ALT_BITSTREAM_WRITER
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
428 return s->buf + (s->index>>3);
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
429 #else
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
430 return s->buf_ptr;
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
431 #endif
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
432 }
5fc0c3af3fe4 alternative bitstream writer (disabled by default, uncomment #define ALT_BISTREAM_WRITER in common.h if u want to try it)
michaelni
parents: 213
diff changeset
433
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
434 void init_get_bits(GetBitContext *s,
986e461dc072 Initial revision
glantau
parents:
diff changeset
435 UINT8 *buffer, int buffer_size);
986e461dc072 Initial revision
glantau
parents:
diff changeset
436
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
437 #ifndef ALT_BITSTREAM_READER
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
438 unsigned int get_bits_long(GetBitContext *s, int n);
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
439 unsigned int show_bits_long(GetBitContext *s, int n);
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
440 #endif
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
441
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
442 static inline unsigned int get_bits(GetBitContext *s, int n){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
443 #ifdef ALT_BITSTREAM_READER
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
444 #ifdef ALIGNED_BITSTREAM
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
445 int index= s->index;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
446 uint32_t result1= be2me_32( ((uint32_t *)s->buffer)[index>>5] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
447 uint32_t result2= be2me_32( ((uint32_t *)s->buffer)[(index>>5) + 1] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
448 #ifdef ARCH_X86
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
449 asm ("shldl %%cl, %2, %0\n\t"
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
450 : "=r" (result1)
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
451 : "0" (result1), "r" (result2), "c" (index));
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
452 #else
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
453 result1<<= (index&0x1F);
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
454 result2= (result2>>1) >> (31-(index&0x1F));
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
455 result1|= result2;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
456 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
457 result1>>= 32 - n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
458 index+= n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
459 s->index= index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
460
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
461 return result1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
462 #else //ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
463 int index= s->index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
464 uint32_t result= be2me_32( unaligned32( ((uint8_t *)s->buffer)+(index>>3) ) );
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
465
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
466 result<<= (index&0x07);
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
467 result>>= 32 - n;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
468 index+= n;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
469 s->index= index;
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
470 #ifdef DUMP_STREAM
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
471 while(n){
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
472 printf("%d", (result>>(n-1))&1);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
473 n--;
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
474 }
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
475 printf(" ");
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
476 #endif
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
477 return result;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
478 #endif //!ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
479 #else //ALT_BITSTREAM_READER
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
480 if(s->bit_cnt>=n){
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
481 /* most common case here */
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
482 unsigned int val = s->bit_buf >> (32 - n);
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
483 s->bit_buf <<= n;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
484 s->bit_cnt -= n;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
485 #ifdef STATS
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
486 st_bit_counts[st_current_index] += n;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
487 #endif
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
488 return val;
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
489 }
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
490 return get_bits_long(s,n);
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
491 #endif //!ALT_BITSTREAM_READER
20
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
492 }
907b67420d84 inlineing common case of get_bits() -> gives 2speedup. more optim coming soon...
arpi_esp
parents: 10
diff changeset
493
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
494 static inline unsigned int get_bits1(GetBitContext *s){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
495 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
496 int index= s->index;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
497 uint8_t result= s->buffer[ index>>3 ];
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
498 result<<= (index&0x07);
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
499 result>>= 8 - 1;
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
500 index++;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
501 s->index= index;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
502
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
503 #ifdef DUMP_STREAM
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
504 printf("%d ", result);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
505 #endif
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
506 return result;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
507 #else
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
508 if(s->bit_cnt>0){
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
509 /* most common case here */
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
510 unsigned int val = s->bit_buf >> 31;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
511 s->bit_buf <<= 1;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
512 s->bit_cnt--;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
513 #ifdef STATS
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
514 st_bit_counts[st_current_index]++;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
515 #endif
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
516 return val;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
517 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
518 return get_bits_long(s,1);
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
519 #endif
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
520 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
521
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
522 /* This function is identical to get_bits(), the only */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
523 /* diference is that it doesn't touch the buffer */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
524 /* it is usefull to see the buffer. */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
525 static inline unsigned int show_bits(GetBitContext *s, int n)
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
526 {
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
527 #ifdef ALT_BITSTREAM_READER
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
528 #ifdef ALIGNED_BITSTREAM
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
529 int index= s->index;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
530 uint32_t result1= be2me_32( ((uint32_t *)s->buffer)[index>>5] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
531 uint32_t result2= be2me_32( ((uint32_t *)s->buffer)[(index>>5) + 1] );
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
532 #ifdef ARCH_X86
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
533 asm ("shldl %%cl, %2, %0\n\t"
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
534 : "=r" (result1)
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
535 : "0" (result1), "r" (result2), "c" (index));
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
536 #else
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
537 result1<<= (index&0x1F);
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
538 result2= (result2>>1) >> (31-(index&0x1F));
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
539 result1|= result2;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
540 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
541 result1>>= 32 - n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
542
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
543 return result1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
544 #else //ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
545 int index= s->index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
546 uint32_t result= be2me_32( unaligned32( ((uint8_t *)s->buffer)+(index>>3) ) );
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
547
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
548 result<<= (index&0x07);
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
549 result>>= 32 - n;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
550
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
551 return result;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
552 #endif //!ALIGNED_BITSTREAM
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
553 #else //ALT_BITSTREAM_READER
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
554 if(s->bit_cnt>=n) {
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
555 /* most common case here */
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
556 unsigned int val = s->bit_buf >> (32 - n);
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
557 return val;
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
558 }
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
559 return show_bits_long(s,n);
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
560 #endif //!ALT_BITSTREAM_READER
144
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
561 }
cb5dabd00ba2 - Bug fix on inter MCBPC table for inter+q.
pulento
parents: 93
diff changeset
562
290
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
563 static inline int show_aligned_bits(GetBitContext *s, int offset, int n)
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
564 {
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
565 #ifdef ALT_BITSTREAM_READER
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
566 #ifdef ALIGNED_BITSTREAM
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
567 int index= (s->index + offset + 7)&(~7);
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
568 uint32_t result1= be2me_32( ((uint32_t *)s->buffer)[index>>5] );
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
569 uint32_t result2= be2me_32( ((uint32_t *)s->buffer)[(index>>5) + 1] );
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
570 #ifdef ARCH_X86
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
571 asm ("shldl %%cl, %2, %0\n\t"
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
572 : "=r" (result1)
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
573 : "0" (result1), "r" (result2), "c" (index));
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
574 #else
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
575 result1<<= (index&0x1F);
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
576 result2= (result2>>1) >> (31-(index&0x1F));
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
577 result1|= result2;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
578 #endif
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
579 result1>>= 32 - n;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
580
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
581 return result1;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
582 #else //ALIGNED_BITSTREAM
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
583 int index= (s->index + offset + 7)>>3;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
584 uint32_t result= be2me_32( unaligned32( ((uint8_t *)s->buffer)+index ) );
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
585
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
586 result>>= 32 - n;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
587
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
588 return result;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
589 #endif //!ALIGNED_BITSTREAM
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
590 #else //ALT_BITSTREAM_READER
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
591 int index= (get_bits_count(s) + offset + 7)>>3;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
592 uint32_t result= be2me_32( unaligned32( ((uint8_t *)s->buf)+index ) );
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
593
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
594 result>>= 32 - n;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
595 //printf(" %X %X %d \n", (int)(((uint8_t *)s->buf)+index ), (int)s->buf_ptr, s->bit_cnt);
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
596 return result;
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
597 #endif //!ALT_BITSTREAM_READER
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
598 }
2899263586cd resync marker support, needed for some mp4 files
michaelni
parents: 277
diff changeset
599
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
600 static inline void skip_bits(GetBitContext *s, int n){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
601 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
602 s->index+= n;
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
603 #ifdef DUMP_STREAM
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
604 {
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
605 int result;
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
606 s->index-= n;
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
607 result= get_bits(s, n);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
608 }
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
609 #endif
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
610
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
611 #else
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
612 if(s->bit_cnt>=n){
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
613 /* most common case here */
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
614 s->bit_buf <<= n;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
615 s->bit_cnt -= n;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
616 #ifdef STATS
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
617 st_bit_counts[st_current_index] += n;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
618 #endif
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
619 } else {
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
620 get_bits_long(s,n);
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
621 }
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
622 #endif
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
623 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
624
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
625 static inline void skip_bits1(GetBitContext *s){
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
626 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
627 s->index++;
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
628 #ifdef DUMP_STREAM
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
629 s->index--;
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
630 printf("%d ", get_bits1(s));
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
631 #endif
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
632 #else
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
633 if(s->bit_cnt>0){
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
634 /* most common case here */
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
635 s->bit_buf <<= 1;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
636 s->bit_cnt--;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
637 #ifdef STATS
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
638 st_bit_counts[st_current_index]++;
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
639 #endif
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
640 } else {
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
641 get_bits_long(s,1);
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
642 }
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
643 #endif
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
644 }
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
645
85
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
646 static inline int get_bits_count(GetBitContext *s)
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
647 {
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
648 #ifdef ALT_BITSTREAM_READER
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
649 return s->index;
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
650 #else
85
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
651 return (s->buf_ptr - s->buf) * 8 - s->bit_cnt;
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
652 #endif
85
b0bdab6b8bc6 added get_bits_count()
glantau
parents: 76
diff changeset
653 }
21
20e680e7a490 get_bits() specialization, gives 4\speedup
arpi_esp
parents: 20
diff changeset
654
264
28c5c62b1c4c support decoding (with mplayer) of 3 .mp4 files from mphq
michaelni
parents: 238
diff changeset
655 int check_marker(GetBitContext *s, char *msg);
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
656 void align_get_bits(GetBitContext *s);
986e461dc072 Initial revision
glantau
parents:
diff changeset
657 int init_vlc(VLC *vlc, int nb_bits, int nb_codes,
986e461dc072 Initial revision
glantau
parents:
diff changeset
658 const void *bits, int bits_wrap, int bits_size,
986e461dc072 Initial revision
glantau
parents:
diff changeset
659 const void *codes, int codes_wrap, int codes_size);
986e461dc072 Initial revision
glantau
parents:
diff changeset
660 void free_vlc(VLC *vlc);
986e461dc072 Initial revision
glantau
parents:
diff changeset
661
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
662 #ifdef ALT_BITSTREAM_READER
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
663 #ifdef ALIGNED_BITSTREAM
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
664 #ifdef ARCH_X86
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
665 #define SHOW_BITS(s, val, n) \
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
666 val= be2me_32( ((uint32_t *)(s)->buffer)[bit_cnt>>5] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
667 {uint32_t result2= be2me_32( ((uint32_t *)(s)->buffer)[(bit_cnt>>5) + 1] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
668 asm ("shldl %%cl, %2, %0\n\t"\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
669 : "=r" (val)\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
670 : "0" (val), "r" (result2), "c" (bit_cnt));\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
671 ((uint32_t)val)>>= 32 - n;}
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
672 #else //ARCH_X86
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
673 #define SHOW_BITS(s, val, n) \
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
674 val= be2me_32( ((uint32_t *)(s)->buffer)[bit_cnt>>5] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
675 {uint32_t result2= be2me_32( ((uint32_t *)(s)->buffer)[(bit_cnt>>5) + 1] );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
676 val<<= (bit_cnt&0x1F);\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
677 result2= (result2>>1) >> (31-(bit_cnt&0x1F));\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
678 val|= result2;\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
679 ((uint32_t)val)>>= 32 - n;}
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
680 #endif //!ARCH_X86
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
681 #else //ALIGNED_BITSTREAM
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
682 #define SHOW_BITS(s, val, n) \
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
683 val= be2me_32( unaligned32( ((uint8_t *)(s)->buffer)+(bit_cnt>>3) ) );\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
684 val<<= (bit_cnt&0x07);\
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
685 ((uint32_t)val)>>= 32 - n;
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
686 #endif // !ALIGNED_BITSTREAM
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
687 #define FLUSH_BITS(n) bit_cnt+=n;
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
688 #define SAVE_BITS(s) bit_cnt= (s)->index;
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
689 #define RESTORE_BITS(s) (s)->index= bit_cnt;
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
690 #else
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
691
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
692 /* macro to go faster */
986e461dc072 Initial revision
glantau
parents:
diff changeset
693 /* n must be <= 24 */
986e461dc072 Initial revision
glantau
parents:
diff changeset
694 /* XXX: optimize buffer end test */
986e461dc072 Initial revision
glantau
parents:
diff changeset
695 #define SHOW_BITS(s, val, n)\
986e461dc072 Initial revision
glantau
parents:
diff changeset
696 {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
697 if (bit_cnt < n && buf_ptr < (s)->buf_end) {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
698 bit_buf |= *buf_ptr++ << (24 - bit_cnt);\
986e461dc072 Initial revision
glantau
parents:
diff changeset
699 bit_cnt += 8;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
700 if (bit_cnt < n && buf_ptr < (s)->buf_end) {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
701 bit_buf |= *buf_ptr++ << (24 - bit_cnt);\
986e461dc072 Initial revision
glantau
parents:
diff changeset
702 bit_cnt += 8;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
703 if (bit_cnt < n && buf_ptr < (s)->buf_end) {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
704 bit_buf |= *buf_ptr++ << (24 - bit_cnt);\
986e461dc072 Initial revision
glantau
parents:
diff changeset
705 bit_cnt += 8;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
706 }\
986e461dc072 Initial revision
glantau
parents:
diff changeset
707 }\
986e461dc072 Initial revision
glantau
parents:
diff changeset
708 }\
986e461dc072 Initial revision
glantau
parents:
diff changeset
709 val = bit_buf >> (32 - n);\
986e461dc072 Initial revision
glantau
parents:
diff changeset
710 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
711
986e461dc072 Initial revision
glantau
parents:
diff changeset
712 /* SHOW_BITS with n1 >= n must be been done before */
986e461dc072 Initial revision
glantau
parents:
diff changeset
713 #define FLUSH_BITS(n)\
986e461dc072 Initial revision
glantau
parents:
diff changeset
714 {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
715 bit_buf <<= n;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
716 bit_cnt -= n;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
717 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
718
986e461dc072 Initial revision
glantau
parents:
diff changeset
719 #define SAVE_BITS(s) \
986e461dc072 Initial revision
glantau
parents:
diff changeset
720 {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
721 bit_cnt = (s)->bit_cnt;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
722 bit_buf = (s)->bit_buf;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
723 buf_ptr = (s)->buf_ptr;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
724 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
725
986e461dc072 Initial revision
glantau
parents:
diff changeset
726 #define RESTORE_BITS(s) \
986e461dc072 Initial revision
glantau
parents:
diff changeset
727 {\
986e461dc072 Initial revision
glantau
parents:
diff changeset
728 (s)->buf_ptr = buf_ptr;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
729 (s)->bit_buf = bit_buf;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
730 (s)->bit_cnt = bit_cnt;\
986e461dc072 Initial revision
glantau
parents:
diff changeset
731 }
192
1e5f64be86fc another bitstream reader code (faster on intel cpus) - patch by Michael Niedermayer <michaelni@gmx.at>
uid46427
parents: 151
diff changeset
732 #endif // !ALT_BITSTREAM_READER
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
733
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
734 static inline int get_vlc(GetBitContext *s, VLC *vlc)
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
735 {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
736 int code, n, nb_bits, index;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
737 INT16 *table_codes;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
738 INT8 *table_bits;
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
739 int bit_cnt;
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
740 #ifndef ALT_BITSTREAM_READER
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
741 UINT32 bit_buf;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
742 UINT8 *buf_ptr;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
743 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
744
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
745 SAVE_BITS(s);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
746 nb_bits = vlc->bits;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
747 table_codes = vlc->table_codes;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
748 table_bits = vlc->table_bits;
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
749
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
750 #ifdef FAST_GET_FIRST_VLC
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
751 SHOW_BITS(s, index, nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
752 code = table_codes[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
753 n = table_bits[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
754 if (n > 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
755 /* most common case (90%)*/
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
756 FLUSH_BITS(n);
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
757 #ifdef DUMP_STREAM
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
758 {
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
759 int n= bit_cnt - s->index;
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
760 skip_bits(s, n);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
761 RESTORE_BITS(s);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
762 }
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
763 #endif
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
764 RESTORE_BITS(s);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
765 return code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
766 } else if (n == 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
767 return -1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
768 } else {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
769 FLUSH_BITS(nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
770 nb_bits = -n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
771 table_codes = vlc->table_codes + code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
772 table_bits = vlc->table_bits + code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
773 }
199
0f1dba8fc617 (commited by michael / arpi was crazy enough to give me his password)
arpi_esp
parents: 193
diff changeset
774 #endif
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
775 for(;;) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
776 SHOW_BITS(s, index, nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
777 code = table_codes[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
778 n = table_bits[index];
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
779 if (n > 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
780 /* most common case */
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
781 FLUSH_BITS(n);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
782 #ifdef STATS
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
783 st_bit_counts[st_current_index] += n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
784 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
785 break;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
786 } else if (n == 0) {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
787 return -1;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
788 } else {
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
789 FLUSH_BITS(nb_bits);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
790 #ifdef STATS
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
791 st_bit_counts[st_current_index] += nb_bits;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
792 #endif
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
793 nb_bits = -n;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
794 table_codes = vlc->table_codes + code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
795 table_bits = vlc->table_bits + code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
796 }
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
797 }
306
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
798 #ifdef DUMP_STREAM
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
799 {
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
800 int n= bit_cnt - s->index;
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
801 skip_bits(s, n);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
802 RESTORE_BITS(s);
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
803 }
ebfd518cbbbf dump_stream support (nicely formated 0s and 1s)
michaelni
parents: 290
diff changeset
804 #endif
193
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
805 RESTORE_BITS(s);
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
806 return code;
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
807 }
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
808
b691dd3e9088 aligned bitstream support (optional) - patch by ichael Niedermayer <michaelni@gmx.at>
arpi_esp
parents: 192
diff changeset
809
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
810 /* define it to include statistics code (useful only for optimizing
986e461dc072 Initial revision
glantau
parents:
diff changeset
811 codec efficiency */
986e461dc072 Initial revision
glantau
parents:
diff changeset
812 //#define STATS
986e461dc072 Initial revision
glantau
parents:
diff changeset
813
986e461dc072 Initial revision
glantau
parents:
diff changeset
814 #ifdef STATS
986e461dc072 Initial revision
glantau
parents:
diff changeset
815
986e461dc072 Initial revision
glantau
parents:
diff changeset
816 enum {
986e461dc072 Initial revision
glantau
parents:
diff changeset
817 ST_UNKNOWN,
986e461dc072 Initial revision
glantau
parents:
diff changeset
818 ST_DC,
986e461dc072 Initial revision
glantau
parents:
diff changeset
819 ST_INTRA_AC,
986e461dc072 Initial revision
glantau
parents:
diff changeset
820 ST_INTER_AC,
986e461dc072 Initial revision
glantau
parents:
diff changeset
821 ST_INTRA_MB,
986e461dc072 Initial revision
glantau
parents:
diff changeset
822 ST_INTER_MB,
986e461dc072 Initial revision
glantau
parents:
diff changeset
823 ST_MV,
986e461dc072 Initial revision
glantau
parents:
diff changeset
824 ST_NB,
986e461dc072 Initial revision
glantau
parents:
diff changeset
825 };
986e461dc072 Initial revision
glantau
parents:
diff changeset
826
986e461dc072 Initial revision
glantau
parents:
diff changeset
827 extern int st_current_index;
986e461dc072 Initial revision
glantau
parents:
diff changeset
828 extern unsigned int st_bit_counts[ST_NB];
986e461dc072 Initial revision
glantau
parents:
diff changeset
829 extern unsigned int st_out_bit_counts[ST_NB];
986e461dc072 Initial revision
glantau
parents:
diff changeset
830
986e461dc072 Initial revision
glantau
parents:
diff changeset
831 void print_stats(void);
986e461dc072 Initial revision
glantau
parents:
diff changeset
832 #endif
986e461dc072 Initial revision
glantau
parents:
diff changeset
833
986e461dc072 Initial revision
glantau
parents:
diff changeset
834 /* misc math functions */
986e461dc072 Initial revision
glantau
parents:
diff changeset
835
151
ae0516eadae2 fixed gcc-3.0.x compilation (by Michael Niedermayer)
nickols_k
parents: 144
diff changeset
836 static inline int av_log2(unsigned int v)
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
837 {
986e461dc072 Initial revision
glantau
parents:
diff changeset
838 int n;
986e461dc072 Initial revision
glantau
parents:
diff changeset
839
986e461dc072 Initial revision
glantau
parents:
diff changeset
840 n = 0;
986e461dc072 Initial revision
glantau
parents:
diff changeset
841 if (v & 0xffff0000) {
986e461dc072 Initial revision
glantau
parents:
diff changeset
842 v >>= 16;
986e461dc072 Initial revision
glantau
parents:
diff changeset
843 n += 16;
986e461dc072 Initial revision
glantau
parents:
diff changeset
844 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
845 if (v & 0xff00) {
986e461dc072 Initial revision
glantau
parents:
diff changeset
846 v >>= 8;
986e461dc072 Initial revision
glantau
parents:
diff changeset
847 n += 8;
986e461dc072 Initial revision
glantau
parents:
diff changeset
848 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
849 if (v & 0xf0) {
986e461dc072 Initial revision
glantau
parents:
diff changeset
850 v >>= 4;
986e461dc072 Initial revision
glantau
parents:
diff changeset
851 n += 4;
986e461dc072 Initial revision
glantau
parents:
diff changeset
852 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
853 if (v & 0xc) {
986e461dc072 Initial revision
glantau
parents:
diff changeset
854 v >>= 2;
986e461dc072 Initial revision
glantau
parents:
diff changeset
855 n += 2;
986e461dc072 Initial revision
glantau
parents:
diff changeset
856 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
857 if (v & 0x2) {
986e461dc072 Initial revision
glantau
parents:
diff changeset
858 n++;
986e461dc072 Initial revision
glantau
parents:
diff changeset
859 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
860 return n;
986e461dc072 Initial revision
glantau
parents:
diff changeset
861 }
986e461dc072 Initial revision
glantau
parents:
diff changeset
862
277
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
863 /* median of 3 */
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
864 static inline int mid_pred(int a, int b, int c)
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
865 {
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
866 int vmin, vmax;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
867 vmax = vmin = a;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
868 if (b < vmin)
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
869 vmin = b;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
870 else
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
871 vmax = b;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
872
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
873 if (c < vmin)
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
874 vmin = c;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
875 else if (c > vmax)
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
876 vmax = c;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
877
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
878 return a + b + c - vmin - vmax;
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
879 }
5cb2978e701f new motion estimation (epzs) not complete yet but allready pretty good :)
michaelni
parents: 264
diff changeset
880
327
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
881 static inline int clip(int a, int amin, int amax)
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
882 {
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
883 if (a < amin)
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
884 return amin;
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
885 else if (a > amax)
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
886 return amax;
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
887 else
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
888 return a;
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
889 }
d359db02fc90 much better ME for b frames (a bit slow though)
michaelni
parents: 324
diff changeset
890
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
891 /* memory */
390
48e08d9871da added proper memory handling functions - fixed include paths
glantau
parents: 370
diff changeset
892 void *av_malloc(int size);
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
893 void *av_mallocz(int size);
390
48e08d9871da added proper memory handling functions - fixed include paths
glantau
parents: 370
diff changeset
894 void av_free(void *ptr);
400
b0aed401a756 better av_freep()
glantau
parents: 390
diff changeset
895 void __av_freep(void **ptr);
b0aed401a756 better av_freep()
glantau
parents: 390
diff changeset
896 #define av_freep(p) __av_freep((void **)(p))
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
897
324
9c6f056f0e41 fixed mpeg4 time stuff on encoding
michaelni
parents: 306
diff changeset
898 /* math */
9c6f056f0e41 fixed mpeg4 time stuff on encoding
michaelni
parents: 306
diff changeset
899 int ff_gcd(int a, int b);
9c6f056f0e41 fixed mpeg4 time stuff on encoding
michaelni
parents: 306
diff changeset
900
370
0eca28d16cbd clamp intra matrix to 8bit for mjpeg (workaround for qscale>=25)
al3x
parents: 359
diff changeset
901 #define CLAMP_TO_8BIT(d) ((d > 0xff) ? 0xff : (d < 0) ? 0 : d)
0eca28d16cbd clamp intra matrix to 8bit for mjpeg (workaround for qscale>=25)
al3x
parents: 359
diff changeset
902
0
986e461dc072 Initial revision
glantau
parents:
diff changeset
903 #endif