Mercurial > mplayer.hg
annotate cpudetect.c @ 9175:e11fea5663b2
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author | gabucino |
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date | Thu, 30 Jan 2003 19:35:10 +0000 |
parents | 5ba896a38d75 |
children | 300649f96e22 |
rev | line source |
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1 #include "config.h" |
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2 #include "cpudetect.h" |
5937 | 3 #include "mp_msg.h" |
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4 |
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5 CpuCaps gCpuCaps; |
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6 |
3837 | 7 #ifdef HAVE_MALLOC_H |
8 #include <malloc.h> | |
9 #endif | |
10 #include <stdlib.h> | |
11 | |
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12 #ifdef ARCH_X86 |
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13 |
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14 #include <stdio.h> |
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15 #include <string.h> |
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16 |
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17 #ifdef __NetBSD__ |
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18 #include <sys/param.h> |
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19 #include <sys/sysctl.h> |
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20 #include <machine/cpu.h> |
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21 #endif |
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22 |
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23 #ifdef __FreeBSD__ |
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24 #include <sys/types.h> |
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25 #include <sys/sysctl.h> |
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26 #endif |
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27 |
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28 #ifdef __linux__ |
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29 #include <signal.h> |
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30 #endif |
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31 |
2272 | 32 //#define X86_FXSR_MAGIC |
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33 /* Thanks to the FreeBSD project for some of this cpuid code, and |
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34 * help understanding how to use it. Thanks to the Mesa |
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35 * team for SSE support detection and more cpu detect code. |
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36 */ |
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37 |
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38 /* I believe this code works. However, it has only been used on a PII and PIII */ |
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39 |
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40 static void check_os_katmai_support( void ); |
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41 |
2272 | 42 #if 1 |
43 // return TRUE if cpuid supported | |
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44 static int has_cpuid() |
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45 { |
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46 int a, c; |
2272 | 47 |
48 // code from libavcodec: | |
49 __asm__ __volatile__ ( | |
50 /* See if CPUID instruction is supported ... */ | |
51 /* ... Get copies of EFLAGS into eax and ecx */ | |
52 "pushf\n\t" | |
53 "popl %0\n\t" | |
54 "movl %0, %1\n\t" | |
55 | |
56 /* ... Toggle the ID bit in one copy and store */ | |
57 /* to the EFLAGS reg */ | |
58 "xorl $0x200000, %0\n\t" | |
59 "push %0\n\t" | |
60 "popf\n\t" | |
61 | |
62 /* ... Get the (hopefully modified) EFLAGS */ | |
63 "pushf\n\t" | |
64 "popl %0\n\t" | |
65 : "=a" (a), "=c" (c) | |
66 : | |
67 : "cc" | |
68 ); | |
69 | |
70 return (a!=c); | |
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71 } |
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72 #endif |
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73 |
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74 static void |
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75 do_cpuid(unsigned int ax, unsigned int *p) |
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76 { |
2272 | 77 #if 0 |
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78 __asm __volatile( |
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79 "cpuid;" |
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80 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3]) |
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81 : "0" (ax) |
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82 ); |
2272 | 83 #else |
84 // code from libavcodec: | |
85 __asm __volatile | |
86 ("movl %%ebx, %%esi\n\t" | |
87 "cpuid\n\t" | |
88 "xchgl %%ebx, %%esi" | |
3403 | 89 : "=a" (p[0]), "=S" (p[1]), |
2272 | 90 "=c" (p[2]), "=d" (p[3]) |
91 : "0" (ax)); | |
92 #endif | |
93 | |
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94 } |
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95 |
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96 void GetCpuCaps( CpuCaps *caps) |
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97 { |
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98 unsigned int regs[4]; |
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99 unsigned int regs2[4]; |
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100 |
8860 | 101 memset(caps, 0, sizeof(*caps)); |
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102 caps->isX86=1; |
8860 | 103 caps->cl_size=32; /* default */ |
2288 | 104 if (!has_cpuid()) { |
6134 | 105 mp_msg(MSGT_CPUDETECT,MSGL_WARN,"CPUID not supported!??? (maybe an old 486?)\n"); |
2288 | 106 return; |
107 } | |
108 do_cpuid(0x00000000, regs); // get _max_ cpuid level and vendor name | |
6134 | 109 mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU vendor name: %.4s%.4s%.4s max cpuid level: %d\n", |
3837 | 110 (char*) (regs+1),(char*) (regs+3),(char*) (regs+2), regs[0]); |
2288 | 111 if (regs[0]>=0x00000001) |
2280 | 112 { |
2303 | 113 char *tmpstr; |
8860 | 114 unsigned cl_size; |
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115 |
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116 do_cpuid(0x00000001, regs2); |
2301 | 117 |
2303 | 118 tmpstr=GetCpuFriendlyName(regs, regs2); |
5937 | 119 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"CPU: %s ",tmpstr); |
2303 | 120 free(tmpstr); |
2301 | 121 |
2288 | 122 caps->cpuType=(regs2[0] >> 8)&0xf; |
123 if(caps->cpuType==0xf){ | |
124 // use extended family (P4, IA64) | |
125 caps->cpuType=8+((regs2[0]>>20)&255); | |
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126 } |
3403 | 127 caps->cpuStepping=regs2[0] & 0xf; |
6135 | 128 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"(Family: %d, Stepping: %d)\n", |
3403 | 129 caps->cpuType, caps->cpuStepping); |
2288 | 130 |
131 // general feature flags: | |
2272 | 132 caps->hasMMX = (regs2[3] & (1 << 23 )) >> 23; // 0x0800000 |
133 caps->hasSSE = (regs2[3] & (1 << 25 )) >> 25; // 0x2000000 | |
134 caps->hasSSE2 = (regs2[3] & (1 << 26 )) >> 26; // 0x4000000 | |
2288 | 135 caps->hasMMX2 = caps->hasSSE; // SSE cpus supports mmxext too |
8860 | 136 cl_size = ((regs2[1] >> 8) & 0xFF)*8; |
137 if(cl_size) caps->cl_size = cl_size; | |
2288 | 138 } |
139 do_cpuid(0x80000000, regs); | |
140 if (regs[0]>=0x80000001) { | |
6134 | 141 mp_msg(MSGT_CPUDETECT,MSGL_V,"extended cpuid-level: %d\n",regs[0]&0x7FFFFFFF); |
2288 | 142 do_cpuid(0x80000001, regs2); |
3840 | 143 caps->hasMMX |= (regs2[3] & (1 << 23 )) >> 23; // 0x0800000 |
144 caps->hasMMX2 |= (regs2[3] & (1 << 22 )) >> 22; // 0x400000 | |
2288 | 145 caps->has3DNow = (regs2[3] & (1 << 31 )) >> 31; //0x80000000 |
146 caps->has3DNowExt = (regs2[3] & (1 << 30 )) >> 30; | |
147 } | |
8860 | 148 if(regs[0]>=0x80000006) |
149 { | |
150 do_cpuid(0x80000006, regs2); | |
151 mp_msg(MSGT_CPUDETECT,MSGL_V,"extended cache-info: %d\n",regs2[2]&0x7FFFFFFF); | |
152 caps->cl_size = regs2[2] & 0xFF; | |
153 } | |
154 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"Detected cache-line size is %u bytes\n",caps->cl_size); | |
2288 | 155 #if 0 |
5937 | 156 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"cpudetect: MMX=%d MMX2=%d SSE=%d SSE2=%d 3DNow=%d 3DNowExt=%d\n", |
2288 | 157 gCpuCaps.hasMMX, |
158 gCpuCaps.hasMMX2, | |
159 gCpuCaps.hasSSE, | |
160 gCpuCaps.hasSSE2, | |
161 gCpuCaps.has3DNow, | |
162 gCpuCaps.has3DNowExt ); | |
163 #endif | |
164 | |
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165 /* FIXME: Does SSE2 need more OS support, too? */ |
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166 #if defined(__linux__) || defined(__FreeBSD__) || defined(__NetBSD__) |
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167 if (caps->hasSSE) |
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168 check_os_katmai_support(); |
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169 if (!caps->hasSSE) |
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170 caps->hasSSE2 = 0; |
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171 #else |
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172 caps->hasSSE=0; |
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173 caps->hasSSE2 = 0; |
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174 #endif |
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175 // caps->has3DNow=1; |
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176 // caps->hasMMX2 = 0; |
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177 // caps->hasMMX = 0; |
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178 |
4829 | 179 #ifndef HAVE_MMX |
6134 | 180 if(caps->hasMMX) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"MMX supported but disabled\n"); |
4829 | 181 caps->hasMMX=0; |
182 #endif | |
183 #ifndef HAVE_MMX2 | |
6134 | 184 if(caps->hasMMX2) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"MMX2 supported but disabled\n"); |
4829 | 185 caps->hasMMX2=0; |
186 #endif | |
187 #ifndef HAVE_SSE | |
6134 | 188 if(caps->hasSSE) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"SSE supported but disabled\n"); |
4829 | 189 caps->hasSSE=0; |
190 #endif | |
191 #ifndef HAVE_SSE2 | |
6134 | 192 if(caps->hasSSE2) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"SSE2 supported but disabled\n"); |
4829 | 193 caps->hasSSE2=0; |
194 #endif | |
195 #ifndef HAVE_3DNOW | |
6134 | 196 if(caps->has3DNow) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"3DNow supported but disabled\n"); |
4829 | 197 caps->has3DNow=0; |
198 #endif | |
199 #ifndef HAVE_3DNOWEX | |
6134 | 200 if(caps->has3DNowExt) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"3DNowExt supported but disabled\n"); |
4829 | 201 caps->has3DNowExt=0; |
202 #endif | |
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203 } |
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204 |
2301 | 205 |
206 #define CPUID_EXTFAMILY ((regs2[0] >> 20)&0xFF) /* 27..20 */ | |
207 #define CPUID_EXTMODEL ((regs2[0] >> 16)&0x0F) /* 19..16 */ | |
208 #define CPUID_TYPE ((regs2[0] >> 12)&0x04) /* 13..12 */ | |
209 #define CPUID_FAMILY ((regs2[0] >> 8)&0x0F) /* 11..08 */ | |
210 #define CPUID_MODEL ((regs2[0] >> 4)&0x0F) /* 07..04 */ | |
211 #define CPUID_STEPPING ((regs2[0] >> 0)&0x0F) /* 03..00 */ | |
212 | |
213 char *GetCpuFriendlyName(unsigned int regs[], unsigned int regs2[]){ | |
214 #include "cputable.h" /* get cpuname and cpuvendors */ | |
215 char vendor[17]; | |
2303 | 216 char *retname; |
2301 | 217 int i; |
218 | |
2417 | 219 if (NULL==(retname=(char*)malloc(256))) { |
5937 | 220 mp_msg(MSGT_CPUDETECT,MSGL_FATAL,"Error: GetCpuFriendlyName() not enough memory\n"); |
2303 | 221 exit(1); |
222 } | |
223 | |
3837 | 224 sprintf(vendor,"%.4s%.4s%.4s",(char*)(regs+1),(char*)(regs+3),(char*)(regs+2)); |
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225 |
2301 | 226 for(i=0; i<MAX_VENDORS; i++){ |
227 if(!strcmp(cpuvendors[i].string,vendor)){ | |
228 if(cpuname[i][CPUID_FAMILY][CPUID_MODEL]){ | |
2303 | 229 snprintf(retname,255,"%s %s",cpuvendors[i].name,cpuname[i][CPUID_FAMILY][CPUID_MODEL]); |
2301 | 230 } else { |
2303 | 231 snprintf(retname,255,"unknown %s %d. Generation CPU",cpuvendors[i].name,CPUID_FAMILY); |
5937 | 232 mp_msg(MSGT_CPUDETECT,MSGL_WARN,"unknown %s CPU:\n",cpuvendors[i].name); |
233 mp_msg(MSGT_CPUDETECT,MSGL_WARN,"Vendor: %s\n",cpuvendors[i].string); | |
234 mp_msg(MSGT_CPUDETECT,MSGL_WARN,"Type: %d\n",CPUID_TYPE); | |
235 mp_msg(MSGT_CPUDETECT,MSGL_WARN,"Family: %d (ext: %d)\n",CPUID_FAMILY,CPUID_EXTFAMILY); | |
236 mp_msg(MSGT_CPUDETECT,MSGL_WARN,"Model: %d (ext: %d)\n",CPUID_MODEL,CPUID_EXTMODEL); | |
237 mp_msg(MSGT_CPUDETECT,MSGL_WARN,"Stepping: %d\n",CPUID_STEPPING); | |
238 mp_msg(MSGT_CPUDETECT,MSGL_WARN,"Please send the above info along with the exact CPU name" | |
2301 | 239 "to the MPlayer-Developers, so we can add it to the list!\n"); |
240 } | |
241 } | |
242 } | |
243 | |
244 //printf("Detected CPU: %s\n", retname); | |
245 return retname; | |
246 } | |
247 | |
248 #undef CPUID_EXTFAMILY | |
249 #undef CPUID_EXTMODEL | |
250 #undef CPUID_TYPE | |
251 #undef CPUID_FAMILY | |
252 #undef CPUID_MODEL | |
253 #undef CPUID_STEPPING | |
254 | |
255 | |
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256 #if defined(__linux__) && defined(_POSIX_SOURCE) && defined(X86_FXSR_MAGIC) |
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257 static void sigill_handler_sse( int signal, struct sigcontext sc ) |
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258 { |
6134 | 259 mp_msg(MSGT_CPUDETECT,MSGL_V, "SIGILL, " ); |
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260 |
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261 /* Both the "xorps %%xmm0,%%xmm0" and "divps %xmm0,%%xmm1" |
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262 * instructions are 3 bytes long. We must increment the instruction |
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263 * pointer manually to avoid repeated execution of the offending |
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264 * instruction. |
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265 * |
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266 * If the SIGILL is caused by a divide-by-zero when unmasked |
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267 * exceptions aren't supported, the SIMD FPU status and control |
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268 * word will be restored at the end of the test, so we don't need |
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269 * to worry about doing it here. Besides, we may not be able to... |
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270 */ |
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271 sc.eip += 3; |
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272 |
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273 gCpuCaps.hasSSE=0; |
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274 } |
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275 |
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276 static void sigfpe_handler_sse( int signal, struct sigcontext sc ) |
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277 { |
6134 | 278 mp_msg(MSGT_CPUDETECT,MSGL_V, "SIGFPE, " ); |
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279 |
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280 if ( sc.fpstate->magic != 0xffff ) { |
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281 /* Our signal context has the extended FPU state, so reset the |
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282 * divide-by-zero exception mask and clear the divide-by-zero |
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283 * exception bit. |
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284 */ |
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285 sc.fpstate->mxcsr |= 0x00000200; |
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286 sc.fpstate->mxcsr &= 0xfffffffb; |
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287 } else { |
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288 /* If we ever get here, we're completely hosed. |
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289 */ |
6134 | 290 mp_msg(MSGT_CPUDETECT,MSGL_V, "\n\n" ); |
291 mp_msg(MSGT_CPUDETECT,MSGL_V, "SSE enabling test failed badly!" ); | |
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292 } |
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293 } |
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294 #endif /* __linux__ && _POSIX_SOURCE && X86_FXSR_MAGIC */ |
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295 |
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296 /* If we're running on a processor that can do SSE, let's see if we |
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297 * are allowed to or not. This will catch 2.4.0 or later kernels that |
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298 * haven't been configured for a Pentium III but are running on one, |
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299 * and RedHat patched 2.2 kernels that have broken exception handling |
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300 * support for user space apps that do SSE. |
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301 */ |
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302 static void check_os_katmai_support( void ) |
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303 { |
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304 #if defined(__FreeBSD__) |
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305 int has_sse=0, ret; |
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306 size_t len=sizeof(has_sse); |
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307 |
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308 ret = sysctlbyname("hw.instruction_sse", &has_sse, &len, NULL, 0); |
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309 if (ret || !has_sse) |
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310 gCpuCaps.hasSSE=0; |
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311 |
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312 #elif defined(__NetBSD__) |
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313 #if __NetBSD_Version__ >= 105250000 |
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314 int has_sse, has_sse2, ret, mib[2]; |
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315 size_t varlen; |
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316 |
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317 mib[0] = CTL_MACHDEP; |
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318 mib[1] = CPU_SSE; |
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319 varlen = sizeof(has_sse); |
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320 |
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321 mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE... " ); |
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322 ret = sysctl(mib, 2, &has_sse, &varlen, NULL, 0); |
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323 if (ret < 0 || !has_sse) { |
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324 gCpuCaps.hasSSE=0; |
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325 mp_msg(MSGT_CPUDETECT,MSGL_V, "no!\n" ); |
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326 } else { |
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327 gCpuCaps.hasSSE=1; |
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328 mp_msg(MSGT_CPUDETECT,MSGL_V, "yes!\n" ); |
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329 } |
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330 |
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331 mib[1] = CPU_SSE2; |
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332 varlen = sizeof(has_sse2); |
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333 mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE2... " ); |
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334 ret = sysctl(mib, 2, &has_sse2, &varlen, NULL, 0); |
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335 if (ret < 0 || !has_sse2) { |
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336 gCpuCaps.hasSSE2=0; |
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337 mp_msg(MSGT_CPUDETECT,MSGL_V, "no!\n" ); |
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338 } else { |
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339 gCpuCaps.hasSSE2=1; |
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340 mp_msg(MSGT_CPUDETECT,MSGL_V, "yes!\n" ); |
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341 } |
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342 #else |
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343 gCpuCaps.hasSSE = 0; |
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344 mp_msg(MSGT_CPUDETECT,MSGL_WARN, "No OS support for SSE, disabling to be safe.\n" ); |
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345 #endif |
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346 #elif defined(__linux__) |
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347 #if defined(_POSIX_SOURCE) && defined(X86_FXSR_MAGIC) |
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348 struct sigaction saved_sigill; |
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349 struct sigaction saved_sigfpe; |
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350 |
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351 /* Save the original signal handlers. |
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352 */ |
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353 sigaction( SIGILL, NULL, &saved_sigill ); |
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354 sigaction( SIGFPE, NULL, &saved_sigfpe ); |
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355 |
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356 signal( SIGILL, (void (*)(int))sigill_handler_sse ); |
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357 signal( SIGFPE, (void (*)(int))sigfpe_handler_sse ); |
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358 |
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359 /* Emulate test for OSFXSR in CR4. The OS will set this bit if it |
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360 * supports the extended FPU save and restore required for SSE. If |
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361 * we execute an SSE instruction on a PIII and get a SIGILL, the OS |
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362 * doesn't support Streaming SIMD Exceptions, even if the processor |
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363 * does. |
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364 */ |
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365 if ( gCpuCaps.hasSSE ) { |
6134 | 366 mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE... " ); |
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367 |
2272 | 368 // __asm __volatile ("xorps %%xmm0, %%xmm0"); |
369 __asm __volatile ("xorps %xmm0, %xmm0"); | |
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370 |
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371 if ( gCpuCaps.hasSSE ) { |
6134 | 372 mp_msg(MSGT_CPUDETECT,MSGL_V, "yes.\n" ); |
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373 } else { |
6134 | 374 mp_msg(MSGT_CPUDETECT,MSGL_V, "no!\n" ); |
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375 } |
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376 } |
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377 |
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378 /* Emulate test for OSXMMEXCPT in CR4. The OS will set this bit if |
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379 * it supports unmasked SIMD FPU exceptions. If we unmask the |
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380 * exceptions, do a SIMD divide-by-zero and get a SIGILL, the OS |
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381 * doesn't support unmasked SIMD FPU exceptions. If we get a SIGFPE |
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382 * as expected, we're okay but we need to clean up after it. |
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383 * |
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384 * Are we being too stringent in our requirement that the OS support |
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385 * unmasked exceptions? Certain RedHat 2.2 kernels enable SSE by |
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386 * setting CR4.OSFXSR but don't support unmasked exceptions. Win98 |
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387 * doesn't even support them. We at least know the user-space SSE |
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388 * support is good in kernels that do support unmasked exceptions, |
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389 * and therefore to be safe I'm going to leave this test in here. |
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390 */ |
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391 if ( gCpuCaps.hasSSE ) { |
6134 | 392 mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE unmasked exceptions... " ); |
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393 |
2272 | 394 // test_os_katmai_exception_support(); |
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395 |
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396 if ( gCpuCaps.hasSSE ) { |
6134 | 397 mp_msg(MSGT_CPUDETECT,MSGL_V, "yes.\n" ); |
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398 } else { |
6134 | 399 mp_msg(MSGT_CPUDETECT,MSGL_V, "no!\n" ); |
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400 } |
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401 } |
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402 |
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403 /* Restore the original signal handlers. |
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404 */ |
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405 sigaction( SIGILL, &saved_sigill, NULL ); |
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406 sigaction( SIGFPE, &saved_sigfpe, NULL ); |
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407 |
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408 /* If we've gotten to here and the XMM CPUID bit is still set, we're |
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409 * safe to go ahead and hook out the SSE code throughout Mesa. |
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410 */ |
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411 if ( gCpuCaps.hasSSE ) { |
6134 | 412 mp_msg(MSGT_CPUDETECT,MSGL_V, "Tests of OS support for SSE passed.\n" ); |
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413 } else { |
6134 | 414 mp_msg(MSGT_CPUDETECT,MSGL_V, "Tests of OS support for SSE failed!\n" ); |
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415 } |
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416 #else |
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417 /* We can't use POSIX signal handling to test the availability of |
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418 * SSE, so we disable it by default. |
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419 */ |
5937 | 420 mp_msg(MSGT_CPUDETECT,MSGL_WARN, "Cannot test OS support for SSE, disabling to be safe.\n" ); |
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421 gCpuCaps.hasSSE=0; |
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422 #endif /* _POSIX_SOURCE && X86_FXSR_MAGIC */ |
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423 #else |
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424 /* Do nothing on other platforms for now. |
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425 */ |
6134 | 426 mp_msg(MSGT_CPUDETECT,MSGL_WARN, "Cannot test OS support for SSE, leaving disabled.\n" ); |
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427 gCpuCaps.hasSSE=0; |
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428 #endif /* __linux__ */ |
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429 } |
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430 #else /* ARCH_X86 */ |
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431 |
9003 | 432 #ifdef SYS_DARWIN |
433 #include <sys/sysctl.h> | |
434 #else | |
435 #include <signal.h> | |
436 #include <setjmp.h> | |
437 | |
438 static sigjmp_buf jmpbuf; | |
439 static volatile sig_atomic_t canjump = 0; | |
440 | |
441 static void sigill_handler (int sig) | |
442 { | |
443 if (!canjump) { | |
444 signal (sig, SIG_DFL); | |
445 raise (sig); | |
446 } | |
447 | |
448 canjump = 0; | |
449 siglongjmp (jmpbuf, 1); | |
450 } | |
451 #endif | |
452 | |
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453 void GetCpuCaps( CpuCaps *caps) |
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454 { |
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455 caps->cpuType=0; |
3403 | 456 caps->cpuStepping=0; |
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457 caps->hasMMX=0; |
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458 caps->hasMMX2=0; |
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459 caps->has3DNow=0; |
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460 caps->has3DNowExt=0; |
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461 caps->hasSSE=0; |
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462 caps->hasSSE2=0; |
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463 caps->isX86=0; |
9003 | 464 caps->hasAltiVec = 0; |
465 #ifdef HAVE_ALTIVEC | |
466 #ifdef SYS_DARWIN | |
467 /* | |
468 rip-off from ffmpeg altivec detection code. | |
469 this code also appears on Apple's AltiVec pages. | |
470 */ | |
471 { | |
472 int sels[2] = {CTL_HW, HW_VECTORUNIT}; | |
473 int has_vu = 0; | |
474 size_t len = sizeof(has_vu); | |
475 int err; | |
476 | |
477 err = sysctl(sels, 2, &has_vu, &len, NULL, 0); | |
478 | |
479 if (err == 0) | |
480 if (has_vu != 0) | |
481 caps->hasAltiVec = 1; | |
482 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"AltiVec %sfound\n", (caps->hasAltiVec ? "" : "not ")); | |
483 } | |
484 #else /* SYS_DARWIN */ | |
485 /* no Darwin, do it the brute-force way */ | |
486 /* this is borrowed from the libmpeg2 library */ | |
487 { | |
488 signal (SIGILL, sigill_handler); | |
489 if (sigsetjmp (jmpbuf, 1)) { | |
490 signal (SIGILL, SIG_DFL); | |
491 } else { | |
492 canjump = 1; | |
493 | |
494 asm volatile ("mtspr 256, %0\n\t" | |
9122 | 495 "vand %%v0, %%v0, %%v0" |
9003 | 496 : |
497 : "r" (-1)); | |
498 | |
499 signal (SIGILL, SIG_DFL); | |
500 caps->hasAltiVec = 1; | |
501 } | |
502 } | |
503 #endif /* SYS_DARWIN */ | |
504 #endif /* HAVE_ALTIVEC */ | |
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505 } |
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506 #endif /* !ARCH_X86 */ |