annotate cpudetect.c @ 32264:f1884cb8d0ee

Remove __USE_UNIX98 from libdvdcss/libdvdnav/libdvdread CPPFLAGS. This is an internal glibc symbol that should not be used directly. Besides, other CPPFLAGS already take care of enabling single Unix v2.
author diego
date Sat, 25 Sep 2010 13:01:33 +0000
parents f3aed7bffcbb
children fdf3f93c2828
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1 /*
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2 * This file is part of MPlayer.
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3 *
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4 * MPlayer is free software; you can redistribute it and/or modify
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5 * it under the terms of the GNU General Public License as published by
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6 * the Free Software Foundation; either version 2 of the License, or
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7 * (at your option) any later version.
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8 *
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9 * MPlayer is distributed in the hope that it will be useful,
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10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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12 * GNU General Public License for more details.
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13 *
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14 * You should have received a copy of the GNU General Public License along
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15 * with MPlayer; if not, write to the Free Software Foundation, Inc.,
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16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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17 */
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18
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19 #include "config.h"
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20 #include "cpudetect.h"
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21 #include "mp_msg.h"
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22
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23 CpuCaps gCpuCaps;
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24
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25 #include <stdlib.h>
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26
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27 #if ARCH_X86
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28
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29 #include <stdio.h>
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30 #include <string.h>
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31
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32 #if defined (__NetBSD__) || defined(__OpenBSD__)
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33 #include <sys/param.h>
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34 #include <sys/sysctl.h>
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35 #include <machine/cpu.h>
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36 #elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) || defined(__APPLE__)
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37 #include <sys/types.h>
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38 #include <sys/sysctl.h>
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39 #elif defined(__linux__)
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40 #include <signal.h>
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41 #elif defined(__MINGW32__) || defined(__CYGWIN__)
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42 #include <windows.h>
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43 #elif defined(__OS2__)
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44 #define INCL_DOS
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45 #include <os2.h>
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46 #elif defined(__AMIGAOS4__)
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47 #include <proto/exec.h>
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48 #endif
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49
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50 /* Thanks to the FreeBSD project for some of this cpuid code, and
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51 * help understanding how to use it. Thanks to the Mesa
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52 * team for SSE support detection and more cpu detect code.
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53 */
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54
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55 /* I believe this code works. However, it has only been used on a PII and PIII */
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56
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57 static void check_os_katmai_support( void );
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58
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59 // return TRUE if cpuid supported
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60 static int has_cpuid(void)
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61 {
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62 // code from libavcodec:
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63 #if ARCH_X86_64
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64 return 1;
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65 #else
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66 long a, c;
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67 __asm__ volatile (
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68 /* See if CPUID instruction is supported ... */
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69 /* ... Get copies of EFLAGS into eax and ecx */
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70 "pushfl\n\t"
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71 "pop %0\n\t"
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72 "mov %0, %1\n\t"
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73
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74 /* ... Toggle the ID bit in one copy and store */
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75 /* to the EFLAGS reg */
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76 "xor $0x200000, %0\n\t"
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77 "push %0\n\t"
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78 "popfl\n\t"
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79
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80 /* ... Get the (hopefully modified) EFLAGS */
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81 "pushfl\n\t"
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82 "pop %0\n\t"
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83 : "=a" (a), "=c" (c)
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84 :
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85 : "cc"
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86 );
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87
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88 return a != c;
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89 #endif
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90 }
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91
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92 void
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93 do_cpuid(unsigned int ax, unsigned int *p)
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94 {
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95 // code from libavcodec:
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96 __asm__ volatile
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97 ("mov %%"REG_b", %%"REG_S"\n\t"
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98 "cpuid\n\t"
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99 "xchg %%"REG_b", %%"REG_S
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100 : "=a" (p[0]), "=S" (p[1]),
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101 "=c" (p[2]), "=d" (p[3])
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102 : "0" (ax));
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103 }
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104
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105 void GetCpuCaps( CpuCaps *caps)
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106 {
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107 unsigned int regs[4];
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108 unsigned int regs2[4];
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109
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110 memset(caps, 0, sizeof(*caps));
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111 caps->isX86=1;
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112 caps->cl_size=32; /* default */
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113 if (!has_cpuid()) {
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114 mp_msg(MSGT_CPUDETECT,MSGL_WARN,"CPUID not supported!??? (maybe an old 486?)\n");
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115 return;
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116 }
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117 do_cpuid(0x00000000, regs); // get _max_ cpuid level and vendor name
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118 mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU vendor name: %.4s%.4s%.4s max cpuid level: %d\n",
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119 (char*) (regs+1),(char*) (regs+3),(char*) (regs+2), regs[0]);
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120 if (regs[0]>=0x00000001)
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121 {
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122 char *tmpstr, *ptmpstr;
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123 unsigned cl_size;
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124
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125 do_cpuid(0x00000001, regs2);
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126
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127 caps->cpuType=(regs2[0] >> 8)&0xf;
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128 caps->cpuModel=(regs2[0] >> 4)&0xf;
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129
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130 // see AMD64 Architecture Programmer's Manual, Volume 3: General-purpose and
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131 // System Instructions, Table 3-2: Effective family computation, page 120.
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132 if(caps->cpuType==0xf){
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133 // use extended family (P4, IA64, K8)
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134 caps->cpuType=0xf+((regs2[0]>>20)&255);
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135 }
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136 if(caps->cpuType==0xf || caps->cpuType==6)
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137 caps->cpuModel |= ((regs2[0]>>16)&0xf) << 4;
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138
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139 caps->cpuStepping=regs2[0] & 0xf;
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140
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141 // general feature flags:
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142 caps->hasTSC = (regs2[3] & (1 << 8 )) >> 8; // 0x0000010
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143 caps->hasMMX = (regs2[3] & (1 << 23 )) >> 23; // 0x0800000
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144 caps->hasSSE = (regs2[3] & (1 << 25 )) >> 25; // 0x2000000
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145 caps->hasSSE2 = (regs2[3] & (1 << 26 )) >> 26; // 0x4000000
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146 caps->hasSSE3 = (regs2[2] & 1); // 0x0000001
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147 caps->hasSSSE3 = (regs2[2] & (1 << 9 )) >> 9; // 0x0000200
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148 caps->hasMMX2 = caps->hasSSE; // SSE cpus supports mmxext too
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149 cl_size = ((regs2[1] >> 8) & 0xFF)*8;
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150 if(cl_size) caps->cl_size = cl_size;
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151
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152 ptmpstr=tmpstr=GetCpuFriendlyName(regs, regs2);
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153 while(*ptmpstr == ' ') // strip leading spaces
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154 ptmpstr++;
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155 mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: %s ", ptmpstr);
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156 free(tmpstr);
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157 mp_msg(MSGT_CPUDETECT,MSGL_V,"(Family: %d, Model: %d, Stepping: %d)\n",
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158 caps->cpuType, caps->cpuModel, caps->cpuStepping);
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685c416f12b5 cpuspeed detection for X86 TSC capable CPUs (also added TSC detection, should best be verified by some people with TSC/nonTSC capable CPUs)
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159
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160 }
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161 do_cpuid(0x80000000, regs);
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162 if (regs[0]>=0x80000001) {
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163 mp_msg(MSGT_CPUDETECT,MSGL_V,"extended cpuid-level: %d\n",regs[0]&0x7FFFFFFF);
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164 do_cpuid(0x80000001, regs2);
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165 caps->hasMMX |= (regs2[3] & (1 << 23 )) >> 23; // 0x0800000
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166 caps->hasMMX2 |= (regs2[3] & (1 << 22 )) >> 22; // 0x400000
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167 caps->has3DNow = (regs2[3] & (1 << 31 )) >> 31; //0x80000000
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168 caps->has3DNowExt = (regs2[3] & (1 << 30 )) >> 30;
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169 caps->hasSSE4a = (regs2[2] & (1 << 6 )) >> 6; // 0x0000040
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170 }
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171 if(regs[0]>=0x80000006)
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172 {
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173 do_cpuid(0x80000006, regs2);
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174 mp_msg(MSGT_CPUDETECT,MSGL_V,"extended cache-info: %d\n",regs2[2]&0x7FFFFFFF);
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175 caps->cl_size = regs2[2] & 0xFF;
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176 }
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177 mp_msg(MSGT_CPUDETECT,MSGL_V,"Detected cache-line size is %u bytes\n",caps->cl_size);
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178 #if 0
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179 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"cpudetect: MMX=%d MMX2=%d SSE=%d SSE2=%d 3DNow=%d 3DNowExt=%d\n",
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180 gCpuCaps.hasMMX,
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181 gCpuCaps.hasMMX2,
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182 gCpuCaps.hasSSE,
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183 gCpuCaps.hasSSE2,
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184 gCpuCaps.has3DNow,
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185 gCpuCaps.has3DNowExt);
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186 #endif
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187
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188 /* FIXME: Does SSE2 need more OS support, too? */
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189 if (caps->hasSSE)
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190 check_os_katmai_support();
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191 if (!caps->hasSSE)
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192 caps->hasSSE2 = 0;
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193 // caps->has3DNow=1;
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194 // caps->hasMMX2 = 0;
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195 // caps->hasMMX = 0;
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196
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06540eb5ef6a Rename RUNTIME_CPUDETECT to CONFIG_RUNTIME_CPUDETECT and always define it.
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197 #if !CONFIG_RUNTIME_CPUDETECT
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198 #if !HAVE_MMX
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199 if(caps->hasMMX) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"MMX supported but disabled\n");
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200 caps->hasMMX=0;
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201 #endif
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202 #if !HAVE_MMX2
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203 if(caps->hasMMX2) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"MMX2 supported but disabled\n");
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204 caps->hasMMX2=0;
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205 #endif
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206 #if !HAVE_SSE
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207 if(caps->hasSSE) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"SSE supported but disabled\n");
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208 caps->hasSSE=0;
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209 #endif
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210 #if !HAVE_SSE2
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211 if(caps->hasSSE2) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"SSE2 supported but disabled\n");
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212 caps->hasSSE2=0;
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213 #endif
28335
31287e75b5d8 HAVE_3DNOW --> HAVE_AMD3DNOW
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214 #if !HAVE_AMD3DNOW
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215 if(caps->has3DNow) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"3DNow supported but disabled\n");
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216 caps->has3DNow=0;
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parents: 3850
diff changeset
217 #endif
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218 #if !HAVE_AMD3DNOWEXT
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219 if(caps->has3DNowExt) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"3DNowExt supported but disabled\n");
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220 caps->has3DNowExt=0;
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221 #endif
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222 #endif // CONFIG_RUNTIME_CPUDETECT
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223 }
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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224
2301
b4c4c832cce7 Detect and show cpu name.
atmos4
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225 char *GetCpuFriendlyName(unsigned int regs[], unsigned int regs2[]){
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226 char vendor[13];
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227 char *retname;
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228 int i;
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229
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230 if (NULL==(retname=malloc(256))) {
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231 mp_msg(MSGT_CPUDETECT,MSGL_FATAL,"Error: GetCpuFriendlyName() not enough memory\n");
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232 exit(1);
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233 }
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234 retname[0] = '\0';
2303
456e22bfb147 returns a malloc()'ed string instead of an auto char[]
pl
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235
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236 sprintf(vendor,"%.4s%.4s%.4s",(char*)(regs+1),(char*)(regs+3),(char*)(regs+2));
3146
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
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237
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238 do_cpuid(0x80000000,regs);
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239 if (regs[0] >= 0x80000004)
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240 {
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241 // CPU has built-in namestring
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242 for (i = 0x80000002; i <= 0x80000004; i++)
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diff changeset
243 {
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244 do_cpuid(i, regs);
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245 strncat(retname, (char*)regs, 16);
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246 }
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247 }
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248 return retname;
2301
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249 }
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diff changeset
250
28295
373702f9db03 Fix a wrongly converted !defined(ARCH_X86_64)
reimar
parents: 28288
diff changeset
251 #if defined(__linux__) && defined(_POSIX_SOURCE) && !ARCH_X86_64
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252 static void sigill_handler_sse( int signal, struct sigcontext sc )
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253 {
6134
2f59920361ff cosmetics on CPU detection messages
arpi
parents: 5937
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254 mp_msg(MSGT_CPUDETECT,MSGL_V, "SIGILL, " );
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255
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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diff changeset
256 /* Both the "xorps %%xmm0,%%xmm0" and "divps %xmm0,%%xmm1"
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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diff changeset
257 * instructions are 3 bytes long. We must increment the instruction
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
258 * pointer manually to avoid repeated execution of the offending
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
259 * instruction.
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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diff changeset
260 *
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
261 * If the SIGILL is caused by a divide-by-zero when unmasked
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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diff changeset
262 * exceptions aren't supported, the SIMD FPU status and control
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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diff changeset
263 * word will be restored at the end of the test, so we don't need
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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diff changeset
264 * to worry about doing it here. Besides, we may not be able to...
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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diff changeset
265 */
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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266 sc.eip += 3;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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diff changeset
267
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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268 gCpuCaps.hasSSE=0;
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269 }
24439
680bc9411ecf Do not check for X86_FXSR_MAGIC define, it is missing in newer
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diff changeset
270 #endif /* __linux__ && _POSIX_SOURCE */
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271
29034
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272 #if (defined(__MINGW32__) || defined(__CYGWIN__)) && !ARCH_X86_64
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273 LONG CALLBACK win32_sig_handler_sse(EXCEPTION_POINTERS* ep)
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274 {
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275 if(ep->ExceptionRecord->ExceptionCode==EXCEPTION_ILLEGAL_INSTRUCTION){
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276 mp_msg(MSGT_CPUDETECT,MSGL_V, "SIGILL, " );
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277 ep->ContextRecord->Eip +=3;
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278 gCpuCaps.hasSSE=0;
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279 return EXCEPTION_CONTINUE_EXECUTION;
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280 }
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281 return EXCEPTION_CONTINUE_SEARCH;
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diff changeset
282 }
27727
48c1ae64255b Replace preprocessor check for WIN32 with checks for __MINGW32__ and __CYGWIN__.
diego
parents: 27605
diff changeset
283 #endif /* defined(__MINGW32__) || defined(__CYGWIN__) */
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284
26061
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diff changeset
285 #ifdef __OS2__
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286 ULONG _System os2_sig_handler_sse(PEXCEPTIONREPORTRECORD p1,
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287 PEXCEPTIONREGISTRATIONRECORD p2,
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288 PCONTEXTRECORD p3,
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289 PVOID p4)
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290 {
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291 if(p1->ExceptionNum == XCPT_ILLEGAL_INSTRUCTION){
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292 mp_msg(MSGT_CPUDETECT, MSGL_V, "SIGILL, ");
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diff changeset
293
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294 p3->ctx_RegEip += 3;
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295 gCpuCaps.hasSSE = 0;
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diff changeset
296
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297 return XCPT_CONTINUE_EXECUTION;
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diff changeset
298 }
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299 return XCPT_CONTINUE_SEARCH;
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diff changeset
300 }
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diff changeset
301 #endif
6ede4d6afa41 Enable SSE detection on OS/2.
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diff changeset
302
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diff changeset
303 /* If we're running on a processor that can do SSE, let's see if we
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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diff changeset
304 * are allowed to or not. This will catch 2.4.0 or later kernels that
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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diff changeset
305 * haven't been configured for a Pentium III but are running on one,
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
306 * and RedHat patched 2.2 kernels that have broken exception handling
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307 * support for user space apps that do SSE.
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308 */
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309
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310 #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__)
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311 #define SSE_SYSCTL_NAME "hw.instruction_sse"
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312 #elif defined(__APPLE__)
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313 #define SSE_SYSCTL_NAME "hw.optional.sse"
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314 #endif
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315
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316 static void check_os_katmai_support( void )
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317 {
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318 #if ARCH_X86_64
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319 gCpuCaps.hasSSE=1;
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320 gCpuCaps.hasSSE2=1;
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321 #elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__) || defined(__APPLE__)
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322 int has_sse=0, ret;
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323 size_t len=sizeof(has_sse);
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324
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325 ret = sysctlbyname(SSE_SYSCTL_NAME, &has_sse, &len, NULL, 0);
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326 if (ret || !has_sse)
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327 gCpuCaps.hasSSE=0;
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328
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329 #elif defined(__NetBSD__) || defined (__OpenBSD__)
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330 #if __NetBSD_Version__ >= 105250000 || (defined __OpenBSD__)
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331 int has_sse, has_sse2, ret, mib[2];
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332 size_t varlen;
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333
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334 mib[0] = CTL_MACHDEP;
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335 mib[1] = CPU_SSE;
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336 varlen = sizeof(has_sse);
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337
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338 mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE... " );
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339 ret = sysctl(mib, 2, &has_sse, &varlen, NULL, 0);
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340 gCpuCaps.hasSSE = ret >= 0 && has_sse;
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341 mp_msg(MSGT_CPUDETECT,MSGL_V, gCpuCaps.hasSSE ? "yes.\n" : "no!\n" );
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342
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343 mib[1] = CPU_SSE2;
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344 varlen = sizeof(has_sse2);
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345 mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE2... " );
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346 ret = sysctl(mib, 2, &has_sse2, &varlen, NULL, 0);
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347 gCpuCaps.hasSSE2 = ret >= 0 && has_sse2;
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348 mp_msg(MSGT_CPUDETECT,MSGL_V, gCpuCaps.hasSSE2 ? "yes.\n" : "no!\n" );
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349 #else
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350 gCpuCaps.hasSSE = 0;
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351 mp_msg(MSGT_CPUDETECT,MSGL_WARN, "No OS support for SSE, disabling to be safe.\n" );
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352 #endif
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353 #elif defined(__MINGW32__) || defined(__CYGWIN__)
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354 LPTOP_LEVEL_EXCEPTION_FILTER exc_fil;
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355 if ( gCpuCaps.hasSSE ) {
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356 mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE... " );
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357 exc_fil = SetUnhandledExceptionFilter(win32_sig_handler_sse);
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358 __asm__ volatile ("xorps %xmm0, %xmm0");
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359 SetUnhandledExceptionFilter(exc_fil);
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360 mp_msg(MSGT_CPUDETECT,MSGL_V, gCpuCaps.hasSSE ? "yes.\n" : "no!\n" );
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361 }
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362 #elif defined(__OS2__)
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363 EXCEPTIONREGISTRATIONRECORD RegRec = { 0, &os2_sig_handler_sse };
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364 if ( gCpuCaps.hasSSE ) {
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365 mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE... " );
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366 DosSetExceptionHandler( &RegRec );
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367 __asm__ volatile ("xorps %xmm0, %xmm0");
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368 DosUnsetExceptionHandler( &RegRec );
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369 mp_msg(MSGT_CPUDETECT,MSGL_V, gCpuCaps.hasSSE ? "yes.\n" : "no!\n" );
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370 }
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371 #elif defined(__linux__)
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372 #if defined(_POSIX_SOURCE)
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373 struct sigaction saved_sigill;
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374
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375 /* Save the original signal handlers.
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376 */
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377 sigaction( SIGILL, NULL, &saved_sigill );
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378
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379 signal( SIGILL, (void (*)(int))sigill_handler_sse );
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380
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381 /* Emulate test for OSFXSR in CR4. The OS will set this bit if it
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382 * supports the extended FPU save and restore required for SSE. If
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383 * we execute an SSE instruction on a PIII and get a SIGILL, the OS
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384 * doesn't support Streaming SIMD Exceptions, even if the processor
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385 * does.
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386 */
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387 if ( gCpuCaps.hasSSE ) {
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388 mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE... " );
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389
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390 // __asm__ volatile ("xorps %%xmm0, %%xmm0");
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391 __asm__ volatile ("xorps %xmm0, %xmm0");
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392
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393 mp_msg(MSGT_CPUDETECT,MSGL_V, gCpuCaps.hasSSE ? "yes.\n" : "no!\n" );
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394 }
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395
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396 /* Restore the original signal handlers.
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397 */
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398 sigaction( SIGILL, &saved_sigill, NULL );
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399
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400 /* If we've gotten to here and the XMM CPUID bit is still set, we're
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401 * safe to go ahead and hook out the SSE code throughout Mesa.
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402 */
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403 mp_msg(MSGT_CPUDETECT,MSGL_V, "Tests of OS support for SSE %s\n", gCpuCaps.hasSSE ? "passed." : "failed!" );
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404 #else
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405 /* We can't use POSIX signal handling to test the availability of
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406 * SSE, so we disable it by default.
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407 */
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408 mp_msg(MSGT_CPUDETECT,MSGL_WARN, "Cannot test OS support for SSE, disabling to be safe.\n" );
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409 gCpuCaps.hasSSE=0;
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410 #endif /* _POSIX_SOURCE */
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411 #else
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412 /* Do nothing on other platforms for now.
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413 */
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414 mp_msg(MSGT_CPUDETECT,MSGL_WARN, "Cannot test OS support for SSE, leaving disabled.\n" );
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415 gCpuCaps.hasSSE=0;
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416 #endif /* __linux__ */
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417 }
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418 #else /* ARCH_X86 */
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419
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420 #ifdef __APPLE__
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421 #include <sys/sysctl.h>
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422 #elif defined(__AMIGAOS4__)
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423 /* nothing */
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424 #else
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425 #include <signal.h>
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426 #include <setjmp.h>
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427
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428 static sigjmp_buf jmpbuf;
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429 static volatile sig_atomic_t canjump = 0;
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diff changeset
430
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431 static void sigill_handler (int sig)
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432 {
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433 if (!canjump) {
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434 signal (sig, SIG_DFL);
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435 raise (sig);
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436 }
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diff changeset
437
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438 canjump = 0;
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439 siglongjmp (jmpbuf, 1);
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440 }
25329
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441 #endif /* __APPLE__ */
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diff changeset
442
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443 void GetCpuCaps( CpuCaps *caps)
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444 {
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445 caps->cpuType=0;
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446 caps->cpuModel=0;
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447 caps->cpuStepping=0;
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448 caps->hasMMX=0;
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449 caps->hasMMX2=0;
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450 caps->has3DNow=0;
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451 caps->has3DNowExt=0;
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452 caps->hasSSE=0;
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453 caps->hasSSE2=0;
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454 caps->hasSSE3=0;
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455 caps->hasSSSE3=0;
dd7f15a3fb1b the great MPlayer tab removal: part II
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456 caps->hasSSE4a=0;
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
457 caps->isX86=0;
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
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458 caps->hasAltiVec = 0;
29263
0f1b5b68af32 whitespace cosmetics: Remove all trailing whitespace.
diego
parents: 29114
diff changeset
459 #if HAVE_ALTIVEC
25329
676e2ace8a46 Replace SYS_DARWIN conditional by the more correct __APPLE__.
diego
parents: 24664
diff changeset
460 #ifdef __APPLE__
9003
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
461 /*
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
462 rip-off from ffmpeg altivec detection code.
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
463 this code also appears on Apple's AltiVec pages.
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
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464 */
31077
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diego
parents: 30929
diff changeset
465 {
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
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466 int sels[2] = {CTL_HW, HW_VECTORUNIT};
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
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467 int has_vu = 0;
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
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468 size_t len = sizeof(has_vu);
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
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469 int err;
9003
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
470
31077
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diego
parents: 30929
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471 err = sysctl(sels, 2, &has_vu, &len, NULL, 0);
9003
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
472
31077
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diego
parents: 30929
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473 if (err == 0)
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
474 if (has_vu != 0)
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
475 caps->hasAltiVec = 1;
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
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476 }
28364
3e3bd9da4c7e Use OS preprocessor checks with '#if defined()' consistently.
diego
parents: 28342
diff changeset
477 #elif defined(__AMIGAOS4__)
31077
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diego
parents: 30929
diff changeset
478 ULONG result = 0;
17702
485f04e5a58c add Amiga-style AltiVec detection, patch from andrea at amigasoft dot net
pacman
parents: 17566
diff changeset
479
31077
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diego
parents: 30929
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480 GetCPUInfoTags(GCIT_VectorUnit, &result, TAG_DONE);
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
481 if (result == VECTORTYPE_ALTIVEC)
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
482 caps->hasAltiVec = 1;
17702
485f04e5a58c add Amiga-style AltiVec detection, patch from andrea at amigasoft dot net
pacman
parents: 17566
diff changeset
483 #else
9003
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
484 /* no Darwin, do it the brute-force way */
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
485 /* this is borrowed from the libmpeg2 library */
31077
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
486 {
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
487 signal (SIGILL, sigill_handler);
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
488 if (sigsetjmp (jmpbuf, 1)) {
9003
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
489 signal (SIGILL, SIG_DFL);
31077
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
490 } else {
9003
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
491 canjump = 1;
29263
0f1b5b68af32 whitespace cosmetics: Remove all trailing whitespace.
diego
parents: 29114
diff changeset
492
31077
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diego
parents: 30929
diff changeset
493 __asm__ volatile ("mtspr 256, %0\n\t"
9122
5ba896a38d75 The two attached patches *should* allow for proper
arpi
parents: 9003
diff changeset
494 "vand %%v0, %%v0, %%v0"
9003
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
495 :
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
496 : "r" (-1));
29263
0f1b5b68af32 whitespace cosmetics: Remove all trailing whitespace.
diego
parents: 29114
diff changeset
497
31077
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diego
parents: 30929
diff changeset
498 signal (SIGILL, SIG_DFL);
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
499 caps->hasAltiVec = 1;
9003
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
500 }
31077
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diego
parents: 30929
diff changeset
501 }
25329
676e2ace8a46 Replace SYS_DARWIN conditional by the more correct __APPLE__.
diego
parents: 24664
diff changeset
502 #endif /* __APPLE__ */
31077
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
503 mp_msg(MSGT_CPUDETECT,MSGL_V,"AltiVec %sfound\n", (caps->hasAltiVec ? "" : "not "));
9003
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
504 #endif /* HAVE_ALTIVEC */
11962
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
505
31077
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diego
parents: 30929
diff changeset
506 if (ARCH_IA64)
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
507 mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: Intel Itanium\n");
11962
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
508
31077
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diego
parents: 30929
diff changeset
509 if (ARCH_SPARC)
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
510 mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: Sun Sparc\n");
11962
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
511
31077
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
512 if (ARCH_ARM)
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
513 mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: ARM\n");
11962
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
514
31077
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
515 if (ARCH_PPC)
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
516 mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: PowerPC\n");
11962
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
517
31077
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diego
parents: 30929
diff changeset
518 if (ARCH_ALPHA)
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
519 mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: Digital Alpha\n");
11962
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
520
31077
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diego
parents: 30929
diff changeset
521 if (ARCH_MIPS)
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
522 mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: MIPS\n");
11962
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
523
31077
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diego
parents: 30929
diff changeset
524 if (ARCH_PA_RISC)
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
525 mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: Hewlett-Packard PA-RISC\n");
11962
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
526
31077
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diego
parents: 30929
diff changeset
527 if (ARCH_S390)
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
528 mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: IBM S/390\n");
11962
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
529
31077
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
530 if (ARCH_S390X)
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
531 mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU: IBM S/390X\n");
11962
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
532
31077
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
533 if (ARCH_VAX)
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
534 mp_msg(MSGT_CPUDETECT,MSGL_V, "CPU: Digital VAX\n" );
25340
b6107034e981 support for xtensa CPU architecture
diego
parents: 25339
diff changeset
535
31077
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
536 if (ARCH_XTENSA)
dd7f15a3fb1b the great MPlayer tab removal: part II
diego
parents: 30929
diff changeset
537 mp_msg(MSGT_CPUDETECT,MSGL_V, "CPU: Tensilica Xtensa\n" );
3146
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
diff changeset
538 }
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
diff changeset
539 #endif /* !ARCH_X86 */