annotate cpudetect.c @ 15132:f3617970ae22

Break overly long lines into something more manageable.
author diego
date Mon, 11 Apr 2005 22:59:33 +0000
parents d04cbfe4ea8d
children 3758536dcef3
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1 #include "config.h"
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2 #include "cpudetect.h"
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3 #include "mp_msg.h"
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4
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5 CpuCaps gCpuCaps;
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6
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7 #ifdef HAVE_MALLOC_H
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8 #include <malloc.h>
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9 #endif
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10 #include <stdlib.h>
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11
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12 #if defined(ARCH_X86) || defined(ARCH_X86_64)
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13
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14 #include <stdio.h>
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15 #include <string.h>
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16
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17 #if defined (__NetBSD__) || defined(__OpenBSD__)
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18 #include <sys/param.h>
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19 #include <sys/sysctl.h>
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20 #include <machine/cpu.h>
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21 #endif
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22
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23 #ifdef __FreeBSD__
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24 #include <sys/types.h>
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25 #include <sys/sysctl.h>
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26 #endif
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27
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28 #ifdef __linux__
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29 #include <signal.h>
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30 #endif
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31
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32 #ifdef WIN32
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33 #include <windows.h>
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34 #endif
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35
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36 //#define X86_FXSR_MAGIC
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37 /* Thanks to the FreeBSD project for some of this cpuid code, and
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38 * help understanding how to use it. Thanks to the Mesa
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39 * team for SSE support detection and more cpu detect code.
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40 */
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41
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42 /* I believe this code works. However, it has only been used on a PII and PIII */
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43
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44 static void check_os_katmai_support( void );
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45
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46 #if 1
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47 // return TRUE if cpuid supported
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48 static int has_cpuid()
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49 {
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50 long a, c;
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51
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52 // code from libavcodec:
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53 __asm__ __volatile__ (
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54 /* See if CPUID instruction is supported ... */
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55 /* ... Get copies of EFLAGS into eax and ecx */
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56 "pushf\n\t"
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57 "pop %0\n\t"
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58 "mov %0, %1\n\t"
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59
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60 /* ... Toggle the ID bit in one copy and store */
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61 /* to the EFLAGS reg */
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62 "xor $0x200000, %0\n\t"
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63 "push %0\n\t"
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64 "popf\n\t"
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65
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66 /* ... Get the (hopefully modified) EFLAGS */
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67 "pushf\n\t"
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68 "pop %0\n\t"
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69 : "=a" (a), "=c" (c)
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70 :
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71 : "cc"
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72 );
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73
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74 return (a!=c);
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75 }
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76 #endif
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77
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78 static void
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79 do_cpuid(unsigned int ax, unsigned int *p)
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80 {
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81 #if 0
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82 __asm __volatile(
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83 "cpuid;"
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84 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3])
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85 : "0" (ax)
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86 );
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87 #else
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88 // code from libavcodec:
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89 __asm __volatile
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90 ("mov %%"REG_b", %%"REG_S"\n\t"
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91 "cpuid\n\t"
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92 "xchg %%"REG_b", %%"REG_S
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93 : "=a" (p[0]), "=S" (p[1]),
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94 "=c" (p[2]), "=d" (p[3])
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95 : "0" (ax));
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96 #endif
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97
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98 }
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99
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100 void GetCpuCaps( CpuCaps *caps)
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101 {
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102 unsigned int regs[4];
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103 unsigned int regs2[4];
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104
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105 memset(caps, 0, sizeof(*caps));
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106 caps->isX86=1;
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107 caps->cl_size=32; /* default */
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108 if (!has_cpuid()) {
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109 mp_msg(MSGT_CPUDETECT,MSGL_WARN,"CPUID not supported!??? (maybe an old 486?)\n");
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110 return;
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111 }
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112 do_cpuid(0x00000000, regs); // get _max_ cpuid level and vendor name
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113 mp_msg(MSGT_CPUDETECT,MSGL_V,"CPU vendor name: %.4s%.4s%.4s max cpuid level: %d\n",
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114 (char*) (regs+1),(char*) (regs+3),(char*) (regs+2), regs[0]);
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115 if (regs[0]>=0x00000001)
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116 {
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117 char *tmpstr;
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118 unsigned cl_size;
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119
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120 do_cpuid(0x00000001, regs2);
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121
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122 caps->cpuType=(regs2[0] >> 8)&0xf;
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123 if(caps->cpuType==0xf){
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124 // use extended family (P4, IA64)
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125 caps->cpuType=8+((regs2[0]>>20)&255);
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126 }
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127 caps->cpuStepping=regs2[0] & 0xf;
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128
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129 // general feature flags:
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130 caps->hasTSC = (regs2[3] & (1 << 8 )) >> 8; // 0x0000010
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131 caps->hasMMX = (regs2[3] & (1 << 23 )) >> 23; // 0x0800000
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132 caps->hasSSE = (regs2[3] & (1 << 25 )) >> 25; // 0x2000000
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133 caps->hasSSE2 = (regs2[3] & (1 << 26 )) >> 26; // 0x4000000
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134 caps->hasMMX2 = caps->hasSSE; // SSE cpus supports mmxext too
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135 cl_size = ((regs2[1] >> 8) & 0xFF)*8;
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136 if(cl_size) caps->cl_size = cl_size;
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137
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138 tmpstr=GetCpuFriendlyName(regs, regs2);
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139 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"CPU: %s ",tmpstr);
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140 free(tmpstr);
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141 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"(Family: %d, Stepping: %d)\n",
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142 caps->cpuType, caps->cpuStepping);
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143
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144 }
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145 do_cpuid(0x80000000, regs);
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146 if (regs[0]>=0x80000001) {
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147 mp_msg(MSGT_CPUDETECT,MSGL_V,"extended cpuid-level: %d\n",regs[0]&0x7FFFFFFF);
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148 do_cpuid(0x80000001, regs2);
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149 caps->hasMMX |= (regs2[3] & (1 << 23 )) >> 23; // 0x0800000
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150 caps->hasMMX2 |= (regs2[3] & (1 << 22 )) >> 22; // 0x400000
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151 caps->has3DNow = (regs2[3] & (1 << 31 )) >> 31; //0x80000000
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152 caps->has3DNowExt = (regs2[3] & (1 << 30 )) >> 30;
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153 }
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154 if(regs[0]>=0x80000006)
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155 {
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156 do_cpuid(0x80000006, regs2);
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157 mp_msg(MSGT_CPUDETECT,MSGL_V,"extended cache-info: %d\n",regs2[2]&0x7FFFFFFF);
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158 caps->cl_size = regs2[2] & 0xFF;
778989dba3a2 cpu cache line length detection
arpi
parents: 8533
diff changeset
159 }
778989dba3a2 cpu cache line length detection
arpi
parents: 8533
diff changeset
160 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"Detected cache-line size is %u bytes\n",caps->cl_size);
2288
dac462a0ac8c final fix?
arpi
parents: 2284
diff changeset
161 #if 0
5937
4b18bf35f153 printf to mp_msg
albeu
parents: 4829
diff changeset
162 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"cpudetect: MMX=%d MMX2=%d SSE=%d SSE2=%d 3DNow=%d 3DNowExt=%d\n",
2288
dac462a0ac8c final fix?
arpi
parents: 2284
diff changeset
163 gCpuCaps.hasMMX,
dac462a0ac8c final fix?
arpi
parents: 2284
diff changeset
164 gCpuCaps.hasMMX2,
dac462a0ac8c final fix?
arpi
parents: 2284
diff changeset
165 gCpuCaps.hasSSE,
dac462a0ac8c final fix?
arpi
parents: 2284
diff changeset
166 gCpuCaps.hasSSE2,
dac462a0ac8c final fix?
arpi
parents: 2284
diff changeset
167 gCpuCaps.has3DNow,
dac462a0ac8c final fix?
arpi
parents: 2284
diff changeset
168 gCpuCaps.has3DNowExt );
dac462a0ac8c final fix?
arpi
parents: 2284
diff changeset
169 #endif
dac462a0ac8c final fix?
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parents: 2284
diff changeset
170
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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diff changeset
171 /* FIXME: Does SSE2 need more OS support, too? */
12613
c315d377634f disable buggy sse on mingw
faust3
parents: 12143
diff changeset
172 #if defined(__linux__) || defined(__FreeBSD__) || defined(__NetBSD__) || defined(__CYGWIN__) || defined(__OpenBSD__)
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
173 if (caps->hasSSE)
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
174 check_os_katmai_support();
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
175 if (!caps->hasSSE)
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
176 caps->hasSSE2 = 0;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
177 #else
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
178 caps->hasSSE=0;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
179 caps->hasSSE2 = 0;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
180 #endif
3146
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
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181 // caps->has3DNow=1;
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
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182 // caps->hasMMX2 = 0;
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
diff changeset
183 // caps->hasMMX = 0;
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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diff changeset
184
4829
35ed5387b804 dont ignore --disable-mmx, ...
michael
parents: 3850
diff changeset
185 #ifndef HAVE_MMX
6134
2f59920361ff cosmetics on CPU detection messages
arpi
parents: 5937
diff changeset
186 if(caps->hasMMX) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"MMX supported but disabled\n");
4829
35ed5387b804 dont ignore --disable-mmx, ...
michael
parents: 3850
diff changeset
187 caps->hasMMX=0;
35ed5387b804 dont ignore --disable-mmx, ...
michael
parents: 3850
diff changeset
188 #endif
35ed5387b804 dont ignore --disable-mmx, ...
michael
parents: 3850
diff changeset
189 #ifndef HAVE_MMX2
6134
2f59920361ff cosmetics on CPU detection messages
arpi
parents: 5937
diff changeset
190 if(caps->hasMMX2) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"MMX2 supported but disabled\n");
4829
35ed5387b804 dont ignore --disable-mmx, ...
michael
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191 caps->hasMMX2=0;
35ed5387b804 dont ignore --disable-mmx, ...
michael
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diff changeset
192 #endif
35ed5387b804 dont ignore --disable-mmx, ...
michael
parents: 3850
diff changeset
193 #ifndef HAVE_SSE
6134
2f59920361ff cosmetics on CPU detection messages
arpi
parents: 5937
diff changeset
194 if(caps->hasSSE) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"SSE supported but disabled\n");
4829
35ed5387b804 dont ignore --disable-mmx, ...
michael
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195 caps->hasSSE=0;
35ed5387b804 dont ignore --disable-mmx, ...
michael
parents: 3850
diff changeset
196 #endif
35ed5387b804 dont ignore --disable-mmx, ...
michael
parents: 3850
diff changeset
197 #ifndef HAVE_SSE2
6134
2f59920361ff cosmetics on CPU detection messages
arpi
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diff changeset
198 if(caps->hasSSE2) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"SSE2 supported but disabled\n");
4829
35ed5387b804 dont ignore --disable-mmx, ...
michael
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199 caps->hasSSE2=0;
35ed5387b804 dont ignore --disable-mmx, ...
michael
parents: 3850
diff changeset
200 #endif
35ed5387b804 dont ignore --disable-mmx, ...
michael
parents: 3850
diff changeset
201 #ifndef HAVE_3DNOW
6134
2f59920361ff cosmetics on CPU detection messages
arpi
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diff changeset
202 if(caps->has3DNow) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"3DNow supported but disabled\n");
4829
35ed5387b804 dont ignore --disable-mmx, ...
michael
parents: 3850
diff changeset
203 caps->has3DNow=0;
35ed5387b804 dont ignore --disable-mmx, ...
michael
parents: 3850
diff changeset
204 #endif
35ed5387b804 dont ignore --disable-mmx, ...
michael
parents: 3850
diff changeset
205 #ifndef HAVE_3DNOWEX
6134
2f59920361ff cosmetics on CPU detection messages
arpi
parents: 5937
diff changeset
206 if(caps->has3DNowExt) mp_msg(MSGT_CPUDETECT,MSGL_WARN,"3DNowExt supported but disabled\n");
4829
35ed5387b804 dont ignore --disable-mmx, ...
michael
parents: 3850
diff changeset
207 caps->has3DNowExt=0;
35ed5387b804 dont ignore --disable-mmx, ...
michael
parents: 3850
diff changeset
208 #endif
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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diff changeset
209 }
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
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diff changeset
210
2301
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2288
diff changeset
211
b4c4c832cce7 Detect and show cpu name.
atmos4
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diff changeset
212 #define CPUID_EXTFAMILY ((regs2[0] >> 20)&0xFF) /* 27..20 */
b4c4c832cce7 Detect and show cpu name.
atmos4
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213 #define CPUID_EXTMODEL ((regs2[0] >> 16)&0x0F) /* 19..16 */
b4c4c832cce7 Detect and show cpu name.
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diff changeset
214 #define CPUID_TYPE ((regs2[0] >> 12)&0x04) /* 13..12 */
b4c4c832cce7 Detect and show cpu name.
atmos4
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diff changeset
215 #define CPUID_FAMILY ((regs2[0] >> 8)&0x0F) /* 11..08 */
b4c4c832cce7 Detect and show cpu name.
atmos4
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diff changeset
216 #define CPUID_MODEL ((regs2[0] >> 4)&0x0F) /* 07..04 */
b4c4c832cce7 Detect and show cpu name.
atmos4
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diff changeset
217 #define CPUID_STEPPING ((regs2[0] >> 0)&0x0F) /* 03..00 */
b4c4c832cce7 Detect and show cpu name.
atmos4
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diff changeset
218
b4c4c832cce7 Detect and show cpu name.
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diff changeset
219 char *GetCpuFriendlyName(unsigned int regs[], unsigned int regs2[]){
b4c4c832cce7 Detect and show cpu name.
atmos4
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diff changeset
220 #include "cputable.h" /* get cpuname and cpuvendors */
13628
315f133df221 Remove CPU speed detection since
diego
parents: 12613
diff changeset
221 char vendor[17];
2303
456e22bfb147 returns a malloc()'ed string instead of an auto char[]
pl
parents: 2301
diff changeset
222 char *retname;
13628
315f133df221 Remove CPU speed detection since
diego
parents: 12613
diff changeset
223 int i;
2301
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2288
diff changeset
224
2417
6b4952e00ad0 removed warning
pl
parents: 2303
diff changeset
225 if (NULL==(retname=(char*)malloc(256))) {
5937
4b18bf35f153 printf to mp_msg
albeu
parents: 4829
diff changeset
226 mp_msg(MSGT_CPUDETECT,MSGL_FATAL,"Error: GetCpuFriendlyName() not enough memory\n");
2303
456e22bfb147 returns a malloc()'ed string instead of an auto char[]
pl
parents: 2301
diff changeset
227 exit(1);
456e22bfb147 returns a malloc()'ed string instead of an auto char[]
pl
parents: 2301
diff changeset
228 }
456e22bfb147 returns a malloc()'ed string instead of an auto char[]
pl
parents: 2301
diff changeset
229
3837
6659db99f200 warning fix
pl
parents: 3700
diff changeset
230 sprintf(vendor,"%.4s%.4s%.4s",(char*)(regs+1),(char*)(regs+3),(char*)(regs+2));
3146
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
diff changeset
231
2301
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2288
diff changeset
232 for(i=0; i<MAX_VENDORS; i++){
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2288
diff changeset
233 if(!strcmp(cpuvendors[i].string,vendor)){
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2288
diff changeset
234 if(cpuname[i][CPUID_FAMILY][CPUID_MODEL]){
13628
315f133df221 Remove CPU speed detection since
diego
parents: 12613
diff changeset
235 snprintf(retname,255,"%s %s",cpuvendors[i].name,cpuname[i][CPUID_FAMILY][CPUID_MODEL]);
2301
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2288
diff changeset
236 } else {
13628
315f133df221 Remove CPU speed detection since
diego
parents: 12613
diff changeset
237 snprintf(retname,255,"unknown %s %d. Generation CPU",cpuvendors[i].name,CPUID_FAMILY);
5937
4b18bf35f153 printf to mp_msg
albeu
parents: 4829
diff changeset
238 mp_msg(MSGT_CPUDETECT,MSGL_WARN,"unknown %s CPU:\n",cpuvendors[i].name);
4b18bf35f153 printf to mp_msg
albeu
parents: 4829
diff changeset
239 mp_msg(MSGT_CPUDETECT,MSGL_WARN,"Vendor: %s\n",cpuvendors[i].string);
4b18bf35f153 printf to mp_msg
albeu
parents: 4829
diff changeset
240 mp_msg(MSGT_CPUDETECT,MSGL_WARN,"Type: %d\n",CPUID_TYPE);
4b18bf35f153 printf to mp_msg
albeu
parents: 4829
diff changeset
241 mp_msg(MSGT_CPUDETECT,MSGL_WARN,"Family: %d (ext: %d)\n",CPUID_FAMILY,CPUID_EXTFAMILY);
4b18bf35f153 printf to mp_msg
albeu
parents: 4829
diff changeset
242 mp_msg(MSGT_CPUDETECT,MSGL_WARN,"Model: %d (ext: %d)\n",CPUID_MODEL,CPUID_EXTMODEL);
4b18bf35f153 printf to mp_msg
albeu
parents: 4829
diff changeset
243 mp_msg(MSGT_CPUDETECT,MSGL_WARN,"Stepping: %d\n",CPUID_STEPPING);
4b18bf35f153 printf to mp_msg
albeu
parents: 4829
diff changeset
244 mp_msg(MSGT_CPUDETECT,MSGL_WARN,"Please send the above info along with the exact CPU name"
2301
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2288
diff changeset
245 "to the MPlayer-Developers, so we can add it to the list!\n");
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2288
diff changeset
246 }
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2288
diff changeset
247 }
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2288
diff changeset
248 }
14478
d04cbfe4ea8d ensure null-termination after snprintf
reimar
parents: 14455
diff changeset
249 retname[255] = 0;
2301
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2288
diff changeset
250
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2288
diff changeset
251 //printf("Detected CPU: %s\n", retname);
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2288
diff changeset
252 return retname;
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2288
diff changeset
253 }
b4c4c832cce7 Detect and show cpu name.
atmos4
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diff changeset
254
b4c4c832cce7 Detect and show cpu name.
atmos4
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diff changeset
255 #undef CPUID_EXTFAMILY
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2288
diff changeset
256 #undef CPUID_EXTMODEL
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2288
diff changeset
257 #undef CPUID_TYPE
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2288
diff changeset
258 #undef CPUID_FAMILY
b4c4c832cce7 Detect and show cpu name.
atmos4
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diff changeset
259 #undef CPUID_MODEL
b4c4c832cce7 Detect and show cpu name.
atmos4
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diff changeset
260 #undef CPUID_STEPPING
b4c4c832cce7 Detect and show cpu name.
atmos4
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diff changeset
261
b4c4c832cce7 Detect and show cpu name.
atmos4
parents: 2288
diff changeset
262
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
263 #if defined(__linux__) && defined(_POSIX_SOURCE) && defined(X86_FXSR_MAGIC)
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
264 static void sigill_handler_sse( int signal, struct sigcontext sc )
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
265 {
6134
2f59920361ff cosmetics on CPU detection messages
arpi
parents: 5937
diff changeset
266 mp_msg(MSGT_CPUDETECT,MSGL_V, "SIGILL, " );
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
267
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
268 /* Both the "xorps %%xmm0,%%xmm0" and "divps %xmm0,%%xmm1"
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
269 * instructions are 3 bytes long. We must increment the instruction
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
270 * pointer manually to avoid repeated execution of the offending
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
271 * instruction.
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
272 *
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
273 * If the SIGILL is caused by a divide-by-zero when unmasked
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
274 * exceptions aren't supported, the SIMD FPU status and control
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
275 * word will be restored at the end of the test, so we don't need
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
276 * to worry about doing it here. Besides, we may not be able to...
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
277 */
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
278 sc.eip += 3;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
279
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
280 gCpuCaps.hasSSE=0;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
281 }
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
282
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
283 static void sigfpe_handler_sse( int signal, struct sigcontext sc )
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
284 {
6134
2f59920361ff cosmetics on CPU detection messages
arpi
parents: 5937
diff changeset
285 mp_msg(MSGT_CPUDETECT,MSGL_V, "SIGFPE, " );
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
286
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
287 if ( sc.fpstate->magic != 0xffff ) {
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
288 /* Our signal context has the extended FPU state, so reset the
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
289 * divide-by-zero exception mask and clear the divide-by-zero
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
290 * exception bit.
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
291 */
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
292 sc.fpstate->mxcsr |= 0x00000200;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
293 sc.fpstate->mxcsr &= 0xfffffffb;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
294 } else {
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
295 /* If we ever get here, we're completely hosed.
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
296 */
6134
2f59920361ff cosmetics on CPU detection messages
arpi
parents: 5937
diff changeset
297 mp_msg(MSGT_CPUDETECT,MSGL_V, "\n\n" );
2f59920361ff cosmetics on CPU detection messages
arpi
parents: 5937
diff changeset
298 mp_msg(MSGT_CPUDETECT,MSGL_V, "SSE enabling test failed badly!" );
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
299 }
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
300 }
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
301 #endif /* __linux__ && _POSIX_SOURCE && X86_FXSR_MAGIC */
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
302
10440
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
303 #ifdef WIN32
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
304 LONG CALLBACK win32_sig_handler_sse(EXCEPTION_POINTERS* ep)
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
305 {
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
306 if(ep->ExceptionRecord->ExceptionCode==EXCEPTION_ILLEGAL_INSTRUCTION){
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
307 mp_msg(MSGT_CPUDETECT,MSGL_V, "SIGILL, " );
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
308 ep->ContextRecord->Eip +=3;
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
309 gCpuCaps.hasSSE=0;
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
310 return EXCEPTION_CONTINUE_EXECUTION;
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
311 }
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
312 return EXCEPTION_CONTINUE_SEARCH;
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
313 }
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
314 #endif /* WIN32 */
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
315
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
316 /* If we're running on a processor that can do SSE, let's see if we
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
317 * are allowed to or not. This will catch 2.4.0 or later kernels that
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
318 * haven't been configured for a Pentium III but are running on one,
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
319 * and RedHat patched 2.2 kernels that have broken exception handling
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
320 * support for user space apps that do SSE.
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
321 */
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
322 static void check_os_katmai_support( void )
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
323 {
14455
d94e79aecd69 assume OS support SSE on x86_64
aurel
parents: 13720
diff changeset
324 #ifdef ARCH_X86_64
d94e79aecd69 assume OS support SSE on x86_64
aurel
parents: 13720
diff changeset
325 gCpuCaps.hasSSE=1;
d94e79aecd69 assume OS support SSE on x86_64
aurel
parents: 13720
diff changeset
326 gCpuCaps.hasSSE2=1;
d94e79aecd69 assume OS support SSE on x86_64
aurel
parents: 13720
diff changeset
327 #elif defined(__FreeBSD__)
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
328 int has_sse=0, ret;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
329 size_t len=sizeof(has_sse);
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
330
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
331 ret = sysctlbyname("hw.instruction_sse", &has_sse, &len, NULL, 0);
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
332 if (ret || !has_sse)
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
333 gCpuCaps.hasSSE=0;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
334
12143
da228f2485d9 SSE support under OpenBSD, patch by Bjorn Sandell
alex
parents: 12087
diff changeset
335 #elif defined(__NetBSD__) || defined (__OpenBSD__)
da228f2485d9 SSE support under OpenBSD, patch by Bjorn Sandell
alex
parents: 12087
diff changeset
336 #if __NetBSD_Version__ >= 105250000 || (defined __OpenBSD__)
8533
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
337 int has_sse, has_sse2, ret, mib[2];
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
338 size_t varlen;
8401
1b2fc92980d9 Runtime SSE detection for NEtBSD, patch by Nick Hudson <skrll at netbsd.org>
atmos4
parents: 8123
diff changeset
339
8533
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
340 mib[0] = CTL_MACHDEP;
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
341 mib[1] = CPU_SSE;
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
342 varlen = sizeof(has_sse);
8401
1b2fc92980d9 Runtime SSE detection for NEtBSD, patch by Nick Hudson <skrll at netbsd.org>
atmos4
parents: 8123
diff changeset
343
8533
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
344 mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE... " );
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
345 ret = sysctl(mib, 2, &has_sse, &varlen, NULL, 0);
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
346 if (ret < 0 || !has_sse) {
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
347 gCpuCaps.hasSSE=0;
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
348 mp_msg(MSGT_CPUDETECT,MSGL_V, "no!\n" );
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
349 } else {
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
350 gCpuCaps.hasSSE=1;
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
351 mp_msg(MSGT_CPUDETECT,MSGL_V, "yes!\n" );
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
352 }
8401
1b2fc92980d9 Runtime SSE detection for NEtBSD, patch by Nick Hudson <skrll at netbsd.org>
atmos4
parents: 8123
diff changeset
353
8533
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
354 mib[1] = CPU_SSE2;
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
355 varlen = sizeof(has_sse2);
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
356 mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE2... " );
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
357 ret = sysctl(mib, 2, &has_sse2, &varlen, NULL, 0);
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
358 if (ret < 0 || !has_sse2) {
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
359 gCpuCaps.hasSSE2=0;
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
360 mp_msg(MSGT_CPUDETECT,MSGL_V, "no!\n" );
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
361 } else {
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
362 gCpuCaps.hasSSE2=1;
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
363 mp_msg(MSGT_CPUDETECT,MSGL_V, "yes!\n" );
8401
1b2fc92980d9 Runtime SSE detection for NEtBSD, patch by Nick Hudson <skrll at netbsd.org>
atmos4
parents: 8123
diff changeset
364 }
1b2fc92980d9 Runtime SSE detection for NEtBSD, patch by Nick Hudson <skrll at netbsd.org>
atmos4
parents: 8123
diff changeset
365 #else
8533
9b73b801af55 Ok, here is a better patch, which even adds a fix to compile it on older
arpi
parents: 8401
diff changeset
366 gCpuCaps.hasSSE = 0;
8401
1b2fc92980d9 Runtime SSE detection for NEtBSD, patch by Nick Hudson <skrll at netbsd.org>
atmos4
parents: 8123
diff changeset
367 mp_msg(MSGT_CPUDETECT,MSGL_WARN, "No OS support for SSE, disabling to be safe.\n" );
1b2fc92980d9 Runtime SSE detection for NEtBSD, patch by Nick Hudson <skrll at netbsd.org>
atmos4
parents: 8123
diff changeset
368 #endif
10440
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
369 #elif defined(WIN32)
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
370 LPTOP_LEVEL_EXCEPTION_FILTER exc_fil;
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
371 if ( gCpuCaps.hasSSE ) {
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
372 mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE... " );
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
373 exc_fil = SetUnhandledExceptionFilter(win32_sig_handler_sse);
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
374 __asm __volatile ("xorps %xmm0, %xmm0");
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
375 SetUnhandledExceptionFilter(exc_fil);
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
376 if ( gCpuCaps.hasSSE ) mp_msg(MSGT_CPUDETECT,MSGL_V, "yes.\n" );
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
377 else mp_msg(MSGT_CPUDETECT,MSGL_V, "no!\n" );
890f35b31edd SSE os support detection for windows
faust3
parents: 9324
diff changeset
378 }
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
379 #elif defined(__linux__)
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
380 #if defined(_POSIX_SOURCE) && defined(X86_FXSR_MAGIC)
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
381 struct sigaction saved_sigill;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
382 struct sigaction saved_sigfpe;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
383
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
384 /* Save the original signal handlers.
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
385 */
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
386 sigaction( SIGILL, NULL, &saved_sigill );
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
387 sigaction( SIGFPE, NULL, &saved_sigfpe );
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
388
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
389 signal( SIGILL, (void (*)(int))sigill_handler_sse );
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
390 signal( SIGFPE, (void (*)(int))sigfpe_handler_sse );
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
391
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
392 /* Emulate test for OSFXSR in CR4. The OS will set this bit if it
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
393 * supports the extended FPU save and restore required for SSE. If
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
394 * we execute an SSE instruction on a PIII and get a SIGILL, the OS
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
395 * doesn't support Streaming SIMD Exceptions, even if the processor
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
396 * does.
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
397 */
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
398 if ( gCpuCaps.hasSSE ) {
6134
2f59920361ff cosmetics on CPU detection messages
arpi
parents: 5937
diff changeset
399 mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE... " );
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
400
2272
c26a9eff0993 cpu detection fixed
arpi
parents: 2268
diff changeset
401 // __asm __volatile ("xorps %%xmm0, %%xmm0");
c26a9eff0993 cpu detection fixed
arpi
parents: 2268
diff changeset
402 __asm __volatile ("xorps %xmm0, %xmm0");
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
403
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
404 if ( gCpuCaps.hasSSE ) {
6134
2f59920361ff cosmetics on CPU detection messages
arpi
parents: 5937
diff changeset
405 mp_msg(MSGT_CPUDETECT,MSGL_V, "yes.\n" );
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
406 } else {
6134
2f59920361ff cosmetics on CPU detection messages
arpi
parents: 5937
diff changeset
407 mp_msg(MSGT_CPUDETECT,MSGL_V, "no!\n" );
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
408 }
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
409 }
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
410
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
411 /* Emulate test for OSXMMEXCPT in CR4. The OS will set this bit if
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
412 * it supports unmasked SIMD FPU exceptions. If we unmask the
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
413 * exceptions, do a SIMD divide-by-zero and get a SIGILL, the OS
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
414 * doesn't support unmasked SIMD FPU exceptions. If we get a SIGFPE
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
415 * as expected, we're okay but we need to clean up after it.
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
416 *
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
417 * Are we being too stringent in our requirement that the OS support
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
418 * unmasked exceptions? Certain RedHat 2.2 kernels enable SSE by
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
419 * setting CR4.OSFXSR but don't support unmasked exceptions. Win98
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
420 * doesn't even support them. We at least know the user-space SSE
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
421 * support is good in kernels that do support unmasked exceptions,
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
422 * and therefore to be safe I'm going to leave this test in here.
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
423 */
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
424 if ( gCpuCaps.hasSSE ) {
6134
2f59920361ff cosmetics on CPU detection messages
arpi
parents: 5937
diff changeset
425 mp_msg(MSGT_CPUDETECT,MSGL_V, "Testing OS support for SSE unmasked exceptions... " );
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
426
2272
c26a9eff0993 cpu detection fixed
arpi
parents: 2268
diff changeset
427 // test_os_katmai_exception_support();
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
428
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
429 if ( gCpuCaps.hasSSE ) {
6134
2f59920361ff cosmetics on CPU detection messages
arpi
parents: 5937
diff changeset
430 mp_msg(MSGT_CPUDETECT,MSGL_V, "yes.\n" );
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
431 } else {
6134
2f59920361ff cosmetics on CPU detection messages
arpi
parents: 5937
diff changeset
432 mp_msg(MSGT_CPUDETECT,MSGL_V, "no!\n" );
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
433 }
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
434 }
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
435
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
436 /* Restore the original signal handlers.
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
437 */
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
438 sigaction( SIGILL, &saved_sigill, NULL );
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
439 sigaction( SIGFPE, &saved_sigfpe, NULL );
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
440
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
441 /* If we've gotten to here and the XMM CPUID bit is still set, we're
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
442 * safe to go ahead and hook out the SSE code throughout Mesa.
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
443 */
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
444 if ( gCpuCaps.hasSSE ) {
6134
2f59920361ff cosmetics on CPU detection messages
arpi
parents: 5937
diff changeset
445 mp_msg(MSGT_CPUDETECT,MSGL_V, "Tests of OS support for SSE passed.\n" );
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
446 } else {
6134
2f59920361ff cosmetics on CPU detection messages
arpi
parents: 5937
diff changeset
447 mp_msg(MSGT_CPUDETECT,MSGL_V, "Tests of OS support for SSE failed!\n" );
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
448 }
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
449 #else
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
450 /* We can't use POSIX signal handling to test the availability of
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
451 * SSE, so we disable it by default.
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
452 */
5937
4b18bf35f153 printf to mp_msg
albeu
parents: 4829
diff changeset
453 mp_msg(MSGT_CPUDETECT,MSGL_WARN, "Cannot test OS support for SSE, disabling to be safe.\n" );
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
454 gCpuCaps.hasSSE=0;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
455 #endif /* _POSIX_SOURCE && X86_FXSR_MAGIC */
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
456 #else
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
457 /* Do nothing on other platforms for now.
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
458 */
6134
2f59920361ff cosmetics on CPU detection messages
arpi
parents: 5937
diff changeset
459 mp_msg(MSGT_CPUDETECT,MSGL_WARN, "Cannot test OS support for SSE, leaving disabled.\n" );
2268
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
460 gCpuCaps.hasSSE=0;
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
461 #endif /* __linux__ */
72ff2179d396 cpu detect code by Eric Anholt <eanholt@gladstone.uoregon.edu>
arpi
parents:
diff changeset
462 }
13720
821f464b4d90 adapting existing mmx/mmx2/sse/3dnow optimizations so they work on x86_64
aurel
parents: 13628
diff changeset
463 #else /* ARCH_X86 || ARCH_X86_64 */
3146
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
diff changeset
464
9003
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
465 #ifdef SYS_DARWIN
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
466 #include <sys/sysctl.h>
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
467 #else
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
468 #include <signal.h>
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
469 #include <setjmp.h>
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
470
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
471 static sigjmp_buf jmpbuf;
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
472 static volatile sig_atomic_t canjump = 0;
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
473
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
474 static void sigill_handler (int sig)
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
475 {
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
476 if (!canjump) {
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
477 signal (sig, SIG_DFL);
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
478 raise (sig);
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
479 }
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
480
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
481 canjump = 0;
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
482 siglongjmp (jmpbuf, 1);
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
483 }
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
484 #endif
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
485
3146
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
diff changeset
486 void GetCpuCaps( CpuCaps *caps)
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
diff changeset
487 {
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
diff changeset
488 caps->cpuType=0;
3403
c4ca766a2d05 added cpuStepping to CpuCaps struct (needed win32.c)
alex
parents: 3146
diff changeset
489 caps->cpuStepping=0;
3146
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
diff changeset
490 caps->hasMMX=0;
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
diff changeset
491 caps->hasMMX2=0;
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
diff changeset
492 caps->has3DNow=0;
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
diff changeset
493 caps->has3DNowExt=0;
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
diff changeset
494 caps->hasSSE=0;
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
diff changeset
495 caps->hasSSE2=0;
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
diff changeset
496 caps->isX86=0;
9003
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
497 caps->hasAltiVec = 0;
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
498 #ifdef HAVE_ALTIVEC
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
499 #ifdef SYS_DARWIN
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
500 /*
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
501 rip-off from ffmpeg altivec detection code.
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
502 this code also appears on Apple's AltiVec pages.
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
503 */
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
504 {
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
505 int sels[2] = {CTL_HW, HW_VECTORUNIT};
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
506 int has_vu = 0;
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
507 size_t len = sizeof(has_vu);
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
508 int err;
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
509
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
510 err = sysctl(sels, 2, &has_vu, &len, NULL, 0);
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
511
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
512 if (err == 0)
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
513 if (has_vu != 0)
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
514 caps->hasAltiVec = 1;
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
515 }
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
516 #else /* SYS_DARWIN */
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
517 /* no Darwin, do it the brute-force way */
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
518 /* this is borrowed from the libmpeg2 library */
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
519 {
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
520 signal (SIGILL, sigill_handler);
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
521 if (sigsetjmp (jmpbuf, 1)) {
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
522 signal (SIGILL, SIG_DFL);
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
523 } else {
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
524 canjump = 1;
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
525
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
526 asm volatile ("mtspr 256, %0\n\t"
9122
5ba896a38d75 The two attached patches *should* allow for proper
arpi
parents: 9003
diff changeset
527 "vand %%v0, %%v0, %%v0"
9003
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
528 :
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
529 : "r" (-1));
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
530
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
531 signal (SIGILL, SIG_DFL);
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
532 caps->hasAltiVec = 1;
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
533 }
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
534 }
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
535 #endif /* SYS_DARWIN */
9324
alex
parents: 9122
diff changeset
536 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"AltiVec %sfound\n", (caps->hasAltiVec ? "" : "not "));
9003
c428933c7e54 AltiVec detection code ("borrowed" from FFmpeg and
arpi
parents: 8860
diff changeset
537 #endif /* HAVE_ALTIVEC */
11962
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
538
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
539 #ifdef ARCH_IA64
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
540 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"CPU: Intel Itanium\n");
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
541 #endif
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
542
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
543 #ifdef ARCH_SPARC
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
544 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"CPU: Sun Sparc\n");
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
545 #endif
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
546
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
547 #ifdef ARCH_ARMV4L
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
548 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"CPU: ARM\n");
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
549 #endif
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
550
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
551 #ifdef ARCH_POWERPC
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
552 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"CPU: PowerPC\n");
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
553 #endif
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
554
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
555 #ifdef ARCH_ALPHA
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
556 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"CPU: Digital Alpha\n");
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
557 #endif
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
558
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
559 #ifdef ARCH_SGI_MIPS
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
560 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"CPU: SGI MIPS\n");
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
561 #endif
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
562
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
563 #ifdef ARCH_PA_RISC
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
564 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"CPU: Hewlett-Packard PA-RISC\n");
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
565 #endif
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
566
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
567 #ifdef ARCH_S390
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
568 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"CPU: IBM S/390\n");
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
569 #endif
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
570
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
571 #ifdef ARCH_S390X
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
572 mp_msg(MSGT_CPUDETECT,MSGL_INFO,"CPU: IBM S/390X\n");
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
573 #endif
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
574
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
575 #ifdef ARCH_VAX
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
576 mp_msg(MSGT_CPUDETECT,MSGL_INFO, "CPU: Digital VAX\n" );
909093c314e9 architecture type reporting for non-x86 CPUs (try 2, tested on x86 and x86-64)
gabucino
parents: 10955
diff changeset
577 #endif
3146
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
diff changeset
578 }
3164eaa93396 non x86 fix (otherwise we would need #ifdef ARCH_X86 around every if(gCpuCaps.has...))
michael
parents: 2417
diff changeset
579 #endif /* !ARCH_X86 */